ixgbe_ethtool.c

   1// SPDX-License-Identifier: GPL-2.0
   2/* Copyright(c) 1999 - 2024 Intel Corporation. */
   3
   4/* ethtool support for ixgbe */
   5
   6#include <linux/interrupt.h>
   7#include <linux/types.h>
   8#include <linux/module.h>
   9#include <linux/slab.h>
  10#include <linux/pci.h>
  11#include <linux/netdevice.h>
  12#include <linux/ethtool.h>
  13#include <linux/vmalloc.h>
  14#include <linux/highmem.h>
  15#include <linux/uaccess.h>
  16
  17#include "ixgbe.h"
  18#include "ixgbe_phy.h"
  19
  20
  21enum {NETDEV_STATS, IXGBE_STATS};
  22
  23struct ixgbe_stats {
  24	char stat_string[ETH_GSTRING_LEN];
  25	int type;
  26	int sizeof_stat;
  27	int stat_offset;
  28};
  29
  30#define IXGBE_STAT(m)		IXGBE_STATS, \
  31				sizeof(((struct ixgbe_adapter *)0)->m), \
  32				offsetof(struct ixgbe_adapter, m)
  33#define IXGBE_NETDEV_STAT(m)	NETDEV_STATS, \
  34				sizeof(((struct rtnl_link_stats64 *)0)->m), \
  35				offsetof(struct rtnl_link_stats64, m)
  36
  37static const struct ixgbe_stats ixgbe_gstrings_stats[] = {
  38	{"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
  39	{"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
  40	{"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
  41	{"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
  42	{"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
  43	{"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
  44	{"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
  45	{"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
  46	{"lsc_int", IXGBE_STAT(lsc_int)},
  47	{"tx_busy", IXGBE_STAT(tx_busy)},
  48	{"non_eop_descs", IXGBE_STAT(non_eop_descs)},
  49	{"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
  50	{"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
  51	{"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
  52	{"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
  53	{"multicast", IXGBE_NETDEV_STAT(multicast)},
  54	{"broadcast", IXGBE_STAT(stats.bprc)},
  55	{"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
  56	{"collisions", IXGBE_NETDEV_STAT(collisions)},
  57	{"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
  58	{"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
  59	{"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
  60	{"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
  61	{"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
  62	{"fdir_match", IXGBE_STAT(stats.fdirmatch)},
  63	{"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
  64	{"fdir_overflow", IXGBE_STAT(fdir_overflow)},
  65	{"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
  66	{"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
  67	{"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
  68	{"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
  69	{"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
  70	{"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
  71	{"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
  72	{"tx_restart_queue", IXGBE_STAT(restart_queue)},
  73	{"rx_length_errors", IXGBE_STAT(stats.rlec)},
  74	{"rx_long_length_errors", IXGBE_STAT(stats.roc)},
  75	{"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
  76	{"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
  77	{"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
  78	{"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
  79	{"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
  80	{"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
  81	{"alloc_rx_page", IXGBE_STAT(alloc_rx_page)},
  82	{"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
  83	{"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
  84	{"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
  85	{"os2bmc_rx_by_bmc", IXGBE_STAT(stats.o2bgptc)},
  86	{"os2bmc_tx_by_bmc", IXGBE_STAT(stats.b2ospc)},
  87	{"os2bmc_tx_by_host", IXGBE_STAT(stats.o2bspc)},
  88	{"os2bmc_rx_by_host", IXGBE_STAT(stats.b2ogprc)},
  89	{"tx_hwtstamp_timeouts", IXGBE_STAT(tx_hwtstamp_timeouts)},
  90	{"tx_hwtstamp_skipped", IXGBE_STAT(tx_hwtstamp_skipped)},
  91	{"rx_hwtstamp_cleared", IXGBE_STAT(rx_hwtstamp_cleared)},
  92	{"tx_ipsec", IXGBE_STAT(tx_ipsec)},
  93	{"rx_ipsec", IXGBE_STAT(rx_ipsec)},
  94#ifdef IXGBE_FCOE
  95	{"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
  96	{"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
  97	{"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
  98	{"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
  99	{"fcoe_noddp", IXGBE_STAT(stats.fcoe_noddp)},
 100	{"fcoe_noddp_ext_buff", IXGBE_STAT(stats.fcoe_noddp_ext_buff)},
 101	{"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
 102	{"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
 103#endif /* IXGBE_FCOE */
 104};
 105
 106/* ixgbe allocates num_tx_queues and num_rx_queues symmetrically so
 107 * we set the num_rx_queues to evaluate to num_tx_queues. This is
 108 * used because we do not have a good way to get the max number of
 109 * rx queues with CONFIG_RPS disabled.
 110 */
 111#define IXGBE_NUM_RX_QUEUES netdev->num_tx_queues
 112
 113#define IXGBE_QUEUE_STATS_LEN ( \
 114	(netdev->num_tx_queues + IXGBE_NUM_RX_QUEUES) * \
 115	(sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
 116#define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
 117#define IXGBE_PB_STATS_LEN ( \
 118			(sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
 119			 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
 120			 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
 121			 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
 122			/ sizeof(u64))
 123#define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
 124			 IXGBE_PB_STATS_LEN + \
 125			 IXGBE_QUEUE_STATS_LEN)
 126
 127static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
 128	"Register test  (offline)", "Eeprom test    (offline)",
 129	"Interrupt test (offline)", "Loopback test  (offline)",
 130	"Link test   (on/offline)"
 131};
 132#define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
 133
 134static const char ixgbe_priv_flags_strings[][ETH_GSTRING_LEN] = {
 135#define IXGBE_PRIV_FLAGS_LEGACY_RX	BIT(0)
 136	"legacy-rx",
 137#define IXGBE_PRIV_FLAGS_VF_IPSEC_EN	BIT(1)
 138	"vf-ipsec",
 139#define IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF	BIT(2)
 140	"mdd-disable-vf",
 141};
 142
 143#define IXGBE_PRIV_FLAGS_STR_LEN ARRAY_SIZE(ixgbe_priv_flags_strings)
 144
 145#define ixgbe_isbackplane(type) ((type) == ixgbe_media_type_backplane)
 146
 147static void ixgbe_set_supported_10gtypes(struct ixgbe_hw *hw,
 148					 struct ethtool_link_ksettings *cmd)
 149{
 150	if (!ixgbe_isbackplane(hw->phy.media_type)) {
 151		ethtool_link_ksettings_add_link_mode(cmd, supported,
 152						     10000baseT_Full);
 153		return;
 154	}
 155
 156	switch (hw->device_id) {
 157	case IXGBE_DEV_ID_82598:
 158	case IXGBE_DEV_ID_82599_KX4:
 159	case IXGBE_DEV_ID_82599_KX4_MEZZ:
 160	case IXGBE_DEV_ID_X550EM_X_KX4:
 161		ethtool_link_ksettings_add_link_mode
 162			(cmd, supported, 10000baseKX4_Full);
 163		break;
 164	case IXGBE_DEV_ID_82598_BX:
 165	case IXGBE_DEV_ID_82599_KR:
 166	case IXGBE_DEV_ID_X550EM_X_KR:
 167	case IXGBE_DEV_ID_X550EM_X_XFI:
 168		ethtool_link_ksettings_add_link_mode
 169			(cmd, supported, 10000baseKR_Full);
 170		break;
 171	default:
 172		ethtool_link_ksettings_add_link_mode
 173			(cmd, supported, 10000baseKX4_Full);
 174		ethtool_link_ksettings_add_link_mode
 175			(cmd, supported, 10000baseKR_Full);
 176		break;
 177	}
 178}
 179
 180static void ixgbe_set_advertising_10gtypes(struct ixgbe_hw *hw,
 181					   struct ethtool_link_ksettings *cmd)
 182{
 183	if (!ixgbe_isbackplane(hw->phy.media_type)) {
 184		ethtool_link_ksettings_add_link_mode(cmd, advertising,
 185						     10000baseT_Full);
 186		return;
 187	}
 188
 189	switch (hw->device_id) {
 190	case IXGBE_DEV_ID_82598:
 191	case IXGBE_DEV_ID_82599_KX4:
 192	case IXGBE_DEV_ID_82599_KX4_MEZZ:
 193	case IXGBE_DEV_ID_X550EM_X_KX4:
 194		ethtool_link_ksettings_add_link_mode
 195			(cmd, advertising, 10000baseKX4_Full);
 196		break;
 197	case IXGBE_DEV_ID_82598_BX:
 198	case IXGBE_DEV_ID_82599_KR:
 199	case IXGBE_DEV_ID_X550EM_X_KR:
 200	case IXGBE_DEV_ID_X550EM_X_XFI:
 201		ethtool_link_ksettings_add_link_mode
 202			(cmd, advertising, 10000baseKR_Full);
 203		break;
 204	default:
 205		ethtool_link_ksettings_add_link_mode
 206			(cmd, advertising, 10000baseKX4_Full);
 207		ethtool_link_ksettings_add_link_mode
 208			(cmd, advertising, 10000baseKR_Full);
 209		break;
 210	}
 211}
 212
 213static int ixgbe_get_link_ksettings(struct net_device *netdev,
 214				    struct ethtool_link_ksettings *cmd)
 215{
 216	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
 217	struct ixgbe_hw *hw = &adapter->hw;
 218	ixgbe_link_speed supported_link;
 219	bool autoneg = false;
 220
 221	ethtool_link_ksettings_zero_link_mode(cmd, supported);
 222	ethtool_link_ksettings_zero_link_mode(cmd, advertising);
 223
 224	hw->mac.ops.get_link_capabilities(hw, &supported_link, &autoneg);
 225
 226	/* set the supported link speeds */
 227	if (supported_link & IXGBE_LINK_SPEED_10GB_FULL) {
 228		ixgbe_set_supported_10gtypes(hw, cmd);
 229		ixgbe_set_advertising_10gtypes(hw, cmd);
 230	}
 231	if (supported_link & IXGBE_LINK_SPEED_5GB_FULL)
 232		ethtool_link_ksettings_add_link_mode(cmd, supported,
 233						     5000baseT_Full);
 234
 235	if (supported_link & IXGBE_LINK_SPEED_2_5GB_FULL)
 236		ethtool_link_ksettings_add_link_mode(cmd, supported,
 237						     2500baseT_Full);
 238
 239	if (supported_link & IXGBE_LINK_SPEED_1GB_FULL) {
 240		if (ixgbe_isbackplane(hw->phy.media_type)) {
 241			ethtool_link_ksettings_add_link_mode(cmd, supported,
 242							     1000baseKX_Full);
 243			ethtool_link_ksettings_add_link_mode(cmd, advertising,
 244							     1000baseKX_Full);
 245		} else {
 246			ethtool_link_ksettings_add_link_mode(cmd, supported,
 247							     1000baseT_Full);
 248			ethtool_link_ksettings_add_link_mode(cmd, advertising,
 249							     1000baseT_Full);
 250		}
 251	}
 252	if (supported_link & IXGBE_LINK_SPEED_100_FULL) {
 253		ethtool_link_ksettings_add_link_mode(cmd, supported,
 254						     100baseT_Full);
 255		ethtool_link_ksettings_add_link_mode(cmd, advertising,
 256						     100baseT_Full);
 257	}
 258	if (supported_link & IXGBE_LINK_SPEED_10_FULL) {
 259		ethtool_link_ksettings_add_link_mode(cmd, supported,
 260						     10baseT_Full);
 261		ethtool_link_ksettings_add_link_mode(cmd, advertising,
 262						     10baseT_Full);
 263	}
 264
 265	/* set the advertised speeds */
 266	if (hw->phy.autoneg_advertised) {
 267		ethtool_link_ksettings_zero_link_mode(cmd, advertising);
 268		if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10_FULL)
 269			ethtool_link_ksettings_add_link_mode(cmd, advertising,
 270							     10baseT_Full);
 271		if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL)
 272			ethtool_link_ksettings_add_link_mode(cmd, advertising,
 273							     100baseT_Full);
 274		if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
 275			ixgbe_set_advertising_10gtypes(hw, cmd);
 276		if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) {
 277			if (ethtool_link_ksettings_test_link_mode
 278				(cmd, supported, 1000baseKX_Full))
 279				ethtool_link_ksettings_add_link_mode
 280					(cmd, advertising, 1000baseKX_Full);
 281			else
 282				ethtool_link_ksettings_add_link_mode
 283					(cmd, advertising, 1000baseT_Full);
 284		}
 285		if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_5GB_FULL)
 286			ethtool_link_ksettings_add_link_mode(cmd, advertising,
 287							     5000baseT_Full);
 288		if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_2_5GB_FULL)
 289			ethtool_link_ksettings_add_link_mode(cmd, advertising,
 290							     2500baseT_Full);
 291	} else {
 292		if (hw->phy.multispeed_fiber && !autoneg) {
 293			if (supported_link & IXGBE_LINK_SPEED_10GB_FULL)
 294				ethtool_link_ksettings_add_link_mode
 295					(cmd, advertising, 10000baseT_Full);
 296		}
 297	}
 298
 299	if (autoneg) {
 300		ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
 301		ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
 302		cmd->base.autoneg = AUTONEG_ENABLE;
 303	} else
 304		cmd->base.autoneg = AUTONEG_DISABLE;
 305
 306	/* Determine the remaining settings based on the PHY type. */
 307	switch (adapter->hw.phy.type) {
 308	case ixgbe_phy_tn:
 309	case ixgbe_phy_aq:
 310	case ixgbe_phy_x550em_ext_t:
 311	case ixgbe_phy_fw:
 312	case ixgbe_phy_cu_unknown:
 313		ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
 314		ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
 315		cmd->base.port = PORT_TP;
 316		break;
 317	case ixgbe_phy_qt:
 318		ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
 319		ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
 320		cmd->base.port = PORT_FIBRE;
 321		break;
 322	case ixgbe_phy_nl:
 323	case ixgbe_phy_sfp_passive_tyco:
 324	case ixgbe_phy_sfp_passive_unknown:
 325	case ixgbe_phy_sfp_ftl:
 326	case ixgbe_phy_sfp_avago:
 327	case ixgbe_phy_sfp_intel:
 328	case ixgbe_phy_sfp_unknown:
 329	case ixgbe_phy_qsfp_passive_unknown:
 330	case ixgbe_phy_qsfp_active_unknown:
 331	case ixgbe_phy_qsfp_intel:
 332	case ixgbe_phy_qsfp_unknown:
 333		/* SFP+ devices, further checking needed */
 334		switch (adapter->hw.phy.sfp_type) {
 335		case ixgbe_sfp_type_da_cu:
 336		case ixgbe_sfp_type_da_cu_core0:
 337		case ixgbe_sfp_type_da_cu_core1:
 338			ethtool_link_ksettings_add_link_mode(cmd, supported,
 339							     FIBRE);
 340			ethtool_link_ksettings_add_link_mode(cmd, advertising,
 341							     FIBRE);
 342			cmd->base.port = PORT_DA;
 343			break;
 344		case ixgbe_sfp_type_sr:
 345		case ixgbe_sfp_type_lr:
 346		case ixgbe_sfp_type_srlr_core0:
 347		case ixgbe_sfp_type_srlr_core1:
 348		case ixgbe_sfp_type_1g_sx_core0:
 349		case ixgbe_sfp_type_1g_sx_core1:
 350		case ixgbe_sfp_type_1g_lx_core0:
 351		case ixgbe_sfp_type_1g_lx_core1:
 352		case ixgbe_sfp_type_1g_bx_core0:
 353		case ixgbe_sfp_type_1g_bx_core1:
 354			ethtool_link_ksettings_add_link_mode(cmd, supported,
 355							     FIBRE);
 356			ethtool_link_ksettings_add_link_mode(cmd, advertising,
 357							     FIBRE);
 358			cmd->base.port = PORT_FIBRE;
 359			break;
 360		case ixgbe_sfp_type_not_present:
 361			ethtool_link_ksettings_add_link_mode(cmd, supported,
 362							     FIBRE);
 363			ethtool_link_ksettings_add_link_mode(cmd, advertising,
 364							     FIBRE);
 365			cmd->base.port = PORT_NONE;
 366			break;
 367		case ixgbe_sfp_type_1g_cu_core0:
 368		case ixgbe_sfp_type_1g_cu_core1:
 369			ethtool_link_ksettings_add_link_mode(cmd, supported,
 370							     TP);
 371			ethtool_link_ksettings_add_link_mode(cmd, advertising,
 372							     TP);
 373			cmd->base.port = PORT_TP;
 374			break;
 375		case ixgbe_sfp_type_unknown:
 376		default:
 377			ethtool_link_ksettings_add_link_mode(cmd, supported,
 378							     FIBRE);
 379			ethtool_link_ksettings_add_link_mode(cmd, advertising,
 380							     FIBRE);
 381			cmd->base.port = PORT_OTHER;
 382			break;
 383		}
 384		break;
 385	case ixgbe_phy_xaui:
 386		ethtool_link_ksettings_add_link_mode(cmd, supported,
 387						     FIBRE);
 388		ethtool_link_ksettings_add_link_mode(cmd, advertising,
 389						     FIBRE);
 390		cmd->base.port = PORT_NONE;
 391		break;
 392	case ixgbe_phy_unknown:
 393	case ixgbe_phy_generic:
 394	case ixgbe_phy_sfp_unsupported:
 395	default:
 396		ethtool_link_ksettings_add_link_mode(cmd, supported,
 397						     FIBRE);
 398		ethtool_link_ksettings_add_link_mode(cmd, advertising,
 399						     FIBRE);
 400		cmd->base.port = PORT_OTHER;
 401		break;
 402	}
 403
 404	/* Indicate pause support */
 405	ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
 406
 407	switch (hw->fc.requested_mode) {
 408	case ixgbe_fc_full:
 409		ethtool_link_ksettings_add_link_mode(cmd, advertising, Pause);
 410		break;
 411	case ixgbe_fc_rx_pause:
 412		ethtool_link_ksettings_add_link_mode(cmd, advertising, Pause);
 413		ethtool_link_ksettings_add_link_mode(cmd, advertising,
 414						     Asym_Pause);
 415		break;
 416	case ixgbe_fc_tx_pause:
 417		ethtool_link_ksettings_add_link_mode(cmd, advertising,
 418						     Asym_Pause);
 419		break;
 420	default:
 421		ethtool_link_ksettings_del_link_mode(cmd, advertising, Pause);
 422		ethtool_link_ksettings_del_link_mode(cmd, advertising,
 423						     Asym_Pause);
 424	}
 425
 426	if (netif_carrier_ok(netdev)) {
 427		switch (adapter->link_speed) {
 428		case IXGBE_LINK_SPEED_10GB_FULL:
 429			cmd->base.speed = SPEED_10000;
 430			break;
 431		case IXGBE_LINK_SPEED_5GB_FULL:
 432			cmd->base.speed = SPEED_5000;
 433			break;
 434		case IXGBE_LINK_SPEED_2_5GB_FULL:
 435			cmd->base.speed = SPEED_2500;
 436			break;
 437		case IXGBE_LINK_SPEED_1GB_FULL:
 438			cmd->base.speed = SPEED_1000;
 439			break;
 440		case IXGBE_LINK_SPEED_100_FULL:
 441			cmd->base.speed = SPEED_100;
 442			break;
 443		case IXGBE_LINK_SPEED_10_FULL:
 444			cmd->base.speed = SPEED_10;
 445			break;
 446		default:
 447			break;
 448		}
 449		cmd->base.duplex = DUPLEX_FULL;
 450	} else {
 451		cmd->base.speed = SPEED_UNKNOWN;
 452		cmd->base.duplex = DUPLEX_UNKNOWN;
 453	}
 454
 455	return 0;
 456}
 457
 458static int ixgbe_set_link_ksettings(struct net_device *netdev,
 459				    const struct ethtool_link_ksettings *cmd)
 460{
 461	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
 462	struct ixgbe_hw *hw = &adapter->hw;
 463	u32 advertised, old;
 464	int err = 0;
 465
 466	if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 467	    (hw->phy.multispeed_fiber)) {
 468		/*
 469		 * this function does not support duplex forcing, but can
 470		 * limit the advertising of the adapter to the specified speed
 471		 */
 472		if (!linkmode_subset(cmd->link_modes.advertising,
 473				     cmd->link_modes.supported))
 474			return -EINVAL;
 475
 476		/* only allow one speed at a time if no autoneg */
 477		if (!cmd->base.autoneg && hw->phy.multispeed_fiber) {
 478			if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
 479								  10000baseT_Full) &&
 480			    ethtool_link_ksettings_test_link_mode(cmd, advertising,
 481								  1000baseT_Full))
 482				return -EINVAL;
 483		}
 484
 485		old = hw->phy.autoneg_advertised;
 486		advertised = 0;
 487		if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
 488							  10000baseT_Full))
 489			advertised |= IXGBE_LINK_SPEED_10GB_FULL;
 490		if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
 491							  5000baseT_Full))
 492			advertised |= IXGBE_LINK_SPEED_5GB_FULL;
 493		if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
 494							  2500baseT_Full))
 495			advertised |= IXGBE_LINK_SPEED_2_5GB_FULL;
 496		if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
 497							  1000baseT_Full))
 498			advertised |= IXGBE_LINK_SPEED_1GB_FULL;
 499
 500		if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
 501							  100baseT_Full))
 502			advertised |= IXGBE_LINK_SPEED_100_FULL;
 503
 504		if (ethtool_link_ksettings_test_link_mode(cmd, advertising,
 505							  10baseT_Full))
 506			advertised |= IXGBE_LINK_SPEED_10_FULL;
 507
 508		if (old == advertised)
 509			return err;
 510		/* this sets the link speed and restarts auto-neg */
 511		while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
 512			usleep_range(1000, 2000);
 513
 514		hw->mac.autotry_restart = true;
 515		err = hw->mac.ops.setup_link(hw, advertised, true);
 516		if (err) {
 517			e_info(probe, "setup link failed with code %d\n", err);
 518			hw->mac.ops.setup_link(hw, old, true);
 519		}
 520		clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
 521	} else {
 522		/* in this case we currently only support 10Gb/FULL */
 523		u32 speed = cmd->base.speed;
 524
 525		if ((cmd->base.autoneg == AUTONEG_ENABLE) ||
 526		    (!ethtool_link_ksettings_test_link_mode(cmd, advertising,
 527							    10000baseT_Full)) ||
 528		    (speed + cmd->base.duplex != SPEED_10000 + DUPLEX_FULL))
 529			return -EINVAL;
 530	}
 531
 532	return err;
 533}
 534
 535static void ixgbe_get_pause_stats(struct net_device *netdev,
 536				  struct ethtool_pause_stats *stats)
 537{
 538	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
 539	struct ixgbe_hw_stats *hwstats = &adapter->stats;
 540
 541	stats->tx_pause_frames = hwstats->lxontxc + hwstats->lxofftxc;
 542	stats->rx_pause_frames = hwstats->lxonrxc + hwstats->lxoffrxc;
 543}
 544
 545static void ixgbe_get_pauseparam(struct net_device *netdev,
 546				 struct ethtool_pauseparam *pause)
 547{
 548	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
 549	struct ixgbe_hw *hw = &adapter->hw;
 550
 551	if (ixgbe_device_supports_autoneg_fc(hw) &&
 552	    !hw->fc.disable_fc_autoneg)
 553		pause->autoneg = 1;
 554	else
 555		pause->autoneg = 0;
 556
 557	if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
 558		pause->rx_pause = 1;
 559	} else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
 560		pause->tx_pause = 1;
 561	} else if (hw->fc.current_mode == ixgbe_fc_full) {
 562		pause->rx_pause = 1;
 563		pause->tx_pause = 1;
 564	}
 565}
 566
 567static void ixgbe_set_pauseparam_finalize(struct net_device *netdev,
 568					  struct ixgbe_fc_info *fc)
 569{
 570	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
 571	struct ixgbe_hw *hw = &adapter->hw;
 572
 573	/* If the thing changed then we'll update and use new autoneg. */
 574	if (memcmp(fc, &hw->fc, sizeof(*fc))) {
 575		hw->fc = *fc;
 576		if (netif_running(netdev))
 577			ixgbe_reinit_locked(adapter);
 578		else
 579			ixgbe_reset(adapter);
 580	}
 581}
 582
 583static int ixgbe_set_pauseparam(struct net_device *netdev,
 584				struct ethtool_pauseparam *pause)
 585{
 586	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
 587	struct ixgbe_hw *hw = &adapter->hw;
 588	struct ixgbe_fc_info fc = hw->fc;
 589
 590	/* 82598 does no support link flow control with DCB enabled */
 591	if ((hw->mac.type == ixgbe_mac_82598EB) &&
 592	    (adapter->flags & IXGBE_FLAG_DCB_ENABLED))
 593		return -EINVAL;
 594
 595	/* some devices do not support autoneg of link flow control */
 596	if ((pause->autoneg == AUTONEG_ENABLE) &&
 597	    !ixgbe_device_supports_autoneg_fc(hw))
 598		return -EINVAL;
 599
 600	fc.disable_fc_autoneg = (pause->autoneg != AUTONEG_ENABLE);
 601
 602	if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
 603		fc.requested_mode = ixgbe_fc_full;
 604	else if (pause->rx_pause && !pause->tx_pause)
 605		fc.requested_mode = ixgbe_fc_rx_pause;
 606	else if (!pause->rx_pause && pause->tx_pause)
 607		fc.requested_mode = ixgbe_fc_tx_pause;
 608	else
 609		fc.requested_mode = ixgbe_fc_none;
 610
 611	ixgbe_set_pauseparam_finalize(netdev, &fc);
 612
 613	return 0;
 614}
 615
 616static int ixgbe_set_pauseparam_e610(struct net_device *netdev,
 617				     struct ethtool_pauseparam *pause)
 618{
 619	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
 620	struct ixgbe_hw *hw = &adapter->hw;
 621	struct ixgbe_fc_info fc = hw->fc;
 622
 623	if (!ixgbe_device_supports_autoneg_fc(hw))
 624		return -EOPNOTSUPP;
 625
 626	if (pause->autoneg == AUTONEG_DISABLE) {
 627		netdev_info(netdev,
 628			    "Cannot disable autonegotiation on this device.\n");
 629		return -EOPNOTSUPP;
 630	}
 631
 632	fc.disable_fc_autoneg = false;
 633
 634	if (pause->rx_pause && pause->tx_pause)
 635		fc.requested_mode = ixgbe_fc_full;
 636	else if (pause->rx_pause)
 637		fc.requested_mode = ixgbe_fc_rx_pause;
 638	else if (pause->tx_pause)
 639		fc.requested_mode = ixgbe_fc_tx_pause;
 640	else
 641		fc.requested_mode = ixgbe_fc_none;
 642
 643	ixgbe_set_pauseparam_finalize(netdev, &fc);
 644
 645	return 0;
 646}
 647
 648static u32 ixgbe_get_msglevel(struct net_device *netdev)
 649{
 650	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
 651	return adapter->msg_enable;
 652}
 653
 654static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
 655{
 656	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
 657	adapter->msg_enable = data;
 658}
 659
 660static int ixgbe_get_regs_len(struct net_device *netdev)
 661{
 662#define IXGBE_REGS_LEN  1145
 663	return IXGBE_REGS_LEN * sizeof(u32);
 664}
 665
 666#define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
 667
 668static void ixgbe_get_regs(struct net_device *netdev,
 669			   struct ethtool_regs *regs, void *p)
 670{
 671	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
 672	struct ixgbe_hw *hw = &adapter->hw;
 673	u32 *regs_buff = p;
 674	u8 i;
 675
 676	memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
 677
 678	regs->version = hw->mac.type << 24 | hw->revision_id << 16 |
 679			hw->device_id;
 680
 681	/* General Registers */
 682	regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
 683	regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
 684	regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
 685	regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
 686	regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
 687	regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
 688	regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
 689	regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
 690
 691	/* NVM Register */
 692	regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
 693	regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
 694	regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA(hw));
 695	regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
 696	regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
 697	regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
 698	regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
 699	regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
 700	regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
 701	regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC(hw));
 702
 703	/* Interrupt */
 704	/* don't read EICR because it can clear interrupt causes, instead
 705	 * read EICS which is a shadow but doesn't clear EICR */
 706	regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
 707	regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
 708	regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
 709	regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
 710	regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
 711	regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
 712	regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
 713	regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
 714	regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
 715	regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
 716	regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
 717	regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
 718
 719	/* Flow Control */
 720	regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
 721	for (i = 0; i < 4; i++)
 722		regs_buff[31 + i] = IXGBE_READ_REG(hw, IXGBE_FCTTV(i));
 723	for (i = 0; i < 8; i++) {
 724		switch (hw->mac.type) {
 725		case ixgbe_mac_82598EB:
 726			regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
 727			regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
 728			break;
 729		case ixgbe_mac_82599EB:
 730		case ixgbe_mac_X540:
 731		case ixgbe_mac_X550:
 732		case ixgbe_mac_X550EM_x:
 733		case ixgbe_mac_x550em_a:
 734		case ixgbe_mac_e610:
 735			regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
 736			regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
 737			break;
 738		default:
 739			break;
 740		}
 741	}
 742	regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
 743	regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
 744
 745	/* Receive DMA */
 746	for (i = 0; i < 64; i++)
 747		regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 748	for (i = 0; i < 64; i++)
 749		regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 750	for (i = 0; i < 64; i++)
 751		regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 752	for (i = 0; i < 64; i++)
 753		regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 754	for (i = 0; i < 64; i++)
 755		regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 756	for (i = 0; i < 64; i++)
 757		regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 758	for (i = 0; i < 16; i++)
 759		regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 760	for (i = 0; i < 16; i++)
 761		regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 762	regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
 763	for (i = 0; i < 8; i++)
 764		regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
 765	regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
 766	regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
 767
 768	/* Receive */
 769	regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
 770	regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
 771	for (i = 0; i < 16; i++)
 772		regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
 773	for (i = 0; i < 16; i++)
 774		regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
 775	regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
 776	regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
 777	regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 778	regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
 779	regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
 780	regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
 781	for (i = 0; i < 8; i++)
 782		regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
 783	for (i = 0; i < 8; i++)
 784		regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
 785	regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
 786
 787	/* Transmit */
 788	for (i = 0; i < 32; i++)
 789		regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 790	for (i = 0; i < 32; i++)
 791		regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 792	for (i = 0; i < 32; i++)
 793		regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 794	for (i = 0; i < 32; i++)
 795		regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 796	for (i = 0; i < 32; i++)
 797		regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 798	for (i = 0; i < 32; i++)
 799		regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 800	for (i = 0; i < 32; i++)
 801		regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
 802	for (i = 0; i < 32; i++)
 803		regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
 804	regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
 805	for (i = 0; i < 16; i++)
 806		regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
 807	regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
 808	for (i = 0; i < 8; i++)
 809		regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
 810	regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
 811
 812	/* Wake Up */
 813	regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
 814	regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
 815	regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
 816	regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
 817	regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
 818	regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
 819	regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
 820	regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
 821	regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
 822
 823	/* DCB */
 824	regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);   /* same as FCCFG  */
 825	regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS); /* same as RTTPCS */
 826
 827	switch (hw->mac.type) {
 828	case ixgbe_mac_82598EB:
 829		regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
 830		regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
 831		for (i = 0; i < 8; i++)
 832			regs_buff[833 + i] =
 833				IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
 834		for (i = 0; i < 8; i++)
 835			regs_buff[841 + i] =
 836				IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
 837		for (i = 0; i < 8; i++)
 838			regs_buff[849 + i] =
 839				IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
 840		for (i = 0; i < 8; i++)
 841			regs_buff[857 + i] =
 842				IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
 843		break;
 844	case ixgbe_mac_82599EB:
 845	case ixgbe_mac_X540:
 846	case ixgbe_mac_X550:
 847	case ixgbe_mac_X550EM_x:
 848	case ixgbe_mac_x550em_a:
 849		regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
 850		regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RTRPCS);
 851		for (i = 0; i < 8; i++)
 852			regs_buff[833 + i] =
 853				IXGBE_READ_REG(hw, IXGBE_RTRPT4C(i));
 854		for (i = 0; i < 8; i++)
 855			regs_buff[841 + i] =
 856				IXGBE_READ_REG(hw, IXGBE_RTRPT4S(i));
 857		for (i = 0; i < 8; i++)
 858			regs_buff[849 + i] =
 859				IXGBE_READ_REG(hw, IXGBE_RTTDT2C(i));
 860		for (i = 0; i < 8; i++)
 861			regs_buff[857 + i] =
 862				IXGBE_READ_REG(hw, IXGBE_RTTDT2S(i));
 863		break;
 864	default:
 865		break;
 866	}
 867
 868	for (i = 0; i < 8; i++)
 869		regs_buff[865 + i] =
 870		IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i)); /* same as RTTPT2C */
 871	for (i = 0; i < 8; i++)
 872		regs_buff[873 + i] =
 873		IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i)); /* same as RTTPT2S */
 874
 875	/* Statistics */
 876	regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
 877	regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
 878	regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
 879	regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
 880	for (i = 0; i < 8; i++)
 881		regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
 882	regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
 883	regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
 884	regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
 885	regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
 886	regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
 887	regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
 888	regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
 889	for (i = 0; i < 8; i++)
 890		regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
 891	for (i = 0; i < 8; i++)
 892		regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
 893	for (i = 0; i < 8; i++)
 894		regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
 895	for (i = 0; i < 8; i++)
 896		regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
 897	regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
 898	regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
 899	regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
 900	regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
 901	regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
 902	regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
 903	regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
 904	regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
 905	regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
 906	regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
 907	regs_buff[942] = (u32)IXGBE_GET_STAT(adapter, gorc);
 908	regs_buff[943] = (u32)(IXGBE_GET_STAT(adapter, gorc) >> 32);
 909	regs_buff[944] = (u32)IXGBE_GET_STAT(adapter, gotc);
 910	regs_buff[945] = (u32)(IXGBE_GET_STAT(adapter, gotc) >> 32);
 911	for (i = 0; i < 8; i++)
 912		regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
 913	regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
 914	regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
 915	regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
 916	regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
 917	regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
 918	regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
 919	regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
 920	regs_buff[961] = (u32)IXGBE_GET_STAT(adapter, tor);
 921	regs_buff[962] = (u32)(IXGBE_GET_STAT(adapter, tor) >> 32);
 922	regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
 923	regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
 924	regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
 925	regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
 926	regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
 927	regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
 928	regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
 929	regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
 930	regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
 931	regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
 932	regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
 933	for (i = 0; i < 16; i++)
 934		regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
 935	for (i = 0; i < 16; i++)
 936		regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
 937	for (i = 0; i < 16; i++)
 938		regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
 939	for (i = 0; i < 16; i++)
 940		regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
 941
 942	/* MAC */
 943	regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
 944	regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
 945	regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
 946	regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
 947	regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
 948	regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
 949	regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
 950	regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
 951	regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
 952	regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
 953	regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
 954	regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
 955	regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
 956	regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
 957	regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
 958	regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
 959	regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
 960	regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
 961	regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
 962	regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
 963	regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
 964	regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
 965	regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
 966	regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
 967	regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
 968	regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
 969	regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
 970	regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
 971	regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
 972	regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
 973	regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
 974	regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
 975	regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
 976
 977	/* Diagnostic */
 978	regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
 979	for (i = 0; i < 8; i++)
 980		regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
 981	regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
 982	for (i = 0; i < 4; i++)
 983		regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
 984	regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
 985	regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
 986	for (i = 0; i < 8; i++)
 987		regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
 988	regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
 989	for (i = 0; i < 4; i++)
 990		regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
 991	regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
 992	regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
 993	for (i = 0; i < 4; i++)
 994		regs_buff[1102 + i] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA(i));
 995	regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
 996	for (i = 0; i < 4; i++)
 997		regs_buff[1107 + i] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA(i));
 998	for (i = 0; i < 8; i++)
 999		regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
1000	regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
1001	regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
1002	regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
1003	regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
1004	regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
1005	regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
1006	regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
1007	regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
1008	regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
1009
1010	/* 82599 X540 specific registers  */
1011	regs_buff[1128] = IXGBE_READ_REG(hw, IXGBE_MFLCN);
1012
1013	/* 82599 X540 specific DCB registers  */
1014	regs_buff[1129] = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
1015	regs_buff[1130] = IXGBE_READ_REG(hw, IXGBE_RTTUP2TC);
1016	for (i = 0; i < 4; i++)
1017		regs_buff[1131 + i] = IXGBE_READ_REG(hw, IXGBE_TXLLQ(i));
1018	regs_buff[1135] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRM);
1019					/* same as RTTQCNRM */
1020	regs_buff[1136] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRD);
1021					/* same as RTTQCNRR */
1022
1023	/* X540 specific DCB registers  */
1024	regs_buff[1137] = IXGBE_READ_REG(hw, IXGBE_RTTQCNCR);
1025	regs_buff[1138] = IXGBE_READ_REG(hw, IXGBE_RTTQCNTG);
1026
1027	/* Security config registers */
1028	regs_buff[1139] = IXGBE_READ_REG(hw, IXGBE_SECTXCTRL);
1029	regs_buff[1140] = IXGBE_READ_REG(hw, IXGBE_SECTXSTAT);
1030	regs_buff[1141] = IXGBE_READ_REG(hw, IXGBE_SECTXBUFFAF);
1031	regs_buff[1142] = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
1032	regs_buff[1143] = IXGBE_READ_REG(hw, IXGBE_SECRXCTRL);
1033	regs_buff[1144] = IXGBE_READ_REG(hw, IXGBE_SECRXSTAT);
1034}
1035
1036static void ixgbe_get_link_ext_stats(struct net_device *netdev,
1037				     struct ethtool_link_ext_stats *stats)
1038{
1039	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1040
1041	stats->link_down_events = adapter->link_down_events;
1042}
1043
1044static int ixgbe_get_eeprom_len(struct net_device *netdev)
1045{
1046	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1047	return adapter->hw.eeprom.word_size * 2;
1048}
1049
1050static int ixgbe_get_eeprom(struct net_device *netdev,
1051			    struct ethtool_eeprom *eeprom, u8 *bytes)
1052{
1053	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1054	struct ixgbe_hw *hw = &adapter->hw;
1055	u16 *eeprom_buff;
1056	int first_word, last_word, eeprom_len;
1057	int ret_val = 0;
1058	u16 i;
1059
1060	if (eeprom->len == 0)
1061		return -EINVAL;
1062
1063	eeprom->magic = hw->vendor_id | (hw->device_id << 16);
1064
1065	first_word = eeprom->offset >> 1;
1066	last_word = (eeprom->offset + eeprom->len - 1) >> 1;
1067	eeprom_len = last_word - first_word + 1;
1068
1069	eeprom_buff = kmalloc_array(eeprom_len, sizeof(u16), GFP_KERNEL);
1070	if (!eeprom_buff)
1071		return -ENOMEM;
1072
1073	ret_val = hw->eeprom.ops.read_buffer(hw, first_word, eeprom_len,
1074					     eeprom_buff);
1075
1076	/* Device's eeprom is always little-endian, word addressable */
1077	for (i = 0; i < eeprom_len; i++)
1078		le16_to_cpus(&eeprom_buff[i]);
1079
1080	memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
1081	kfree(eeprom_buff);
1082
1083	return ret_val;
1084}
1085
1086static int ixgbe_set_eeprom(struct net_device *netdev,
1087			    struct ethtool_eeprom *eeprom, u8 *bytes)
1088{
1089	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1090	struct ixgbe_hw *hw = &adapter->hw;
1091	u16 *eeprom_buff;
1092	void *ptr;
1093	int max_len, first_word, last_word, ret_val = 0;
1094	u16 i;
1095
1096	if (eeprom->len == 0)
1097		return -EINVAL;
1098
1099	if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
1100		return -EINVAL;
1101
1102	max_len = hw->eeprom.word_size * 2;
1103
1104	first_word = eeprom->offset >> 1;
1105	last_word = (eeprom->offset + eeprom->len - 1) >> 1;
1106	eeprom_buff = kmalloc(max_len, GFP_KERNEL);
1107	if (!eeprom_buff)
1108		return -ENOMEM;
1109
1110	ptr = eeprom_buff;
1111
1112	if (eeprom->offset & 1) {
1113		/*
1114		 * need read/modify/write of first changed EEPROM word
1115		 * only the second byte of the word is being modified
1116		 */
1117		ret_val = hw->eeprom.ops.read(hw, first_word, &eeprom_buff[0]);
1118		if (ret_val)
1119			goto err;
1120
1121		ptr++;
1122	}
1123	if ((eeprom->offset + eeprom->len) & 1) {
1124		/*
1125		 * need read/modify/write of last changed EEPROM word
1126		 * only the first byte of the word is being modified
1127		 */
1128		ret_val = hw->eeprom.ops.read(hw, last_word,
1129					  &eeprom_buff[last_word - first_word]);
1130		if (ret_val)
1131			goto err;
1132	}
1133
1134	/* Device's eeprom is always little-endian, word addressable */
1135	for (i = 0; i < last_word - first_word + 1; i++)
1136		le16_to_cpus(&eeprom_buff[i]);
1137
1138	memcpy(ptr, bytes, eeprom->len);
1139
1140	for (i = 0; i < last_word - first_word + 1; i++)
1141		cpu_to_le16s(&eeprom_buff[i]);
1142
1143	ret_val = hw->eeprom.ops.write_buffer(hw, first_word,
1144					      last_word - first_word + 1,
1145					      eeprom_buff);
1146
1147	/* Update the checksum */
1148	if (ret_val == 0)
1149		hw->eeprom.ops.update_checksum(hw);
1150
1151err:
1152	kfree(eeprom_buff);
1153	return ret_val;
1154}
1155
1156int ixgbe_refresh_fw_version(struct ixgbe_adapter *adapter)
1157{
1158	struct ixgbe_hw *hw = &adapter->hw;
1159	int err;
1160
1161	err = ixgbe_get_flash_data(hw);
1162	if (err)
1163		return err;
1164
1165	ixgbe_set_fw_version_e610(adapter);
1166	return 0;
1167}
1168
1169static void ixgbe_get_drvinfo(struct net_device *netdev,
1170			      struct ethtool_drvinfo *drvinfo)
1171{
1172	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1173
1174	strscpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver));
1175
1176	strscpy(drvinfo->fw_version, adapter->eeprom_id,
1177		sizeof(drvinfo->fw_version));
1178
1179	strscpy(drvinfo->bus_info, pci_name(adapter->pdev),
1180		sizeof(drvinfo->bus_info));
1181
1182	drvinfo->n_priv_flags = IXGBE_PRIV_FLAGS_STR_LEN;
1183}
1184
1185static u32 ixgbe_get_max_rxd(struct ixgbe_adapter *adapter)
1186{
1187	switch (adapter->hw.mac.type) {
1188	case ixgbe_mac_82598EB:
1189		return IXGBE_MAX_RXD_82598;
1190	case ixgbe_mac_82599EB:
1191		return IXGBE_MAX_RXD_82599;
1192	case ixgbe_mac_X540:
1193		return IXGBE_MAX_RXD_X540;
1194	case ixgbe_mac_X550:
1195	case ixgbe_mac_X550EM_x:
1196	case ixgbe_mac_x550em_a:
1197		return IXGBE_MAX_RXD_X550;
1198	default:
1199		return IXGBE_MAX_RXD_82598;
1200	}
1201}
1202
1203static u32 ixgbe_get_max_txd(struct ixgbe_adapter *adapter)
1204{
1205	switch (adapter->hw.mac.type) {
1206	case ixgbe_mac_82598EB:
1207		return IXGBE_MAX_TXD_82598;
1208	case ixgbe_mac_82599EB:
1209		return IXGBE_MAX_TXD_82599;
1210	case ixgbe_mac_X540:
1211		return IXGBE_MAX_TXD_X540;
1212	case ixgbe_mac_X550:
1213	case ixgbe_mac_X550EM_x:
1214	case ixgbe_mac_x550em_a:
1215		return IXGBE_MAX_TXD_X550;
1216	default:
1217		return IXGBE_MAX_TXD_82598;
1218	}
1219}
1220
1221static void ixgbe_get_ringparam(struct net_device *netdev,
1222				struct ethtool_ringparam *ring,
1223				struct kernel_ethtool_ringparam *kernel_ring,
1224				struct netlink_ext_ack *extack)
1225{
1226	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1227	struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
1228	struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
1229
1230	ring->rx_max_pending = ixgbe_get_max_rxd(adapter);
1231	ring->tx_max_pending = ixgbe_get_max_txd(adapter);
1232	ring->rx_pending = rx_ring->count;
1233	ring->tx_pending = tx_ring->count;
1234}
1235
1236static int ixgbe_set_ringparam(struct net_device *netdev,
1237			       struct ethtool_ringparam *ring,
1238			       struct kernel_ethtool_ringparam *kernel_ring,
1239			       struct netlink_ext_ack *extack)
1240{
1241	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1242	struct ixgbe_ring *temp_ring;
1243	int i, j, err = 0;
1244	u32 new_rx_count, new_tx_count;
1245
1246	if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
1247		return -EINVAL;
1248
1249	new_tx_count = clamp_t(u32, ring->tx_pending,
1250			       IXGBE_MIN_TXD, ixgbe_get_max_txd(adapter));
1251	new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
1252
1253	new_rx_count = clamp_t(u32, ring->rx_pending,
1254			       IXGBE_MIN_RXD, ixgbe_get_max_rxd(adapter));
1255	new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
1256
1257	if ((new_tx_count == adapter->tx_ring_count) &&
1258	    (new_rx_count == adapter->rx_ring_count)) {
1259		/* nothing to do */
1260		return 0;
1261	}
1262
1263	while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
1264		usleep_range(1000, 2000);
1265
1266	if (!netif_running(adapter->netdev)) {
1267		for (i = 0; i < adapter->num_tx_queues; i++)
1268			adapter->tx_ring[i]->count = new_tx_count;
1269		for (i = 0; i < adapter->num_xdp_queues; i++)
1270			adapter->xdp_ring[i]->count = new_tx_count;
1271		for (i = 0; i < adapter->num_rx_queues; i++)
1272			adapter->rx_ring[i]->count = new_rx_count;
1273		adapter->tx_ring_count = new_tx_count;
1274		adapter->xdp_ring_count = new_tx_count;
1275		adapter->rx_ring_count = new_rx_count;
1276		goto clear_reset;
1277	}
1278
1279	/* allocate temporary buffer to store rings in */
1280	i = max_t(int, adapter->num_tx_queues + adapter->num_xdp_queues,
1281		  adapter->num_rx_queues);
1282	temp_ring = vmalloc_array(i, sizeof(struct ixgbe_ring));
1283
1284	if (!temp_ring) {
1285		err = -ENOMEM;
1286		goto clear_reset;
1287	}
1288
1289	ixgbe_down(adapter);
1290
1291	/*
1292	 * Setup new Tx resources and free the old Tx resources in that order.
1293	 * We can then assign the new resources to the rings via a memcpy.
1294	 * The advantage to this approach is that we are guaranteed to still
1295	 * have resources even in the case of an allocation failure.
1296	 */
1297	if (new_tx_count != adapter->tx_ring_count) {
1298		for (i = 0; i < adapter->num_tx_queues; i++) {
1299			memcpy(&temp_ring[i], adapter->tx_ring[i],
1300			       sizeof(struct ixgbe_ring));
1301
1302			temp_ring[i].count = new_tx_count;
1303			err = ixgbe_setup_tx_resources(&temp_ring[i]);
1304			if (err) {
1305				while (i) {
1306					i--;
1307					ixgbe_free_tx_resources(&temp_ring[i]);
1308				}
1309				goto err_setup;
1310			}
1311		}
1312
1313		for (j = 0; j < adapter->num_xdp_queues; j++, i++) {
1314			memcpy(&temp_ring[i], adapter->xdp_ring[j],
1315			       sizeof(struct ixgbe_ring));
1316
1317			temp_ring[i].count = new_tx_count;
1318			err = ixgbe_setup_tx_resources(&temp_ring[i]);
1319			if (err) {
1320				while (i) {
1321					i--;
1322					ixgbe_free_tx_resources(&temp_ring[i]);
1323				}
1324				goto err_setup;
1325			}
1326		}
1327
1328		for (i = 0; i < adapter->num_tx_queues; i++) {
1329			ixgbe_free_tx_resources(adapter->tx_ring[i]);
1330
1331			memcpy(adapter->tx_ring[i], &temp_ring[i],
1332			       sizeof(struct ixgbe_ring));
1333		}
1334		for (j = 0; j < adapter->num_xdp_queues; j++, i++) {
1335			ixgbe_free_tx_resources(adapter->xdp_ring[j]);
1336
1337			memcpy(adapter->xdp_ring[j], &temp_ring[i],
1338			       sizeof(struct ixgbe_ring));
1339		}
1340
1341		adapter->tx_ring_count = new_tx_count;
1342	}
1343
1344	/* Repeat the process for the Rx rings if needed */
1345	if (new_rx_count != adapter->rx_ring_count) {
1346		for (i = 0; i < adapter->num_rx_queues; i++) {
1347			memcpy(&temp_ring[i], adapter->rx_ring[i],
1348			       sizeof(struct ixgbe_ring));
1349
1350			/* Clear copied XDP RX-queue info */
1351			memset(&temp_ring[i].xdp_rxq, 0,
1352			       sizeof(temp_ring[i].xdp_rxq));
1353
1354			temp_ring[i].count = new_rx_count;
1355			err = ixgbe_setup_rx_resources(adapter, &temp_ring[i]);
1356			if (err) {
1357				while (i) {
1358					i--;
1359					ixgbe_free_rx_resources(&temp_ring[i]);
1360				}
1361				goto err_setup;
1362			}
1363
1364		}
1365
1366		for (i = 0; i < adapter->num_rx_queues; i++) {
1367			ixgbe_free_rx_resources(adapter->rx_ring[i]);
1368
1369			memcpy(adapter->rx_ring[i], &temp_ring[i],
1370			       sizeof(struct ixgbe_ring));
1371		}
1372
1373		adapter->rx_ring_count = new_rx_count;
1374	}
1375
1376err_setup:
1377	ixgbe_up(adapter);
1378	vfree(temp_ring);
1379clear_reset:
1380	clear_bit(__IXGBE_RESETTING, &adapter->state);
1381	return err;
1382}
1383
1384static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
1385{
1386	switch (sset) {
1387	case ETH_SS_TEST:
1388		return IXGBE_TEST_LEN;
1389	case ETH_SS_STATS:
1390		return IXGBE_STATS_LEN;
1391	case ETH_SS_PRIV_FLAGS:
1392		return IXGBE_PRIV_FLAGS_STR_LEN;
1393	default:
1394		return -EOPNOTSUPP;
1395	}
1396}
1397
1398static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1399				    struct ethtool_stats *stats, u64 *data)
1400{
1401	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1402	struct rtnl_link_stats64 temp;
1403	const struct rtnl_link_stats64 *net_stats;
1404	unsigned int start;
1405	struct ixgbe_ring *ring;
1406	int i, j;
1407	char *p = NULL;
1408
1409	ixgbe_update_stats(adapter);
1410	net_stats = dev_get_stats(netdev, &temp);
1411	for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1412		switch (ixgbe_gstrings_stats[i].type) {
1413		case NETDEV_STATS:
1414			p = (char *) net_stats +
1415					ixgbe_gstrings_stats[i].stat_offset;
1416			break;
1417		case IXGBE_STATS:
1418			p = (char *) adapter +
1419					ixgbe_gstrings_stats[i].stat_offset;
1420			break;
1421		default:
1422			data[i] = 0;
1423			continue;
1424		}
1425
1426		data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1427			   sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1428	}
1429	for (j = 0; j < netdev->num_tx_queues; j++) {
1430		ring = adapter->tx_ring[j];
1431		if (!ring) {
1432			data[i] = 0;
1433			data[i+1] = 0;
1434			i += 2;
1435			continue;
1436		}
1437
1438		do {
1439			start = u64_stats_fetch_begin(&ring->syncp);
1440			data[i]   = ring->stats.packets;
1441			data[i+1] = ring->stats.bytes;
1442		} while (u64_stats_fetch_retry(&ring->syncp, start));
1443		i += 2;
1444	}
1445	for (j = 0; j < IXGBE_NUM_RX_QUEUES; j++) {
1446		ring = adapter->rx_ring[j];
1447		if (!ring) {
1448			data[i] = 0;
1449			data[i+1] = 0;
1450			i += 2;
1451			continue;
1452		}
1453
1454		do {
1455			start = u64_stats_fetch_begin(&ring->syncp);
1456			data[i]   = ring->stats.packets;
1457			data[i+1] = ring->stats.bytes;
1458		} while (u64_stats_fetch_retry(&ring->syncp, start));
1459		i += 2;
1460	}
1461
1462	for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) {
1463		data[i++] = adapter->stats.pxontxc[j];
1464		data[i++] = adapter->stats.pxofftxc[j];
1465	}
1466	for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) {
1467		data[i++] = adapter->stats.pxonrxc[j];
1468		data[i++] = adapter->stats.pxoffrxc[j];
1469	}
1470}
1471
1472static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1473			      u8 *data)
1474{
1475	unsigned int i;
1476	u8 *p = data;
1477
1478	switch (stringset) {
1479	case ETH_SS_TEST:
1480		for (i = 0; i < IXGBE_TEST_LEN; i++)
1481			ethtool_puts(&p, ixgbe_gstrings_test[i]);
1482		break;
1483	case ETH_SS_STATS:
1484		for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++)
1485			ethtool_puts(&p, ixgbe_gstrings_stats[i].stat_string);
1486		for (i = 0; i < netdev->num_tx_queues; i++) {
1487			ethtool_sprintf(&p, "tx_queue_%u_packets", i);
1488			ethtool_sprintf(&p, "tx_queue_%u_bytes", i);
1489		}
1490		for (i = 0; i < IXGBE_NUM_RX_QUEUES; i++) {
1491			ethtool_sprintf(&p, "rx_queue_%u_packets", i);
1492			ethtool_sprintf(&p, "rx_queue_%u_bytes", i);
1493		}
1494		for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) {
1495			ethtool_sprintf(&p, "tx_pb_%u_pxon", i);
1496			ethtool_sprintf(&p, "tx_pb_%u_pxoff", i);
1497		}
1498		for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) {
1499			ethtool_sprintf(&p, "rx_pb_%u_pxon", i);
1500			ethtool_sprintf(&p, "rx_pb_%u_pxoff", i);
1501		}
1502		/* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1503		break;
1504	case ETH_SS_PRIV_FLAGS:
1505		memcpy(data, ixgbe_priv_flags_strings,
1506		       IXGBE_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN);
1507	}
1508}
1509
1510static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1511{
1512	struct ixgbe_hw *hw = &adapter->hw;
1513	bool link_up;
1514	u32 link_speed = 0;
1515
1516	if (ixgbe_removed(hw->hw_addr)) {
1517		*data = 1;
1518		return 1;
1519	}
1520	*data = 0;
1521
1522	hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1523	if (link_up)
1524		return *data;
1525	else
1526		*data = 1;
1527	return *data;
1528}
1529
1530/* ethtool register test data */
1531struct ixgbe_reg_test {
1532	u16 reg;
1533	u8  array_len;
1534	u8  test_type;
1535	u32 mask;
1536	u32 write;
1537};
1538
1539/* In the hardware, registers are laid out either singly, in arrays
1540 * spaced 0x40 bytes apart, or in contiguous tables.  We assume
1541 * most tests take place on arrays or single registers (handled
1542 * as a single-element array) and special-case the tables.
1543 * Table tests are always pattern tests.
1544 *
1545 * We also make provision for some required setup steps by specifying
1546 * registers to be written without any read-back testing.
1547 */
1548
1549#define PATTERN_TEST	1
1550#define SET_READ_TEST	2
1551#define WRITE_NO_TEST	3
1552#define TABLE32_TEST	4
1553#define TABLE64_TEST_LO	5
1554#define TABLE64_TEST_HI	6
1555
1556/* default 82599 register test */
1557static const struct ixgbe_reg_test reg_test_82599[] = {
1558	{ IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1559	{ IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1560	{ IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1561	{ IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1562	{ IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1563	{ IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1564	{ IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1565	{ IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1566	{ IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1567	{ IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1568	{ IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1569	{ IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1570	{ IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1571	{ IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1572	{ IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1573	{ IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1574	{ IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1575	{ IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1576	{ IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1577	{ .reg = 0 }
1578};
1579
1580/* default 82598 register test */
1581static const struct ixgbe_reg_test reg_test_82598[] = {
1582	{ IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1583	{ IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1584	{ IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1585	{ IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1586	{ IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1587	{ IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1588	{ IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1589	/* Enable all four RX queues before testing. */
1590	{ IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1591	/* RDH is read-only for 82598, only test RDT. */
1592	{ IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1593	{ IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1594	{ IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1595	{ IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1596	{ IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1597	{ IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1598	{ IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1599	{ IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1600	{ IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1601	{ IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1602	{ IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1603	{ IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1604	{ IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1605	{ .reg = 0 }
1606};
1607
1608static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg,
1609			     u32 mask, u32 write)
1610{
1611	u32 pat, val, before;
1612	static const u32 test_pattern[] = {
1613		0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1614
1615	if (ixgbe_removed(adapter->hw.hw_addr)) {
1616		*data = 1;
1617		return true;
1618	}
1619	for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) {
1620		before = ixgbe_read_reg(&adapter->hw, reg);
1621		ixgbe_write_reg(&adapter->hw, reg, test_pattern[pat] & write);
1622		val = ixgbe_read_reg(&adapter->hw, reg);
1623		if (val != (test_pattern[pat] & write & mask)) {
1624			e_err(drv, "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
1625			      reg, val, (test_pattern[pat] & write & mask));
1626			*data = reg;
1627			ixgbe_write_reg(&adapter->hw, reg, before);
1628			return true;
1629		}
1630		ixgbe_write_reg(&adapter->hw, reg, before);
1631	}
1632	return false;
1633}
1634
1635static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg,
1636			      u32 mask, u32 write)
1637{
1638	u32 val, before;
1639
1640	if (ixgbe_removed(adapter->hw.hw_addr)) {
1641		*data = 1;
1642		return true;
1643	}
1644	before = ixgbe_read_reg(&adapter->hw, reg);
1645	ixgbe_write_reg(&adapter->hw, reg, write & mask);
1646	val = ixgbe_read_reg(&adapter->hw, reg);
1647	if ((write & mask) != (val & mask)) {
1648		e_err(drv, "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n",
1649		      reg, (val & mask), (write & mask));
1650		*data = reg;
1651		ixgbe_write_reg(&adapter->hw, reg, before);
1652		return true;
1653	}
1654	ixgbe_write_reg(&adapter->hw, reg, before);
1655	return false;
1656}
1657
1658static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1659{
1660	const struct ixgbe_reg_test *test;
1661	u32 value, before, after;
1662	u32 i, toggle;
1663
1664	if (ixgbe_removed(adapter->hw.hw_addr)) {
1665		e_err(drv, "Adapter removed - register test blocked\n");
1666		*data = 1;
1667		return 1;
1668	}
1669	switch (adapter->hw.mac.type) {
1670	case ixgbe_mac_82598EB:
1671		toggle = 0x7FFFF3FF;
1672		test = reg_test_82598;
1673		break;
1674	case ixgbe_mac_82599EB:
1675	case ixgbe_mac_X540:
1676	case ixgbe_mac_X550:
1677	case ixgbe_mac_X550EM_x:
1678	case ixgbe_mac_x550em_a:
1679	case ixgbe_mac_e610:
1680		toggle = 0x7FFFF30F;
1681		test = reg_test_82599;
1682		break;
1683	default:
1684		*data = 1;
1685		return 1;
1686	}
1687
1688	/*
1689	 * Because the status register is such a special case,
1690	 * we handle it separately from the rest of the register
1691	 * tests.  Some bits are read-only, some toggle, and some
1692	 * are writeable on newer MACs.
1693	 */
1694	before = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS);
1695	value = (ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle);
1696	ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, toggle);
1697	after = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle;
1698	if (value != after) {
1699		e_err(drv, "failed STATUS register test got: 0x%08X expected: 0x%08X\n",
1700		      after, value);
1701		*data = 1;
1702		return 1;
1703	}
1704	/* restore previous status */
1705	ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, before);
1706
1707	/*
1708	 * Perform the remainder of the register test, looping through
1709	 * the test table until we either fail or reach the null entry.
1710	 */
1711	while (test->reg) {
1712		for (i = 0; i < test->array_len; i++) {
1713			bool b = false;
1714
1715			switch (test->test_type) {
1716			case PATTERN_TEST:
1717				b = reg_pattern_test(adapter, data,
1718						     test->reg + (i * 0x40),
1719						     test->mask,
1720						     test->write);
1721				break;
1722			case SET_READ_TEST:
1723				b = reg_set_and_check(adapter, data,
1724						      test->reg + (i * 0x40),
1725						      test->mask,
1726						      test->write);
1727				break;
1728			case WRITE_NO_TEST:
1729				ixgbe_write_reg(&adapter->hw,
1730						test->reg + (i * 0x40),
1731						test->write);
1732				break;
1733			case TABLE32_TEST:
1734				b = reg_pattern_test(adapter, data,
1735						     test->reg + (i * 4),
1736						     test->mask,
1737						     test->write);
1738				break;
1739			case TABLE64_TEST_LO:
1740				b = reg_pattern_test(adapter, data,
1741						     test->reg + (i * 8),
1742						     test->mask,
1743						     test->write);
1744				break;
1745			case TABLE64_TEST_HI:
1746				b = reg_pattern_test(adapter, data,
1747						     (test->reg + 4) + (i * 8),
1748						     test->mask,
1749						     test->write);
1750				break;
1751			}
1752			if (b)
1753				return 1;
1754		}
1755		test++;
1756	}
1757
1758	*data = 0;
1759	return 0;
1760}
1761
1762static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1763{
1764	struct ixgbe_hw *hw = &adapter->hw;
1765	if (hw->eeprom.ops.validate_checksum(hw, NULL))
1766		*data = 1;
1767	else
1768		*data = 0;
1769	return *data;
1770}
1771
1772static irqreturn_t ixgbe_test_intr(int irq, void *data)
1773{
1774	struct net_device *netdev = (struct net_device *) data;
1775	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1776
1777	adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1778
1779	return IRQ_HANDLED;
1780}
1781
1782static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1783{
1784	struct net_device *netdev = adapter->netdev;
1785	u32 mask, i = 0, shared_int = true;
1786	u32 irq = adapter->pdev->irq;
1787
1788	*data = 0;
1789
1790	/* Hook up test interrupt handler just for this test */
1791	if (adapter->msix_entries) {
1792		/* NOTE: we don't test MSI-X interrupts here, yet */
1793		return 0;
1794	} else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1795		shared_int = false;
1796		if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1797				netdev)) {
1798			*data = 1;
1799			return -1;
1800		}
1801	} else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1802				netdev->name, netdev)) {
1803		shared_int = false;
1804	} else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1805			       netdev->name, netdev)) {
1806		*data = 1;
1807		return -1;
1808	}
1809	e_info(hw, "testing %s interrupt\n", shared_int ?
1810	       "shared" : "unshared");
1811
1812	/* Disable all the interrupts */
1813	IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1814	IXGBE_WRITE_FLUSH(&adapter->hw);
1815	usleep_range(10000, 20000);
1816
1817	/* Test each interrupt */
1818	for (; i < 10; i++) {
1819		/* Interrupt to test */
1820		mask = BIT(i);
1821
1822		if (!shared_int) {
1823			/*
1824			 * Disable the interrupts to be reported in
1825			 * the cause register and then force the same
1826			 * interrupt and see if one gets posted.  If
1827			 * an interrupt was posted to the bus, the
1828			 * test failed.
1829			 */
1830			adapter->test_icr = 0;
1831			IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1832					~mask & 0x00007FFF);
1833			IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1834					~mask & 0x00007FFF);
1835			IXGBE_WRITE_FLUSH(&adapter->hw);
1836			usleep_range(10000, 20000);
1837
1838			if (adapter->test_icr & mask) {
1839				*data = 3;
1840				break;
1841			}
1842		}
1843
1844		/*
1845		 * Enable the interrupt to be reported in the cause
1846		 * register and then force the same interrupt and see
1847		 * if one gets posted.  If an interrupt was not posted
1848		 * to the bus, the test failed.
1849		 */
1850		adapter->test_icr = 0;
1851		IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1852		IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1853		IXGBE_WRITE_FLUSH(&adapter->hw);
1854		usleep_range(10000, 20000);
1855
1856		if (!(adapter->test_icr & mask)) {
1857			*data = 4;
1858			break;
1859		}
1860
1861		if (!shared_int) {
1862			/*
1863			 * Disable the other interrupts to be reported in
1864			 * the cause register and then force the other
1865			 * interrupts and see if any get posted.  If
1866			 * an interrupt was posted to the bus, the
1867			 * test failed.
1868			 */
1869			adapter->test_icr = 0;
1870			IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1871					~mask & 0x00007FFF);
1872			IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1873					~mask & 0x00007FFF);
1874			IXGBE_WRITE_FLUSH(&adapter->hw);
1875			usleep_range(10000, 20000);
1876
1877			if (adapter->test_icr) {
1878				*data = 5;
1879				break;
1880			}
1881		}
1882	}
1883
1884	/* Disable all the interrupts */
1885	IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1886	IXGBE_WRITE_FLUSH(&adapter->hw);
1887	usleep_range(10000, 20000);
1888
1889	/* Unhook test interrupt handler */
1890	free_irq(irq, netdev);
1891
1892	return *data;
1893}
1894
1895static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1896{
1897	/* Shut down the DMA engines now so they can be reinitialized later,
1898	 * since the test rings and normally used rings should overlap on
1899	 * queue 0 we can just use the standard disable Rx/Tx calls and they
1900	 * will take care of disabling the test rings for us.
1901	 */
1902
1903	/* first Rx */
1904	ixgbe_disable_rx(adapter);
1905
1906	/* now Tx */
1907	ixgbe_disable_tx(adapter);
1908
1909	ixgbe_reset(adapter);
1910
1911	ixgbe_free_tx_resources(&adapter->test_tx_ring);
1912	ixgbe_free_rx_resources(&adapter->test_rx_ring);
1913}
1914
1915static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1916{
1917	struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1918	struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1919	struct ixgbe_hw *hw = &adapter->hw;
1920	u32 rctl, reg_data;
1921	int ret_val;
1922	int err;
1923
1924	/* Setup Tx descriptor ring and Tx buffers */
1925	tx_ring->count = IXGBE_DEFAULT_TXD;
1926	tx_ring->queue_index = 0;
1927	tx_ring->dev = &adapter->pdev->dev;
1928	tx_ring->netdev = adapter->netdev;
1929	tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1930
1931	err = ixgbe_setup_tx_resources(tx_ring);
1932	if (err)
1933		return 1;
1934
1935	switch (adapter->hw.mac.type) {
1936	case ixgbe_mac_82599EB:
1937	case ixgbe_mac_X540:
1938	case ixgbe_mac_X550:
1939	case ixgbe_mac_X550EM_x:
1940	case ixgbe_mac_x550em_a:
1941	case ixgbe_mac_e610:
1942		reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1943		reg_data |= IXGBE_DMATXCTL_TE;
1944		IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1945		break;
1946	default:
1947		break;
1948	}
1949
1950	ixgbe_configure_tx_ring(adapter, tx_ring);
1951
1952	/* Setup Rx Descriptor ring and Rx buffers */
1953	rx_ring->count = IXGBE_DEFAULT_RXD;
1954	rx_ring->queue_index = 0;
1955	rx_ring->dev = &adapter->pdev->dev;
1956	rx_ring->netdev = adapter->netdev;
1957	rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1958
1959	err = ixgbe_setup_rx_resources(adapter, rx_ring);
1960	if (err) {
1961		ret_val = 4;
1962		goto err_nomem;
1963	}
1964
1965	hw->mac.ops.disable_rx(hw);
1966
1967	ixgbe_configure_rx_ring(adapter, rx_ring);
1968
1969	rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1970	rctl |= IXGBE_RXCTRL_DMBYPS;
1971	IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1972
1973	hw->mac.ops.enable_rx(hw);
1974
1975	return 0;
1976
1977err_nomem:
1978	ixgbe_free_desc_rings(adapter);
1979	return ret_val;
1980}
1981
1982static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1983{
1984	struct ixgbe_hw *hw = &adapter->hw;
1985	u32 reg_data;
1986
1987
1988	/* Setup MAC loopback */
1989	reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1990	reg_data |= IXGBE_HLREG0_LPBK;
1991	IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data);
1992
1993	reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1994	reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1995	IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data);
1996
1997	/* X540 and X550 needs to set the MACC.FLU bit to force link up */
1998	switch (adapter->hw.mac.type) {
1999	case ixgbe_mac_X540:
2000	case ixgbe_mac_X550:
2001	case ixgbe_mac_X550EM_x:
2002	case ixgbe_mac_x550em_a:
2003	case ixgbe_mac_e610:
2004		reg_data = IXGBE_READ_REG(hw, IXGBE_MACC);
2005		reg_data |= IXGBE_MACC_FLU;
2006		IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data);
2007		break;
2008	default:
2009		if (hw->mac.orig_autoc) {
2010			reg_data = hw->mac.orig_autoc | IXGBE_AUTOC_FLU;
2011			IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data);
2012		} else {
2013			return 10;
2014		}
2015	}
2016	IXGBE_WRITE_FLUSH(hw);
2017	usleep_range(10000, 20000);
2018
2019	/* Disable Atlas Tx lanes; re-enabled in reset path */
2020	if (hw->mac.type == ixgbe_mac_82598EB) {
2021		u8 atlas;
2022
2023		hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
2024		atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
2025		hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
2026
2027		hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
2028		atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
2029		hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
2030
2031		hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
2032		atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
2033		hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
2034
2035		hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
2036		atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
2037		hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
2038	}
2039
2040	return 0;
2041}
2042
2043static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
2044{
2045	u32 reg_data;
2046
2047	reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
2048	reg_data &= ~IXGBE_HLREG0_LPBK;
2049	IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
2050}
2051
2052static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
2053				      unsigned int frame_size)
2054{
2055	memset(skb->data, 0xFF, frame_size);
2056	frame_size >>= 1;
2057	memset(&skb->data[frame_size], 0xAA, frame_size / 2 - 1);
2058	skb->data[frame_size + 10] = 0xBE;
2059	skb->data[frame_size + 12] = 0xAF;
2060}
2061
2062static bool ixgbe_check_lbtest_frame(struct ixgbe_rx_buffer *rx_buffer,
2063				     unsigned int frame_size)
2064{
2065	unsigned char *data;
2066
2067	frame_size >>= 1;
2068
2069	data = page_address(rx_buffer->page) + rx_buffer->page_offset;
2070
2071	return data[3] == 0xFF && data[frame_size + 10] == 0xBE &&
2072		data[frame_size + 12] == 0xAF;
2073}
2074
2075static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
2076				  struct ixgbe_ring *tx_ring,
2077				  unsigned int size)
2078{
2079	union ixgbe_adv_rx_desc *rx_desc;
2080	u16 rx_ntc, tx_ntc, count = 0;
2081
2082	/* initialize next to clean and descriptor values */
2083	rx_ntc = rx_ring->next_to_clean;
2084	tx_ntc = tx_ring->next_to_clean;
2085	rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);
2086
2087	while (tx_ntc != tx_ring->next_to_use) {
2088		union ixgbe_adv_tx_desc *tx_desc;
2089		struct ixgbe_tx_buffer *tx_buffer;
2090
2091		tx_desc = IXGBE_TX_DESC(tx_ring, tx_ntc);
2092
2093		/* if DD is not set transmit has not completed */
2094		if (!(tx_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
2095			return count;
2096
2097		/* unmap buffer on Tx side */
2098		tx_buffer = &tx_ring->tx_buffer_info[tx_ntc];
2099
2100		/* Free all the Tx ring sk_buffs */
2101		dev_kfree_skb_any(tx_buffer->skb);
2102
2103		/* unmap skb header data */
2104		dma_unmap_single(tx_ring->dev,
2105				 dma_unmap_addr(tx_buffer, dma),
2106				 dma_unmap_len(tx_buffer, len),
2107				 DMA_TO_DEVICE);
2108		dma_unmap_len_set(tx_buffer, len, 0);
2109
2110		/* increment Tx next to clean counter */
2111		tx_ntc++;
2112		if (tx_ntc == tx_ring->count)
2113			tx_ntc = 0;
2114	}
2115
2116	while (rx_desc->wb.upper.length) {
2117		struct ixgbe_rx_buffer *rx_buffer;
2118
2119		/* check Rx buffer */
2120		rx_buffer = &rx_ring->rx_buffer_info[rx_ntc];
2121
2122		/* sync Rx buffer for CPU read */
2123		dma_sync_single_for_cpu(rx_ring->dev,
2124					rx_buffer->dma,
2125					ixgbe_rx_bufsz(rx_ring),
2126					DMA_FROM_DEVICE);
2127
2128		/* verify contents of skb */
2129		if (ixgbe_check_lbtest_frame(rx_buffer, size))
2130			count++;
2131		else
2132			break;
2133
2134		/* sync Rx buffer for device write */
2135		dma_sync_single_for_device(rx_ring->dev,
2136					   rx_buffer->dma,
2137					   ixgbe_rx_bufsz(rx_ring),
2138					   DMA_FROM_DEVICE);
2139
2140		/* increment Rx next to clean counter */
2141		rx_ntc++;
2142		if (rx_ntc == rx_ring->count)
2143			rx_ntc = 0;
2144
2145		/* fetch next descriptor */
2146		rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);
2147	}
2148
2149	netdev_tx_reset_queue(txring_txq(tx_ring));
2150
2151	/* re-map buffers to ring, store next to clean values */
2152	ixgbe_alloc_rx_buffers(rx_ring, count);
2153	rx_ring->next_to_clean = rx_ntc;
2154	tx_ring->next_to_clean = tx_ntc;
2155
2156	return count;
2157}
2158
2159static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
2160{
2161	struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
2162	struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
2163	int i, j, lc, good_cnt, ret_val = 0;
2164	unsigned int size = 1024;
2165	netdev_tx_t tx_ret_val;
2166	struct sk_buff *skb;
2167	u32 flags_orig = adapter->flags;
2168
2169	/* DCB can modify the frames on Tx */
2170	adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2171
2172	/* allocate test skb */
2173	skb = alloc_skb(size, GFP_KERNEL);
2174	if (!skb)
2175		return 11;
2176
2177	/* place data into test skb */
2178	ixgbe_create_lbtest_frame(skb, size);
2179	skb_put(skb, size);
2180
2181	/*
2182	 * Calculate the loop count based on the largest descriptor ring
2183	 * The idea is to wrap the largest ring a number of times using 64
2184	 * send/receive pairs during each loop
2185	 */
2186
2187	if (rx_ring->count <= tx_ring->count)
2188		lc = ((tx_ring->count / 64) * 2) + 1;
2189	else
2190		lc = ((rx_ring->count / 64) * 2) + 1;
2191
2192	for (j = 0; j <= lc; j++) {
2193		/* reset count of good packets */
2194		good_cnt = 0;
2195
2196		/* place 64 packets on the transmit queue*/
2197		for (i = 0; i < 64; i++) {
2198			skb_get(skb);
2199			tx_ret_val = ixgbe_xmit_frame_ring(skb,
2200							   adapter,
2201							   tx_ring);
2202			if (tx_ret_val == NETDEV_TX_OK)
2203				good_cnt++;
2204		}
2205
2206		if (good_cnt != 64) {
2207			ret_val = 12;
2208			break;
2209		}
2210
2211		/* allow 200 milliseconds for packets to go from Tx to Rx */
2212		msleep(200);
2213
2214		good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size);
2215		if (good_cnt != 64) {
2216			ret_val = 13;
2217			break;
2218		}
2219	}
2220
2221	/* free the original skb */
2222	kfree_skb(skb);
2223	adapter->flags = flags_orig;
2224
2225	return ret_val;
2226}
2227
2228static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
2229{
2230	*data = ixgbe_setup_desc_rings(adapter);
2231	if (*data)
2232		goto out;
2233	*data = ixgbe_setup_loopback_test(adapter);
2234	if (*data)
2235		goto err_loopback;
2236	*data = ixgbe_run_loopback_test(adapter);
2237	ixgbe_loopback_cleanup(adapter);
2238
2239err_loopback:
2240	ixgbe_free_desc_rings(adapter);
2241out:
2242	return *data;
2243}
2244
2245static void ixgbe_diag_test(struct net_device *netdev,
2246			    struct ethtool_test *eth_test, u64 *data)
2247{
2248	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2249	bool if_running = netif_running(netdev);
2250
2251	if (ixgbe_removed(adapter->hw.hw_addr)) {
2252		e_err(hw, "Adapter removed - test blocked\n");
2253		data[0] = 1;
2254		data[1] = 1;
2255		data[2] = 1;
2256		data[3] = 1;
2257		data[4] = 1;
2258		eth_test->flags |= ETH_TEST_FL_FAILED;
2259		return;
2260	}
2261	set_bit(__IXGBE_TESTING, &adapter->state);
2262	if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
2263		struct ixgbe_hw *hw = &adapter->hw;
2264
2265		if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
2266			int i;
2267			for (i = 0; i < adapter->num_vfs; i++) {
2268				if (adapter->vfinfo[i].clear_to_send) {
2269					netdev_warn(netdev, "offline diagnostic is not supported when VFs are present\n");
2270					data[0] = 1;
2271					data[1] = 1;
2272					data[2] = 1;
2273					data[3] = 1;
2274					data[4] = 1;
2275					eth_test->flags |= ETH_TEST_FL_FAILED;
2276					clear_bit(__IXGBE_TESTING,
2277						  &adapter->state);
2278					return;
2279				}
2280			}
2281		}
2282
2283		/* Offline tests */
2284		e_info(hw, "offline testing starting\n");
2285
2286		/* Link test performed before hardware reset so autoneg doesn't
2287		 * interfere with test result
2288		 */
2289		if (ixgbe_link_test(adapter, &data[4]))
2290			eth_test->flags |= ETH_TEST_FL_FAILED;
2291
2292		if (if_running)
2293			/* indicate we're in test mode */
2294			ixgbe_close(netdev);
2295		else
2296			ixgbe_reset(adapter);
2297
2298		e_info(hw, "register testing starting\n");
2299		if (ixgbe_reg_test(adapter, &data[0]))
2300			eth_test->flags |= ETH_TEST_FL_FAILED;
2301
2302		ixgbe_reset(adapter);
2303		e_info(hw, "eeprom testing starting\n");
2304		if (ixgbe_eeprom_test(adapter, &data[1]))
2305			eth_test->flags |= ETH_TEST_FL_FAILED;
2306
2307		ixgbe_reset(adapter);
2308		e_info(hw, "interrupt testing starting\n");
2309		if (ixgbe_intr_test(adapter, &data[2]))
2310			eth_test->flags |= ETH_TEST_FL_FAILED;
2311
2312		/* If SRIOV or VMDq is enabled then skip MAC
2313		 * loopback diagnostic. */
2314		if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
2315				      IXGBE_FLAG_VMDQ_ENABLED)) {
2316			e_info(hw, "Skip MAC loopback diagnostic in VT mode\n");
2317			data[3] = 0;
2318			goto skip_loopback;
2319		}
2320
2321		ixgbe_reset(adapter);
2322		e_info(hw, "loopback testing starting\n");
2323		if (ixgbe_loopback_test(adapter, &data[3]))
2324			eth_test->flags |= ETH_TEST_FL_FAILED;
2325
2326skip_loopback:
2327		ixgbe_reset(adapter);
2328
2329		/* clear testing bit and return adapter to previous state */
2330		clear_bit(__IXGBE_TESTING, &adapter->state);
2331		if (if_running)
2332			ixgbe_open(netdev);
2333		else if (hw->mac.ops.disable_tx_laser)
2334			hw->mac.ops.disable_tx_laser(hw);
2335	} else {
2336		e_info(hw, "online testing starting\n");
2337
2338		/* Online tests */
2339		if (ixgbe_link_test(adapter, &data[4]))
2340			eth_test->flags |= ETH_TEST_FL_FAILED;
2341
2342		/* Offline tests aren't run; pass by default */
2343		data[0] = 0;
2344		data[1] = 0;
2345		data[2] = 0;
2346		data[3] = 0;
2347
2348		clear_bit(__IXGBE_TESTING, &adapter->state);
2349	}
2350}
2351
2352static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
2353			       struct ethtool_wolinfo *wol)
2354{
2355	struct ixgbe_hw *hw = &adapter->hw;
2356	int retval = 0;
2357
2358	/* WOL not supported for all devices */
2359	if (!ixgbe_wol_supported(adapter, hw->device_id,
2360				 hw->subsystem_device_id)) {
2361		retval = 1;
2362		wol->supported = 0;
2363	}
2364
2365	return retval;
2366}
2367
2368static void ixgbe_get_wol(struct net_device *netdev,
2369			  struct ethtool_wolinfo *wol)
2370{
2371	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2372
2373	wol->supported = WAKE_UCAST | WAKE_MCAST |
2374			 WAKE_BCAST | WAKE_MAGIC;
2375	wol->wolopts = 0;
2376
2377	if (ixgbe_wol_exclusion(adapter, wol) ||
2378	    !device_can_wakeup(&adapter->pdev->dev))
2379		return;
2380
2381	if (adapter->wol & IXGBE_WUFC_EX)
2382		wol->wolopts |= WAKE_UCAST;
2383	if (adapter->wol & IXGBE_WUFC_MC)
2384		wol->wolopts |= WAKE_MCAST;
2385	if (adapter->wol & IXGBE_WUFC_BC)
2386		wol->wolopts |= WAKE_BCAST;
2387	if (adapter->wol & IXGBE_WUFC_MAG)
2388		wol->wolopts |= WAKE_MAGIC;
2389}
2390
2391static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2392{
2393	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2394
2395	if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE |
2396			    WAKE_FILTER))
2397		return -EOPNOTSUPP;
2398
2399	if (ixgbe_wol_exclusion(adapter, wol))
2400		return wol->wolopts ? -EOPNOTSUPP : 0;
2401
2402	adapter->wol = 0;
2403
2404	if (wol->wolopts & WAKE_UCAST)
2405		adapter->wol |= IXGBE_WUFC_EX;
2406	if (wol->wolopts & WAKE_MCAST)
2407		adapter->wol |= IXGBE_WUFC_MC;
2408	if (wol->wolopts & WAKE_BCAST)
2409		adapter->wol |= IXGBE_WUFC_BC;
2410	if (wol->wolopts & WAKE_MAGIC)
2411		adapter->wol |= IXGBE_WUFC_MAG;
2412
2413	device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2414
2415	return 0;
2416}
2417
2418static int ixgbe_set_wol_acpi(struct net_device *netdev,
2419			      struct ethtool_wolinfo *wol)
2420{
2421	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2422	struct ixgbe_hw *hw = &adapter->hw;
2423	u32 grc;
2424
2425	if (ixgbe_wol_exclusion(adapter, wol))
2426		return wol->wolopts ? -EOPNOTSUPP : 0;
2427
2428	/* disable APM wakeup */
2429	grc = IXGBE_READ_REG(hw, IXGBE_GRC_X550EM_a);
2430	grc &= ~IXGBE_GRC_APME;
2431	IXGBE_WRITE_REG(hw, IXGBE_GRC_X550EM_a, grc);
2432
2433	/* erase existing filters */
2434	IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
2435	adapter->wol = 0;
2436
2437	if (wol->wolopts & WAKE_UCAST)
2438		adapter->wol |= IXGBE_WUFC_EX;
2439	if (wol->wolopts & WAKE_MCAST)
2440		adapter->wol |= IXGBE_WUFC_MC;
2441	if (wol->wolopts & WAKE_BCAST)
2442		adapter->wol |= IXGBE_WUFC_BC;
2443
2444	IXGBE_WRITE_REG(hw, IXGBE_WUC, IXGBE_WUC_PME_EN);
2445	IXGBE_WRITE_REG(hw, IXGBE_WUFC, adapter->wol);
2446
2447	hw->wol_enabled = adapter->wol;
2448	device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2449
2450	return 0;
2451}
2452
2453static int ixgbe_set_wol_e610(struct net_device *netdev,
2454			      struct ethtool_wolinfo *wol)
2455{
2456	if (wol->wolopts & (WAKE_UCAST | WAKE_MCAST | WAKE_BCAST))
2457		return ixgbe_set_wol_acpi(netdev, wol);
2458	else
2459		return ixgbe_set_wol(netdev, wol);
2460}
2461
2462static int ixgbe_nway_reset(struct net_device *netdev)
2463{
2464	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2465
2466	if (netif_running(netdev))
2467		ixgbe_reinit_locked(adapter);
2468
2469	return 0;
2470}
2471
2472static int ixgbe_set_phys_id(struct net_device *netdev,
2473			     enum ethtool_phys_id_state state)
2474{
2475	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2476	struct ixgbe_hw *hw = &adapter->hw;
2477
2478	if (!hw->mac.ops.led_on || !hw->mac.ops.led_off)
2479		return -EOPNOTSUPP;
2480
2481	switch (state) {
2482	case ETHTOOL_ID_ACTIVE:
2483		adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
2484		return 2;
2485
2486	case ETHTOOL_ID_ON:
2487		hw->mac.ops.led_on(hw, hw->mac.led_link_act);
2488		break;
2489
2490	case ETHTOOL_ID_OFF:
2491		hw->mac.ops.led_off(hw, hw->mac.led_link_act);
2492		break;
2493
2494	case ETHTOOL_ID_INACTIVE:
2495		/* Restore LED settings */
2496		IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg);
2497		break;
2498	}
2499
2500	return 0;
2501}
2502
2503static int ixgbe_set_phys_id_e610(struct net_device *netdev,
2504				  enum ethtool_phys_id_state state)
2505{
2506	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2507	bool led_active;
2508
2509	switch (state) {
2510	case ETHTOOL_ID_ACTIVE:
2511		led_active = true;
2512		break;
2513	case ETHTOOL_ID_INACTIVE:
2514		led_active = false;
2515		break;
2516	default:
2517		return -EOPNOTSUPP;
2518	}
2519
2520	return ixgbe_aci_set_port_id_led(&adapter->hw, !led_active);
2521}
2522
2523static int ixgbe_get_coalesce(struct net_device *netdev,
2524			      struct ethtool_coalesce *ec,
2525			      struct kernel_ethtool_coalesce *kernel_coal,
2526			      struct netlink_ext_ack *extack)
2527{
2528	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2529
2530	/* only valid if in constant ITR mode */
2531	if (adapter->rx_itr_setting <= 1)
2532		ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2533	else
2534		ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2535
2536	/* if in mixed tx/rx queues per vector mode, report only rx settings */
2537	if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
2538		return 0;
2539
2540	/* only valid if in constant ITR mode */
2541	if (adapter->tx_itr_setting <= 1)
2542		ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2543	else
2544		ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2545
2546	return 0;
2547}
2548
2549/*
2550 * this function must be called before setting the new value of
2551 * rx_itr_setting
2552 */
2553static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter)
2554{
2555	struct net_device *netdev = adapter->netdev;
2556
2557	/* nothing to do if LRO or RSC are not enabled */
2558	if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) ||
2559	    !(netdev->features & NETIF_F_LRO))
2560		return false;
2561
2562	/* check the feature flag value and enable RSC if necessary */
2563	if (adapter->rx_itr_setting == 1 ||
2564	    adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
2565		if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2566			adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2567			e_info(probe, "rx-usecs value high enough to re-enable RSC\n");
2568			return true;
2569		}
2570	/* if interrupt rate is too high then disable RSC */
2571	} else if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2572		adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2573		e_info(probe, "rx-usecs set too low, disabling RSC\n");
2574		return true;
2575	}
2576	return false;
2577}
2578
2579static int ixgbe_set_coalesce(struct net_device *netdev,
2580			      struct ethtool_coalesce *ec,
2581			      struct kernel_ethtool_coalesce *kernel_coal,
2582			      struct netlink_ext_ack *extack)
2583{
2584	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2585	struct ixgbe_q_vector *q_vector;
2586	int i;
2587	u16 tx_itr_param, rx_itr_param, tx_itr_prev;
2588	bool need_reset = false;
2589
2590	if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) {
2591		/* reject Tx specific changes in case of mixed RxTx vectors */
2592		if (ec->tx_coalesce_usecs)
2593			return -EINVAL;
2594		tx_itr_prev = adapter->rx_itr_setting;
2595	} else {
2596		tx_itr_prev = adapter->tx_itr_setting;
2597	}
2598
2599	if ((ec->rx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)) ||
2600	    (ec->tx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)))
2601		return -EINVAL;
2602
2603	if (ec->rx_coalesce_usecs > 1)
2604		adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2605	else
2606		adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2607
2608	if (adapter->rx_itr_setting == 1)
2609		rx_itr_param = IXGBE_20K_ITR;
2610	else
2611		rx_itr_param = adapter->rx_itr_setting;
2612
2613	if (ec->tx_coalesce_usecs > 1)
2614		adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2615	else
2616		adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2617
2618	if (adapter->tx_itr_setting == 1)
2619		tx_itr_param = IXGBE_12K_ITR;
2620	else
2621		tx_itr_param = adapter->tx_itr_setting;
2622
2623	/* mixed Rx/Tx */
2624	if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
2625		adapter->tx_itr_setting = adapter->rx_itr_setting;
2626
2627	/* detect ITR changes that require update of TXDCTL.WTHRESH */
2628	if ((adapter->tx_itr_setting != 1) &&
2629	    (adapter->tx_itr_setting < IXGBE_100K_ITR)) {
2630		if ((tx_itr_prev == 1) ||
2631		    (tx_itr_prev >= IXGBE_100K_ITR))
2632			need_reset = true;
2633	} else {
2634		if ((tx_itr_prev != 1) &&
2635		    (tx_itr_prev < IXGBE_100K_ITR))
2636			need_reset = true;
2637	}
2638
2639	/* check the old value and enable RSC if necessary */
2640	need_reset |= ixgbe_update_rsc(adapter);
2641
2642	for (i = 0; i < adapter->num_q_vectors; i++) {
2643		q_vector = adapter->q_vector[i];
2644		if (q_vector->tx.count && !q_vector->rx.count)
2645			/* tx only */
2646			q_vector->itr = tx_itr_param;
2647		else
2648			/* rx only or mixed */
2649			q_vector->itr = rx_itr_param;
2650		ixgbe_write_eitr(q_vector);
2651	}
2652
2653	/*
2654	 * do reset here at the end to make sure EITR==0 case is handled
2655	 * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2656	 * also locks in RSC enable/disable which requires reset
2657	 */
2658	if (need_reset)
2659		ixgbe_do_reset(netdev);
2660
2661	return 0;
2662}
2663
2664static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2665					struct ethtool_rxnfc *cmd)
2666{
2667	union ixgbe_atr_input *mask = &adapter->fdir_mask;
2668	struct ethtool_rx_flow_spec *fsp =
2669		(struct ethtool_rx_flow_spec *)&cmd->fs;
2670	struct hlist_node *node2;
2671	struct ixgbe_fdir_filter *rule = NULL;
2672
2673	/* report total rule count */
2674	cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2675
2676	hlist_for_each_entry_safe(rule, node2,
2677				  &adapter->fdir_filter_list, fdir_node) {
2678		if (fsp->location <= rule->sw_idx)
2679			break;
2680	}
2681
2682	if (!rule || fsp->location != rule->sw_idx)
2683		return -EINVAL;
2684
2685	/* fill out the flow spec entry */
2686
2687	/* set flow type field */
2688	switch (rule->filter.formatted.flow_type) {
2689	case IXGBE_ATR_FLOW_TYPE_TCPV4:
2690		fsp->flow_type = TCP_V4_FLOW;
2691		break;
2692	case IXGBE_ATR_FLOW_TYPE_UDPV4:
2693		fsp->flow_type = UDP_V4_FLOW;
2694		break;
2695	case IXGBE_ATR_FLOW_TYPE_SCTPV4:
2696		fsp->flow_type = SCTP_V4_FLOW;
2697		break;
2698	case IXGBE_ATR_FLOW_TYPE_IPV4:
2699		fsp->flow_type = IP_USER_FLOW;
2700		fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2701		fsp->h_u.usr_ip4_spec.proto = 0;
2702		fsp->m_u.usr_ip4_spec.proto = 0;
2703		break;
2704	default:
2705		return -EINVAL;
2706	}
2707
2708	fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port;
2709	fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port;
2710	fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port;
2711	fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port;
2712	fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0];
2713	fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0];
2714	fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0];
2715	fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0];
2716	fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id;
2717	fsp->m_ext.vlan_tci = mask->formatted.vlan_id;
2718	fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes;
2719	fsp->m_ext.vlan_etype = mask->formatted.flex_bytes;
2720	fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool);
2721	fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool);
2722	fsp->flow_type |= FLOW_EXT;
2723
2724	/* record action */
2725	if (rule->action == IXGBE_FDIR_DROP_QUEUE)
2726		fsp->ring_cookie = RX_CLS_FLOW_DISC;
2727	else
2728		fsp->ring_cookie = rule->action;
2729
2730	return 0;
2731}
2732
2733static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter,
2734				      struct ethtool_rxnfc *cmd,
2735				      u32 *rule_locs)
2736{
2737	struct hlist_node *node2;
2738	struct ixgbe_fdir_filter *rule;
2739	int cnt = 0;
2740
2741	/* report total rule count */
2742	cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2743
2744	hlist_for_each_entry_safe(rule, node2,
2745				  &adapter->fdir_filter_list, fdir_node) {
2746		if (cnt == cmd->rule_cnt)
2747			return -EMSGSIZE;
2748		rule_locs[cnt] = rule->sw_idx;
2749		cnt++;
2750	}
2751
2752	cmd->rule_cnt = cnt;
2753
2754	return 0;
2755}
2756
2757static int ixgbe_get_rxfh_fields(struct net_device *dev,
2758				 struct ethtool_rxfh_fields *cmd)
2759{
2760	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
2761
2762	cmd->data = 0;
2763
2764	/* Report default options for RSS on ixgbe */
2765	switch (cmd->flow_type) {
2766	case TCP_V4_FLOW:
2767		cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2768		fallthrough;
2769	case UDP_V4_FLOW:
2770		if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2771			cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2772		fallthrough;
2773	case SCTP_V4_FLOW:
2774	case AH_ESP_V4_FLOW:
2775	case AH_V4_FLOW:
2776	case ESP_V4_FLOW:
2777	case IPV4_FLOW:
2778		cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2779		break;
2780	case TCP_V6_FLOW:
2781		cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2782		fallthrough;
2783	case UDP_V6_FLOW:
2784		if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2785			cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2786		fallthrough;
2787	case SCTP_V6_FLOW:
2788	case AH_ESP_V6_FLOW:
2789	case AH_V6_FLOW:
2790	case ESP_V6_FLOW:
2791	case IPV6_FLOW:
2792		cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2793		break;
2794	default:
2795		return -EINVAL;
2796	}
2797
2798	return 0;
2799}
2800
2801static int ixgbe_rss_indir_tbl_max(struct ixgbe_adapter *adapter)
2802{
2803	if (adapter->hw.mac.type < ixgbe_mac_X550)
2804		return 16;
2805	else
2806		return 64;
2807}
2808
2809static u32 ixgbe_get_rx_ring_count(struct net_device *dev)
2810{
2811	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
2812
2813	return min_t(u32, adapter->num_rx_queues,
2814		     ixgbe_rss_indir_tbl_max(adapter));
2815}
2816
2817static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2818			   u32 *rule_locs)
2819{
2820	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
2821	int ret = -EOPNOTSUPP;
2822
2823	switch (cmd->cmd) {
2824	case ETHTOOL_GRXCLSRLCNT:
2825		cmd->rule_cnt = adapter->fdir_filter_count;
2826		ret = 0;
2827		break;
2828	case ETHTOOL_GRXCLSRULE:
2829		ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd);
2830		break;
2831	case ETHTOOL_GRXCLSRLALL:
2832		ret = ixgbe_get_ethtool_fdir_all(adapter, cmd, rule_locs);
2833		break;
2834	default:
2835		break;
2836	}
2837
2838	return ret;
2839}
2840
2841int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2842				    struct ixgbe_fdir_filter *input,
2843				    u16 sw_idx)
2844{
2845	struct ixgbe_hw *hw = &adapter->hw;
2846	struct hlist_node *node2;
2847	struct ixgbe_fdir_filter *rule, *parent;
2848	int err = -EINVAL;
2849
2850	parent = NULL;
2851	rule = NULL;
2852
2853	hlist_for_each_entry_safe(rule, node2,
2854				  &adapter->fdir_filter_list, fdir_node) {
2855		/* hash found, or no matching entry */
2856		if (rule->sw_idx >= sw_idx)
2857			break;
2858		parent = rule;
2859	}
2860
2861	/* if there is an old rule occupying our place remove it */
2862	if (rule && (rule->sw_idx == sw_idx)) {
2863		if (!input || (rule->filter.formatted.bkt_hash !=
2864			       input->filter.formatted.bkt_hash)) {
2865			err = ixgbe_fdir_erase_perfect_filter_82599(hw,
2866								&rule->filter,
2867								sw_idx);
2868		}
2869
2870		hlist_del(&rule->fdir_node);
2871		kfree(rule);
2872		adapter->fdir_filter_count--;
2873	}
2874
2875	/*
2876	 * If no input this was a delete, err should be 0 if a rule was
2877	 * successfully found and removed from the list else -EINVAL
2878	 */
2879	if (!input)
2880		return err;
2881
2882	/* initialize node and set software index */
2883	INIT_HLIST_NODE(&input->fdir_node);
2884
2885	/* add filter to the list */
2886	if (parent)
2887		hlist_add_behind(&input->fdir_node, &parent->fdir_node);
2888	else
2889		hlist_add_head(&input->fdir_node,
2890			       &adapter->fdir_filter_list);
2891
2892	/* update counts */
2893	adapter->fdir_filter_count++;
2894
2895	return 0;
2896}
2897
2898static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp,
2899				       u8 *flow_type)
2900{
2901	switch (fsp->flow_type & ~FLOW_EXT) {
2902	case TCP_V4_FLOW:
2903		*flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2904		break;
2905	case UDP_V4_FLOW:
2906		*flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2907		break;
2908	case SCTP_V4_FLOW:
2909		*flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2910		break;
2911	case IP_USER_FLOW:
2912		switch (fsp->h_u.usr_ip4_spec.proto) {
2913		case IPPROTO_TCP:
2914			*flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2915			break;
2916		case IPPROTO_UDP:
2917			*flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2918			break;
2919		case IPPROTO_SCTP:
2920			*flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2921			break;
2922		case 0:
2923			if (!fsp->m_u.usr_ip4_spec.proto) {
2924				*flow_type = IXGBE_ATR_FLOW_TYPE_IPV4;
2925				break;
2926			}
2927			fallthrough;
2928		default:
2929			return 0;
2930		}
2931		break;
2932	default:
2933		return 0;
2934	}
2935
2936	return 1;
2937}
2938
2939static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2940					struct ethtool_rxnfc *cmd)
2941{
2942	struct ethtool_rx_flow_spec *fsp =
2943		(struct ethtool_rx_flow_spec *)&cmd->fs;
2944	struct ixgbe_hw *hw = &adapter->hw;
2945	struct ixgbe_fdir_filter *input;
2946	union ixgbe_atr_input mask;
2947	u8 queue;
2948	int err;
2949
2950	if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
2951		return -EOPNOTSUPP;
2952
2953	/* ring_cookie is a masked into a set of queues and ixgbe pools or
2954	 * we use the drop index.
2955	 */
2956	if (fsp->ring_cookie == RX_CLS_FLOW_DISC) {
2957		queue = IXGBE_FDIR_DROP_QUEUE;
2958	} else {
2959		u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie);
2960		u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie);
2961
2962		if (!vf && (ring >= adapter->num_rx_queues))
2963			return -EINVAL;
2964		else if (vf &&
2965			 ((vf > adapter->num_vfs) ||
2966			   ring >= adapter->num_rx_queues_per_pool))
2967			return -EINVAL;
2968
2969		/* Map the ring onto the absolute queue index */
2970		if (!vf)
2971			queue = adapter->rx_ring[ring]->reg_idx;
2972		else
2973			queue = ((vf - 1) *
2974				adapter->num_rx_queues_per_pool) + ring;
2975	}
2976
2977	/* Don't allow indexes to exist outside of available space */
2978	if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) {
2979		e_err(drv, "Location out of range\n");
2980		return -EINVAL;
2981	}
2982
2983	input = kzalloc(sizeof(*input), GFP_ATOMIC);
2984	if (!input)
2985		return -ENOMEM;
2986
2987	memset(&mask, 0, sizeof(union ixgbe_atr_input));
2988
2989	/* set SW index */
2990	input->sw_idx = fsp->location;
2991
2992	/* record flow type */
2993	if (!ixgbe_flowspec_to_flow_type(fsp,
2994					 &input->filter.formatted.flow_type)) {
2995		e_err(drv, "Unrecognized flow type\n");
2996		goto err_out;
2997	}
2998
2999	mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
3000				   IXGBE_ATR_L4TYPE_MASK;
3001
3002	if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
3003		mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
3004
3005	/* Copy input into formatted structures */
3006	input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src;
3007	mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src;
3008	input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst;
3009	mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst;
3010	input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc;
3011	mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc;
3012	input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst;
3013	mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst;
3014
3015	if (fsp->flow_type & FLOW_EXT) {
3016		input->filter.formatted.vm_pool =
3017				(unsigned char)ntohl(fsp->h_ext.data[1]);
3018		mask.formatted.vm_pool =
3019				(unsigned char)ntohl(fsp->m_ext.data[1]);
3020		input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci;
3021		mask.formatted.vlan_id = fsp->m_ext.vlan_tci;
3022		input->filter.formatted.flex_bytes =
3023						fsp->h_ext.vlan_etype;
3024		mask.formatted.flex_bytes = fsp->m_ext.vlan_etype;
3025	}
3026
3027	/* determine if we need to drop or route the packet */
3028	if (fsp->ring_cookie == RX_CLS_FLOW_DISC)
3029		input->action = IXGBE_FDIR_DROP_QUEUE;
3030	else
3031		input->action = fsp->ring_cookie;
3032
3033	spin_lock(&adapter->fdir_perfect_lock);
3034
3035	if (hlist_empty(&adapter->fdir_filter_list)) {
3036		/* save mask and program input mask into HW */
3037		memcpy(&adapter->fdir_mask, &mask, sizeof(mask));
3038		err = ixgbe_fdir_set_input_mask_82599(hw, &mask);
3039		if (err) {
3040			e_err(drv, "Error writing mask\n");
3041			goto err_out_w_lock;
3042		}
3043	} else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) {
3044		e_err(drv, "Only one mask supported per port\n");
3045		goto err_out_w_lock;
3046	}
3047
3048	/* apply mask and compute/store hash */
3049	ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask);
3050
3051	/* program filters to filter memory */
3052	err = ixgbe_fdir_write_perfect_filter_82599(hw,
3053				&input->filter, input->sw_idx, queue);
3054	if (err)
3055		goto err_out_w_lock;
3056
3057	ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
3058
3059	spin_unlock(&adapter->fdir_perfect_lock);
3060
3061	return err;
3062err_out_w_lock:
3063	spin_unlock(&adapter->fdir_perfect_lock);
3064err_out:
3065	kfree(input);
3066	return -EINVAL;
3067}
3068
3069static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
3070					struct ethtool_rxnfc *cmd)
3071{
3072	struct ethtool_rx_flow_spec *fsp =
3073		(struct ethtool_rx_flow_spec *)&cmd->fs;
3074	int err;
3075
3076	spin_lock(&adapter->fdir_perfect_lock);
3077	err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, fsp->location);
3078	spin_unlock(&adapter->fdir_perfect_lock);
3079
3080	return err;
3081}
3082
3083#define UDP_RSS_FLAGS (IXGBE_FLAG2_RSS_FIELD_IPV4_UDP | \
3084		       IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3085static int ixgbe_set_rxfh_fields(struct net_device *dev,
3086				 const struct ethtool_rxfh_fields *nfc,
3087				 struct netlink_ext_ack *extack)
3088{
3089	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
3090	u32 flags2 = adapter->flags2;
3091
3092	/*
3093	 * RSS does not support anything other than hashing
3094	 * to queues on src and dst IPs and ports
3095	 */
3096	if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
3097			  RXH_L4_B_0_1 | RXH_L4_B_2_3))
3098		return -EINVAL;
3099
3100	switch (nfc->flow_type) {
3101	case TCP_V4_FLOW:
3102	case TCP_V6_FLOW:
3103		if (!(nfc->data & RXH_IP_SRC) ||
3104		    !(nfc->data & RXH_IP_DST) ||
3105		    !(nfc->data & RXH_L4_B_0_1) ||
3106		    !(nfc->data & RXH_L4_B_2_3))
3107			return -EINVAL;
3108		break;
3109	case UDP_V4_FLOW:
3110		if (!(nfc->data & RXH_IP_SRC) ||
3111		    !(nfc->data & RXH_IP_DST))
3112			return -EINVAL;
3113		switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
3114		case 0:
3115			flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
3116			break;
3117		case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
3118			flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
3119			break;
3120		default:
3121			return -EINVAL;
3122		}
3123		break;
3124	case UDP_V6_FLOW:
3125		if (!(nfc->data & RXH_IP_SRC) ||
3126		    !(nfc->data & RXH_IP_DST))
3127			return -EINVAL;
3128		switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
3129		case 0:
3130			flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
3131			break;
3132		case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
3133			flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
3134			break;
3135		default:
3136			return -EINVAL;
3137		}
3138		break;
3139	case AH_ESP_V4_FLOW:
3140	case AH_V4_FLOW:
3141	case ESP_V4_FLOW:
3142	case SCTP_V4_FLOW:
3143	case AH_ESP_V6_FLOW:
3144	case AH_V6_FLOW:
3145	case ESP_V6_FLOW:
3146	case SCTP_V6_FLOW:
3147		if (!(nfc->data & RXH_IP_SRC) ||
3148		    !(nfc->data & RXH_IP_DST) ||
3149		    (nfc->data & RXH_L4_B_0_1) ||
3150		    (nfc->data & RXH_L4_B_2_3))
3151			return -EINVAL;
3152		break;
3153	default:
3154		return -EINVAL;
3155	}
3156
3157	/* if we changed something we need to update flags */
3158	if (flags2 != adapter->flags2) {
3159		struct ixgbe_hw *hw = &adapter->hw;
3160		u32 mrqc;
3161		unsigned int pf_pool = adapter->num_vfs;
3162
3163		if ((hw->mac.type >= ixgbe_mac_X550) &&
3164		    (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3165			mrqc = IXGBE_READ_REG(hw, IXGBE_PFVFMRQC(pf_pool));
3166		else
3167			mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC);
3168
3169		if ((flags2 & UDP_RSS_FLAGS) &&
3170		    !(adapter->flags2 & UDP_RSS_FLAGS))
3171			e_warn(drv, "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
3172
3173		adapter->flags2 = flags2;
3174
3175		/* Perform hash on these packet types */
3176		mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4
3177		      | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
3178		      | IXGBE_MRQC_RSS_FIELD_IPV6
3179		      | IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3180
3181		mrqc &= ~(IXGBE_MRQC_RSS_FIELD_IPV4_UDP |
3182			  IXGBE_MRQC_RSS_FIELD_IPV6_UDP);
3183
3184		if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3185			mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3186
3187		if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3188			mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3189
3190		if ((hw->mac.type >= ixgbe_mac_X550) &&
3191		    (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3192			IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), mrqc);
3193		else
3194			IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3195	}
3196
3197	return 0;
3198}
3199
3200static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
3201{
3202	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
3203	int ret = -EOPNOTSUPP;
3204
3205	switch (cmd->cmd) {
3206	case ETHTOOL_SRXCLSRLINS:
3207		ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd);
3208		break;
3209	case ETHTOOL_SRXCLSRLDEL:
3210		ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd);
3211		break;
3212	default:
3213		break;
3214	}
3215
3216	return ret;
3217}
3218
3219static u32 ixgbe_get_rxfh_key_size(struct net_device *netdev)
3220{
3221	return IXGBE_RSS_KEY_SIZE;
3222}
3223
3224static u32 ixgbe_rss_indir_size(struct net_device *netdev)
3225{
3226	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3227
3228	return ixgbe_rss_indir_tbl_entries(adapter);
3229}
3230
3231static void ixgbe_get_reta(struct ixgbe_adapter *adapter, u32 *indir)
3232{
3233	int i, reta_size = ixgbe_rss_indir_tbl_entries(adapter);
3234	u16 rss_m = adapter->ring_feature[RING_F_RSS].mask;
3235
3236	if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3237		rss_m = adapter->ring_feature[RING_F_RSS].indices - 1;
3238
3239	for (i = 0; i < reta_size; i++)
3240		indir[i] = adapter->rss_indir_tbl[i] & rss_m;
3241}
3242
3243static int ixgbe_get_rxfh(struct net_device *netdev,
3244			  struct ethtool_rxfh_param *rxfh)
3245{
3246	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3247
3248	rxfh->hfunc = ETH_RSS_HASH_TOP;
3249
3250	if (rxfh->indir)
3251		ixgbe_get_reta(adapter, rxfh->indir);
3252
3253	if (rxfh->key)
3254		memcpy(rxfh->key, adapter->rss_key,
3255		       ixgbe_get_rxfh_key_size(netdev));
3256
3257	return 0;
3258}
3259
3260static int ixgbe_set_rxfh(struct net_device *netdev,
3261			  struct ethtool_rxfh_param *rxfh,
3262			  struct netlink_ext_ack *extack)
3263{
3264	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3265	int i;
3266	u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3267
3268	if (rxfh->hfunc != ETH_RSS_HASH_NO_CHANGE &&
3269	    rxfh->hfunc != ETH_RSS_HASH_TOP)
3270		return -EOPNOTSUPP;
3271
3272	/* Fill out the redirection table */
3273	if (rxfh->indir) {
3274		int max_queues = min_t(int, adapter->num_rx_queues,
3275				       ixgbe_rss_indir_tbl_max(adapter));
3276
3277		/*Allow at least 2 queues w/ SR-IOV.*/
3278		if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
3279		    (max_queues < 2))
3280			max_queues = 2;
3281
3282		/* Verify user input. */
3283		for (i = 0; i < reta_entries; i++)
3284			if (rxfh->indir[i] >= max_queues)
3285				return -EINVAL;
3286
3287		for (i = 0; i < reta_entries; i++)
3288			adapter->rss_indir_tbl[i] = rxfh->indir[i];
3289
3290		ixgbe_store_reta(adapter);
3291	}
3292
3293	/* Fill out the rss hash key */
3294	if (rxfh->key) {
3295		memcpy(adapter->rss_key, rxfh->key,
3296		       ixgbe_get_rxfh_key_size(netdev));
3297		ixgbe_store_key(adapter);
3298	}
3299
3300	return 0;
3301}
3302
3303static int ixgbe_get_ts_info(struct net_device *dev,
3304			     struct kernel_ethtool_ts_info *info)
3305{
3306	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
3307
3308	/* we always support timestamping disabled */
3309	info->rx_filters = BIT(HWTSTAMP_FILTER_NONE);
3310
3311	switch (adapter->hw.mac.type) {
3312	case ixgbe_mac_X550:
3313	case ixgbe_mac_X550EM_x:
3314	case ixgbe_mac_x550em_a:
3315	case ixgbe_mac_e610:
3316		info->rx_filters |= BIT(HWTSTAMP_FILTER_ALL);
3317		break;
3318	case ixgbe_mac_X540:
3319	case ixgbe_mac_82599EB:
3320		info->rx_filters |=
3321			BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
3322			BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
3323			BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
3324		break;
3325	default:
3326		return ethtool_op_get_ts_info(dev, info);
3327	}
3328
3329	info->so_timestamping =
3330		SOF_TIMESTAMPING_TX_SOFTWARE |
3331		SOF_TIMESTAMPING_TX_HARDWARE |
3332		SOF_TIMESTAMPING_RX_HARDWARE |
3333		SOF_TIMESTAMPING_RAW_HARDWARE;
3334
3335	if (adapter->ptp_clock)
3336		info->phc_index = ptp_clock_index(adapter->ptp_clock);
3337
3338	info->tx_types =
3339		BIT(HWTSTAMP_TX_OFF) |
3340		BIT(HWTSTAMP_TX_ON);
3341
3342	return 0;
3343}
3344
3345static unsigned int ixgbe_max_channels(struct ixgbe_adapter *adapter)
3346{
3347	unsigned int max_combined;
3348	u8 tcs = adapter->hw_tcs;
3349
3350	if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3351		/* We only support one q_vector without MSI-X */
3352		max_combined = 1;
3353	} else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3354		/* Limit value based on the queue mask */
3355		max_combined = adapter->ring_feature[RING_F_RSS].mask + 1;
3356	} else if (tcs > 1) {
3357		/* For DCB report channels per traffic class */
3358		if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3359			/* 8 TC w/ 4 queues per TC */
3360			max_combined = 4;
3361		} else if (tcs > 4) {
3362			/* 8 TC w/ 8 queues per TC */
3363			max_combined = 8;
3364		} else {
3365			/* 4 TC w/ 16 queues per TC */
3366			max_combined = 16;
3367		}
3368	} else if (adapter->atr_sample_rate) {
3369		/* support up to 64 queues with ATR */
3370		max_combined = IXGBE_MAX_FDIR_INDICES;
3371	} else {
3372		/* support up to 16 queues with RSS */
3373		max_combined = ixgbe_max_rss_indices(adapter);
3374	}
3375
3376	return min_t(int, max_combined, num_online_cpus());
3377}
3378
3379static void ixgbe_get_channels(struct net_device *dev,
3380			       struct ethtool_channels *ch)
3381{
3382	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
3383
3384	/* report maximum channels */
3385	ch->max_combined = ixgbe_max_channels(adapter);
3386
3387	/* report info for other vector */
3388	if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3389		ch->max_other = NON_Q_VECTORS;
3390		ch->other_count = NON_Q_VECTORS;
3391	}
3392
3393	/* record RSS queues */
3394	ch->combined_count = adapter->ring_feature[RING_F_RSS].indices;
3395
3396	/* nothing else to report if RSS is disabled */
3397	if (ch->combined_count == 1)
3398		return;
3399
3400	/* we do not support ATR queueing if SR-IOV is enabled */
3401	if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3402		return;
3403
3404	/* same thing goes for being DCB enabled */
3405	if (adapter->hw_tcs > 1)
3406		return;
3407
3408	/* if ATR is disabled we can exit */
3409	if (!adapter->atr_sample_rate)
3410		return;
3411
3412	/* report flow director queues as maximum channels */
3413	ch->combined_count = adapter->ring_feature[RING_F_FDIR].indices;
3414}
3415
3416static int ixgbe_set_channels(struct net_device *dev,
3417			      struct ethtool_channels *ch)
3418{
3419	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
3420	unsigned int count = ch->combined_count;
3421	u8 max_rss_indices = ixgbe_max_rss_indices(adapter);
3422
3423	/* verify they are not requesting separate vectors */
3424	if (!count || ch->rx_count || ch->tx_count)
3425		return -EINVAL;
3426
3427	/* verify other_count has not changed */
3428	if (ch->other_count != NON_Q_VECTORS)
3429		return -EINVAL;
3430
3431	/* verify the number of channels does not exceed hardware limits */
3432	if (count > ixgbe_max_channels(adapter))
3433		return -EINVAL;
3434
3435	/* update feature limits from largest to smallest supported values */
3436	adapter->ring_feature[RING_F_FDIR].limit = count;
3437
3438	/* cap RSS limit */
3439	if (count > max_rss_indices)
3440		count = max_rss_indices;
3441	adapter->ring_feature[RING_F_RSS].limit = count;
3442
3443#ifdef IXGBE_FCOE
3444	/* cap FCoE limit at 8 */
3445	if (count > IXGBE_FCRETA_SIZE)
3446		count = IXGBE_FCRETA_SIZE;
3447	adapter->ring_feature[RING_F_FCOE].limit = count;
3448
3449#endif
3450	/* use setup TC to update any traffic class queue mapping */
3451	return ixgbe_setup_tc(dev, adapter->hw_tcs);
3452}
3453
3454static int ixgbe_get_module_info(struct net_device *dev,
3455				       struct ethtool_modinfo *modinfo)
3456{
3457	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
3458	struct ixgbe_hw *hw = &adapter->hw;
3459	u8 sff8472_rev, addr_mode;
3460	bool page_swap = false;
3461	int status;
3462
3463	if (hw->phy.type == ixgbe_phy_fw)
3464		return -ENXIO;
3465
3466	/* Check whether we support SFF-8472 or not */
3467	status = hw->phy.ops.read_i2c_eeprom(hw,
3468					     IXGBE_SFF_SFF_8472_COMP,
3469					     &sff8472_rev);
3470	if (status)
3471		return -EIO;
3472
3473	/* addressing mode is not supported */
3474	status = hw->phy.ops.read_i2c_eeprom(hw,
3475					     IXGBE_SFF_SFF_8472_SWAP,
3476					     &addr_mode);
3477	if (status)
3478		return -EIO;
3479
3480	if (addr_mode & IXGBE_SFF_ADDRESSING_MODE) {
3481		e_err(drv, "Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n");
3482		page_swap = true;
3483	}
3484
3485	if (sff8472_rev == IXGBE_SFF_SFF_8472_UNSUP || page_swap ||
3486	    !(addr_mode & IXGBE_SFF_DDM_IMPLEMENTED)) {
3487		/* We have a SFP, but it does not support SFF-8472 */
3488		modinfo->type = ETH_MODULE_SFF_8079;
3489		modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
3490	} else {
3491		/* We have a SFP which supports a revision of SFF-8472. */
3492		modinfo->type = ETH_MODULE_SFF_8472;
3493		modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
3494	}
3495
3496	return 0;
3497}
3498
3499static int ixgbe_get_module_eeprom(struct net_device *dev,
3500					 struct ethtool_eeprom *ee,
3501					 u8 *data)
3502{
3503	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
3504	struct ixgbe_hw *hw = &adapter->hw;
3505	int status = -EFAULT;
3506	u8 databyte = 0xFF;
3507	int i = 0;
3508
3509	if (ee->len == 0)
3510		return -EINVAL;
3511
3512	if (hw->phy.type == ixgbe_phy_fw)
3513		return -ENXIO;
3514
3515	for (i = ee->offset; i < ee->offset + ee->len; i++) {
3516		/* I2C reads can take long time */
3517		if (test_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
3518			return -EBUSY;
3519
3520		if (i < ETH_MODULE_SFF_8079_LEN)
3521			status = hw->phy.ops.read_i2c_eeprom(hw, i, &databyte);
3522		else
3523			status = hw->phy.ops.read_i2c_sff8472(hw, i, &databyte);
3524
3525		if (status)
3526			return -EIO;
3527
3528		data[i - ee->offset] = databyte;
3529	}
3530
3531	return 0;
3532}
3533
3534static const struct {
3535	ixgbe_link_speed mac_speed;
3536	u32 link_mode;
3537} ixgbe_ls_map[] = {
3538	{ IXGBE_LINK_SPEED_10_FULL, ETHTOOL_LINK_MODE_10baseT_Full_BIT },
3539	{ IXGBE_LINK_SPEED_100_FULL, ETHTOOL_LINK_MODE_100baseT_Full_BIT },
3540	{ IXGBE_LINK_SPEED_1GB_FULL, ETHTOOL_LINK_MODE_1000baseT_Full_BIT },
3541	{ IXGBE_LINK_SPEED_2_5GB_FULL, ETHTOOL_LINK_MODE_2500baseX_Full_BIT },
3542	{ IXGBE_LINK_SPEED_10GB_FULL, ETHTOOL_LINK_MODE_10000baseT_Full_BIT },
3543};
3544
3545static const struct {
3546	u32 lp_advertised;
3547	u32 link_mode;
3548} ixgbe_lp_map[] = {
3549	{ FW_PHY_ACT_UD_2_100M_TX_EEE, ETHTOOL_LINK_MODE_100baseT_Full_BIT },
3550	{ FW_PHY_ACT_UD_2_1G_T_EEE, ETHTOOL_LINK_MODE_1000baseT_Full_BIT },
3551	{ FW_PHY_ACT_UD_2_10G_T_EEE, ETHTOOL_LINK_MODE_10000baseT_Full_BIT },
3552	{ FW_PHY_ACT_UD_2_1G_KX_EEE, ETHTOOL_LINK_MODE_1000baseKX_Full_BIT },
3553	{ FW_PHY_ACT_UD_2_10G_KX4_EEE, ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT },
3554	{ FW_PHY_ACT_UD_2_10G_KR_EEE, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT},
3555};
3556
3557static int
3558ixgbe_get_eee_fw(struct ixgbe_adapter *adapter, struct ethtool_keee *edata)
3559{
3560	__ETHTOOL_DECLARE_LINK_MODE_MASK(common);
3561	u32 info[FW_PHY_ACT_DATA_COUNT] = { 0 };
3562	struct ixgbe_hw *hw = &adapter->hw;
3563	int rc;
3564	u16 i;
3565
3566	rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_UD_2, &info);
3567	if (rc)
3568		return rc;
3569
3570	for (i = 0; i < ARRAY_SIZE(ixgbe_lp_map); ++i) {
3571		if (info[0] & ixgbe_lp_map[i].lp_advertised)
3572			linkmode_set_bit(ixgbe_lp_map[i].link_mode,
3573					 edata->lp_advertised);
3574	}
3575
3576	for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) {
3577		if (hw->phy.eee_speeds_supported & ixgbe_ls_map[i].mac_speed)
3578			linkmode_set_bit(ixgbe_ls_map[i].link_mode,
3579					 edata->supported);
3580	}
3581
3582	for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) {
3583		if (hw->phy.eee_speeds_advertised & ixgbe_ls_map[i].mac_speed)
3584			linkmode_set_bit(ixgbe_ls_map[i].link_mode,
3585					 edata->advertised);
3586	}
3587
3588	edata->eee_enabled = !linkmode_empty(edata->advertised);
3589	edata->tx_lpi_enabled = edata->eee_enabled;
3590
3591	linkmode_and(common, edata->advertised, edata->lp_advertised);
3592	edata->eee_active = !linkmode_empty(common);
3593
3594	return 0;
3595}
3596
3597static int ixgbe_get_eee(struct net_device *netdev, struct ethtool_keee *edata)
3598{
3599	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3600	struct ixgbe_hw *hw = &adapter->hw;
3601
3602	if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE))
3603		return -EOPNOTSUPP;
3604
3605	if (hw->phy.eee_speeds_supported && hw->phy.type == ixgbe_phy_fw)
3606		return ixgbe_get_eee_fw(adapter, edata);
3607
3608	return -EOPNOTSUPP;
3609}
3610
3611static int ixgbe_set_eee(struct net_device *netdev, struct ethtool_keee *edata)
3612{
3613	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3614	struct ixgbe_hw *hw = &adapter->hw;
3615	struct ethtool_keee eee_data;
3616	int ret_val;
3617
3618	if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE))
3619		return -EOPNOTSUPP;
3620
3621	memset(&eee_data, 0, sizeof(struct ethtool_keee));
3622
3623	ret_val = ixgbe_get_eee(netdev, &eee_data);
3624	if (ret_val)
3625		return ret_val;
3626
3627	if (eee_data.eee_enabled && !edata->eee_enabled) {
3628		if (eee_data.tx_lpi_enabled != edata->tx_lpi_enabled) {
3629			e_err(drv, "Setting EEE tx-lpi is not supported\n");
3630			return -EINVAL;
3631		}
3632
3633		if (eee_data.tx_lpi_timer != edata->tx_lpi_timer) {
3634			e_err(drv,
3635			      "Setting EEE Tx LPI timer is not supported\n");
3636			return -EINVAL;
3637		}
3638
3639		if (!linkmode_equal(eee_data.advertised, edata->advertised)) {
3640			e_err(drv,
3641			      "Setting EEE advertised speeds is not supported\n");
3642			return -EINVAL;
3643		}
3644	}
3645
3646	if (eee_data.eee_enabled != edata->eee_enabled) {
3647		if (edata->eee_enabled) {
3648			adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
3649			hw->phy.eee_speeds_advertised =
3650						   hw->phy.eee_speeds_supported;
3651		} else {
3652			adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
3653			hw->phy.eee_speeds_advertised = 0;
3654		}
3655
3656		/* reset link */
3657		if (netif_running(netdev))
3658			ixgbe_reinit_locked(adapter);
3659		else
3660			ixgbe_reset(adapter);
3661	}
3662
3663	return 0;
3664}
3665
3666static u32 ixgbe_get_priv_flags(struct net_device *netdev)
3667{
3668	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3669	u32 priv_flags = 0;
3670
3671	if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
3672		priv_flags |= IXGBE_PRIV_FLAGS_LEGACY_RX;
3673
3674	if (adapter->flags2 & IXGBE_FLAG2_VF_IPSEC_ENABLED)
3675		priv_flags |= IXGBE_PRIV_FLAGS_VF_IPSEC_EN;
3676
3677	if (adapter->flags2 & IXGBE_FLAG2_AUTO_DISABLE_VF)
3678		priv_flags |= IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF;
3679
3680	return priv_flags;
3681}
3682
3683static int ixgbe_set_priv_flags(struct net_device *netdev, u32 priv_flags)
3684{
3685	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3686	unsigned int flags2 = adapter->flags2;
3687	unsigned int i;
3688
3689	flags2 &= ~IXGBE_FLAG2_RX_LEGACY;
3690	if (priv_flags & IXGBE_PRIV_FLAGS_LEGACY_RX)
3691		flags2 |= IXGBE_FLAG2_RX_LEGACY;
3692
3693	flags2 &= ~IXGBE_FLAG2_VF_IPSEC_ENABLED;
3694	if (priv_flags & IXGBE_PRIV_FLAGS_VF_IPSEC_EN)
3695		flags2 |= IXGBE_FLAG2_VF_IPSEC_ENABLED;
3696
3697	flags2 &= ~IXGBE_FLAG2_AUTO_DISABLE_VF;
3698	if (priv_flags & IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF) {
3699		if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
3700			/* Reset primary abort counter */
3701			for (i = 0; i < adapter->num_vfs; i++)
3702				adapter->vfinfo[i].primary_abort_count = 0;
3703
3704			flags2 |= IXGBE_FLAG2_AUTO_DISABLE_VF;
3705		} else {
3706			e_info(probe,
3707			       "Cannot set private flags: Operation not supported\n");
3708			return -EOPNOTSUPP;
3709		}
3710	}
3711
3712	if (flags2 != adapter->flags2) {
3713		adapter->flags2 = flags2;
3714
3715		/* reset interface to repopulate queues */
3716		if (netif_running(netdev))
3717			ixgbe_reinit_locked(adapter);
3718	}
3719
3720	return 0;
3721}
3722
3723static const struct ethtool_ops ixgbe_ethtool_ops = {
3724	.supported_coalesce_params = ETHTOOL_COALESCE_USECS,
3725	.get_drvinfo            = ixgbe_get_drvinfo,
3726	.get_regs_len           = ixgbe_get_regs_len,
3727	.get_regs               = ixgbe_get_regs,
3728	.get_wol                = ixgbe_get_wol,
3729	.set_wol                = ixgbe_set_wol,
3730	.nway_reset             = ixgbe_nway_reset,
3731	.get_link               = ethtool_op_get_link,
3732	.get_link_ext_stats	= ixgbe_get_link_ext_stats,
3733	.get_eeprom_len         = ixgbe_get_eeprom_len,
3734	.get_eeprom             = ixgbe_get_eeprom,
3735	.set_eeprom             = ixgbe_set_eeprom,
3736	.get_ringparam          = ixgbe_get_ringparam,
3737	.set_ringparam          = ixgbe_set_ringparam,
3738	.get_pause_stats	= ixgbe_get_pause_stats,
3739	.get_pauseparam         = ixgbe_get_pauseparam,
3740	.set_pauseparam         = ixgbe_set_pauseparam,
3741	.get_msglevel           = ixgbe_get_msglevel,
3742	.set_msglevel           = ixgbe_set_msglevel,
3743	.self_test              = ixgbe_diag_test,
3744	.get_strings            = ixgbe_get_strings,
3745	.set_phys_id            = ixgbe_set_phys_id,
3746	.get_sset_count         = ixgbe_get_sset_count,
3747	.get_ethtool_stats      = ixgbe_get_ethtool_stats,
3748	.get_coalesce           = ixgbe_get_coalesce,
3749	.set_coalesce           = ixgbe_set_coalesce,
3750	.get_rx_ring_count	= ixgbe_get_rx_ring_count,
3751	.get_rxnfc		= ixgbe_get_rxnfc,
3752	.set_rxnfc		= ixgbe_set_rxnfc,
3753	.get_rxfh_indir_size	= ixgbe_rss_indir_size,
3754	.get_rxfh_key_size	= ixgbe_get_rxfh_key_size,
3755	.get_rxfh		= ixgbe_get_rxfh,
3756	.set_rxfh		= ixgbe_set_rxfh,
3757	.get_rxfh_fields	= ixgbe_get_rxfh_fields,
3758	.set_rxfh_fields	= ixgbe_set_rxfh_fields,
3759	.get_eee		= ixgbe_get_eee,
3760	.set_eee		= ixgbe_set_eee,
3761	.get_channels		= ixgbe_get_channels,
3762	.set_channels		= ixgbe_set_channels,
3763	.get_priv_flags		= ixgbe_get_priv_flags,
3764	.set_priv_flags		= ixgbe_set_priv_flags,
3765	.get_ts_info		= ixgbe_get_ts_info,
3766	.get_module_info	= ixgbe_get_module_info,
3767	.get_module_eeprom	= ixgbe_get_module_eeprom,
3768	.get_link_ksettings     = ixgbe_get_link_ksettings,
3769	.set_link_ksettings     = ixgbe_set_link_ksettings,
3770};
3771
3772static const struct ethtool_ops ixgbe_ethtool_ops_e610 = {
3773	.supported_coalesce_params = ETHTOOL_COALESCE_USECS,
3774	.get_drvinfo            = ixgbe_get_drvinfo,
3775	.get_regs_len           = ixgbe_get_regs_len,
3776	.get_regs               = ixgbe_get_regs,
3777	.get_wol                = ixgbe_get_wol,
3778	.set_wol                = ixgbe_set_wol_e610,
3779	.nway_reset             = ixgbe_nway_reset,
3780	.get_link               = ethtool_op_get_link,
3781	.get_link_ext_stats	= ixgbe_get_link_ext_stats,
3782	.get_eeprom_len         = ixgbe_get_eeprom_len,
3783	.get_eeprom             = ixgbe_get_eeprom,
3784	.set_eeprom             = ixgbe_set_eeprom,
3785	.get_ringparam          = ixgbe_get_ringparam,
3786	.set_ringparam          = ixgbe_set_ringparam,
3787	.get_pause_stats	= ixgbe_get_pause_stats,
3788	.get_pauseparam         = ixgbe_get_pauseparam,
3789	.set_pauseparam         = ixgbe_set_pauseparam_e610,
3790	.get_msglevel           = ixgbe_get_msglevel,
3791	.set_msglevel           = ixgbe_set_msglevel,
3792	.self_test              = ixgbe_diag_test,
3793	.get_strings            = ixgbe_get_strings,
3794	.set_phys_id            = ixgbe_set_phys_id_e610,
3795	.get_sset_count         = ixgbe_get_sset_count,
3796	.get_ethtool_stats      = ixgbe_get_ethtool_stats,
3797	.get_coalesce           = ixgbe_get_coalesce,
3798	.set_coalesce           = ixgbe_set_coalesce,
3799	.get_rx_ring_count	= ixgbe_get_rx_ring_count,
3800	.get_rxnfc		= ixgbe_get_rxnfc,
3801	.set_rxnfc		= ixgbe_set_rxnfc,
3802	.get_rxfh_indir_size	= ixgbe_rss_indir_size,
3803	.get_rxfh_key_size	= ixgbe_get_rxfh_key_size,
3804	.get_rxfh		= ixgbe_get_rxfh,
3805	.set_rxfh		= ixgbe_set_rxfh,
3806	.get_rxfh_fields	= ixgbe_get_rxfh_fields,
3807	.set_rxfh_fields	= ixgbe_set_rxfh_fields,
3808	.get_eee		= ixgbe_get_eee,
3809	.set_eee		= ixgbe_set_eee,
3810	.get_channels		= ixgbe_get_channels,
3811	.set_channels		= ixgbe_set_channels,
3812	.get_priv_flags		= ixgbe_get_priv_flags,
3813	.set_priv_flags		= ixgbe_set_priv_flags,
3814	.get_ts_info		= ixgbe_get_ts_info,
3815	.get_module_info	= ixgbe_get_module_info,
3816	.get_module_eeprom	= ixgbe_get_module_eeprom,
3817	.get_link_ksettings     = ixgbe_get_link_ksettings,
3818	.set_link_ksettings     = ixgbe_set_link_ksettings,
3819};
3820
3821void ixgbe_set_ethtool_ops(struct net_device *netdev)
3822{
3823	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3824
3825	if (adapter->hw.mac.type == ixgbe_mac_e610)
3826		netdev->ethtool_ops = &ixgbe_ethtool_ops_e610;
3827	else
3828		netdev->ethtool_ops = &ixgbe_ethtool_ops;
3829}