ice_lib.c

   1// SPDX-License-Identifier: GPL-2.0
   2/* Copyright (c) 2018, Intel Corporation. */
   3
   4#include "ice.h"
   5#include "ice_base.h"
   6#include "ice_flow.h"
   7#include "ice_lib.h"
   8#include "ice_fltr.h"
   9#include "ice_dcb_lib.h"
  10#include "ice_type.h"
  11#include "ice_vsi_vlan_ops.h"
  12
  13/**
  14 * ice_vsi_type_str - maps VSI type enum to string equivalents
  15 * @vsi_type: VSI type enum
  16 */
  17const char *ice_vsi_type_str(enum ice_vsi_type vsi_type)
  18{
  19	switch (vsi_type) {
  20	case ICE_VSI_PF:
  21		return "ICE_VSI_PF";
  22	case ICE_VSI_VF:
  23		return "ICE_VSI_VF";
  24	case ICE_VSI_SF:
  25		return "ICE_VSI_SF";
  26	case ICE_VSI_CTRL:
  27		return "ICE_VSI_CTRL";
  28	case ICE_VSI_CHNL:
  29		return "ICE_VSI_CHNL";
  30	case ICE_VSI_LB:
  31		return "ICE_VSI_LB";
  32	default:
  33		return "unknown";
  34	}
  35}
  36
  37/**
  38 * ice_vsi_ctrl_all_rx_rings - Start or stop a VSI's Rx rings
  39 * @vsi: the VSI being configured
  40 * @ena: start or stop the Rx rings
  41 *
  42 * First enable/disable all of the Rx rings, flush any remaining writes, and
  43 * then verify that they have all been enabled/disabled successfully. This will
  44 * let all of the register writes complete when enabling/disabling the Rx rings
  45 * before waiting for the change in hardware to complete.
  46 */
  47static int ice_vsi_ctrl_all_rx_rings(struct ice_vsi *vsi, bool ena)
  48{
  49	int ret = 0;
  50	u16 i;
  51
  52	ice_for_each_rxq(vsi, i)
  53		ice_vsi_ctrl_one_rx_ring(vsi, ena, i, false);
  54
  55	ice_flush(&vsi->back->hw);
  56
  57	ice_for_each_rxq(vsi, i) {
  58		ret = ice_vsi_wait_one_rx_ring(vsi, ena, i);
  59		if (ret)
  60			break;
  61	}
  62
  63	return ret;
  64}
  65
  66/**
  67 * ice_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the VSI
  68 * @vsi: VSI pointer
  69 *
  70 * On error: returns error code (negative)
  71 * On success: returns 0
  72 */
  73static int ice_vsi_alloc_arrays(struct ice_vsi *vsi)
  74{
  75	struct ice_pf *pf = vsi->back;
  76	struct device *dev;
  77
  78	dev = ice_pf_to_dev(pf);
  79	if (vsi->type == ICE_VSI_CHNL)
  80		return 0;
  81
  82	/* allocate memory for both Tx and Rx ring pointers */
  83	vsi->tx_rings = devm_kcalloc(dev, vsi->alloc_txq,
  84				     sizeof(*vsi->tx_rings), GFP_KERNEL);
  85	if (!vsi->tx_rings)
  86		return -ENOMEM;
  87
  88	vsi->rx_rings = devm_kcalloc(dev, vsi->alloc_rxq,
  89				     sizeof(*vsi->rx_rings), GFP_KERNEL);
  90	if (!vsi->rx_rings)
  91		goto err_rings;
  92
  93	/* txq_map needs to have enough space to track both Tx (stack) rings
  94	 * and XDP rings; at this point vsi->num_xdp_txq might not be set,
  95	 * so use num_possible_cpus() as we want to always provide XDP ring
  96	 * per CPU, regardless of queue count settings from user that might
  97	 * have come from ethtool's set_channels() callback;
  98	 */
  99	vsi->txq_map = devm_kcalloc(dev, (vsi->alloc_txq + num_possible_cpus()),
 100				    sizeof(*vsi->txq_map), GFP_KERNEL);
 101
 102	if (!vsi->txq_map)
 103		goto err_txq_map;
 104
 105	vsi->rxq_map = devm_kcalloc(dev, vsi->alloc_rxq,
 106				    sizeof(*vsi->rxq_map), GFP_KERNEL);
 107	if (!vsi->rxq_map)
 108		goto err_rxq_map;
 109
 110	/* allocate memory for q_vector pointers */
 111	vsi->q_vectors = devm_kcalloc(dev, vsi->num_q_vectors,
 112				      sizeof(*vsi->q_vectors), GFP_KERNEL);
 113	if (!vsi->q_vectors)
 114		goto err_vectors;
 115
 116	return 0;
 117
 118err_vectors:
 119	devm_kfree(dev, vsi->rxq_map);
 120err_rxq_map:
 121	devm_kfree(dev, vsi->txq_map);
 122err_txq_map:
 123	devm_kfree(dev, vsi->rx_rings);
 124err_rings:
 125	devm_kfree(dev, vsi->tx_rings);
 126	return -ENOMEM;
 127}
 128
 129/**
 130 * ice_vsi_set_num_desc - Set number of descriptors for queues on this VSI
 131 * @vsi: the VSI being configured
 132 */
 133static void ice_vsi_set_num_desc(struct ice_vsi *vsi)
 134{
 135	switch (vsi->type) {
 136	case ICE_VSI_PF:
 137	case ICE_VSI_SF:
 138	case ICE_VSI_CTRL:
 139	case ICE_VSI_LB:
 140		/* a user could change the values of num_[tr]x_desc using
 141		 * ethtool -G so we should keep those values instead of
 142		 * overwriting them with the defaults.
 143		 */
 144		if (!vsi->num_rx_desc)
 145			vsi->num_rx_desc = ICE_DFLT_NUM_RX_DESC;
 146		if (!vsi->num_tx_desc)
 147			vsi->num_tx_desc = ICE_DFLT_NUM_TX_DESC;
 148		break;
 149	default:
 150		dev_dbg(ice_pf_to_dev(vsi->back), "Not setting number of Tx/Rx descriptors for VSI type %d\n",
 151			vsi->type);
 152		break;
 153	}
 154}
 155
 156static u16 ice_get_rxq_count(struct ice_pf *pf)
 157{
 158	return min(ice_get_avail_rxq_count(pf), num_online_cpus());
 159}
 160
 161static u16 ice_get_txq_count(struct ice_pf *pf)
 162{
 163	return min(ice_get_avail_txq_count(pf), num_online_cpus());
 164}
 165
 166/**
 167 * ice_vsi_set_num_qs - Set number of queues, descriptors and vectors for a VSI
 168 * @vsi: the VSI being configured
 169 *
 170 * Return 0 on success and a negative value on error
 171 */
 172static void ice_vsi_set_num_qs(struct ice_vsi *vsi)
 173{
 174	enum ice_vsi_type vsi_type = vsi->type;
 175	struct ice_pf *pf = vsi->back;
 176	struct ice_vf *vf = vsi->vf;
 177
 178	if (WARN_ON(vsi_type == ICE_VSI_VF && !vf))
 179		return;
 180
 181	switch (vsi_type) {
 182	case ICE_VSI_PF:
 183		if (vsi->req_txq) {
 184			vsi->alloc_txq = vsi->req_txq;
 185			vsi->num_txq = vsi->req_txq;
 186		} else {
 187			vsi->alloc_txq = ice_get_txq_count(pf);
 188		}
 189
 190		pf->num_lan_tx = vsi->alloc_txq;
 191
 192		/* only 1 Rx queue unless RSS is enabled */
 193		if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
 194			vsi->alloc_rxq = 1;
 195		} else {
 196			if (vsi->req_rxq) {
 197				vsi->alloc_rxq = vsi->req_rxq;
 198				vsi->num_rxq = vsi->req_rxq;
 199			} else {
 200				vsi->alloc_rxq = ice_get_rxq_count(pf);
 201			}
 202		}
 203
 204		pf->num_lan_rx = vsi->alloc_rxq;
 205
 206		vsi->num_q_vectors = max(vsi->alloc_rxq, vsi->alloc_txq);
 207		break;
 208	case ICE_VSI_SF:
 209		vsi->alloc_txq = 1;
 210		vsi->alloc_rxq = 1;
 211		vsi->num_q_vectors = 1;
 212		vsi->irq_dyn_alloc = true;
 213		break;
 214	case ICE_VSI_VF:
 215		if (vf->num_req_qs)
 216			vf->num_vf_qs = vf->num_req_qs;
 217		vsi->alloc_txq = vf->num_vf_qs;
 218		vsi->alloc_rxq = vf->num_vf_qs;
 219		/* pf->vfs.num_msix_per includes (VF miscellaneous vector +
 220		 * data queue interrupts). Since vsi->num_q_vectors is number
 221		 * of queues vectors, subtract 1 (ICE_NONQ_VECS_VF) from the
 222		 * original vector count
 223		 */
 224		vsi->num_q_vectors = vf->num_msix - ICE_NONQ_VECS_VF;
 225		break;
 226	case ICE_VSI_CTRL:
 227		vsi->alloc_txq = 1;
 228		vsi->alloc_rxq = 1;
 229		vsi->num_q_vectors = 1;
 230		break;
 231	case ICE_VSI_CHNL:
 232		vsi->alloc_txq = 0;
 233		vsi->alloc_rxq = 0;
 234		break;
 235	case ICE_VSI_LB:
 236		vsi->alloc_txq = 1;
 237		vsi->alloc_rxq = 1;
 238		/* A dummy q_vector, no actual IRQ. */
 239		vsi->num_q_vectors = 1;
 240		break;
 241	default:
 242		dev_warn(ice_pf_to_dev(pf), "Unknown VSI type %d\n", vsi_type);
 243		break;
 244	}
 245
 246	ice_vsi_set_num_desc(vsi);
 247}
 248
 249/**
 250 * ice_get_free_slot - get the next non-NULL location index in array
 251 * @array: array to search
 252 * @size: size of the array
 253 * @curr: last known occupied index to be used as a search hint
 254 *
 255 * void * is being used to keep the functionality generic. This lets us use this
 256 * function on any array of pointers.
 257 */
 258static int ice_get_free_slot(void *array, int size, int curr)
 259{
 260	int **tmp_array = (int **)array;
 261	int next;
 262
 263	if (curr < (size - 1) && !tmp_array[curr + 1]) {
 264		next = curr + 1;
 265	} else {
 266		int i = 0;
 267
 268		while ((i < size) && (tmp_array[i]))
 269			i++;
 270		if (i == size)
 271			next = ICE_NO_VSI;
 272		else
 273			next = i;
 274	}
 275	return next;
 276}
 277
 278/**
 279 * ice_vsi_delete_from_hw - delete a VSI from the switch
 280 * @vsi: pointer to VSI being removed
 281 */
 282static void ice_vsi_delete_from_hw(struct ice_vsi *vsi)
 283{
 284	struct ice_pf *pf = vsi->back;
 285	struct ice_vsi_ctx *ctxt;
 286	int status;
 287
 288	ice_fltr_remove_all(vsi);
 289	ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL);
 290	if (!ctxt)
 291		return;
 292
 293	if (vsi->type == ICE_VSI_VF)
 294		ctxt->vf_num = vsi->vf->vf_id;
 295	ctxt->vsi_num = vsi->vsi_num;
 296
 297	memcpy(&ctxt->info, &vsi->info, sizeof(ctxt->info));
 298
 299	status = ice_free_vsi(&pf->hw, vsi->idx, ctxt, false, NULL);
 300	if (status)
 301		dev_err(ice_pf_to_dev(pf), "Failed to delete VSI %i in FW - error: %d\n",
 302			vsi->vsi_num, status);
 303
 304	kfree(ctxt);
 305}
 306
 307/**
 308 * ice_vsi_free_arrays - De-allocate queue and vector pointer arrays for the VSI
 309 * @vsi: pointer to VSI being cleared
 310 */
 311static void ice_vsi_free_arrays(struct ice_vsi *vsi)
 312{
 313	struct ice_pf *pf = vsi->back;
 314	struct device *dev;
 315
 316	dev = ice_pf_to_dev(pf);
 317
 318	/* free the ring and vector containers */
 319	devm_kfree(dev, vsi->q_vectors);
 320	vsi->q_vectors = NULL;
 321	devm_kfree(dev, vsi->tx_rings);
 322	vsi->tx_rings = NULL;
 323	devm_kfree(dev, vsi->rx_rings);
 324	vsi->rx_rings = NULL;
 325	devm_kfree(dev, vsi->txq_map);
 326	vsi->txq_map = NULL;
 327	devm_kfree(dev, vsi->rxq_map);
 328	vsi->rxq_map = NULL;
 329}
 330
 331/**
 332 * ice_vsi_free_stats - Free the ring statistics structures
 333 * @vsi: VSI pointer
 334 */
 335static void ice_vsi_free_stats(struct ice_vsi *vsi)
 336{
 337	struct ice_vsi_stats *vsi_stat;
 338	struct ice_pf *pf = vsi->back;
 339	int i;
 340
 341	if (vsi->type == ICE_VSI_CHNL)
 342		return;
 343	if (!pf->vsi_stats)
 344		return;
 345
 346	vsi_stat = pf->vsi_stats[vsi->idx];
 347	if (!vsi_stat)
 348		return;
 349
 350	ice_for_each_alloc_txq(vsi, i) {
 351		if (vsi_stat->tx_ring_stats[i]) {
 352			kfree_rcu(vsi_stat->tx_ring_stats[i], rcu);
 353			WRITE_ONCE(vsi_stat->tx_ring_stats[i], NULL);
 354		}
 355	}
 356
 357	ice_for_each_alloc_rxq(vsi, i) {
 358		if (vsi_stat->rx_ring_stats[i]) {
 359			kfree_rcu(vsi_stat->rx_ring_stats[i], rcu);
 360			WRITE_ONCE(vsi_stat->rx_ring_stats[i], NULL);
 361		}
 362	}
 363
 364	kfree(vsi_stat->tx_ring_stats);
 365	kfree(vsi_stat->rx_ring_stats);
 366	kfree(vsi_stat);
 367	pf->vsi_stats[vsi->idx] = NULL;
 368}
 369
 370/**
 371 * ice_vsi_alloc_ring_stats - Allocates Tx and Rx ring stats for the VSI
 372 * @vsi: VSI which is having stats allocated
 373 */
 374static int ice_vsi_alloc_ring_stats(struct ice_vsi *vsi)
 375{
 376	struct ice_ring_stats **tx_ring_stats;
 377	struct ice_ring_stats **rx_ring_stats;
 378	struct ice_vsi_stats *vsi_stats;
 379	struct ice_pf *pf = vsi->back;
 380	u16 i;
 381
 382	vsi_stats = pf->vsi_stats[vsi->idx];
 383	tx_ring_stats = vsi_stats->tx_ring_stats;
 384	rx_ring_stats = vsi_stats->rx_ring_stats;
 385
 386	/* Allocate Tx ring stats */
 387	ice_for_each_alloc_txq(vsi, i) {
 388		struct ice_ring_stats *ring_stats;
 389		struct ice_tx_ring *ring;
 390
 391		ring = vsi->tx_rings[i];
 392		ring_stats = tx_ring_stats[i];
 393
 394		if (!ring_stats) {
 395			ring_stats = kzalloc(sizeof(*ring_stats), GFP_KERNEL);
 396			if (!ring_stats)
 397				goto err_out;
 398
 399			u64_stats_init(&ring_stats->syncp);
 400
 401			WRITE_ONCE(tx_ring_stats[i], ring_stats);
 402		}
 403
 404		ring->ring_stats = ring_stats;
 405	}
 406
 407	/* Allocate Rx ring stats */
 408	ice_for_each_alloc_rxq(vsi, i) {
 409		struct ice_ring_stats *ring_stats;
 410		struct ice_rx_ring *ring;
 411
 412		ring = vsi->rx_rings[i];
 413		ring_stats = rx_ring_stats[i];
 414
 415		if (!ring_stats) {
 416			ring_stats = kzalloc(sizeof(*ring_stats), GFP_KERNEL);
 417			if (!ring_stats)
 418				goto err_out;
 419
 420			u64_stats_init(&ring_stats->syncp);
 421
 422			WRITE_ONCE(rx_ring_stats[i], ring_stats);
 423		}
 424
 425		ring->ring_stats = ring_stats;
 426	}
 427
 428	return 0;
 429
 430err_out:
 431	ice_vsi_free_stats(vsi);
 432	return -ENOMEM;
 433}
 434
 435/**
 436 * ice_vsi_free - clean up and deallocate the provided VSI
 437 * @vsi: pointer to VSI being cleared
 438 *
 439 * This deallocates the VSI's queue resources, removes it from the PF's
 440 * VSI array if necessary, and deallocates the VSI
 441 */
 442void ice_vsi_free(struct ice_vsi *vsi)
 443{
 444	struct ice_pf *pf = NULL;
 445	struct device *dev;
 446
 447	if (!vsi || !vsi->back)
 448		return;
 449
 450	pf = vsi->back;
 451	dev = ice_pf_to_dev(pf);
 452
 453	if (!pf->vsi[vsi->idx] || pf->vsi[vsi->idx] != vsi) {
 454		dev_dbg(dev, "vsi does not exist at pf->vsi[%d]\n", vsi->idx);
 455		return;
 456	}
 457
 458	mutex_lock(&pf->sw_mutex);
 459	/* updates the PF for this cleared VSI */
 460
 461	pf->vsi[vsi->idx] = NULL;
 462	pf->next_vsi = vsi->idx;
 463
 464	ice_vsi_free_stats(vsi);
 465	ice_vsi_free_arrays(vsi);
 466	mutex_destroy(&vsi->xdp_state_lock);
 467	mutex_unlock(&pf->sw_mutex);
 468	devm_kfree(dev, vsi);
 469}
 470
 471void ice_vsi_delete(struct ice_vsi *vsi)
 472{
 473	ice_vsi_delete_from_hw(vsi);
 474	ice_vsi_free(vsi);
 475}
 476
 477/**
 478 * ice_msix_clean_ctrl_vsi - MSIX mode interrupt handler for ctrl VSI
 479 * @irq: interrupt number
 480 * @data: pointer to a q_vector
 481 */
 482static irqreturn_t ice_msix_clean_ctrl_vsi(int __always_unused irq, void *data)
 483{
 484	struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
 485
 486	if (!q_vector->tx.tx_ring)
 487		return IRQ_HANDLED;
 488
 489	ice_clean_ctrl_rx_irq(q_vector->rx.rx_ring);
 490	ice_clean_ctrl_tx_irq(q_vector->tx.tx_ring);
 491
 492	return IRQ_HANDLED;
 493}
 494
 495/**
 496 * ice_msix_clean_rings - MSIX mode Interrupt Handler
 497 * @irq: interrupt number
 498 * @data: pointer to a q_vector
 499 */
 500static irqreturn_t ice_msix_clean_rings(int __always_unused irq, void *data)
 501{
 502	struct ice_q_vector *q_vector = (struct ice_q_vector *)data;
 503
 504	if (!q_vector->tx.tx_ring && !q_vector->rx.rx_ring)
 505		return IRQ_HANDLED;
 506
 507	q_vector->total_events++;
 508
 509	napi_schedule(&q_vector->napi);
 510
 511	return IRQ_HANDLED;
 512}
 513
 514/**
 515 * ice_vsi_alloc_stat_arrays - Allocate statistics arrays
 516 * @vsi: VSI pointer
 517 */
 518static int ice_vsi_alloc_stat_arrays(struct ice_vsi *vsi)
 519{
 520	struct ice_vsi_stats *vsi_stat;
 521	struct ice_pf *pf = vsi->back;
 522
 523	if (vsi->type == ICE_VSI_CHNL)
 524		return 0;
 525	if (!pf->vsi_stats)
 526		return -ENOENT;
 527
 528	if (pf->vsi_stats[vsi->idx])
 529	/* realloc will happen in rebuild path */
 530		return 0;
 531
 532	vsi_stat = kzalloc(sizeof(*vsi_stat), GFP_KERNEL);
 533	if (!vsi_stat)
 534		return -ENOMEM;
 535
 536	vsi_stat->tx_ring_stats =
 537		kcalloc(vsi->alloc_txq, sizeof(*vsi_stat->tx_ring_stats),
 538			GFP_KERNEL);
 539	if (!vsi_stat->tx_ring_stats)
 540		goto err_alloc_tx;
 541
 542	vsi_stat->rx_ring_stats =
 543		kcalloc(vsi->alloc_rxq, sizeof(*vsi_stat->rx_ring_stats),
 544			GFP_KERNEL);
 545	if (!vsi_stat->rx_ring_stats)
 546		goto err_alloc_rx;
 547
 548	pf->vsi_stats[vsi->idx] = vsi_stat;
 549
 550	return 0;
 551
 552err_alloc_rx:
 553	kfree(vsi_stat->rx_ring_stats);
 554err_alloc_tx:
 555	kfree(vsi_stat->tx_ring_stats);
 556	kfree(vsi_stat);
 557	pf->vsi_stats[vsi->idx] = NULL;
 558	return -ENOMEM;
 559}
 560
 561/**
 562 * ice_vsi_alloc_def - set default values for already allocated VSI
 563 * @vsi: ptr to VSI
 564 * @ch: ptr to channel
 565 */
 566static int
 567ice_vsi_alloc_def(struct ice_vsi *vsi, struct ice_channel *ch)
 568{
 569	if (vsi->type != ICE_VSI_CHNL) {
 570		ice_vsi_set_num_qs(vsi);
 571		if (ice_vsi_alloc_arrays(vsi))
 572			return -ENOMEM;
 573	}
 574
 575	vsi->irq_dyn_alloc = pci_msix_can_alloc_dyn(vsi->back->pdev);
 576
 577	switch (vsi->type) {
 578	case ICE_VSI_PF:
 579	case ICE_VSI_SF:
 580		/* Setup default MSIX irq handler for VSI */
 581		vsi->irq_handler = ice_msix_clean_rings;
 582		break;
 583	case ICE_VSI_CTRL:
 584		/* Setup ctrl VSI MSIX irq handler */
 585		vsi->irq_handler = ice_msix_clean_ctrl_vsi;
 586		break;
 587	case ICE_VSI_CHNL:
 588		if (!ch)
 589			return -EINVAL;
 590
 591		vsi->num_rxq = ch->num_rxq;
 592		vsi->num_txq = ch->num_txq;
 593		vsi->next_base_q = ch->base_q;
 594		break;
 595	case ICE_VSI_VF:
 596	case ICE_VSI_LB:
 597		break;
 598	default:
 599		ice_vsi_free_arrays(vsi);
 600		return -EINVAL;
 601	}
 602
 603	return 0;
 604}
 605
 606/**
 607 * ice_vsi_alloc - Allocates the next available struct VSI in the PF
 608 * @pf: board private structure
 609 *
 610 * Reserves a VSI index from the PF and allocates an empty VSI structure
 611 * without a type. The VSI structure must later be initialized by calling
 612 * ice_vsi_cfg().
 613 *
 614 * returns a pointer to a VSI on success, NULL on failure.
 615 */
 616struct ice_vsi *ice_vsi_alloc(struct ice_pf *pf)
 617{
 618	struct device *dev = ice_pf_to_dev(pf);
 619	struct ice_vsi *vsi = NULL;
 620
 621	/* Need to protect the allocation of the VSIs at the PF level */
 622	mutex_lock(&pf->sw_mutex);
 623
 624	/* If we have already allocated our maximum number of VSIs,
 625	 * pf->next_vsi will be ICE_NO_VSI. If not, pf->next_vsi index
 626	 * is available to be populated
 627	 */
 628	if (pf->next_vsi == ICE_NO_VSI) {
 629		dev_dbg(dev, "out of VSI slots!\n");
 630		goto unlock_pf;
 631	}
 632
 633	vsi = devm_kzalloc(dev, sizeof(*vsi), GFP_KERNEL);
 634	if (!vsi)
 635		goto unlock_pf;
 636
 637	vsi->back = pf;
 638	set_bit(ICE_VSI_DOWN, vsi->state);
 639
 640	/* fill slot and make note of the index */
 641	vsi->idx = pf->next_vsi;
 642	pf->vsi[pf->next_vsi] = vsi;
 643
 644	/* prepare pf->next_vsi for next use */
 645	pf->next_vsi = ice_get_free_slot(pf->vsi, pf->num_alloc_vsi,
 646					 pf->next_vsi);
 647
 648	mutex_init(&vsi->xdp_state_lock);
 649
 650unlock_pf:
 651	mutex_unlock(&pf->sw_mutex);
 652	return vsi;
 653}
 654
 655/**
 656 * ice_alloc_fd_res - Allocate FD resource for a VSI
 657 * @vsi: pointer to the ice_vsi
 658 *
 659 * This allocates the FD resources
 660 *
 661 * Returns 0 on success, -EPERM on no-op or -EIO on failure
 662 */
 663static int ice_alloc_fd_res(struct ice_vsi *vsi)
 664{
 665	struct ice_pf *pf = vsi->back;
 666	u32 g_val, b_val;
 667
 668	/* Flow Director filters are only allocated/assigned to the PF VSI or
 669	 * CHNL VSI which passes the traffic. The CTRL VSI is only used to
 670	 * add/delete filters so resources are not allocated to it
 671	 */
 672	if (!test_bit(ICE_FLAG_FD_ENA, pf->flags))
 673		return -EPERM;
 674
 675	if (!(vsi->type == ICE_VSI_PF || vsi->type == ICE_VSI_VF ||
 676	      vsi->type == ICE_VSI_CHNL))
 677		return -EPERM;
 678
 679	/* FD filters from guaranteed pool per VSI */
 680	g_val = pf->hw.func_caps.fd_fltr_guar;
 681	if (!g_val)
 682		return -EPERM;
 683
 684	/* FD filters from best effort pool */
 685	b_val = pf->hw.func_caps.fd_fltr_best_effort;
 686	if (!b_val)
 687		return -EPERM;
 688
 689	/* PF main VSI gets only 64 FD resources from guaranteed pool
 690	 * when ADQ is configured.
 691	 */
 692#define ICE_PF_VSI_GFLTR	64
 693
 694	/* determine FD filter resources per VSI from shared(best effort) and
 695	 * dedicated pool
 696	 */
 697	if (vsi->type == ICE_VSI_PF) {
 698		vsi->num_gfltr = g_val;
 699		/* if MQPRIO is configured, main VSI doesn't get all FD
 700		 * resources from guaranteed pool. PF VSI gets 64 FD resources
 701		 */
 702		if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) {
 703			if (g_val < ICE_PF_VSI_GFLTR)
 704				return -EPERM;
 705			/* allow bare minimum entries for PF VSI */
 706			vsi->num_gfltr = ICE_PF_VSI_GFLTR;
 707		}
 708
 709		/* each VSI gets same "best_effort" quota */
 710		vsi->num_bfltr = b_val;
 711	} else if (vsi->type == ICE_VSI_VF) {
 712		vsi->num_gfltr = 0;
 713
 714		/* each VSI gets same "best_effort" quota */
 715		vsi->num_bfltr = b_val;
 716	} else {
 717		struct ice_vsi *main_vsi;
 718		int numtc;
 719
 720		main_vsi = ice_get_main_vsi(pf);
 721		if (!main_vsi)
 722			return -EPERM;
 723
 724		if (!main_vsi->all_numtc)
 725			return -EINVAL;
 726
 727		/* figure out ADQ numtc */
 728		numtc = main_vsi->all_numtc - ICE_CHNL_START_TC;
 729
 730		/* only one TC but still asking resources for channels,
 731		 * invalid config
 732		 */
 733		if (numtc < ICE_CHNL_START_TC)
 734			return -EPERM;
 735
 736		g_val -= ICE_PF_VSI_GFLTR;
 737		/* channel VSIs gets equal share from guaranteed pool */
 738		vsi->num_gfltr = g_val / numtc;
 739
 740		/* each VSI gets same "best_effort" quota */
 741		vsi->num_bfltr = b_val;
 742	}
 743
 744	return 0;
 745}
 746
 747/**
 748 * ice_vsi_get_qs - Assign queues from PF to VSI
 749 * @vsi: the VSI to assign queues to
 750 *
 751 * Returns 0 on success and a negative value on error
 752 */
 753static int ice_vsi_get_qs(struct ice_vsi *vsi)
 754{
 755	struct ice_pf *pf = vsi->back;
 756	struct ice_qs_cfg tx_qs_cfg = {
 757		.qs_mutex = &pf->avail_q_mutex,
 758		.pf_map = pf->avail_txqs,
 759		.pf_map_size = pf->max_pf_txqs,
 760		.q_count = vsi->alloc_txq,
 761		.scatter_count = ICE_MAX_SCATTER_TXQS,
 762		.vsi_map = vsi->txq_map,
 763		.vsi_map_offset = 0,
 764		.mapping_mode = ICE_VSI_MAP_CONTIG
 765	};
 766	struct ice_qs_cfg rx_qs_cfg = {
 767		.qs_mutex = &pf->avail_q_mutex,
 768		.pf_map = pf->avail_rxqs,
 769		.pf_map_size = pf->max_pf_rxqs,
 770		.q_count = vsi->alloc_rxq,
 771		.scatter_count = ICE_MAX_SCATTER_RXQS,
 772		.vsi_map = vsi->rxq_map,
 773		.vsi_map_offset = 0,
 774		.mapping_mode = ICE_VSI_MAP_CONTIG
 775	};
 776	int ret;
 777
 778	if (vsi->type == ICE_VSI_CHNL)
 779		return 0;
 780
 781	ret = __ice_vsi_get_qs(&tx_qs_cfg);
 782	if (ret)
 783		return ret;
 784	vsi->tx_mapping_mode = tx_qs_cfg.mapping_mode;
 785
 786	ret = __ice_vsi_get_qs(&rx_qs_cfg);
 787	if (ret)
 788		return ret;
 789	vsi->rx_mapping_mode = rx_qs_cfg.mapping_mode;
 790
 791	return 0;
 792}
 793
 794/**
 795 * ice_vsi_put_qs - Release queues from VSI to PF
 796 * @vsi: the VSI that is going to release queues
 797 */
 798static void ice_vsi_put_qs(struct ice_vsi *vsi)
 799{
 800	struct ice_pf *pf = vsi->back;
 801	int i;
 802
 803	mutex_lock(&pf->avail_q_mutex);
 804
 805	ice_for_each_alloc_txq(vsi, i) {
 806		clear_bit(vsi->txq_map[i], pf->avail_txqs);
 807		vsi->txq_map[i] = ICE_INVAL_Q_INDEX;
 808	}
 809
 810	ice_for_each_alloc_rxq(vsi, i) {
 811		clear_bit(vsi->rxq_map[i], pf->avail_rxqs);
 812		vsi->rxq_map[i] = ICE_INVAL_Q_INDEX;
 813	}
 814
 815	mutex_unlock(&pf->avail_q_mutex);
 816}
 817
 818/**
 819 * ice_is_safe_mode
 820 * @pf: pointer to the PF struct
 821 *
 822 * returns true if driver is in safe mode, false otherwise
 823 */
 824bool ice_is_safe_mode(struct ice_pf *pf)
 825{
 826	return !test_bit(ICE_FLAG_ADV_FEATURES, pf->flags);
 827}
 828
 829/**
 830 * ice_is_rdma_ena
 831 * @pf: pointer to the PF struct
 832 *
 833 * returns true if RDMA is currently supported, false otherwise
 834 */
 835bool ice_is_rdma_ena(struct ice_pf *pf)
 836{
 837	union devlink_param_value value;
 838	int err;
 839
 840	err = devl_param_driverinit_value_get(priv_to_devlink(pf),
 841					      DEVLINK_PARAM_GENERIC_ID_ENABLE_RDMA,
 842					      &value);
 843	return err ? test_bit(ICE_FLAG_RDMA_ENA, pf->flags) : value.vbool;
 844}
 845
 846/**
 847 * ice_vsi_clean_rss_flow_fld - Delete RSS configuration
 848 * @vsi: the VSI being cleaned up
 849 *
 850 * This function deletes RSS input set for all flows that were configured
 851 * for this VSI
 852 */
 853static void ice_vsi_clean_rss_flow_fld(struct ice_vsi *vsi)
 854{
 855	struct ice_pf *pf = vsi->back;
 856	int status;
 857
 858	if (ice_is_safe_mode(pf))
 859		return;
 860
 861	status = ice_rem_vsi_rss_cfg(&pf->hw, vsi->idx);
 862	if (status)
 863		dev_dbg(ice_pf_to_dev(pf), "ice_rem_vsi_rss_cfg failed for vsi = %d, error = %d\n",
 864			vsi->vsi_num, status);
 865}
 866
 867/**
 868 * ice_rss_clean - Delete RSS related VSI structures and configuration
 869 * @vsi: the VSI being removed
 870 */
 871static void ice_rss_clean(struct ice_vsi *vsi)
 872{
 873	struct ice_pf *pf = vsi->back;
 874	struct device *dev;
 875
 876	dev = ice_pf_to_dev(pf);
 877
 878	devm_kfree(dev, vsi->rss_hkey_user);
 879	devm_kfree(dev, vsi->rss_lut_user);
 880
 881	ice_vsi_clean_rss_flow_fld(vsi);
 882	/* remove RSS replay list */
 883	if (!ice_is_safe_mode(pf))
 884		ice_rem_vsi_rss_list(&pf->hw, vsi->idx);
 885}
 886
 887/**
 888 * ice_vsi_set_rss_params - Setup RSS capabilities per VSI type
 889 * @vsi: the VSI being configured
 890 */
 891static void ice_vsi_set_rss_params(struct ice_vsi *vsi)
 892{
 893	struct ice_hw_common_caps *cap;
 894	struct ice_pf *pf = vsi->back;
 895	u16 max_rss_size;
 896
 897	if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
 898		vsi->rss_size = 1;
 899		return;
 900	}
 901
 902	cap = &pf->hw.func_caps.common_cap;
 903	max_rss_size = BIT(cap->rss_table_entry_width);
 904	switch (vsi->type) {
 905	case ICE_VSI_CHNL:
 906	case ICE_VSI_PF:
 907		/* PF VSI will inherit RSS instance of PF */
 908		vsi->rss_table_size = (u16)cap->rss_table_size;
 909		if (vsi->type == ICE_VSI_CHNL)
 910			vsi->rss_size = min_t(u16, vsi->num_rxq, max_rss_size);
 911		else
 912			vsi->rss_size = min_t(u16, num_online_cpus(),
 913					      max_rss_size);
 914		vsi->rss_lut_type = ICE_LUT_PF;
 915		break;
 916	case ICE_VSI_SF:
 917		vsi->rss_table_size = ICE_LUT_VSI_SIZE;
 918		vsi->rss_size = min_t(u16, num_online_cpus(), max_rss_size);
 919		vsi->rss_lut_type = ICE_LUT_VSI;
 920		break;
 921	case ICE_VSI_VF:
 922		/* VF VSI will get a small RSS table.
 923		 * For VSI_LUT, LUT size should be set to 64 bytes.
 924		 */
 925		vsi->rss_table_size = ICE_LUT_VSI_SIZE;
 926		vsi->rss_size = ICE_MAX_RSS_QS_PER_VF;
 927		vsi->rss_lut_type = ICE_LUT_VSI;
 928		break;
 929	case ICE_VSI_LB:
 930		break;
 931	default:
 932		dev_dbg(ice_pf_to_dev(pf), "Unsupported VSI type %s\n",
 933			ice_vsi_type_str(vsi->type));
 934		break;
 935	}
 936}
 937
 938/**
 939 * ice_set_dflt_vsi_ctx - Set default VSI context before adding a VSI
 940 * @hw: HW structure used to determine the VLAN mode of the device
 941 * @ctxt: the VSI context being set
 942 *
 943 * This initializes a default VSI context for all sections except the Queues.
 944 */
 945static void ice_set_dflt_vsi_ctx(struct ice_hw *hw, struct ice_vsi_ctx *ctxt)
 946{
 947	u32 table = 0;
 948
 949	memset(&ctxt->info, 0, sizeof(ctxt->info));
 950	/* VSI's should be allocated from shared pool */
 951	ctxt->alloc_from_pool = true;
 952	/* Src pruning enabled by default */
 953	ctxt->info.sw_flags = ICE_AQ_VSI_SW_FLAG_SRC_PRUNE;
 954	/* Traffic from VSI can be sent to LAN */
 955	ctxt->info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA;
 956	/* allow all untagged/tagged packets by default on Tx */
 957	ctxt->info.inner_vlan_flags = FIELD_PREP(ICE_AQ_VSI_INNER_VLAN_TX_MODE_M,
 958						 ICE_AQ_VSI_INNER_VLAN_TX_MODE_ALL);
 959	/* SVM - by default bits 3 and 4 in inner_vlan_flags are 0's which
 960	 * results in legacy behavior (show VLAN, DEI, and UP) in descriptor.
 961	 *
 962	 * DVM - leave inner VLAN in packet by default
 963	 */
 964	if (ice_is_dvm_ena(hw)) {
 965		ctxt->info.inner_vlan_flags |=
 966			FIELD_PREP(ICE_AQ_VSI_INNER_VLAN_EMODE_M,
 967				   ICE_AQ_VSI_INNER_VLAN_EMODE_NOTHING);
 968		ctxt->info.outer_vlan_flags =
 969			FIELD_PREP(ICE_AQ_VSI_OUTER_VLAN_TX_MODE_M,
 970				   ICE_AQ_VSI_OUTER_VLAN_TX_MODE_ALL);
 971		ctxt->info.outer_vlan_flags |=
 972			FIELD_PREP(ICE_AQ_VSI_OUTER_TAG_TYPE_M,
 973				   ICE_AQ_VSI_OUTER_TAG_VLAN_8100);
 974		ctxt->info.outer_vlan_flags |=
 975			FIELD_PREP(ICE_AQ_VSI_OUTER_VLAN_EMODE_M,
 976				   ICE_AQ_VSI_OUTER_VLAN_EMODE_NOTHING);
 977	}
 978	/* Have 1:1 UP mapping for both ingress/egress tables */
 979	table |= ICE_UP_TABLE_TRANSLATE(0, 0);
 980	table |= ICE_UP_TABLE_TRANSLATE(1, 1);
 981	table |= ICE_UP_TABLE_TRANSLATE(2, 2);
 982	table |= ICE_UP_TABLE_TRANSLATE(3, 3);
 983	table |= ICE_UP_TABLE_TRANSLATE(4, 4);
 984	table |= ICE_UP_TABLE_TRANSLATE(5, 5);
 985	table |= ICE_UP_TABLE_TRANSLATE(6, 6);
 986	table |= ICE_UP_TABLE_TRANSLATE(7, 7);
 987	ctxt->info.ingress_table = cpu_to_le32(table);
 988	ctxt->info.egress_table = cpu_to_le32(table);
 989	/* Have 1:1 UP mapping for outer to inner UP table */
 990	ctxt->info.outer_up_table = cpu_to_le32(table);
 991	/* No Outer tag support outer_tag_flags remains to zero */
 992}
 993
 994/**
 995 * ice_vsi_setup_q_map - Setup a VSI queue map
 996 * @vsi: the VSI being configured
 997 * @ctxt: VSI context structure
 998 */
 999static int ice_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)
1000{
1001	u16 offset = 0, qmap = 0, tx_count = 0, rx_count = 0, pow = 0;
1002	u16 num_txq_per_tc, num_rxq_per_tc;
1003	u16 qcount_tx = vsi->alloc_txq;
1004	u16 qcount_rx = vsi->alloc_rxq;
1005	u8 netdev_tc = 0;
1006	int i;
1007
1008	if (!vsi->tc_cfg.numtc) {
1009		/* at least TC0 should be enabled by default */
1010		vsi->tc_cfg.numtc = 1;
1011		vsi->tc_cfg.ena_tc = 1;
1012	}
1013
1014	num_rxq_per_tc = min_t(u16, qcount_rx / vsi->tc_cfg.numtc, ICE_MAX_RXQS_PER_TC);
1015	if (!num_rxq_per_tc)
1016		num_rxq_per_tc = 1;
1017	num_txq_per_tc = qcount_tx / vsi->tc_cfg.numtc;
1018	if (!num_txq_per_tc)
1019		num_txq_per_tc = 1;
1020
1021	/* find the (rounded up) power-of-2 of qcount */
1022	pow = (u16)order_base_2(num_rxq_per_tc);
1023
1024	/* TC mapping is a function of the number of Rx queues assigned to the
1025	 * VSI for each traffic class and the offset of these queues.
1026	 * The first 10 bits are for queue offset for TC0, next 4 bits for no:of
1027	 * queues allocated to TC0. No:of queues is a power-of-2.
1028	 *
1029	 * If TC is not enabled, the queue offset is set to 0, and allocate one
1030	 * queue, this way, traffic for the given TC will be sent to the default
1031	 * queue.
1032	 *
1033	 * Setup number and offset of Rx queues for all TCs for the VSI
1034	 */
1035	ice_for_each_traffic_class(i) {
1036		if (!(vsi->tc_cfg.ena_tc & BIT(i))) {
1037			/* TC is not enabled */
1038			vsi->tc_cfg.tc_info[i].qoffset = 0;
1039			vsi->tc_cfg.tc_info[i].qcount_rx = 1;
1040			vsi->tc_cfg.tc_info[i].qcount_tx = 1;
1041			vsi->tc_cfg.tc_info[i].netdev_tc = 0;
1042			ctxt->info.tc_mapping[i] = 0;
1043			continue;
1044		}
1045
1046		/* TC is enabled */
1047		vsi->tc_cfg.tc_info[i].qoffset = offset;
1048		vsi->tc_cfg.tc_info[i].qcount_rx = num_rxq_per_tc;
1049		vsi->tc_cfg.tc_info[i].qcount_tx = num_txq_per_tc;
1050		vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++;
1051
1052		qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, offset);
1053		qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow);
1054		offset += num_rxq_per_tc;
1055		tx_count += num_txq_per_tc;
1056		ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1057	}
1058
1059	/* if offset is non-zero, means it is calculated correctly based on
1060	 * enabled TCs for a given VSI otherwise qcount_rx will always
1061	 * be correct and non-zero because it is based off - VSI's
1062	 * allocated Rx queues which is at least 1 (hence qcount_tx will be
1063	 * at least 1)
1064	 */
1065	if (offset)
1066		rx_count = offset;
1067	else
1068		rx_count = num_rxq_per_tc;
1069
1070	if (rx_count > vsi->alloc_rxq) {
1071		dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Rx queues (%u), than were allocated (%u)!\n",
1072			rx_count, vsi->alloc_rxq);
1073		return -EINVAL;
1074	}
1075
1076	if (tx_count > vsi->alloc_txq) {
1077		dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Tx queues (%u), than were allocated (%u)!\n",
1078			tx_count, vsi->alloc_txq);
1079		return -EINVAL;
1080	}
1081
1082	vsi->num_txq = tx_count;
1083	vsi->num_rxq = rx_count;
1084
1085	if (vsi->type == ICE_VSI_VF && vsi->num_txq != vsi->num_rxq) {
1086		dev_dbg(ice_pf_to_dev(vsi->back), "VF VSI should have same number of Tx and Rx queues. Hence making them equal\n");
1087		/* since there is a chance that num_rxq could have been changed
1088		 * in the above for loop, make num_txq equal to num_rxq.
1089		 */
1090		vsi->num_txq = vsi->num_rxq;
1091	}
1092
1093	/* Rx queue mapping */
1094	ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG);
1095	/* q_mapping buffer holds the info for the first queue allocated for
1096	 * this VSI in the PF space and also the number of queues associated
1097	 * with this VSI.
1098	 */
1099	ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]);
1100	ctxt->info.q_mapping[1] = cpu_to_le16(vsi->num_rxq);
1101
1102	return 0;
1103}
1104
1105/**
1106 * ice_set_fd_vsi_ctx - Set FD VSI context before adding a VSI
1107 * @ctxt: the VSI context being set
1108 * @vsi: the VSI being configured
1109 */
1110static void ice_set_fd_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
1111{
1112	u8 dflt_q_group, dflt_q_prio;
1113	u16 dflt_q, report_q, val;
1114
1115	if (vsi->type != ICE_VSI_PF && vsi->type != ICE_VSI_CTRL &&
1116	    vsi->type != ICE_VSI_VF && vsi->type != ICE_VSI_CHNL)
1117		return;
1118
1119	val = ICE_AQ_VSI_PROP_FLOW_DIR_VALID;
1120	ctxt->info.valid_sections |= cpu_to_le16(val);
1121	dflt_q = 0;
1122	dflt_q_group = 0;
1123	report_q = 0;
1124	dflt_q_prio = 0;
1125
1126	/* enable flow director filtering/programming */
1127	val = ICE_AQ_VSI_FD_ENABLE | ICE_AQ_VSI_FD_PROG_ENABLE;
1128	ctxt->info.fd_options = cpu_to_le16(val);
1129	/* max of allocated flow director filters */
1130	ctxt->info.max_fd_fltr_dedicated =
1131			cpu_to_le16(vsi->num_gfltr);
1132	/* max of shared flow director filters any VSI may program */
1133	ctxt->info.max_fd_fltr_shared =
1134			cpu_to_le16(vsi->num_bfltr);
1135	/* default queue index within the VSI of the default FD */
1136	val = FIELD_PREP(ICE_AQ_VSI_FD_DEF_Q_M, dflt_q);
1137	/* target queue or queue group to the FD filter */
1138	val |= FIELD_PREP(ICE_AQ_VSI_FD_DEF_GRP_M, dflt_q_group);
1139	ctxt->info.fd_def_q = cpu_to_le16(val);
1140	/* queue index on which FD filter completion is reported */
1141	val = FIELD_PREP(ICE_AQ_VSI_FD_REPORT_Q_M, report_q);
1142	/* priority of the default qindex action */
1143	val |= FIELD_PREP(ICE_AQ_VSI_FD_DEF_PRIORITY_M, dflt_q_prio);
1144	ctxt->info.fd_report_opt = cpu_to_le16(val);
1145}
1146
1147/**
1148 * ice_set_rss_vsi_ctx - Set RSS VSI context before adding a VSI
1149 * @ctxt: the VSI context being set
1150 * @vsi: the VSI being configured
1151 */
1152static void ice_set_rss_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)
1153{
1154	u8 lut_type, hash_type;
1155	struct device *dev;
1156	struct ice_pf *pf;
1157
1158	pf = vsi->back;
1159	dev = ice_pf_to_dev(pf);
1160
1161	switch (vsi->type) {
1162	case ICE_VSI_CHNL:
1163	case ICE_VSI_PF:
1164		/* PF VSI will inherit RSS instance of PF */
1165		lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_PF;
1166		break;
1167	case ICE_VSI_VF:
1168	case ICE_VSI_SF:
1169		/* VF VSI will gets a small RSS table which is a VSI LUT type */
1170		lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_VSI;
1171		break;
1172	default:
1173		dev_dbg(dev, "Unsupported VSI type %s\n",
1174			ice_vsi_type_str(vsi->type));
1175		return;
1176	}
1177
1178	hash_type = ICE_AQ_VSI_Q_OPT_RSS_HASH_TPLZ;
1179	vsi->rss_hfunc = hash_type;
1180
1181	ctxt->info.q_opt_rss =
1182		FIELD_PREP(ICE_AQ_VSI_Q_OPT_RSS_LUT_M, lut_type) |
1183		FIELD_PREP(ICE_AQ_VSI_Q_OPT_RSS_HASH_M, hash_type);
1184}
1185
1186static void
1187ice_chnl_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)
1188{
1189	u16 qcount, qmap;
1190	u8 offset = 0;
1191	int pow;
1192
1193	qcount = vsi->num_rxq;
1194
1195	pow = order_base_2(qcount);
1196	qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, offset);
1197	qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow);
1198
1199	ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1200	ctxt->info.mapping_flags |= cpu_to_le16(ICE_AQ_VSI_Q_MAP_CONTIG);
1201	ctxt->info.q_mapping[0] = cpu_to_le16(vsi->next_base_q);
1202	ctxt->info.q_mapping[1] = cpu_to_le16(qcount);
1203}
1204
1205/**
1206 * ice_vsi_is_vlan_pruning_ena - check if VLAN pruning is enabled or not
1207 * @vsi: VSI to check whether or not VLAN pruning is enabled.
1208 *
1209 * returns true if Rx VLAN pruning is enabled and false otherwise.
1210 */
1211static bool ice_vsi_is_vlan_pruning_ena(struct ice_vsi *vsi)
1212{
1213	return vsi->info.sw_flags2 & ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
1214}
1215
1216/**
1217 * ice_vsi_init - Create and initialize a VSI
1218 * @vsi: the VSI being configured
1219 * @vsi_flags: VSI configuration flags
1220 *
1221 * Set ICE_FLAG_VSI_INIT to initialize a new VSI context, clear it to
1222 * reconfigure an existing context.
1223 *
1224 * This initializes a VSI context depending on the VSI type to be added and
1225 * passes it down to the add_vsi aq command to create a new VSI.
1226 */
1227static int ice_vsi_init(struct ice_vsi *vsi, u32 vsi_flags)
1228{
1229	struct ice_pf *pf = vsi->back;
1230	struct ice_hw *hw = &pf->hw;
1231	struct ice_vsi_ctx *ctxt;
1232	struct device *dev;
1233	int ret = 0;
1234
1235	dev = ice_pf_to_dev(pf);
1236	ctxt = kzalloc(sizeof(*ctxt), GFP_KERNEL);
1237	if (!ctxt)
1238		return -ENOMEM;
1239
1240	switch (vsi->type) {
1241	case ICE_VSI_CTRL:
1242	case ICE_VSI_LB:
1243	case ICE_VSI_PF:
1244		ctxt->flags = ICE_AQ_VSI_TYPE_PF;
1245		break;
1246	case ICE_VSI_SF:
1247	case ICE_VSI_CHNL:
1248		ctxt->flags = ICE_AQ_VSI_TYPE_VMDQ2;
1249		break;
1250	case ICE_VSI_VF:
1251		ctxt->flags = ICE_AQ_VSI_TYPE_VF;
1252		/* VF number here is the absolute VF number (0-255) */
1253		ctxt->vf_num = vsi->vf->vf_id + hw->func_caps.vf_base_id;
1254		break;
1255	default:
1256		ret = -ENODEV;
1257		goto out;
1258	}
1259
1260	/* Handle VLAN pruning for channel VSI if main VSI has VLAN
1261	 * prune enabled
1262	 */
1263	if (vsi->type == ICE_VSI_CHNL) {
1264		struct ice_vsi *main_vsi;
1265
1266		main_vsi = ice_get_main_vsi(pf);
1267		if (main_vsi && ice_vsi_is_vlan_pruning_ena(main_vsi))
1268			ctxt->info.sw_flags2 |=
1269				ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
1270		else
1271			ctxt->info.sw_flags2 &=
1272				~ICE_AQ_VSI_SW_FLAG_RX_VLAN_PRUNE_ENA;
1273	}
1274
1275	ice_set_dflt_vsi_ctx(hw, ctxt);
1276	if (test_bit(ICE_FLAG_FD_ENA, pf->flags))
1277		ice_set_fd_vsi_ctx(ctxt, vsi);
1278	/* if the switch is in VEB mode, allow VSI loopback */
1279	if (vsi->vsw->bridge_mode == BRIDGE_MODE_VEB)
1280		ctxt->info.sw_flags |= ICE_AQ_VSI_SW_FLAG_ALLOW_LB;
1281
1282	/* Set LUT type and HASH type if RSS is enabled */
1283	if (test_bit(ICE_FLAG_RSS_ENA, pf->flags) &&
1284	    vsi->type != ICE_VSI_CTRL) {
1285		ice_set_rss_vsi_ctx(ctxt, vsi);
1286		/* if updating VSI context, make sure to set valid_section:
1287		 * to indicate which section of VSI context being updated
1288		 */
1289		if (!(vsi_flags & ICE_VSI_FLAG_INIT))
1290			ctxt->info.valid_sections |=
1291				cpu_to_le16(ICE_AQ_VSI_PROP_Q_OPT_VALID);
1292	}
1293
1294	ctxt->info.sw_id = vsi->port_info->sw_id;
1295	if (vsi->type == ICE_VSI_CHNL) {
1296		ice_chnl_vsi_setup_q_map(vsi, ctxt);
1297	} else {
1298		ret = ice_vsi_setup_q_map(vsi, ctxt);
1299		if (ret)
1300			goto out;
1301
1302		if (!(vsi_flags & ICE_VSI_FLAG_INIT))
1303			/* means VSI being updated */
1304			/* must to indicate which section of VSI context are
1305			 * being modified
1306			 */
1307			ctxt->info.valid_sections |=
1308				cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID);
1309	}
1310
1311	/* Allow control frames out of main VSI */
1312	if (vsi->type == ICE_VSI_PF) {
1313		ctxt->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD;
1314		ctxt->info.valid_sections |=
1315			cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID);
1316	}
1317
1318	if (vsi_flags & ICE_VSI_FLAG_INIT) {
1319		ret = ice_add_vsi(hw, vsi->idx, ctxt, NULL);
1320		if (ret) {
1321			dev_err(dev, "Add VSI failed, err %d\n", ret);
1322			ret = -EIO;
1323			goto out;
1324		}
1325	} else {
1326		ret = ice_update_vsi(hw, vsi->idx, ctxt, NULL);
1327		if (ret) {
1328			dev_err(dev, "Update VSI failed, err %d\n", ret);
1329			ret = -EIO;
1330			goto out;
1331		}
1332	}
1333
1334	/* keep context for update VSI operations */
1335	vsi->info = ctxt->info;
1336
1337	/* record VSI number returned */
1338	vsi->vsi_num = ctxt->vsi_num;
1339
1340out:
1341	kfree(ctxt);
1342	return ret;
1343}
1344
1345/**
1346 * ice_vsi_clear_rings - Deallocates the Tx and Rx rings for VSI
1347 * @vsi: the VSI having rings deallocated
1348 */
1349static void ice_vsi_clear_rings(struct ice_vsi *vsi)
1350{
1351	int i;
1352
1353	/* Avoid stale references by clearing map from vector to ring */
1354	if (vsi->q_vectors) {
1355		ice_for_each_q_vector(vsi, i) {
1356			struct ice_q_vector *q_vector = vsi->q_vectors[i];
1357
1358			if (q_vector) {
1359				q_vector->tx.tx_ring = NULL;
1360				q_vector->rx.rx_ring = NULL;
1361			}
1362		}
1363	}
1364
1365	if (vsi->tx_rings) {
1366		ice_for_each_alloc_txq(vsi, i) {
1367			if (vsi->tx_rings[i]) {
1368				kfree_rcu(vsi->tx_rings[i], rcu);
1369				WRITE_ONCE(vsi->tx_rings[i], NULL);
1370			}
1371		}
1372	}
1373	if (vsi->rx_rings) {
1374		ice_for_each_alloc_rxq(vsi, i) {
1375			if (vsi->rx_rings[i]) {
1376				kfree_rcu(vsi->rx_rings[i], rcu);
1377				WRITE_ONCE(vsi->rx_rings[i], NULL);
1378			}
1379		}
1380	}
1381}
1382
1383/**
1384 * ice_vsi_alloc_rings - Allocates Tx and Rx rings for the VSI
1385 * @vsi: VSI which is having rings allocated
1386 */
1387static int ice_vsi_alloc_rings(struct ice_vsi *vsi)
1388{
1389	bool dvm_ena = ice_is_dvm_ena(&vsi->back->hw);
1390	struct ice_pf *pf = vsi->back;
1391	struct device *dev;
1392	u16 i;
1393
1394	dev = ice_pf_to_dev(pf);
1395	/* Allocate Tx rings */
1396	ice_for_each_alloc_txq(vsi, i) {
1397		struct ice_tx_ring *ring;
1398
1399		/* allocate with kzalloc(), free with kfree_rcu() */
1400		ring = kzalloc(sizeof(*ring), GFP_KERNEL);
1401
1402		if (!ring)
1403			goto err_out;
1404
1405		ring->q_index = i;
1406		ring->reg_idx = vsi->txq_map[i];
1407		ring->vsi = vsi;
1408		ring->tx_tstamps = &pf->ptp.port.tx;
1409		ring->dev = dev;
1410		ring->count = vsi->num_tx_desc;
1411		ring->txq_teid = ICE_INVAL_TEID;
1412		if (dvm_ena)
1413			ring->flags |= ICE_TX_FLAGS_RING_VLAN_L2TAG2;
1414		else
1415			ring->flags |= ICE_TX_FLAGS_RING_VLAN_L2TAG1;
1416		WRITE_ONCE(vsi->tx_rings[i], ring);
1417	}
1418
1419	/* Allocate Rx rings */
1420	ice_for_each_alloc_rxq(vsi, i) {
1421		struct ice_rx_ring *ring;
1422
1423		/* allocate with kzalloc(), free with kfree_rcu() */
1424		ring = kzalloc(sizeof(*ring), GFP_KERNEL);
1425		if (!ring)
1426			goto err_out;
1427
1428		ring->q_index = i;
1429		ring->reg_idx = vsi->rxq_map[i];
1430		ring->vsi = vsi;
1431		ring->netdev = vsi->netdev;
1432		ring->count = vsi->num_rx_desc;
1433		ring->cached_phctime = pf->ptp.cached_phc_time;
1434
1435		if (ice_is_feature_supported(pf, ICE_F_GCS))
1436			ring->flags |= ICE_RX_FLAGS_RING_GCS;
1437
1438		WRITE_ONCE(vsi->rx_rings[i], ring);
1439	}
1440
1441	return 0;
1442
1443err_out:
1444	ice_vsi_clear_rings(vsi);
1445	return -ENOMEM;
1446}
1447
1448/**
1449 * ice_vsi_manage_rss_lut - disable/enable RSS
1450 * @vsi: the VSI being changed
1451 * @ena: boolean value indicating if this is an enable or disable request
1452 *
1453 * In the event of disable request for RSS, this function will zero out RSS
1454 * LUT, while in the event of enable request for RSS, it will reconfigure RSS
1455 * LUT.
1456 */
1457void ice_vsi_manage_rss_lut(struct ice_vsi *vsi, bool ena)
1458{
1459	u8 *lut;
1460
1461	lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1462	if (!lut)
1463		return;
1464
1465	if (ena) {
1466		if (vsi->rss_lut_user)
1467			memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1468		else
1469			ice_fill_rss_lut(lut, vsi->rss_table_size,
1470					 vsi->rss_size);
1471	}
1472
1473	ice_set_rss_lut(vsi, lut, vsi->rss_table_size);
1474	kfree(lut);
1475}
1476
1477/**
1478 * ice_vsi_cfg_crc_strip - Configure CRC stripping for a VSI
1479 * @vsi: VSI to be configured
1480 * @disable: set to true to have FCS / CRC in the frame data
1481 */
1482void ice_vsi_cfg_crc_strip(struct ice_vsi *vsi, bool disable)
1483{
1484	int i;
1485
1486	ice_for_each_rxq(vsi, i)
1487		if (disable)
1488			vsi->rx_rings[i]->flags |= ICE_RX_FLAGS_CRC_STRIP_DIS;
1489		else
1490			vsi->rx_rings[i]->flags &= ~ICE_RX_FLAGS_CRC_STRIP_DIS;
1491}
1492
1493/**
1494 * ice_vsi_cfg_rss_lut_key - Configure RSS params for a VSI
1495 * @vsi: VSI to be configured
1496 */
1497int ice_vsi_cfg_rss_lut_key(struct ice_vsi *vsi)
1498{
1499	struct ice_pf *pf = vsi->back;
1500	struct device *dev;
1501	u8 *lut, *key;
1502	int err;
1503
1504	dev = ice_pf_to_dev(pf);
1505	if (vsi->type == ICE_VSI_PF && vsi->ch_rss_size &&
1506	    (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))) {
1507		vsi->rss_size = min_t(u16, vsi->rss_size, vsi->ch_rss_size);
1508	} else {
1509		vsi->rss_size = min_t(u16, vsi->rss_size, vsi->num_rxq);
1510
1511		/* If orig_rss_size is valid and it is less than determined
1512		 * main VSI's rss_size, update main VSI's rss_size to be
1513		 * orig_rss_size so that when tc-qdisc is deleted, main VSI
1514		 * RSS table gets programmed to be correct (whatever it was
1515		 * to begin with (prior to setup-tc for ADQ config)
1516		 */
1517		if (vsi->orig_rss_size && vsi->rss_size < vsi->orig_rss_size &&
1518		    vsi->orig_rss_size <= vsi->num_rxq) {
1519			vsi->rss_size = vsi->orig_rss_size;
1520			/* now orig_rss_size is used, reset it to zero */
1521			vsi->orig_rss_size = 0;
1522		}
1523	}
1524
1525	lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1526	if (!lut)
1527		return -ENOMEM;
1528
1529	if (vsi->rss_lut_user)
1530		memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1531	else
1532		ice_fill_rss_lut(lut, vsi->rss_table_size, vsi->rss_size);
1533
1534	err = ice_set_rss_lut(vsi, lut, vsi->rss_table_size);
1535	if (err) {
1536		dev_err(dev, "set_rss_lut failed, error %d\n", err);
1537		goto ice_vsi_cfg_rss_exit;
1538	}
1539
1540	key = kzalloc(ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE, GFP_KERNEL);
1541	if (!key) {
1542		err = -ENOMEM;
1543		goto ice_vsi_cfg_rss_exit;
1544	}
1545
1546	if (vsi->rss_hkey_user)
1547		memcpy(key, vsi->rss_hkey_user, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE);
1548	else
1549		netdev_rss_key_fill((void *)key, ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE);
1550
1551	err = ice_set_rss_key(vsi, key);
1552	if (err)
1553		dev_err(dev, "set_rss_key failed, error %d\n", err);
1554
1555	kfree(key);
1556ice_vsi_cfg_rss_exit:
1557	kfree(lut);
1558	return err;
1559}
1560
1561/**
1562 * ice_vsi_set_vf_rss_flow_fld - Sets VF VSI RSS input set for different flows
1563 * @vsi: VSI to be configured
1564 *
1565 * This function will only be called during the VF VSI setup. Upon successful
1566 * completion of package download, this function will configure default RSS
1567 * input sets for VF VSI.
1568 */
1569static void ice_vsi_set_vf_rss_flow_fld(struct ice_vsi *vsi)
1570{
1571	struct ice_pf *pf = vsi->back;
1572	struct device *dev;
1573	int status;
1574
1575	dev = ice_pf_to_dev(pf);
1576	if (ice_is_safe_mode(pf)) {
1577		dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n",
1578			vsi->vsi_num);
1579		return;
1580	}
1581
1582	status = ice_add_avf_rss_cfg(&pf->hw, vsi, ICE_DEFAULT_RSS_HASHCFG);
1583	if (status)
1584		dev_dbg(dev, "ice_add_avf_rss_cfg failed for vsi = %d, error = %d\n",
1585			vsi->vsi_num, status);
1586}
1587
1588static const struct ice_rss_hash_cfg default_rss_cfgs[] = {
1589	/* configure RSS for IPv4 with input set IP src/dst */
1590	{ICE_FLOW_SEG_HDR_IPV4, ICE_FLOW_HASH_IPV4, ICE_RSS_ANY_HEADERS, false},
1591	/* configure RSS for IPv6 with input set IPv6 src/dst */
1592	{ICE_FLOW_SEG_HDR_IPV6, ICE_FLOW_HASH_IPV6, ICE_RSS_ANY_HEADERS, false},
1593	/* configure RSS for tcp4 with input set IP src/dst, TCP src/dst */
1594	{ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4,
1595				ICE_HASH_TCP_IPV4,  ICE_RSS_ANY_HEADERS, false},
1596	/* configure RSS for udp4 with input set IP src/dst, UDP src/dst */
1597	{ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4,
1598				ICE_HASH_UDP_IPV4,  ICE_RSS_ANY_HEADERS, false},
1599	/* configure RSS for sctp4 with input set IP src/dst - only support
1600	 * RSS on SCTPv4 on outer headers (non-tunneled)
1601	 */
1602	{ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4,
1603		ICE_HASH_SCTP_IPV4, ICE_RSS_OUTER_HEADERS, false},
1604	/* configure RSS for gtpc4 with input set IPv4 src/dst */
1605	{ICE_FLOW_SEG_HDR_GTPC | ICE_FLOW_SEG_HDR_IPV4,
1606		ICE_FLOW_HASH_IPV4, ICE_RSS_OUTER_HEADERS, false},
1607	/* configure RSS for gtpc4t with input set IPv4 src/dst */
1608	{ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_IPV4,
1609		ICE_FLOW_HASH_GTP_C_IPV4_TEID, ICE_RSS_OUTER_HEADERS, false},
1610	/* configure RSS for gtpu4 with input set IPv4 src/dst */
1611	{ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_IPV4,
1612		ICE_FLOW_HASH_GTP_U_IPV4_TEID, ICE_RSS_OUTER_HEADERS, false},
1613	/* configure RSS for gtpu4e with input set IPv4 src/dst */
1614	{ICE_FLOW_SEG_HDR_GTPU_EH | ICE_FLOW_SEG_HDR_IPV4,
1615		ICE_FLOW_HASH_GTP_U_IPV4_EH, ICE_RSS_OUTER_HEADERS, false},
1616	/* configure RSS for gtpu4u with input set IPv4 src/dst */
1617	{ ICE_FLOW_SEG_HDR_GTPU_UP | ICE_FLOW_SEG_HDR_IPV4,
1618		ICE_FLOW_HASH_GTP_U_IPV4_UP, ICE_RSS_OUTER_HEADERS, false},
1619	/* configure RSS for gtpu4d with input set IPv4 src/dst */
1620	{ICE_FLOW_SEG_HDR_GTPU_DWN | ICE_FLOW_SEG_HDR_IPV4,
1621		ICE_FLOW_HASH_GTP_U_IPV4_DWN, ICE_RSS_OUTER_HEADERS, false},
1622
1623	/* configure RSS for tcp6 with input set IPv6 src/dst, TCP src/dst */
1624	{ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6,
1625				ICE_HASH_TCP_IPV6,  ICE_RSS_ANY_HEADERS, false},
1626	/* configure RSS for udp6 with input set IPv6 src/dst, UDP src/dst */
1627	{ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6,
1628				ICE_HASH_UDP_IPV6,  ICE_RSS_ANY_HEADERS, false},
1629	/* configure RSS for sctp6 with input set IPv6 src/dst - only support
1630	 * RSS on SCTPv6 on outer headers (non-tunneled)
1631	 */
1632	{ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6,
1633		ICE_HASH_SCTP_IPV6, ICE_RSS_OUTER_HEADERS, false},
1634	/* configure RSS for IPSEC ESP SPI with input set MAC_IPV4_SPI */
1635	{ICE_FLOW_SEG_HDR_ESP,
1636		ICE_FLOW_HASH_ESP_SPI, ICE_RSS_OUTER_HEADERS, false},
1637	/* configure RSS for gtpc6 with input set IPv6 src/dst */
1638	{ICE_FLOW_SEG_HDR_GTPC | ICE_FLOW_SEG_HDR_IPV6,
1639		ICE_FLOW_HASH_IPV6, ICE_RSS_OUTER_HEADERS, false},
1640	/* configure RSS for gtpc6t with input set IPv6 src/dst */
1641	{ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_IPV6,
1642		ICE_FLOW_HASH_GTP_C_IPV6_TEID, ICE_RSS_OUTER_HEADERS, false},
1643	/* configure RSS for gtpu6 with input set IPv6 src/dst */
1644	{ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_IPV6,
1645		ICE_FLOW_HASH_GTP_U_IPV6_TEID, ICE_RSS_OUTER_HEADERS, false},
1646	/* configure RSS for gtpu6e with input set IPv6 src/dst */
1647	{ICE_FLOW_SEG_HDR_GTPU_EH | ICE_FLOW_SEG_HDR_IPV6,
1648		ICE_FLOW_HASH_GTP_U_IPV6_EH, ICE_RSS_OUTER_HEADERS, false},
1649	/* configure RSS for gtpu6u with input set IPv6 src/dst */
1650	{ ICE_FLOW_SEG_HDR_GTPU_UP | ICE_FLOW_SEG_HDR_IPV6,
1651		ICE_FLOW_HASH_GTP_U_IPV6_UP, ICE_RSS_OUTER_HEADERS, false},
1652	/* configure RSS for gtpu6d with input set IPv6 src/dst */
1653	{ICE_FLOW_SEG_HDR_GTPU_DWN | ICE_FLOW_SEG_HDR_IPV6,
1654		ICE_FLOW_HASH_GTP_U_IPV6_DWN, ICE_RSS_OUTER_HEADERS, false},
1655};
1656
1657/**
1658 * ice_vsi_set_rss_flow_fld - Sets RSS input set for different flows
1659 * @vsi: VSI to be configured
1660 *
1661 * This function will only be called after successful download package call
1662 * during initialization of PF. Since the downloaded package will erase the
1663 * RSS section, this function will configure RSS input sets for different
1664 * flow types. The last profile added has the highest priority, therefore 2
1665 * tuple profiles (i.e. IPv4 src/dst) are added before 4 tuple profiles
1666 * (i.e. IPv4 src/dst TCP src/dst port).
1667 */
1668static void ice_vsi_set_rss_flow_fld(struct ice_vsi *vsi)
1669{
1670	u16 vsi_num = vsi->vsi_num;
1671	struct ice_pf *pf = vsi->back;
1672	struct ice_hw *hw = &pf->hw;
1673	struct device *dev;
1674	int status;
1675	u32 i;
1676
1677	dev = ice_pf_to_dev(pf);
1678	if (ice_is_safe_mode(pf)) {
1679		dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n",
1680			vsi_num);
1681		return;
1682	}
1683	for (i = 0; i < ARRAY_SIZE(default_rss_cfgs); i++) {
1684		const struct ice_rss_hash_cfg *cfg = &default_rss_cfgs[i];
1685
1686		status = ice_add_rss_cfg(hw, vsi, cfg);
1687		if (status)
1688			dev_dbg(dev, "ice_add_rss_cfg failed, addl_hdrs = %x, hash_flds = %llx, hdr_type = %d, symm = %d\n",
1689				cfg->addl_hdrs, cfg->hash_flds,
1690				cfg->hdr_type, cfg->symm);
1691	}
1692}
1693
1694/**
1695 * ice_pf_state_is_nominal - checks the PF for nominal state
1696 * @pf: pointer to PF to check
1697 *
1698 * Check the PF's state for a collection of bits that would indicate
1699 * the PF is in a state that would inhibit normal operation for
1700 * driver functionality.
1701 *
1702 * Returns true if PF is in a nominal state, false otherwise
1703 */
1704bool ice_pf_state_is_nominal(struct ice_pf *pf)
1705{
1706	DECLARE_BITMAP(check_bits, ICE_STATE_NBITS) = { 0 };
1707
1708	if (!pf)
1709		return false;
1710
1711	bitmap_set(check_bits, 0, ICE_STATE_NOMINAL_CHECK_BITS);
1712	if (bitmap_intersects(pf->state, check_bits, ICE_STATE_NBITS))
1713		return false;
1714
1715	return true;
1716}
1717
1718#define ICE_FW_MODE_REC_M BIT(1)
1719bool ice_is_recovery_mode(struct ice_hw *hw)
1720{
1721	return rd32(hw, GL_MNG_FWSM) & ICE_FW_MODE_REC_M;
1722}
1723
1724/**
1725 * ice_update_eth_stats - Update VSI-specific ethernet statistics counters
1726 * @vsi: the VSI to be updated
1727 */
1728void ice_update_eth_stats(struct ice_vsi *vsi)
1729{
1730	struct ice_eth_stats *prev_es, *cur_es;
1731	struct ice_hw *hw = &vsi->back->hw;
1732	struct ice_pf *pf = vsi->back;
1733	u16 vsi_num = vsi->vsi_num;    /* HW absolute index of a VSI */
1734
1735	prev_es = &vsi->eth_stats_prev;
1736	cur_es = &vsi->eth_stats;
1737
1738	if (ice_is_reset_in_progress(pf->state))
1739		vsi->stat_offsets_loaded = false;
1740
1741	ice_stat_update40(hw, GLV_GORCL(vsi_num), vsi->stat_offsets_loaded,
1742			  &prev_es->rx_bytes, &cur_es->rx_bytes);
1743
1744	ice_stat_update40(hw, GLV_UPRCL(vsi_num), vsi->stat_offsets_loaded,
1745			  &prev_es->rx_unicast, &cur_es->rx_unicast);
1746
1747	ice_stat_update40(hw, GLV_MPRCL(vsi_num), vsi->stat_offsets_loaded,
1748			  &prev_es->rx_multicast, &cur_es->rx_multicast);
1749
1750	ice_stat_update40(hw, GLV_BPRCL(vsi_num), vsi->stat_offsets_loaded,
1751			  &prev_es->rx_broadcast, &cur_es->rx_broadcast);
1752
1753	ice_stat_update32(hw, GLV_RDPC(vsi_num), vsi->stat_offsets_loaded,
1754			  &prev_es->rx_discards, &cur_es->rx_discards);
1755
1756	ice_stat_update40(hw, GLV_GOTCL(vsi_num), vsi->stat_offsets_loaded,
1757			  &prev_es->tx_bytes, &cur_es->tx_bytes);
1758
1759	ice_stat_update40(hw, GLV_UPTCL(vsi_num), vsi->stat_offsets_loaded,
1760			  &prev_es->tx_unicast, &cur_es->tx_unicast);
1761
1762	ice_stat_update40(hw, GLV_MPTCL(vsi_num), vsi->stat_offsets_loaded,
1763			  &prev_es->tx_multicast, &cur_es->tx_multicast);
1764
1765	ice_stat_update40(hw, GLV_BPTCL(vsi_num), vsi->stat_offsets_loaded,
1766			  &prev_es->tx_broadcast, &cur_es->tx_broadcast);
1767
1768	ice_stat_update32(hw, GLV_TEPC(vsi_num), vsi->stat_offsets_loaded,
1769			  &prev_es->tx_errors, &cur_es->tx_errors);
1770
1771	vsi->stat_offsets_loaded = true;
1772}
1773
1774/**
1775 * ice_write_qrxflxp_cntxt - write/configure QRXFLXP_CNTXT register
1776 * @hw: HW pointer
1777 * @pf_q: index of the Rx queue in the PF's queue space
1778 * @rxdid: flexible descriptor RXDID
1779 * @prio: priority for the RXDID for this queue
1780 * @ena_ts: true to enable timestamp and false to disable timestamp
1781 */
1782void ice_write_qrxflxp_cntxt(struct ice_hw *hw, u16 pf_q, u32 rxdid, u32 prio,
1783			     bool ena_ts)
1784{
1785	int regval = rd32(hw, QRXFLXP_CNTXT(pf_q));
1786
1787	/* clear any previous values */
1788	regval &= ~(QRXFLXP_CNTXT_RXDID_IDX_M |
1789		    QRXFLXP_CNTXT_RXDID_PRIO_M |
1790		    QRXFLXP_CNTXT_TS_M);
1791
1792	regval |= FIELD_PREP(QRXFLXP_CNTXT_RXDID_IDX_M, rxdid);
1793	regval |= FIELD_PREP(QRXFLXP_CNTXT_RXDID_PRIO_M, prio);
1794
1795	if (ena_ts)
1796		/* Enable TimeSync on this queue */
1797		regval |= QRXFLXP_CNTXT_TS_M;
1798
1799	wr32(hw, QRXFLXP_CNTXT(pf_q), regval);
1800}
1801
1802/**
1803 * ice_intrl_usec_to_reg - convert interrupt rate limit to register value
1804 * @intrl: interrupt rate limit in usecs
1805 * @gran: interrupt rate limit granularity in usecs
1806 *
1807 * This function converts a decimal interrupt rate limit in usecs to the format
1808 * expected by firmware.
1809 */
1810static u32 ice_intrl_usec_to_reg(u8 intrl, u8 gran)
1811{
1812	u32 val = intrl / gran;
1813
1814	if (val)
1815		return val | GLINT_RATE_INTRL_ENA_M;
1816	return 0;
1817}
1818
1819/**
1820 * ice_write_intrl - write throttle rate limit to interrupt specific register
1821 * @q_vector: pointer to interrupt specific structure
1822 * @intrl: throttle rate limit in microseconds to write
1823 */
1824void ice_write_intrl(struct ice_q_vector *q_vector, u8 intrl)
1825{
1826	struct ice_hw *hw = &q_vector->vsi->back->hw;
1827
1828	wr32(hw, GLINT_RATE(q_vector->reg_idx),
1829	     ice_intrl_usec_to_reg(intrl, ICE_INTRL_GRAN_ABOVE_25));
1830}
1831
1832static struct ice_q_vector *ice_pull_qvec_from_rc(struct ice_ring_container *rc)
1833{
1834	switch (rc->type) {
1835	case ICE_RX_CONTAINER:
1836		if (rc->rx_ring)
1837			return rc->rx_ring->q_vector;
1838		break;
1839	case ICE_TX_CONTAINER:
1840		if (rc->tx_ring)
1841			return rc->tx_ring->q_vector;
1842		break;
1843	default:
1844		break;
1845	}
1846
1847	return NULL;
1848}
1849
1850/**
1851 * __ice_write_itr - write throttle rate to register
1852 * @q_vector: pointer to interrupt data structure
1853 * @rc: pointer to ring container
1854 * @itr: throttle rate in microseconds to write
1855 */
1856static void __ice_write_itr(struct ice_q_vector *q_vector,
1857			    struct ice_ring_container *rc, u16 itr)
1858{
1859	struct ice_hw *hw = &q_vector->vsi->back->hw;
1860
1861	wr32(hw, GLINT_ITR(rc->itr_idx, q_vector->reg_idx),
1862	     ITR_REG_ALIGN(itr) >> ICE_ITR_GRAN_S);
1863}
1864
1865/**
1866 * ice_write_itr - write throttle rate to queue specific register
1867 * @rc: pointer to ring container
1868 * @itr: throttle rate in microseconds to write
1869 */
1870void ice_write_itr(struct ice_ring_container *rc, u16 itr)
1871{
1872	struct ice_q_vector *q_vector;
1873
1874	q_vector = ice_pull_qvec_from_rc(rc);
1875	if (!q_vector)
1876		return;
1877
1878	__ice_write_itr(q_vector, rc, itr);
1879}
1880
1881/**
1882 * ice_set_q_vector_intrl - set up interrupt rate limiting
1883 * @q_vector: the vector to be configured
1884 *
1885 * Interrupt rate limiting is local to the vector, not per-queue so we must
1886 * detect if either ring container has dynamic moderation enabled to decide
1887 * what to set the interrupt rate limit to via INTRL settings. In the case that
1888 * dynamic moderation is disabled on both, write the value with the cached
1889 * setting to make sure INTRL register matches the user visible value.
1890 */
1891void ice_set_q_vector_intrl(struct ice_q_vector *q_vector)
1892{
1893	if (ITR_IS_DYNAMIC(&q_vector->tx) || ITR_IS_DYNAMIC(&q_vector->rx)) {
1894		/* in the case of dynamic enabled, cap each vector to no more
1895		 * than (4 us) 250,000 ints/sec, which allows low latency
1896		 * but still less than 500,000 interrupts per second, which
1897		 * reduces CPU a bit in the case of the lowest latency
1898		 * setting. The 4 here is a value in microseconds.
1899		 */
1900		ice_write_intrl(q_vector, 4);
1901	} else {
1902		ice_write_intrl(q_vector, q_vector->intrl);
1903	}
1904}
1905
1906/**
1907 * ice_vsi_cfg_msix - MSIX mode Interrupt Config in the HW
1908 * @vsi: the VSI being configured
1909 *
1910 * This configures MSIX mode interrupts for the PF VSI, and should not be used
1911 * for the VF VSI.
1912 */
1913void ice_vsi_cfg_msix(struct ice_vsi *vsi)
1914{
1915	struct ice_pf *pf = vsi->back;
1916	struct ice_hw *hw = &pf->hw;
1917	u16 txq = 0, rxq = 0;
1918	int i, q;
1919
1920	ice_for_each_q_vector(vsi, i) {
1921		struct ice_q_vector *q_vector = vsi->q_vectors[i];
1922		u16 reg_idx = q_vector->reg_idx;
1923
1924		ice_cfg_itr(hw, q_vector);
1925
1926		/* Both Transmit Queue Interrupt Cause Control register
1927		 * and Receive Queue Interrupt Cause control register
1928		 * expects MSIX_INDX field to be the vector index
1929		 * within the function space and not the absolute
1930		 * vector index across PF or across device.
1931		 * For SR-IOV VF VSIs queue vector index always starts
1932		 * with 1 since first vector index(0) is used for OICR
1933		 * in VF space. Since VMDq and other PF VSIs are within
1934		 * the PF function space, use the vector index that is
1935		 * tracked for this PF.
1936		 */
1937		for (q = 0; q < q_vector->num_ring_tx; q++) {
1938			ice_cfg_txq_interrupt(vsi, txq, reg_idx,
1939					      q_vector->tx.itr_idx);
1940			txq++;
1941		}
1942
1943		for (q = 0; q < q_vector->num_ring_rx; q++) {
1944			ice_cfg_rxq_interrupt(vsi, rxq, reg_idx,
1945					      q_vector->rx.itr_idx);
1946			rxq++;
1947		}
1948	}
1949}
1950
1951/**
1952 * ice_vsi_start_all_rx_rings - start/enable all of a VSI's Rx rings
1953 * @vsi: the VSI whose rings are to be enabled
1954 *
1955 * Returns 0 on success and a negative value on error
1956 */
1957int ice_vsi_start_all_rx_rings(struct ice_vsi *vsi)
1958{
1959	return ice_vsi_ctrl_all_rx_rings(vsi, true);
1960}
1961
1962/**
1963 * ice_vsi_stop_all_rx_rings - stop/disable all of a VSI's Rx rings
1964 * @vsi: the VSI whose rings are to be disabled
1965 *
1966 * Returns 0 on success and a negative value on error
1967 */
1968int ice_vsi_stop_all_rx_rings(struct ice_vsi *vsi)
1969{
1970	return ice_vsi_ctrl_all_rx_rings(vsi, false);
1971}
1972
1973/**
1974 * ice_vsi_stop_tx_rings - Disable Tx rings
1975 * @vsi: the VSI being configured
1976 * @rst_src: reset source
1977 * @rel_vmvf_num: Relative ID of VF/VM
1978 * @rings: Tx ring array to be stopped
1979 * @count: number of Tx ring array elements
1980 */
1981static int
1982ice_vsi_stop_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src,
1983		      u16 rel_vmvf_num, struct ice_tx_ring **rings, u16 count)
1984{
1985	u16 q_idx;
1986
1987	if (vsi->num_txq > ICE_LAN_TXQ_MAX_QDIS)
1988		return -EINVAL;
1989
1990	for (q_idx = 0; q_idx < count; q_idx++) {
1991		struct ice_txq_meta txq_meta = { };
1992		int status;
1993
1994		if (!rings || !rings[q_idx])
1995			return -EINVAL;
1996
1997		ice_fill_txq_meta(vsi, rings[q_idx], &txq_meta);
1998		status = ice_vsi_stop_tx_ring(vsi, rst_src, rel_vmvf_num,
1999					      rings[q_idx], &txq_meta);
2000
2001		if (status)
2002			return status;
2003	}
2004
2005	return 0;
2006}
2007
2008/**
2009 * ice_vsi_stop_lan_tx_rings - Disable LAN Tx rings
2010 * @vsi: the VSI being configured
2011 * @rst_src: reset source
2012 * @rel_vmvf_num: Relative ID of VF/VM
2013 */
2014int
2015ice_vsi_stop_lan_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src,
2016			  u16 rel_vmvf_num)
2017{
2018	return ice_vsi_stop_tx_rings(vsi, rst_src, rel_vmvf_num, vsi->tx_rings, vsi->num_txq);
2019}
2020
2021/**
2022 * ice_vsi_stop_xdp_tx_rings - Disable XDP Tx rings
2023 * @vsi: the VSI being configured
2024 */
2025int ice_vsi_stop_xdp_tx_rings(struct ice_vsi *vsi)
2026{
2027	return ice_vsi_stop_tx_rings(vsi, ICE_NO_RESET, 0, vsi->xdp_rings, vsi->num_xdp_txq);
2028}
2029
2030/**
2031 * ice_vsi_is_rx_queue_active
2032 * @vsi: the VSI being configured
2033 *
2034 * Return true if at least one queue is active.
2035 */
2036bool ice_vsi_is_rx_queue_active(struct ice_vsi *vsi)
2037{
2038	struct ice_pf *pf = vsi->back;
2039	struct ice_hw *hw = &pf->hw;
2040	int i;
2041
2042	ice_for_each_rxq(vsi, i) {
2043		u32 rx_reg;
2044		int pf_q;
2045
2046		pf_q = vsi->rxq_map[i];
2047		rx_reg = rd32(hw, QRX_CTRL(pf_q));
2048		if (rx_reg & QRX_CTRL_QENA_STAT_M)
2049			return true;
2050	}
2051
2052	return false;
2053}
2054
2055static void ice_vsi_set_tc_cfg(struct ice_vsi *vsi)
2056{
2057	if (!test_bit(ICE_FLAG_DCB_ENA, vsi->back->flags)) {
2058		vsi->tc_cfg.ena_tc = ICE_DFLT_TRAFFIC_CLASS;
2059		vsi->tc_cfg.numtc = 1;
2060		return;
2061	}
2062
2063	/* set VSI TC information based on DCB config */
2064	ice_vsi_set_dcb_tc_cfg(vsi);
2065}
2066
2067/**
2068 * ice_vsi_cfg_sw_lldp - Config switch rules for LLDP packet handling
2069 * @vsi: the VSI being configured
2070 * @tx: bool to determine Tx or Rx rule
2071 * @create: bool to determine create or remove Rule
2072 *
2073 * Adding an ethtype Tx rule to the uplink VSI results in it being applied
2074 * to the whole port, so LLDP transmission for VFs will be blocked too.
2075 */
2076void ice_vsi_cfg_sw_lldp(struct ice_vsi *vsi, bool tx, bool create)
2077{
2078	int (*eth_fltr)(struct ice_vsi *v, u16 type, u16 flag,
2079			enum ice_sw_fwd_act_type act);
2080	struct ice_pf *pf = vsi->back;
2081	struct device *dev;
2082	int status;
2083
2084	dev = ice_pf_to_dev(pf);
2085	eth_fltr = create ? ice_fltr_add_eth : ice_fltr_remove_eth;
2086
2087	if (tx) {
2088		status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_TX,
2089				  ICE_DROP_PACKET);
2090	} else {
2091		if (!test_bit(ICE_FLAG_LLDP_AQ_FLTR, pf->flags)) {
2092			status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_RX,
2093					  ICE_FWD_TO_VSI);
2094			if (!status || !create)
2095				goto report;
2096
2097			dev_info(dev,
2098				 "Failed to add generic LLDP Rx filter on VSI %i error: %d, falling back to specialized AQ control\n",
2099				 vsi->vsi_num, status);
2100		}
2101
2102		status = ice_lldp_fltr_add_remove(&pf->hw, vsi, create);
2103		if (!status)
2104			set_bit(ICE_FLAG_LLDP_AQ_FLTR, pf->flags);
2105
2106	}
2107
2108report:
2109	if (status)
2110		dev_warn(dev, "Failed to %s %s LLDP rule on VSI %i error: %d\n",
2111			 create ? "add" : "remove", tx ? "Tx" : "Rx",
2112			 vsi->vsi_num, status);
2113}
2114
2115/**
2116 * ice_cfg_sw_rx_lldp - Enable/disable software handling of LLDP
2117 * @pf: the PF being configured
2118 * @enable: enable or disable
2119 *
2120 * Configure switch rules to enable/disable LLDP handling by software
2121 * across PF.
2122 */
2123void ice_cfg_sw_rx_lldp(struct ice_pf *pf, bool enable)
2124{
2125	struct ice_vsi *vsi;
2126	struct ice_vf *vf;
2127	unsigned int bkt;
2128
2129	vsi = ice_get_main_vsi(pf);
2130	ice_vsi_cfg_sw_lldp(vsi, false, enable);
2131
2132	if (!test_bit(ICE_FLAG_SRIOV_ENA, pf->flags))
2133		return;
2134
2135	ice_for_each_vf(pf, bkt, vf) {
2136		vsi = ice_get_vf_vsi(vf);
2137
2138		if (WARN_ON(!vsi))
2139			continue;
2140
2141		if (ice_vf_is_lldp_ena(vf))
2142			ice_vsi_cfg_sw_lldp(vsi, false, enable);
2143	}
2144}
2145
2146/**
2147 * ice_set_agg_vsi - sets up scheduler aggregator node and move VSI into it
2148 * @vsi: pointer to the VSI
2149 *
2150 * This function will allocate new scheduler aggregator now if needed and will
2151 * move specified VSI into it.
2152 */
2153static void ice_set_agg_vsi(struct ice_vsi *vsi)
2154{
2155	struct device *dev = ice_pf_to_dev(vsi->back);
2156	struct ice_agg_node *agg_node_iter = NULL;
2157	u32 agg_id = ICE_INVALID_AGG_NODE_ID;
2158	struct ice_agg_node *agg_node = NULL;
2159	int node_offset, max_agg_nodes = 0;
2160	struct ice_port_info *port_info;
2161	struct ice_pf *pf = vsi->back;
2162	u32 agg_node_id_start = 0;
2163	int status;
2164
2165	/* create (as needed) scheduler aggregator node and move VSI into
2166	 * corresponding aggregator node
2167	 * - PF aggregator node to contains VSIs of type _PF and _CTRL
2168	 * - VF aggregator nodes will contain VF VSI
2169	 */
2170	port_info = pf->hw.port_info;
2171	if (!port_info)
2172		return;
2173
2174	switch (vsi->type) {
2175	case ICE_VSI_CTRL:
2176	case ICE_VSI_CHNL:
2177	case ICE_VSI_LB:
2178	case ICE_VSI_PF:
2179	case ICE_VSI_SF:
2180		max_agg_nodes = ICE_MAX_PF_AGG_NODES;
2181		agg_node_id_start = ICE_PF_AGG_NODE_ID_START;
2182		agg_node_iter = &pf->pf_agg_node[0];
2183		break;
2184	case ICE_VSI_VF:
2185		/* user can create 'n' VFs on a given PF, but since max children
2186		 * per aggregator node can be only 64. Following code handles
2187		 * aggregator(s) for VF VSIs, either selects a agg_node which
2188		 * was already created provided num_vsis < 64, otherwise
2189		 * select next available node, which will be created
2190		 */
2191		max_agg_nodes = ICE_MAX_VF_AGG_NODES;
2192		agg_node_id_start = ICE_VF_AGG_NODE_ID_START;
2193		agg_node_iter = &pf->vf_agg_node[0];
2194		break;
2195	default:
2196		/* other VSI type, handle later if needed */
2197		dev_dbg(dev, "unexpected VSI type %s\n",
2198			ice_vsi_type_str(vsi->type));
2199		return;
2200	}
2201
2202	/* find the appropriate aggregator node */
2203	for (node_offset = 0; node_offset < max_agg_nodes; node_offset++) {
2204		/* see if we can find space in previously created
2205		 * node if num_vsis < 64, otherwise skip
2206		 */
2207		if (agg_node_iter->num_vsis &&
2208		    agg_node_iter->num_vsis == ICE_MAX_VSIS_IN_AGG_NODE) {
2209			agg_node_iter++;
2210			continue;
2211		}
2212
2213		if (agg_node_iter->valid &&
2214		    agg_node_iter->agg_id != ICE_INVALID_AGG_NODE_ID) {
2215			agg_id = agg_node_iter->agg_id;
2216			agg_node = agg_node_iter;
2217			break;
2218		}
2219
2220		/* find unclaimed agg_id */
2221		if (agg_node_iter->agg_id == ICE_INVALID_AGG_NODE_ID) {
2222			agg_id = node_offset + agg_node_id_start;
2223			agg_node = agg_node_iter;
2224			break;
2225		}
2226		/* move to next agg_node */
2227		agg_node_iter++;
2228	}
2229
2230	if (!agg_node)
2231		return;
2232
2233	/* if selected aggregator node was not created, create it */
2234	if (!agg_node->valid) {
2235		status = ice_cfg_agg(port_info, agg_id, ICE_AGG_TYPE_AGG,
2236				     (u8)vsi->tc_cfg.ena_tc);
2237		if (status) {
2238			dev_err(dev, "unable to create aggregator node with agg_id %u\n",
2239				agg_id);
2240			return;
2241		}
2242		/* aggregator node is created, store the needed info */
2243		agg_node->valid = true;
2244		agg_node->agg_id = agg_id;
2245	}
2246
2247	/* move VSI to corresponding aggregator node */
2248	status = ice_move_vsi_to_agg(port_info, agg_id, vsi->idx,
2249				     (u8)vsi->tc_cfg.ena_tc);
2250	if (status) {
2251		dev_err(dev, "unable to move VSI idx %u into aggregator %u node",
2252			vsi->idx, agg_id);
2253		return;
2254	}
2255
2256	/* keep active children count for aggregator node */
2257	agg_node->num_vsis++;
2258
2259	/* cache the 'agg_id' in VSI, so that after reset - VSI will be moved
2260	 * to aggregator node
2261	 */
2262	vsi->agg_node = agg_node;
2263	dev_dbg(dev, "successfully moved VSI idx %u tc_bitmap 0x%x) into aggregator node %d which has num_vsis %u\n",
2264		vsi->idx, vsi->tc_cfg.ena_tc, vsi->agg_node->agg_id,
2265		vsi->agg_node->num_vsis);
2266}
2267
2268static int ice_vsi_cfg_tc_lan(struct ice_pf *pf, struct ice_vsi *vsi)
2269{
2270	u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
2271	struct device *dev = ice_pf_to_dev(pf);
2272	int ret, i;
2273
2274	/* configure VSI nodes based on number of queues and TC's */
2275	ice_for_each_traffic_class(i) {
2276		if (!(vsi->tc_cfg.ena_tc & BIT(i)))
2277			continue;
2278
2279		if (vsi->type == ICE_VSI_CHNL) {
2280			if (!vsi->alloc_txq && vsi->num_txq)
2281				max_txqs[i] = vsi->num_txq;
2282			else
2283				max_txqs[i] = pf->num_lan_tx;
2284		} else {
2285			max_txqs[i] = vsi->alloc_txq;
2286		}
2287
2288		if (vsi->type == ICE_VSI_PF)
2289			max_txqs[i] += vsi->num_xdp_txq;
2290	}
2291
2292	dev_dbg(dev, "vsi->tc_cfg.ena_tc = %d\n", vsi->tc_cfg.ena_tc);
2293	ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc,
2294			      max_txqs);
2295	if (ret) {
2296		dev_err(dev, "VSI %d failed lan queue config, error %d\n",
2297			vsi->vsi_num, ret);
2298		return ret;
2299	}
2300
2301	return 0;
2302}
2303
2304/**
2305 * ice_vsi_cfg_def - configure default VSI based on the type
2306 * @vsi: pointer to VSI
2307 */
2308static int ice_vsi_cfg_def(struct ice_vsi *vsi)
2309{
2310	struct device *dev = ice_pf_to_dev(vsi->back);
2311	struct ice_pf *pf = vsi->back;
2312	int ret;
2313
2314	vsi->vsw = pf->first_sw;
2315
2316	ret = ice_vsi_alloc_def(vsi, vsi->ch);
2317	if (ret)
2318		return ret;
2319
2320	/* allocate memory for Tx/Rx ring stat pointers */
2321	ret = ice_vsi_alloc_stat_arrays(vsi);
2322	if (ret)
2323		goto unroll_vsi_alloc;
2324
2325	ice_alloc_fd_res(vsi);
2326
2327	ret = ice_vsi_get_qs(vsi);
2328	if (ret) {
2329		dev_err(dev, "Failed to allocate queues. vsi->idx = %d\n",
2330			vsi->idx);
2331		goto unroll_vsi_alloc_stat;
2332	}
2333
2334	/* set RSS capabilities */
2335	ice_vsi_set_rss_params(vsi);
2336
2337	/* set TC configuration */
2338	ice_vsi_set_tc_cfg(vsi);
2339
2340	/* create the VSI */
2341	ret = ice_vsi_init(vsi, vsi->flags);
2342	if (ret)
2343		goto unroll_get_qs;
2344
2345	ice_vsi_init_vlan_ops(vsi);
2346
2347	switch (vsi->type) {
2348	case ICE_VSI_CTRL:
2349	case ICE_VSI_SF:
2350	case ICE_VSI_PF:
2351		ret = ice_vsi_alloc_q_vectors(vsi);
2352		if (ret)
2353			goto unroll_vsi_init;
2354
2355		ret = ice_vsi_alloc_rings(vsi);
2356		if (ret)
2357			goto unroll_vector_base;
2358
2359		ret = ice_vsi_alloc_ring_stats(vsi);
2360		if (ret)
2361			goto unroll_vector_base;
2362
2363		if (ice_is_xdp_ena_vsi(vsi)) {
2364			ret = ice_vsi_determine_xdp_res(vsi);
2365			if (ret)
2366				goto unroll_vector_base;
2367			ret = ice_prepare_xdp_rings(vsi, vsi->xdp_prog,
2368						    ICE_XDP_CFG_PART);
2369			if (ret)
2370				goto unroll_vector_base;
2371		}
2372
2373		ice_vsi_map_rings_to_vectors(vsi);
2374
2375		vsi->stat_offsets_loaded = false;
2376
2377		/* ICE_VSI_CTRL does not need RSS so skip RSS processing */
2378		if (vsi->type != ICE_VSI_CTRL)
2379			/* Do not exit if configuring RSS had an issue, at
2380			 * least receive traffic on first queue. Hence no
2381			 * need to capture return value
2382			 */
2383			if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
2384				ice_vsi_cfg_rss_lut_key(vsi);
2385				ice_vsi_set_rss_flow_fld(vsi);
2386			}
2387		ice_init_arfs(vsi);
2388		break;
2389	case ICE_VSI_CHNL:
2390		if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
2391			ice_vsi_cfg_rss_lut_key(vsi);
2392			ice_vsi_set_rss_flow_fld(vsi);
2393		}
2394		break;
2395	case ICE_VSI_VF:
2396		/* VF driver will take care of creating netdev for this type and
2397		 * map queues to vectors through Virtchnl, PF driver only
2398		 * creates a VSI and corresponding structures for bookkeeping
2399		 * purpose
2400		 */
2401		ret = ice_vsi_alloc_q_vectors(vsi);
2402		if (ret)
2403			goto unroll_vsi_init;
2404
2405		ret = ice_vsi_alloc_rings(vsi);
2406		if (ret)
2407			goto unroll_alloc_q_vector;
2408
2409		ret = ice_vsi_alloc_ring_stats(vsi);
2410		if (ret)
2411			goto unroll_vector_base;
2412
2413		vsi->stat_offsets_loaded = false;
2414
2415		/* Do not exit if configuring RSS had an issue, at least
2416		 * receive traffic on first queue. Hence no need to capture
2417		 * return value
2418		 */
2419		if (test_bit(ICE_FLAG_RSS_ENA, pf->flags)) {
2420			ice_vsi_cfg_rss_lut_key(vsi);
2421			ice_vsi_set_vf_rss_flow_fld(vsi);
2422		}
2423		break;
2424	case ICE_VSI_LB:
2425		ret = ice_vsi_alloc_q_vectors(vsi);
2426		if (ret)
2427			goto unroll_vsi_init;
2428
2429		ret = ice_vsi_alloc_rings(vsi);
2430		if (ret)
2431			goto unroll_alloc_q_vector;
2432
2433		ret = ice_vsi_alloc_ring_stats(vsi);
2434		if (ret)
2435			goto unroll_vector_base;
2436
2437		/* Simply map the dummy q_vector to the only rx_ring */
2438		vsi->rx_rings[0]->q_vector = vsi->q_vectors[0];
2439
2440		break;
2441	default:
2442		/* clean up the resources and exit */
2443		ret = -EINVAL;
2444		goto unroll_vsi_init;
2445	}
2446
2447	return 0;
2448
2449unroll_vector_base:
2450	/* reclaim SW interrupts back to the common pool */
2451unroll_alloc_q_vector:
2452	ice_vsi_free_q_vectors(vsi);
2453unroll_vsi_init:
2454	ice_vsi_delete_from_hw(vsi);
2455unroll_get_qs:
2456	ice_vsi_put_qs(vsi);
2457unroll_vsi_alloc_stat:
2458	ice_vsi_free_stats(vsi);
2459unroll_vsi_alloc:
2460	ice_vsi_free_arrays(vsi);
2461	return ret;
2462}
2463
2464/**
2465 * ice_vsi_cfg - configure a previously allocated VSI
2466 * @vsi: pointer to VSI
2467 */
2468int ice_vsi_cfg(struct ice_vsi *vsi)
2469{
2470	struct ice_pf *pf = vsi->back;
2471	int ret;
2472
2473	if (WARN_ON(vsi->type == ICE_VSI_VF && !vsi->vf))
2474		return -EINVAL;
2475
2476	ret = ice_vsi_cfg_def(vsi);
2477	if (ret)
2478		return ret;
2479
2480	ret = ice_vsi_cfg_tc_lan(vsi->back, vsi);
2481	if (ret)
2482		ice_vsi_decfg(vsi);
2483
2484	if (vsi->type == ICE_VSI_CTRL) {
2485		if (vsi->vf) {
2486			WARN_ON(vsi->vf->ctrl_vsi_idx != ICE_NO_VSI);
2487			vsi->vf->ctrl_vsi_idx = vsi->idx;
2488		} else {
2489			WARN_ON(pf->ctrl_vsi_idx != ICE_NO_VSI);
2490			pf->ctrl_vsi_idx = vsi->idx;
2491		}
2492	}
2493
2494	return ret;
2495}
2496
2497/**
2498 * ice_vsi_decfg - remove all VSI configuration
2499 * @vsi: pointer to VSI
2500 */
2501void ice_vsi_decfg(struct ice_vsi *vsi)
2502{
2503	struct ice_pf *pf = vsi->back;
2504	int err;
2505
2506	ice_rm_vsi_lan_cfg(vsi->port_info, vsi->idx);
2507	err = ice_rm_vsi_rdma_cfg(vsi->port_info, vsi->idx);
2508	if (err)
2509		dev_err(ice_pf_to_dev(pf), "Failed to remove RDMA scheduler config for VSI %u, err %d\n",
2510			vsi->vsi_num, err);
2511
2512	if (vsi->xdp_rings)
2513		/* return value check can be skipped here, it always returns
2514		 * 0 if reset is in progress
2515		 */
2516		ice_destroy_xdp_rings(vsi, ICE_XDP_CFG_PART);
2517
2518	ice_vsi_clear_rings(vsi);
2519	ice_vsi_free_q_vectors(vsi);
2520	ice_vsi_put_qs(vsi);
2521	ice_vsi_free_arrays(vsi);
2522
2523	/* SR-IOV determines needed MSIX resources all at once instead of per
2524	 * VSI since when VFs are spawned we know how many VFs there are and how
2525	 * many interrupts each VF needs. SR-IOV MSIX resources are also
2526	 * cleared in the same manner.
2527	 */
2528
2529	if (vsi->type == ICE_VSI_VF &&
2530	    vsi->agg_node && vsi->agg_node->valid)
2531		vsi->agg_node->num_vsis--;
2532}
2533
2534/**
2535 * ice_vsi_setup - Set up a VSI by a given type
2536 * @pf: board private structure
2537 * @params: parameters to use when creating the VSI
2538 *
2539 * This allocates the sw VSI structure and its queue resources.
2540 *
2541 * Returns pointer to the successfully allocated and configured VSI sw struct on
2542 * success, NULL on failure.
2543 */
2544struct ice_vsi *
2545ice_vsi_setup(struct ice_pf *pf, struct ice_vsi_cfg_params *params)
2546{
2547	struct device *dev = ice_pf_to_dev(pf);
2548	struct ice_vsi *vsi;
2549	int ret;
2550
2551	/* ice_vsi_setup can only initialize a new VSI, and we must have
2552	 * a port_info structure for it.
2553	 */
2554	if (WARN_ON(!(params->flags & ICE_VSI_FLAG_INIT)) ||
2555	    WARN_ON(!params->port_info))
2556		return NULL;
2557
2558	vsi = ice_vsi_alloc(pf);
2559	if (!vsi) {
2560		dev_err(dev, "could not allocate VSI\n");
2561		return NULL;
2562	}
2563
2564	vsi->params = *params;
2565	ret = ice_vsi_cfg(vsi);
2566	if (ret)
2567		goto err_vsi_cfg;
2568
2569	/* Add switch rule to drop all Tx Flow Control Frames, of look up
2570	 * type ETHERTYPE from VSIs, and restrict malicious VF from sending
2571	 * out PAUSE or PFC frames. If enabled, FW can still send FC frames.
2572	 * The rule is added once for PF VSI in order to create appropriate
2573	 * recipe, since VSI/VSI list is ignored with drop action...
2574	 * Also add rules to handle LLDP Tx packets.  Tx LLDP packets need to
2575	 * be dropped so that VFs cannot send LLDP packets to reconfig DCB
2576	 * settings in the HW.
2577	 */
2578	if (!ice_is_safe_mode(pf) && vsi->type == ICE_VSI_PF) {
2579		ice_fltr_add_eth(vsi, ETH_P_PAUSE, ICE_FLTR_TX,
2580				 ICE_DROP_PACKET);
2581		ice_vsi_cfg_sw_lldp(vsi, true, true);
2582	}
2583
2584	if (!vsi->agg_node)
2585		ice_set_agg_vsi(vsi);
2586
2587	return vsi;
2588
2589err_vsi_cfg:
2590	ice_vsi_free(vsi);
2591
2592	return NULL;
2593}
2594
2595/**
2596 * ice_vsi_release_msix - Clear the queue to Interrupt mapping in HW
2597 * @vsi: the VSI being cleaned up
2598 */
2599static void ice_vsi_release_msix(struct ice_vsi *vsi)
2600{
2601	struct ice_pf *pf = vsi->back;
2602	struct ice_hw *hw = &pf->hw;
2603	u32 txq = 0;
2604	u32 rxq = 0;
2605	int i, q;
2606
2607	ice_for_each_q_vector(vsi, i) {
2608		struct ice_q_vector *q_vector = vsi->q_vectors[i];
2609
2610		ice_write_intrl(q_vector, 0);
2611		for (q = 0; q < q_vector->num_ring_tx; q++) {
2612			ice_write_itr(&q_vector->tx, 0);
2613			wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), 0);
2614			if (vsi->xdp_rings) {
2615				u32 xdp_txq = txq + vsi->num_xdp_txq;
2616
2617				wr32(hw, QINT_TQCTL(vsi->txq_map[xdp_txq]), 0);
2618			}
2619			txq++;
2620		}
2621
2622		for (q = 0; q < q_vector->num_ring_rx; q++) {
2623			ice_write_itr(&q_vector->rx, 0);
2624			wr32(hw, QINT_RQCTL(vsi->rxq_map[rxq]), 0);
2625			rxq++;
2626		}
2627	}
2628
2629	ice_flush(hw);
2630}
2631
2632/**
2633 * ice_vsi_free_irq - Free the IRQ association with the OS
2634 * @vsi: the VSI being configured
2635 */
2636void ice_vsi_free_irq(struct ice_vsi *vsi)
2637{
2638	struct ice_pf *pf = vsi->back;
2639	int i;
2640
2641	if (!vsi->q_vectors || !vsi->irqs_ready)
2642		return;
2643
2644	ice_vsi_release_msix(vsi);
2645	if (vsi->type == ICE_VSI_VF)
2646		return;
2647
2648	vsi->irqs_ready = false;
2649
2650	ice_for_each_q_vector(vsi, i) {
2651		int irq_num;
2652
2653		irq_num = vsi->q_vectors[i]->irq.virq;
2654
2655		/* free only the irqs that were actually requested */
2656		if (!vsi->q_vectors[i] ||
2657		    !(vsi->q_vectors[i]->num_ring_tx ||
2658		      vsi->q_vectors[i]->num_ring_rx))
2659			continue;
2660
2661		synchronize_irq(irq_num);
2662		devm_free_irq(ice_pf_to_dev(pf), irq_num, vsi->q_vectors[i]);
2663	}
2664}
2665
2666/**
2667 * ice_vsi_free_tx_rings - Free Tx resources for VSI queues
2668 * @vsi: the VSI having resources freed
2669 */
2670void ice_vsi_free_tx_rings(struct ice_vsi *vsi)
2671{
2672	int i;
2673
2674	if (!vsi->tx_rings)
2675		return;
2676
2677	ice_for_each_txq(vsi, i)
2678		if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2679			ice_free_tx_ring(vsi->tx_rings[i]);
2680}
2681
2682/**
2683 * ice_vsi_free_rx_rings - Free Rx resources for VSI queues
2684 * @vsi: the VSI having resources freed
2685 */
2686void ice_vsi_free_rx_rings(struct ice_vsi *vsi)
2687{
2688	int i;
2689
2690	if (!vsi->rx_rings)
2691		return;
2692
2693	ice_for_each_rxq(vsi, i)
2694		if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2695			ice_free_rx_ring(vsi->rx_rings[i]);
2696}
2697
2698/**
2699 * ice_vsi_close - Shut down a VSI
2700 * @vsi: the VSI being shut down
2701 */
2702void ice_vsi_close(struct ice_vsi *vsi)
2703{
2704	if (!test_and_set_bit(ICE_VSI_DOWN, vsi->state))
2705		ice_down(vsi);
2706
2707	ice_vsi_clear_napi_queues(vsi);
2708	ice_vsi_free_irq(vsi);
2709	ice_vsi_free_tx_rings(vsi);
2710	ice_vsi_free_rx_rings(vsi);
2711}
2712
2713/**
2714 * ice_ena_vsi - resume a VSI
2715 * @vsi: the VSI being resume
2716 * @locked: is the rtnl_lock already held
2717 */
2718int ice_ena_vsi(struct ice_vsi *vsi, bool locked)
2719{
2720	int err = 0;
2721
2722	if (!test_bit(ICE_VSI_NEEDS_RESTART, vsi->state))
2723		return 0;
2724
2725	clear_bit(ICE_VSI_NEEDS_RESTART, vsi->state);
2726
2727	if (vsi->netdev && (vsi->type == ICE_VSI_PF ||
2728			    vsi->type == ICE_VSI_SF)) {
2729		if (netif_running(vsi->netdev)) {
2730			if (!locked)
2731				rtnl_lock();
2732
2733			err = ice_open_internal(vsi->netdev);
2734
2735			if (!locked)
2736				rtnl_unlock();
2737		}
2738	} else if (vsi->type == ICE_VSI_CTRL) {
2739		err = ice_vsi_open_ctrl(vsi);
2740	}
2741
2742	return err;
2743}
2744
2745/**
2746 * ice_dis_vsi - pause a VSI
2747 * @vsi: the VSI being paused
2748 * @locked: is the rtnl_lock already held
2749 */
2750void ice_dis_vsi(struct ice_vsi *vsi, bool locked)
2751{
2752	bool already_down = test_bit(ICE_VSI_DOWN, vsi->state);
2753
2754	set_bit(ICE_VSI_NEEDS_RESTART, vsi->state);
2755
2756	if (vsi->netdev && (vsi->type == ICE_VSI_PF ||
2757			    vsi->type == ICE_VSI_SF)) {
2758		if (netif_running(vsi->netdev)) {
2759			if (!locked)
2760				rtnl_lock();
2761			already_down = test_bit(ICE_VSI_DOWN, vsi->state);
2762			if (!already_down)
2763				ice_vsi_close(vsi);
2764
2765			if (!locked)
2766				rtnl_unlock();
2767		} else if (!already_down) {
2768			ice_vsi_close(vsi);
2769		}
2770	} else if (vsi->type == ICE_VSI_CTRL && !already_down) {
2771		ice_vsi_close(vsi);
2772	}
2773}
2774
2775/**
2776 * ice_vsi_set_napi_queues - associate netdev queues with napi
2777 * @vsi: VSI pointer
2778 *
2779 * Associate queue[s] with napi for all vectors.
2780 */
2781void ice_vsi_set_napi_queues(struct ice_vsi *vsi)
2782{
2783	struct net_device *netdev = vsi->netdev;
2784	int q_idx, v_idx;
2785
2786	if (!netdev)
2787		return;
2788
2789	ASSERT_RTNL();
2790	ice_for_each_rxq(vsi, q_idx)
2791		if (vsi->rx_rings[q_idx] && vsi->rx_rings[q_idx]->q_vector)
2792			netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_RX,
2793					     &vsi->rx_rings[q_idx]->q_vector->napi);
2794
2795	ice_for_each_txq(vsi, q_idx)
2796		if (vsi->tx_rings[q_idx] && vsi->tx_rings[q_idx]->q_vector)
2797			netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_TX,
2798					     &vsi->tx_rings[q_idx]->q_vector->napi);
2799	/* Also set the interrupt number for the NAPI */
2800	ice_for_each_q_vector(vsi, v_idx) {
2801		struct ice_q_vector *q_vector = vsi->q_vectors[v_idx];
2802
2803		netif_napi_set_irq(&q_vector->napi, q_vector->irq.virq);
2804	}
2805}
2806
2807/**
2808 * ice_vsi_clear_napi_queues - dissociate netdev queues from napi
2809 * @vsi: VSI pointer
2810 *
2811 * Clear the association between all VSI queues queue[s] and napi.
2812 */
2813void ice_vsi_clear_napi_queues(struct ice_vsi *vsi)
2814{
2815	struct net_device *netdev = vsi->netdev;
2816	int q_idx, v_idx;
2817
2818	if (!netdev)
2819		return;
2820
2821	ASSERT_RTNL();
2822	/* Clear the NAPI's interrupt number */
2823	ice_for_each_q_vector(vsi, v_idx) {
2824		struct ice_q_vector *q_vector = vsi->q_vectors[v_idx];
2825
2826		netif_napi_set_irq(&q_vector->napi, -1);
2827	}
2828
2829	ice_for_each_txq(vsi, q_idx)
2830		netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_TX, NULL);
2831
2832	ice_for_each_rxq(vsi, q_idx)
2833		netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_RX, NULL);
2834}
2835
2836/**
2837 * ice_napi_add - register NAPI handler for the VSI
2838 * @vsi: VSI for which NAPI handler is to be registered
2839 *
2840 * This function is only called in the driver's load path. Registering the NAPI
2841 * handler is done in ice_vsi_alloc_q_vector() for all other cases (i.e. resume,
2842 * reset/rebuild, etc.)
2843 */
2844void ice_napi_add(struct ice_vsi *vsi)
2845{
2846	int v_idx;
2847
2848	if (!vsi->netdev)
2849		return;
2850
2851	ice_for_each_q_vector(vsi, v_idx)
2852		netif_napi_add_config(vsi->netdev,
2853				      &vsi->q_vectors[v_idx]->napi,
2854				      ice_napi_poll,
2855				      v_idx);
2856}
2857
2858/**
2859 * ice_vsi_release - Delete a VSI and free its resources
2860 * @vsi: the VSI being removed
2861 *
2862 * Returns 0 on success or < 0 on error
2863 */
2864int ice_vsi_release(struct ice_vsi *vsi)
2865{
2866	struct ice_pf *pf;
2867
2868	if (!vsi->back)
2869		return -ENODEV;
2870	pf = vsi->back;
2871
2872	if (test_bit(ICE_FLAG_RSS_ENA, pf->flags))
2873		ice_rss_clean(vsi);
2874
2875	ice_vsi_close(vsi);
2876
2877	/* The Rx rule will only exist to remove if the LLDP FW
2878	 * engine is currently stopped
2879	 */
2880	if (!ice_is_safe_mode(pf) &&
2881	    !test_bit(ICE_FLAG_FW_LLDP_AGENT, pf->flags) &&
2882	    (vsi->type == ICE_VSI_PF || (vsi->type == ICE_VSI_VF &&
2883	     ice_vf_is_lldp_ena(vsi->vf))))
2884		ice_vsi_cfg_sw_lldp(vsi, false, false);
2885
2886	ice_vsi_decfg(vsi);
2887
2888	/* retain SW VSI data structure since it is needed to unregister and
2889	 * free VSI netdev when PF is not in reset recovery pending state,\
2890	 * for ex: during rmmod.
2891	 */
2892	if (!ice_is_reset_in_progress(pf->state))
2893		ice_vsi_delete(vsi);
2894
2895	return 0;
2896}
2897
2898/**
2899 * ice_vsi_rebuild_get_coalesce - get coalesce from all q_vectors
2900 * @vsi: VSI connected with q_vectors
2901 * @coalesce: array of struct with stored coalesce
2902 *
2903 * Returns array size.
2904 */
2905static int
2906ice_vsi_rebuild_get_coalesce(struct ice_vsi *vsi,
2907			     struct ice_coalesce_stored *coalesce)
2908{
2909	int i;
2910
2911	ice_for_each_q_vector(vsi, i) {
2912		struct ice_q_vector *q_vector = vsi->q_vectors[i];
2913
2914		coalesce[i].itr_tx = q_vector->tx.itr_settings;
2915		coalesce[i].itr_rx = q_vector->rx.itr_settings;
2916		coalesce[i].intrl = q_vector->intrl;
2917
2918		if (i < vsi->num_txq)
2919			coalesce[i].tx_valid = true;
2920		if (i < vsi->num_rxq)
2921			coalesce[i].rx_valid = true;
2922	}
2923
2924	return vsi->num_q_vectors;
2925}
2926
2927/**
2928 * ice_vsi_rebuild_set_coalesce - set coalesce from earlier saved arrays
2929 * @vsi: VSI connected with q_vectors
2930 * @coalesce: pointer to array of struct with stored coalesce
2931 * @size: size of coalesce array
2932 *
2933 * Before this function, ice_vsi_rebuild_get_coalesce should be called to save
2934 * ITR params in arrays. If size is 0 or coalesce wasn't stored set coalesce
2935 * to default value.
2936 */
2937static void
2938ice_vsi_rebuild_set_coalesce(struct ice_vsi *vsi,
2939			     struct ice_coalesce_stored *coalesce, int size)
2940{
2941	struct ice_ring_container *rc;
2942	int i;
2943
2944	if ((size && !coalesce) || !vsi)
2945		return;
2946
2947	/* There are a couple of cases that have to be handled here:
2948	 *   1. The case where the number of queue vectors stays the same, but
2949	 *      the number of Tx or Rx rings changes (the first for loop)
2950	 *   2. The case where the number of queue vectors increased (the
2951	 *      second for loop)
2952	 */
2953	for (i = 0; i < size && i < vsi->num_q_vectors; i++) {
2954		/* There are 2 cases to handle here and they are the same for
2955		 * both Tx and Rx:
2956		 *   if the entry was valid previously (coalesce[i].[tr]x_valid
2957		 *   and the loop variable is less than the number of rings
2958		 *   allocated, then write the previous values
2959		 *
2960		 *   if the entry was not valid previously, but the number of
2961		 *   rings is less than are allocated (this means the number of
2962		 *   rings increased from previously), then write out the
2963		 *   values in the first element
2964		 *
2965		 *   Also, always write the ITR, even if in ITR_IS_DYNAMIC
2966		 *   as there is no harm because the dynamic algorithm
2967		 *   will just overwrite.
2968		 */
2969		if (i < vsi->alloc_rxq && coalesce[i].rx_valid) {
2970			rc = &vsi->q_vectors[i]->rx;
2971			rc->itr_settings = coalesce[i].itr_rx;
2972			ice_write_itr(rc, rc->itr_setting);
2973		} else if (i < vsi->alloc_rxq) {
2974			rc = &vsi->q_vectors[i]->rx;
2975			rc->itr_settings = coalesce[0].itr_rx;
2976			ice_write_itr(rc, rc->itr_setting);
2977		}
2978
2979		if (i < vsi->alloc_txq && coalesce[i].tx_valid) {
2980			rc = &vsi->q_vectors[i]->tx;
2981			rc->itr_settings = coalesce[i].itr_tx;
2982			ice_write_itr(rc, rc->itr_setting);
2983		} else if (i < vsi->alloc_txq) {
2984			rc = &vsi->q_vectors[i]->tx;
2985			rc->itr_settings = coalesce[0].itr_tx;
2986			ice_write_itr(rc, rc->itr_setting);
2987		}
2988
2989		vsi->q_vectors[i]->intrl = coalesce[i].intrl;
2990		ice_set_q_vector_intrl(vsi->q_vectors[i]);
2991	}
2992
2993	/* the number of queue vectors increased so write whatever is in
2994	 * the first element
2995	 */
2996	for (; i < vsi->num_q_vectors; i++) {
2997		/* transmit */
2998		rc = &vsi->q_vectors[i]->tx;
2999		rc->itr_settings = coalesce[0].itr_tx;
3000		ice_write_itr(rc, rc->itr_setting);
3001
3002		/* receive */
3003		rc = &vsi->q_vectors[i]->rx;
3004		rc->itr_settings = coalesce[0].itr_rx;
3005		ice_write_itr(rc, rc->itr_setting);
3006
3007		vsi->q_vectors[i]->intrl = coalesce[0].intrl;
3008		ice_set_q_vector_intrl(vsi->q_vectors[i]);
3009	}
3010}
3011
3012/**
3013 * ice_vsi_realloc_stat_arrays - Frees unused stat structures or alloc new ones
3014 * @vsi: VSI pointer
3015 */
3016static int
3017ice_vsi_realloc_stat_arrays(struct ice_vsi *vsi)
3018{
3019	u16 req_txq = vsi->req_txq ? vsi->req_txq : vsi->alloc_txq;
3020	u16 req_rxq = vsi->req_rxq ? vsi->req_rxq : vsi->alloc_rxq;
3021	struct ice_ring_stats **tx_ring_stats;
3022	struct ice_ring_stats **rx_ring_stats;
3023	struct ice_vsi_stats *vsi_stat;
3024	struct ice_pf *pf = vsi->back;
3025	u16 prev_txq = vsi->alloc_txq;
3026	u16 prev_rxq = vsi->alloc_rxq;
3027	int i;
3028
3029	vsi_stat = pf->vsi_stats[vsi->idx];
3030
3031	if (req_txq < prev_txq) {
3032		for (i = req_txq; i < prev_txq; i++) {
3033			if (vsi_stat->tx_ring_stats[i]) {
3034				kfree_rcu(vsi_stat->tx_ring_stats[i], rcu);
3035				WRITE_ONCE(vsi_stat->tx_ring_stats[i], NULL);
3036			}
3037		}
3038	}
3039
3040	tx_ring_stats = vsi_stat->tx_ring_stats;
3041	vsi_stat->tx_ring_stats =
3042		krealloc_array(vsi_stat->tx_ring_stats, req_txq,
3043			       sizeof(*vsi_stat->tx_ring_stats),
3044			       GFP_KERNEL | __GFP_ZERO);
3045	if (!vsi_stat->tx_ring_stats) {
3046		vsi_stat->tx_ring_stats = tx_ring_stats;
3047		return -ENOMEM;
3048	}
3049
3050	if (req_rxq < prev_rxq) {
3051		for (i = req_rxq; i < prev_rxq; i++) {
3052			if (vsi_stat->rx_ring_stats[i]) {
3053				kfree_rcu(vsi_stat->rx_ring_stats[i], rcu);
3054				WRITE_ONCE(vsi_stat->rx_ring_stats[i], NULL);
3055			}
3056		}
3057	}
3058
3059	rx_ring_stats = vsi_stat->rx_ring_stats;
3060	vsi_stat->rx_ring_stats =
3061		krealloc_array(vsi_stat->rx_ring_stats, req_rxq,
3062			       sizeof(*vsi_stat->rx_ring_stats),
3063			       GFP_KERNEL | __GFP_ZERO);
3064	if (!vsi_stat->rx_ring_stats) {
3065		vsi_stat->rx_ring_stats = rx_ring_stats;
3066		return -ENOMEM;
3067	}
3068
3069	return 0;
3070}
3071
3072/**
3073 * ice_vsi_rebuild - Rebuild VSI after reset
3074 * @vsi: VSI to be rebuild
3075 * @vsi_flags: flags used for VSI rebuild flow
3076 *
3077 * Set vsi_flags to ICE_VSI_FLAG_INIT to initialize a new VSI, or
3078 * ICE_VSI_FLAG_NO_INIT to rebuild an existing VSI in hardware.
3079 *
3080 * Returns 0 on success and negative value on failure
3081 */
3082int ice_vsi_rebuild(struct ice_vsi *vsi, u32 vsi_flags)
3083{
3084	struct ice_coalesce_stored *coalesce;
3085	int prev_num_q_vectors;
3086	struct ice_pf *pf;
3087	int ret;
3088
3089	if (!vsi)
3090		return -EINVAL;
3091
3092	vsi->flags = vsi_flags;
3093	pf = vsi->back;
3094	if (WARN_ON(vsi->type == ICE_VSI_VF && !vsi->vf))
3095		return -EINVAL;
3096
3097	mutex_lock(&vsi->xdp_state_lock);
3098
3099	ret = ice_vsi_realloc_stat_arrays(vsi);
3100	if (ret)
3101		goto unlock;
3102
3103	ice_vsi_decfg(vsi);
3104	ret = ice_vsi_cfg_def(vsi);
3105	if (ret)
3106		goto unlock;
3107
3108	coalesce = kcalloc(vsi->num_q_vectors,
3109			   sizeof(struct ice_coalesce_stored), GFP_KERNEL);
3110	if (!coalesce) {
3111		ret = -ENOMEM;
3112		goto decfg;
3113	}
3114
3115	prev_num_q_vectors = ice_vsi_rebuild_get_coalesce(vsi, coalesce);
3116
3117	ret = ice_vsi_cfg_tc_lan(pf, vsi);
3118	if (ret) {
3119		if (vsi_flags & ICE_VSI_FLAG_INIT) {
3120			ret = -EIO;
3121			goto free_coalesce;
3122		}
3123
3124		ret = ice_schedule_reset(pf, ICE_RESET_PFR);
3125		goto free_coalesce;
3126	}
3127
3128	ice_vsi_rebuild_set_coalesce(vsi, coalesce, prev_num_q_vectors);
3129	clear_bit(ICE_VSI_REBUILD_PENDING, vsi->state);
3130
3131free_coalesce:
3132	kfree(coalesce);
3133decfg:
3134	if (ret)
3135		ice_vsi_decfg(vsi);
3136unlock:
3137	mutex_unlock(&vsi->xdp_state_lock);
3138	return ret;
3139}
3140
3141/**
3142 * ice_is_reset_in_progress - check for a reset in progress
3143 * @state: PF state field
3144 */
3145bool ice_is_reset_in_progress(unsigned long *state)
3146{
3147	return test_bit(ICE_RESET_OICR_RECV, state) ||
3148	       test_bit(ICE_PFR_REQ, state) ||
3149	       test_bit(ICE_CORER_REQ, state) ||
3150	       test_bit(ICE_GLOBR_REQ, state);
3151}
3152
3153/**
3154 * ice_wait_for_reset - Wait for driver to finish reset and rebuild
3155 * @pf: pointer to the PF structure
3156 * @timeout: length of time to wait, in jiffies
3157 *
3158 * Wait (sleep) for a short time until the driver finishes cleaning up from
3159 * a device reset. The caller must be able to sleep. Use this to delay
3160 * operations that could fail while the driver is cleaning up after a device
3161 * reset.
3162 *
3163 * Returns 0 on success, -EBUSY if the reset is not finished within the
3164 * timeout, and -ERESTARTSYS if the thread was interrupted.
3165 */
3166int ice_wait_for_reset(struct ice_pf *pf, unsigned long timeout)
3167{
3168	long ret;
3169
3170	ret = wait_event_interruptible_timeout(pf->reset_wait_queue,
3171					       !ice_is_reset_in_progress(pf->state),
3172					       timeout);
3173	if (ret < 0)
3174		return ret;
3175	else if (!ret)
3176		return -EBUSY;
3177	else
3178		return 0;
3179}
3180
3181/**
3182 * ice_vsi_update_q_map - update our copy of the VSI info with new queue map
3183 * @vsi: VSI being configured
3184 * @ctx: the context buffer returned from AQ VSI update command
3185 */
3186static void ice_vsi_update_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctx)
3187{
3188	vsi->info.mapping_flags = ctx->info.mapping_flags;
3189	memcpy(&vsi->info.q_mapping, &ctx->info.q_mapping,
3190	       sizeof(vsi->info.q_mapping));
3191	memcpy(&vsi->info.tc_mapping, ctx->info.tc_mapping,
3192	       sizeof(vsi->info.tc_mapping));
3193}
3194
3195/**
3196 * ice_vsi_cfg_netdev_tc - Setup the netdev TC configuration
3197 * @vsi: the VSI being configured
3198 * @ena_tc: TC map to be enabled
3199 */
3200void ice_vsi_cfg_netdev_tc(struct ice_vsi *vsi, u8 ena_tc)
3201{
3202	struct net_device *netdev = vsi->netdev;
3203	struct ice_pf *pf = vsi->back;
3204	int numtc = vsi->tc_cfg.numtc;
3205	struct ice_dcbx_cfg *dcbcfg;
3206	u8 netdev_tc;
3207	int i;
3208
3209	if (!netdev)
3210		return;
3211
3212	/* CHNL VSI doesn't have its own netdev, hence, no netdev_tc */
3213	if (vsi->type == ICE_VSI_CHNL)
3214		return;
3215
3216	if (!ena_tc) {
3217		netdev_reset_tc(netdev);
3218		return;
3219	}
3220
3221	if (vsi->type == ICE_VSI_PF && ice_is_adq_active(pf))
3222		numtc = vsi->all_numtc;
3223
3224	if (netdev_set_num_tc(netdev, numtc))
3225		return;
3226
3227	dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg;
3228
3229	ice_for_each_traffic_class(i)
3230		if (vsi->tc_cfg.ena_tc & BIT(i))
3231			netdev_set_tc_queue(netdev,
3232					    vsi->tc_cfg.tc_info[i].netdev_tc,
3233					    vsi->tc_cfg.tc_info[i].qcount_tx,
3234					    vsi->tc_cfg.tc_info[i].qoffset);
3235	/* setup TC queue map for CHNL TCs */
3236	ice_for_each_chnl_tc(i) {
3237		if (!(vsi->all_enatc & BIT(i)))
3238			break;
3239		if (!vsi->mqprio_qopt.qopt.count[i])
3240			break;
3241		netdev_set_tc_queue(netdev, i,
3242				    vsi->mqprio_qopt.qopt.count[i],
3243				    vsi->mqprio_qopt.qopt.offset[i]);
3244	}
3245
3246	if (test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3247		return;
3248
3249	for (i = 0; i < ICE_MAX_USER_PRIORITY; i++) {
3250		u8 ets_tc = dcbcfg->etscfg.prio_table[i];
3251
3252		/* Get the mapped netdev TC# for the UP */
3253		netdev_tc = vsi->tc_cfg.tc_info[ets_tc].netdev_tc;
3254		netdev_set_prio_tc_map(netdev, i, netdev_tc);
3255	}
3256}
3257
3258/**
3259 * ice_vsi_setup_q_map_mqprio - Prepares mqprio based tc_config
3260 * @vsi: the VSI being configured,
3261 * @ctxt: VSI context structure
3262 * @ena_tc: number of traffic classes to enable
3263 *
3264 * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
3265 */
3266static int
3267ice_vsi_setup_q_map_mqprio(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt,
3268			   u8 ena_tc)
3269{
3270	u16 pow, offset = 0, qcount_tx = 0, qcount_rx = 0, qmap;
3271	u16 tc0_offset = vsi->mqprio_qopt.qopt.offset[0];
3272	int tc0_qcount = vsi->mqprio_qopt.qopt.count[0];
3273	u16 new_txq, new_rxq;
3274	u8 netdev_tc = 0;
3275	int i;
3276
3277	vsi->tc_cfg.ena_tc = ena_tc ? ena_tc : 1;
3278
3279	pow = order_base_2(tc0_qcount);
3280	qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, tc0_offset);
3281	qmap |= FIELD_PREP(ICE_AQ_VSI_TC_Q_NUM_M, pow);
3282
3283	ice_for_each_traffic_class(i) {
3284		if (!(vsi->tc_cfg.ena_tc & BIT(i))) {
3285			/* TC is not enabled */
3286			vsi->tc_cfg.tc_info[i].qoffset = 0;
3287			vsi->tc_cfg.tc_info[i].qcount_rx = 1;
3288			vsi->tc_cfg.tc_info[i].qcount_tx = 1;
3289			vsi->tc_cfg.tc_info[i].netdev_tc = 0;
3290			ctxt->info.tc_mapping[i] = 0;
3291			continue;
3292		}
3293
3294		offset = vsi->mqprio_qopt.qopt.offset[i];
3295		qcount_rx = vsi->mqprio_qopt.qopt.count[i];
3296		qcount_tx = vsi->mqprio_qopt.qopt.count[i];
3297		vsi->tc_cfg.tc_info[i].qoffset = offset;
3298		vsi->tc_cfg.tc_info[i].qcount_rx = qcount_rx;
3299		vsi->tc_cfg.tc_info[i].qcount_tx = qcount_tx;
3300		vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++;
3301	}
3302
3303	if (vsi->all_numtc && vsi->all_numtc != vsi->tc_cfg.numtc) {
3304		ice_for_each_chnl_tc(i) {
3305			if (!(vsi->all_enatc & BIT(i)))
3306				continue;
3307			offset = vsi->mqprio_qopt.qopt.offset[i];
3308			qcount_rx = vsi->mqprio_qopt.qopt.count[i];
3309			qcount_tx = vsi->mqprio_qopt.qopt.count[i];
3310		}
3311	}
3312
3313	new_txq = offset + qcount_tx;
3314	if (new_txq > vsi->alloc_txq) {
3315		dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Tx queues (%u), than were allocated (%u)!\n",
3316			new_txq, vsi->alloc_txq);
3317		return -EINVAL;
3318	}
3319
3320	new_rxq = offset + qcount_rx;
3321	if (new_rxq > vsi->alloc_rxq) {
3322		dev_err(ice_pf_to_dev(vsi->back), "Trying to use more Rx queues (%u), than were allocated (%u)!\n",
3323			new_rxq, vsi->alloc_rxq);
3324		return -EINVAL;
3325	}
3326
3327	/* Set actual Tx/Rx queue pairs */
3328	vsi->num_txq = new_txq;
3329	vsi->num_rxq = new_rxq;
3330
3331	/* Setup queue TC[0].qmap for given VSI context */
3332	ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
3333	ctxt->info.q_mapping[0] = cpu_to_le16(vsi->rxq_map[0]);
3334	ctxt->info.q_mapping[1] = cpu_to_le16(tc0_qcount);
3335
3336	/* Find queue count available for channel VSIs and starting offset
3337	 * for channel VSIs
3338	 */
3339	if (tc0_qcount && tc0_qcount < vsi->num_rxq) {
3340		vsi->cnt_q_avail = vsi->num_rxq - tc0_qcount;
3341		vsi->next_base_q = tc0_qcount;
3342	}
3343	dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_txq = %d\n",  vsi->num_txq);
3344	dev_dbg(ice_pf_to_dev(vsi->back), "vsi->num_rxq = %d\n",  vsi->num_rxq);
3345	dev_dbg(ice_pf_to_dev(vsi->back), "all_numtc %u, all_enatc: 0x%04x, tc_cfg.numtc %u\n",
3346		vsi->all_numtc, vsi->all_enatc, vsi->tc_cfg.numtc);
3347
3348	return 0;
3349}
3350
3351/**
3352 * ice_vsi_cfg_tc - Configure VSI Tx Sched for given TC map
3353 * @vsi: VSI to be configured
3354 * @ena_tc: TC bitmap
3355 *
3356 * VSI queues expected to be quiesced before calling this function
3357 */
3358int ice_vsi_cfg_tc(struct ice_vsi *vsi, u8 ena_tc)
3359{
3360	u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };
3361	struct ice_pf *pf = vsi->back;
3362	struct ice_tc_cfg old_tc_cfg;
3363	struct ice_vsi_ctx *ctx;
3364	struct device *dev;
3365	int i, ret = 0;
3366	u8 num_tc = 0;
3367
3368	dev = ice_pf_to_dev(pf);
3369	if (vsi->tc_cfg.ena_tc == ena_tc &&
3370	    vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
3371		return 0;
3372
3373	ice_for_each_traffic_class(i) {
3374		/* build bitmap of enabled TCs */
3375		if (ena_tc & BIT(i))
3376			num_tc++;
3377		/* populate max_txqs per TC */
3378		max_txqs[i] = vsi->alloc_txq;
3379		/* Update max_txqs if it is CHNL VSI, because alloc_t[r]xq are
3380		 * zero for CHNL VSI, hence use num_txq instead as max_txqs
3381		 */
3382		if (vsi->type == ICE_VSI_CHNL &&
3383		    test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3384			max_txqs[i] = vsi->num_txq;
3385	}
3386
3387	memcpy(&old_tc_cfg, &vsi->tc_cfg, sizeof(old_tc_cfg));
3388	vsi->tc_cfg.ena_tc = ena_tc;
3389	vsi->tc_cfg.numtc = num_tc;
3390
3391	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
3392	if (!ctx)
3393		return -ENOMEM;
3394
3395	ctx->vf_num = 0;
3396	ctx->info = vsi->info;
3397
3398	if (vsi->type == ICE_VSI_PF &&
3399	    test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3400		ret = ice_vsi_setup_q_map_mqprio(vsi, ctx, ena_tc);
3401	else
3402		ret = ice_vsi_setup_q_map(vsi, ctx);
3403
3404	if (ret) {
3405		memcpy(&vsi->tc_cfg, &old_tc_cfg, sizeof(vsi->tc_cfg));
3406		goto out;
3407	}
3408
3409	/* must to indicate which section of VSI context are being modified */
3410	ctx->info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_RXQ_MAP_VALID);
3411	ret = ice_update_vsi(&pf->hw, vsi->idx, ctx, NULL);
3412	if (ret) {
3413		dev_info(dev, "Failed VSI Update\n");
3414		goto out;
3415	}
3416
3417	if (vsi->type == ICE_VSI_PF &&
3418	    test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
3419		ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, 1, max_txqs);
3420	else
3421		ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx,
3422				      vsi->tc_cfg.ena_tc, max_txqs);
3423
3424	if (ret) {
3425		dev_err(dev, "VSI %d failed TC config, error %d\n",
3426			vsi->vsi_num, ret);
3427		goto out;
3428	}
3429	ice_vsi_update_q_map(vsi, ctx);
3430	vsi->info.valid_sections = 0;
3431
3432	ice_vsi_cfg_netdev_tc(vsi, ena_tc);
3433out:
3434	kfree(ctx);
3435	return ret;
3436}
3437
3438/**
3439 * ice_update_ring_stats - Update ring statistics
3440 * @stats: stats to be updated
3441 * @pkts: number of processed packets
3442 * @bytes: number of processed bytes
3443 *
3444 * This function assumes that caller has acquired a u64_stats_sync lock.
3445 */
3446static void ice_update_ring_stats(struct ice_q_stats *stats, u64 pkts, u64 bytes)
3447{
3448	stats->bytes += bytes;
3449	stats->pkts += pkts;
3450}
3451
3452/**
3453 * ice_update_tx_ring_stats - Update Tx ring specific counters
3454 * @tx_ring: ring to update
3455 * @pkts: number of processed packets
3456 * @bytes: number of processed bytes
3457 */
3458void ice_update_tx_ring_stats(struct ice_tx_ring *tx_ring, u64 pkts, u64 bytes)
3459{
3460	u64_stats_update_begin(&tx_ring->ring_stats->syncp);
3461	ice_update_ring_stats(&tx_ring->ring_stats->stats, pkts, bytes);
3462	u64_stats_update_end(&tx_ring->ring_stats->syncp);
3463}
3464
3465/**
3466 * ice_update_rx_ring_stats - Update Rx ring specific counters
3467 * @rx_ring: ring to update
3468 * @pkts: number of processed packets
3469 * @bytes: number of processed bytes
3470 */
3471void ice_update_rx_ring_stats(struct ice_rx_ring *rx_ring, u64 pkts, u64 bytes)
3472{
3473	u64_stats_update_begin(&rx_ring->ring_stats->syncp);
3474	ice_update_ring_stats(&rx_ring->ring_stats->stats, pkts, bytes);
3475	u64_stats_update_end(&rx_ring->ring_stats->syncp);
3476}
3477
3478/**
3479 * ice_is_dflt_vsi_in_use - check if the default forwarding VSI is being used
3480 * @pi: port info of the switch with default VSI
3481 *
3482 * Return true if the there is a single VSI in default forwarding VSI list
3483 */
3484bool ice_is_dflt_vsi_in_use(struct ice_port_info *pi)
3485{
3486	bool exists = false;
3487
3488	ice_check_if_dflt_vsi(pi, 0, &exists);
3489	return exists;
3490}
3491
3492/**
3493 * ice_is_vsi_dflt_vsi - check if the VSI passed in is the default VSI
3494 * @vsi: VSI to compare against default forwarding VSI
3495 *
3496 * If this VSI passed in is the default forwarding VSI then return true, else
3497 * return false
3498 */
3499bool ice_is_vsi_dflt_vsi(struct ice_vsi *vsi)
3500{
3501	return ice_check_if_dflt_vsi(vsi->port_info, vsi->idx, NULL);
3502}
3503
3504/**
3505 * ice_set_dflt_vsi - set the default forwarding VSI
3506 * @vsi: VSI getting set as the default forwarding VSI on the switch
3507 *
3508 * If the VSI passed in is already the default VSI and it's enabled just return
3509 * success.
3510 *
3511 * Otherwise try to set the VSI passed in as the switch's default VSI and
3512 * return the result.
3513 */
3514int ice_set_dflt_vsi(struct ice_vsi *vsi)
3515{
3516	struct device *dev;
3517	int status;
3518
3519	if (!vsi)
3520		return -EINVAL;
3521
3522	dev = ice_pf_to_dev(vsi->back);
3523
3524	if (ice_lag_is_switchdev_running(vsi->back)) {
3525		dev_dbg(dev, "VSI %d passed is a part of LAG containing interfaces in switchdev mode, nothing to do\n",
3526			vsi->vsi_num);
3527		return 0;
3528	}
3529
3530	/* the VSI passed in is already the default VSI */
3531	if (ice_is_vsi_dflt_vsi(vsi)) {
3532		dev_dbg(dev, "VSI %d passed in is already the default forwarding VSI, nothing to do\n",
3533			vsi->vsi_num);
3534		return 0;
3535	}
3536
3537	status = ice_cfg_dflt_vsi(vsi->port_info, vsi->idx, true, ICE_FLTR_RX);
3538	if (status) {
3539		dev_err(dev, "Failed to set VSI %d as the default forwarding VSI, error %d\n",
3540			vsi->vsi_num, status);
3541		return status;
3542	}
3543
3544	return 0;
3545}
3546
3547/**
3548 * ice_clear_dflt_vsi - clear the default forwarding VSI
3549 * @vsi: VSI to remove from filter list
3550 *
3551 * If the switch has no default VSI or it's not enabled then return error.
3552 *
3553 * Otherwise try to clear the default VSI and return the result.
3554 */
3555int ice_clear_dflt_vsi(struct ice_vsi *vsi)
3556{
3557	struct device *dev;
3558	int status;
3559
3560	if (!vsi)
3561		return -EINVAL;
3562
3563	dev = ice_pf_to_dev(vsi->back);
3564
3565	/* there is no default VSI configured */
3566	if (!ice_is_dflt_vsi_in_use(vsi->port_info))
3567		return -ENODEV;
3568
3569	status = ice_cfg_dflt_vsi(vsi->port_info, vsi->idx, false,
3570				  ICE_FLTR_RX);
3571	if (status) {
3572		dev_err(dev, "Failed to clear the default forwarding VSI %d, error %d\n",
3573			vsi->vsi_num, status);
3574		return -EIO;
3575	}
3576
3577	return 0;
3578}
3579
3580/**
3581 * ice_get_link_speed_mbps - get link speed in Mbps
3582 * @vsi: the VSI whose link speed is being queried
3583 *
3584 * Return current VSI link speed and 0 if the speed is unknown.
3585 */
3586int ice_get_link_speed_mbps(struct ice_vsi *vsi)
3587{
3588	unsigned int link_speed;
3589
3590	link_speed = vsi->port_info->phy.link_info.link_speed;
3591
3592	return (int)ice_get_link_speed(fls(link_speed) - 1);
3593}
3594
3595/**
3596 * ice_get_link_speed_kbps - get link speed in Kbps
3597 * @vsi: the VSI whose link speed is being queried
3598 *
3599 * Return current VSI link speed and 0 if the speed is unknown.
3600 */
3601int ice_get_link_speed_kbps(struct ice_vsi *vsi)
3602{
3603	int speed_mbps;
3604
3605	speed_mbps = ice_get_link_speed_mbps(vsi);
3606
3607	return speed_mbps * 1000;
3608}
3609
3610/**
3611 * ice_set_min_bw_limit - setup minimum BW limit for Tx based on min_tx_rate
3612 * @vsi: VSI to be configured
3613 * @min_tx_rate: min Tx rate in Kbps to be configured as BW limit
3614 *
3615 * If the min_tx_rate is specified as 0 that means to clear the minimum BW limit
3616 * profile, otherwise a non-zero value will force a minimum BW limit for the VSI
3617 * on TC 0.
3618 */
3619int ice_set_min_bw_limit(struct ice_vsi *vsi, u64 min_tx_rate)
3620{
3621	struct ice_pf *pf = vsi->back;
3622	struct device *dev;
3623	int status;
3624	int speed;
3625
3626	dev = ice_pf_to_dev(pf);
3627	if (!vsi->port_info) {
3628		dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n",
3629			vsi->idx, vsi->type);
3630		return -EINVAL;
3631	}
3632
3633	speed = ice_get_link_speed_kbps(vsi);
3634	if (min_tx_rate > (u64)speed) {
3635		dev_err(dev, "invalid min Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n",
3636			min_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx,
3637			speed);
3638		return -EINVAL;
3639	}
3640
3641	/* Configure min BW for VSI limit */
3642	if (min_tx_rate) {
3643		status = ice_cfg_vsi_bw_lmt_per_tc(vsi->port_info, vsi->idx, 0,
3644						   ICE_MIN_BW, min_tx_rate);
3645		if (status) {
3646			dev_err(dev, "failed to set min Tx rate(%llu Kbps) for %s %d\n",
3647				min_tx_rate, ice_vsi_type_str(vsi->type),
3648				vsi->idx);
3649			return status;
3650		}
3651
3652		dev_dbg(dev, "set min Tx rate(%llu Kbps) for %s\n",
3653			min_tx_rate, ice_vsi_type_str(vsi->type));
3654	} else {
3655		status = ice_cfg_vsi_bw_dflt_lmt_per_tc(vsi->port_info,
3656							vsi->idx, 0,
3657							ICE_MIN_BW);
3658		if (status) {
3659			dev_err(dev, "failed to clear min Tx rate configuration for %s %d\n",
3660				ice_vsi_type_str(vsi->type), vsi->idx);
3661			return status;
3662		}
3663
3664		dev_dbg(dev, "cleared min Tx rate configuration for %s %d\n",
3665			ice_vsi_type_str(vsi->type), vsi->idx);
3666	}
3667
3668	return 0;
3669}
3670
3671/**
3672 * ice_set_max_bw_limit - setup maximum BW limit for Tx based on max_tx_rate
3673 * @vsi: VSI to be configured
3674 * @max_tx_rate: max Tx rate in Kbps to be configured as BW limit
3675 *
3676 * If the max_tx_rate is specified as 0 that means to clear the maximum BW limit
3677 * profile, otherwise a non-zero value will force a maximum BW limit for the VSI
3678 * on TC 0.
3679 */
3680int ice_set_max_bw_limit(struct ice_vsi *vsi, u64 max_tx_rate)
3681{
3682	struct ice_pf *pf = vsi->back;
3683	struct device *dev;
3684	int status;
3685	int speed;
3686
3687	dev = ice_pf_to_dev(pf);
3688	if (!vsi->port_info) {
3689		dev_dbg(dev, "VSI %d, type %u specified doesn't have valid port_info\n",
3690			vsi->idx, vsi->type);
3691		return -EINVAL;
3692	}
3693
3694	speed = ice_get_link_speed_kbps(vsi);
3695	if (max_tx_rate > (u64)speed) {
3696		dev_err(dev, "invalid max Tx rate %llu Kbps specified for %s %d is greater than current link speed %u Kbps\n",
3697			max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx,
3698			speed);
3699		return -EINVAL;
3700	}
3701
3702	/* Configure max BW for VSI limit */
3703	if (max_tx_rate) {
3704		status = ice_cfg_vsi_bw_lmt_per_tc(vsi->port_info, vsi->idx, 0,
3705						   ICE_MAX_BW, max_tx_rate);
3706		if (status) {
3707			dev_err(dev, "failed setting max Tx rate(%llu Kbps) for %s %d\n",
3708				max_tx_rate, ice_vsi_type_str(vsi->type),
3709				vsi->idx);
3710			return status;
3711		}
3712
3713		dev_dbg(dev, "set max Tx rate(%llu Kbps) for %s %d\n",
3714			max_tx_rate, ice_vsi_type_str(vsi->type), vsi->idx);
3715	} else {
3716		status = ice_cfg_vsi_bw_dflt_lmt_per_tc(vsi->port_info,
3717							vsi->idx, 0,
3718							ICE_MAX_BW);
3719		if (status) {
3720			dev_err(dev, "failed clearing max Tx rate configuration for %s %d\n",
3721				ice_vsi_type_str(vsi->type), vsi->idx);
3722			return status;
3723		}
3724
3725		dev_dbg(dev, "cleared max Tx rate configuration for %s %d\n",
3726			ice_vsi_type_str(vsi->type), vsi->idx);
3727	}
3728
3729	return 0;
3730}
3731
3732/**
3733 * ice_set_link - turn on/off physical link
3734 * @vsi: VSI to modify physical link on
3735 * @ena: turn on/off physical link
3736 */
3737int ice_set_link(struct ice_vsi *vsi, bool ena)
3738{
3739	struct device *dev = ice_pf_to_dev(vsi->back);
3740	struct ice_port_info *pi = vsi->port_info;
3741	struct ice_hw *hw = pi->hw;
3742	int status;
3743
3744	if (vsi->type != ICE_VSI_PF)
3745		return -EINVAL;
3746
3747	status = ice_aq_set_link_restart_an(pi, ena, NULL);
3748
3749	/* if link is owned by manageability, FW will return LIBIE_AQ_RC_EMODE.
3750	 * this is not a fatal error, so print a warning message and return
3751	 * a success code. Return an error if FW returns an error code other
3752	 * than LIBIE_AQ_RC_EMODE
3753	 */
3754	if (status == -EIO) {
3755		if (hw->adminq.sq_last_status == LIBIE_AQ_RC_EMODE)
3756			dev_dbg(dev, "can't set link to %s, err %d aq_err %s. not fatal, continuing\n",
3757				(ena ? "ON" : "OFF"), status,
3758				libie_aq_str(hw->adminq.sq_last_status));
3759	} else if (status) {
3760		dev_err(dev, "can't set link to %s, err %d aq_err %s\n",
3761			(ena ? "ON" : "OFF"), status,
3762			libie_aq_str(hw->adminq.sq_last_status));
3763		return status;
3764	}
3765
3766	return 0;
3767}
3768
3769/**
3770 * ice_vsi_add_vlan_zero - add VLAN 0 filter(s) for this VSI
3771 * @vsi: VSI used to add VLAN filters
3772 *
3773 * In Single VLAN Mode (SVM), single VLAN filters via ICE_SW_LKUP_VLAN are based
3774 * on the inner VLAN ID, so the VLAN TPID (i.e. 0x8100 or 0x888a8) doesn't
3775 * matter. In Double VLAN Mode (DVM), outer/single VLAN filters via
3776 * ICE_SW_LKUP_VLAN are based on the outer/single VLAN ID + VLAN TPID.
3777 *
3778 * For both modes add a VLAN 0 + no VLAN TPID filter to handle untagged traffic
3779 * when VLAN pruning is enabled. Also, this handles VLAN 0 priority tagged
3780 * traffic in SVM, since the VLAN TPID isn't part of filtering.
3781 *
3782 * If DVM is enabled then an explicit VLAN 0 + VLAN TPID filter needs to be
3783 * added to allow VLAN 0 priority tagged traffic in DVM, since the VLAN TPID is
3784 * part of filtering.
3785 */
3786int ice_vsi_add_vlan_zero(struct ice_vsi *vsi)
3787{
3788	struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi);
3789	struct ice_vlan vlan;
3790	int err;
3791
3792	vlan = ICE_VLAN(0, 0, 0);
3793	err = vlan_ops->add_vlan(vsi, &vlan);
3794	if (err && err != -EEXIST)
3795		return err;
3796
3797	/* in SVM both VLAN 0 filters are identical */
3798	if (!ice_is_dvm_ena(&vsi->back->hw))
3799		return 0;
3800
3801	vlan = ICE_VLAN(ETH_P_8021Q, 0, 0);
3802	err = vlan_ops->add_vlan(vsi, &vlan);
3803	if (err && err != -EEXIST)
3804		return err;
3805
3806	return 0;
3807}
3808
3809/**
3810 * ice_vsi_del_vlan_zero - delete VLAN 0 filter(s) for this VSI
3811 * @vsi: VSI used to add VLAN filters
3812 *
3813 * Delete the VLAN 0 filters in the same manner that they were added in
3814 * ice_vsi_add_vlan_zero.
3815 */
3816int ice_vsi_del_vlan_zero(struct ice_vsi *vsi)
3817{
3818	struct ice_vsi_vlan_ops *vlan_ops = ice_get_compat_vsi_vlan_ops(vsi);
3819	struct ice_pf *pf = vsi->back;
3820	struct ice_vlan vlan;
3821	int err;
3822
3823	if (pf->lag && pf->lag->primary) {
3824		dev_dbg(ice_pf_to_dev(pf), "Interface is primary in aggregate - not deleting prune list\n");
3825	} else {
3826		vlan = ICE_VLAN(0, 0, 0);
3827		err = vlan_ops->del_vlan(vsi, &vlan);
3828		if (err && err != -EEXIST)
3829			return err;
3830	}
3831
3832	/* in SVM both VLAN 0 filters are identical */
3833	if (!ice_is_dvm_ena(&vsi->back->hw))
3834		return 0;
3835
3836	if (pf->lag && pf->lag->primary) {
3837		dev_dbg(ice_pf_to_dev(pf), "Interface is primary in aggregate - not deleting QinQ prune list\n");
3838	} else {
3839		vlan = ICE_VLAN(ETH_P_8021Q, 0, 0);
3840		err = vlan_ops->del_vlan(vsi, &vlan);
3841		if (err && err != -EEXIST)
3842			return err;
3843	}
3844
3845	/* when deleting the last VLAN filter, make sure to disable the VLAN
3846	 * promisc mode so the filter isn't left by accident
3847	 */
3848	return ice_clear_vsi_promisc(&vsi->back->hw, vsi->idx,
3849				    ICE_MCAST_VLAN_PROMISC_BITS, 0);
3850}
3851
3852/**
3853 * ice_vsi_num_zero_vlans - get number of VLAN 0 filters based on VLAN mode
3854 * @vsi: VSI used to get the VLAN mode
3855 *
3856 * If DVM is enabled then 2 VLAN 0 filters are added, else if SVM is enabled
3857 * then 1 VLAN 0 filter is added. See ice_vsi_add_vlan_zero for more details.
3858 */
3859static u16 ice_vsi_num_zero_vlans(struct ice_vsi *vsi)
3860{
3861#define ICE_DVM_NUM_ZERO_VLAN_FLTRS	2
3862#define ICE_SVM_NUM_ZERO_VLAN_FLTRS	1
3863	/* no VLAN 0 filter is created when a port VLAN is active */
3864	if (vsi->type == ICE_VSI_VF) {
3865		if (WARN_ON(!vsi->vf))
3866			return 0;
3867
3868		if (ice_vf_is_port_vlan_ena(vsi->vf))
3869			return 0;
3870	}
3871
3872	if (ice_is_dvm_ena(&vsi->back->hw))
3873		return ICE_DVM_NUM_ZERO_VLAN_FLTRS;
3874	else
3875		return ICE_SVM_NUM_ZERO_VLAN_FLTRS;
3876}
3877
3878/**
3879 * ice_vsi_has_non_zero_vlans - check if VSI has any non-zero VLANs
3880 * @vsi: VSI used to determine if any non-zero VLANs have been added
3881 */
3882bool ice_vsi_has_non_zero_vlans(struct ice_vsi *vsi)
3883{
3884	return (vsi->num_vlan > ice_vsi_num_zero_vlans(vsi));
3885}
3886
3887/**
3888 * ice_vsi_num_non_zero_vlans - get the number of non-zero VLANs for this VSI
3889 * @vsi: VSI used to get the number of non-zero VLANs added
3890 */
3891u16 ice_vsi_num_non_zero_vlans(struct ice_vsi *vsi)
3892{
3893	return (vsi->num_vlan - ice_vsi_num_zero_vlans(vsi));
3894}
3895
3896/**
3897 * ice_is_feature_supported
3898 * @pf: pointer to the struct ice_pf instance
3899 * @f: feature enum to be checked
3900 *
3901 * returns true if feature is supported, false otherwise
3902 */
3903bool ice_is_feature_supported(struct ice_pf *pf, enum ice_feature f)
3904{
3905	if (f < 0 || f >= ICE_F_MAX)
3906		return false;
3907
3908	return test_bit(f, pf->features);
3909}
3910
3911/**
3912 * ice_set_feature_support
3913 * @pf: pointer to the struct ice_pf instance
3914 * @f: feature enum to set
3915 */
3916void ice_set_feature_support(struct ice_pf *pf, enum ice_feature f)
3917{
3918	if (f < 0 || f >= ICE_F_MAX)
3919		return;
3920
3921	set_bit(f, pf->features);
3922}
3923
3924/**
3925 * ice_clear_feature_support
3926 * @pf: pointer to the struct ice_pf instance
3927 * @f: feature enum to clear
3928 */
3929void ice_clear_feature_support(struct ice_pf *pf, enum ice_feature f)
3930{
3931	if (f < 0 || f >= ICE_F_MAX)
3932		return;
3933
3934	clear_bit(f, pf->features);
3935}
3936
3937/**
3938 * ice_init_feature_support
3939 * @pf: pointer to the struct ice_pf instance
3940 *
3941 * called during init to setup supported feature
3942 */
3943void ice_init_feature_support(struct ice_pf *pf)
3944{
3945	switch (pf->hw.device_id) {
3946	case ICE_DEV_ID_E810C_BACKPLANE:
3947	case ICE_DEV_ID_E810C_QSFP:
3948	case ICE_DEV_ID_E810C_SFP:
3949	case ICE_DEV_ID_E810_XXV_BACKPLANE:
3950	case ICE_DEV_ID_E810_XXV_QSFP:
3951	case ICE_DEV_ID_E810_XXV_SFP:
3952		ice_set_feature_support(pf, ICE_F_DSCP);
3953		if (ice_is_phy_rclk_in_netlist(&pf->hw))
3954			ice_set_feature_support(pf, ICE_F_PHY_RCLK);
3955		/* If we don't own the timer - don't enable other caps */
3956		if (!ice_pf_src_tmr_owned(pf))
3957			break;
3958		if (ice_is_cgu_in_netlist(&pf->hw))
3959			ice_set_feature_support(pf, ICE_F_CGU);
3960		if (ice_is_clock_mux_in_netlist(&pf->hw))
3961			ice_set_feature_support(pf, ICE_F_SMA_CTRL);
3962		if (ice_gnss_is_module_present(&pf->hw))
3963			ice_set_feature_support(pf, ICE_F_GNSS);
3964		break;
3965	default:
3966		break;
3967	}
3968
3969	if (pf->hw.mac_type == ICE_MAC_E830) {
3970		ice_set_feature_support(pf, ICE_F_MBX_LIMIT);
3971		ice_set_feature_support(pf, ICE_F_GCS);
3972		ice_set_feature_support(pf, ICE_F_TXTIME);
3973	}
3974}
3975
3976/**
3977 * ice_vsi_update_security - update security block in VSI
3978 * @vsi: pointer to VSI structure
3979 * @fill: function pointer to fill ctx
3980 */
3981int
3982ice_vsi_update_security(struct ice_vsi *vsi, void (*fill)(struct ice_vsi_ctx *))
3983{
3984	struct ice_vsi_ctx ctx = { 0 };
3985
3986	ctx.info = vsi->info;
3987	ctx.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SECURITY_VALID);
3988	fill(&ctx);
3989
3990	if (ice_update_vsi(&vsi->back->hw, vsi->idx, &ctx, NULL))
3991		return -ENODEV;
3992
3993	vsi->info = ctx.info;
3994	return 0;
3995}
3996
3997/**
3998 * ice_vsi_ctx_set_antispoof - set antispoof function in VSI ctx
3999 * @ctx: pointer to VSI ctx structure
4000 */
4001void ice_vsi_ctx_set_antispoof(struct ice_vsi_ctx *ctx)
4002{
4003	ctx->info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF |
4004			       (ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
4005				ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S);
4006}
4007
4008/**
4009 * ice_vsi_ctx_clear_antispoof - clear antispoof function in VSI ctx
4010 * @ctx: pointer to VSI ctx structure
4011 */
4012void ice_vsi_ctx_clear_antispoof(struct ice_vsi_ctx *ctx)
4013{
4014	ctx->info.sec_flags &= ~ICE_AQ_VSI_SEC_FLAG_ENA_MAC_ANTI_SPOOF &
4015			       ~(ICE_AQ_VSI_SEC_TX_VLAN_PRUNE_ENA <<
4016				 ICE_AQ_VSI_SEC_TX_PRUNE_ENA_S);
4017}
4018
4019/**
4020 * ice_vsi_update_local_lb - update sw block in VSI with local loopback bit
4021 * @vsi: pointer to VSI structure
4022 * @set: set or unset the bit
4023 */
4024int
4025ice_vsi_update_local_lb(struct ice_vsi *vsi, bool set)
4026{
4027	struct ice_vsi_ctx ctx = {
4028		.info	= vsi->info,
4029	};
4030
4031	ctx.info.valid_sections = cpu_to_le16(ICE_AQ_VSI_PROP_SW_VALID);
4032	if (set)
4033		ctx.info.sw_flags |= ICE_AQ_VSI_SW_FLAG_LOCAL_LB;
4034	else
4035		ctx.info.sw_flags &= ~ICE_AQ_VSI_SW_FLAG_LOCAL_LB;
4036
4037	if (ice_update_vsi(&vsi->back->hw, vsi->idx, &ctx, NULL))
4038		return -ENODEV;
4039
4040	vsi->info = ctx.info;
4041	return 0;
4042}
4043
4044/**
4045 * ice_vsi_update_l2tsel - update l2tsel field for all Rx rings on this VSI
4046 * @vsi: VSI used to update l2tsel on
4047 * @l2tsel: l2tsel setting requested
4048 *
4049 * Use the l2tsel setting to update all of the Rx queue context bits for l2tsel.
4050 * This will modify which descriptor field the first offloaded VLAN will be
4051 * stripped into.
4052 */
4053void ice_vsi_update_l2tsel(struct ice_vsi *vsi, enum ice_l2tsel l2tsel)
4054{
4055	struct ice_hw *hw = &vsi->back->hw;
4056	u32 l2tsel_bit;
4057	int i;
4058
4059	if (l2tsel == ICE_L2TSEL_EXTRACT_FIRST_TAG_L2TAG2_2ND)
4060		l2tsel_bit = 0;
4061	else
4062		l2tsel_bit = BIT(ICE_L2TSEL_BIT_OFFSET);
4063
4064	for (i = 0; i < vsi->alloc_rxq; i++) {
4065		u16 pfq = vsi->rxq_map[i];
4066		u32 qrx_context_offset;
4067		u32 regval;
4068
4069		qrx_context_offset =
4070			QRX_CONTEXT(ICE_L2TSEL_QRX_CONTEXT_REG_IDX, pfq);
4071
4072		regval = rd32(hw, qrx_context_offset);
4073		regval &= ~BIT(ICE_L2TSEL_BIT_OFFSET);
4074		regval |= l2tsel_bit;
4075		wr32(hw, qrx_context_offset, regval);
4076	}
4077}