rgmii.c

  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * drivers/net/ethernet/ibm/emac/rgmii.c
  4 *
  5 * Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support.
  6 *
  7 * Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
  8 *                <benh@kernel.crashing.org>
  9 *
 10 * Based on the arch/ppc version of the driver:
 11 *
 12 * Copyright (c) 2004, 2005 Zultys Technologies.
 13 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
 14 *
 15 * Based on original work by
 16 * 	Matt Porter <mporter@kernel.crashing.org>
 17 * 	Copyright 2004 MontaVista Software, Inc.
 18 */
 19#include <linux/slab.h>
 20#include <linux/kernel.h>
 21#include <linux/ethtool.h>
 22#include <linux/of.h>
 23#include <linux/of_address.h>
 24#include <linux/platform_device.h>
 25#include <asm/io.h>
 26
 27#include "emac.h"
 28#include "debug.h"
 29
 30// XXX FIXME: Axon seems to support a subset of the RGMII, we
 31// thus need to take that into account and possibly change some
 32// of the bit settings below that don't seem to quite match the
 33// AXON spec
 34
 35/* RGMIIx_FER */
 36#define RGMII_FER_MASK(idx)	(0x7 << ((idx) * 4))
 37#define RGMII_FER_RTBI(idx)	(0x4 << ((idx) * 4))
 38#define RGMII_FER_RGMII(idx)	(0x5 << ((idx) * 4))
 39#define RGMII_FER_TBI(idx)	(0x6 << ((idx) * 4))
 40#define RGMII_FER_GMII(idx)	(0x7 << ((idx) * 4))
 41#define RGMII_FER_MII(idx)	RGMII_FER_GMII(idx)
 42
 43/* RGMIIx_SSR */
 44#define RGMII_SSR_MASK(idx)	(0x7 << ((idx) * 8))
 45#define RGMII_SSR_10(idx)	(0x1 << ((idx) * 8))
 46#define RGMII_SSR_100(idx)	(0x2 << ((idx) * 8))
 47#define RGMII_SSR_1000(idx)	(0x4 << ((idx) * 8))
 48
 49/* RGMII bridge supports only GMII/TBI and RGMII/RTBI PHYs */
 50static inline int rgmii_valid_mode(int phy_mode)
 51{
 52	return  phy_interface_mode_is_rgmii(phy_mode) ||
 53		phy_mode == PHY_INTERFACE_MODE_GMII ||
 54		phy_mode == PHY_INTERFACE_MODE_MII ||
 55		phy_mode == PHY_INTERFACE_MODE_TBI ||
 56		phy_mode == PHY_INTERFACE_MODE_RTBI;
 57}
 58
 59static inline u32 rgmii_mode_mask(int mode, int input)
 60{
 61	switch (mode) {
 62	case PHY_INTERFACE_MODE_RGMII:
 63	case PHY_INTERFACE_MODE_RGMII_ID:
 64	case PHY_INTERFACE_MODE_RGMII_RXID:
 65	case PHY_INTERFACE_MODE_RGMII_TXID:
 66		return RGMII_FER_RGMII(input);
 67	case PHY_INTERFACE_MODE_TBI:
 68		return RGMII_FER_TBI(input);
 69	case PHY_INTERFACE_MODE_GMII:
 70		return RGMII_FER_GMII(input);
 71	case PHY_INTERFACE_MODE_MII:
 72		return RGMII_FER_MII(input);
 73	case PHY_INTERFACE_MODE_RTBI:
 74		return RGMII_FER_RTBI(input);
 75	default:
 76		BUG();
 77	}
 78}
 79
 80int rgmii_attach(struct platform_device *ofdev, int input, int mode)
 81{
 82	struct rgmii_instance *dev = platform_get_drvdata(ofdev);
 83	struct rgmii_regs __iomem *p = dev->base;
 84
 85	RGMII_DBG(dev, "attach(%d)" NL, input);
 86
 87	/* Check if we need to attach to a RGMII */
 88	if (input < 0 || !rgmii_valid_mode(mode)) {
 89		printk(KERN_ERR "%pOF: unsupported settings !\n",
 90		       ofdev->dev.of_node);
 91		return -ENODEV;
 92	}
 93
 94	mutex_lock(&dev->lock);
 95
 96	/* Enable this input */
 97	out_be32(&p->fer, in_be32(&p->fer) | rgmii_mode_mask(mode, input));
 98
 99	printk(KERN_NOTICE "%pOF: input %d in %s mode\n",
100	       ofdev->dev.of_node, input, phy_modes(mode));
101
102	++dev->users;
103
104	mutex_unlock(&dev->lock);
105
106	return 0;
107}
108
109void rgmii_set_speed(struct platform_device *ofdev, int input, int speed)
110{
111	struct rgmii_instance *dev = platform_get_drvdata(ofdev);
112	struct rgmii_regs __iomem *p = dev->base;
113	u32 ssr;
114
115	mutex_lock(&dev->lock);
116
117	ssr = in_be32(&p->ssr) & ~RGMII_SSR_MASK(input);
118
119	RGMII_DBG(dev, "speed(%d, %d)" NL, input, speed);
120
121	if (speed == SPEED_1000)
122		ssr |= RGMII_SSR_1000(input);
123	else if (speed == SPEED_100)
124		ssr |= RGMII_SSR_100(input);
125	else if (speed == SPEED_10)
126		ssr |= RGMII_SSR_10(input);
127
128	out_be32(&p->ssr, ssr);
129
130	mutex_unlock(&dev->lock);
131}
132
133void rgmii_get_mdio(struct platform_device *ofdev, int input)
134{
135	struct rgmii_instance *dev = platform_get_drvdata(ofdev);
136	struct rgmii_regs __iomem *p = dev->base;
137	u32 fer;
138
139	RGMII_DBG2(dev, "get_mdio(%d)" NL, input);
140
141	if (!(dev->flags & EMAC_RGMII_FLAG_HAS_MDIO))
142		return;
143
144	mutex_lock(&dev->lock);
145
146	fer = in_be32(&p->fer);
147	fer |= 0x00080000u >> input;
148	out_be32(&p->fer, fer);
149	(void)in_be32(&p->fer);
150
151	DBG2(dev, " fer = 0x%08x\n", fer);
152}
153
154void rgmii_put_mdio(struct platform_device *ofdev, int input)
155{
156	struct rgmii_instance *dev = platform_get_drvdata(ofdev);
157	struct rgmii_regs __iomem *p = dev->base;
158	u32 fer;
159
160	RGMII_DBG2(dev, "put_mdio(%d)" NL, input);
161
162	if (!(dev->flags & EMAC_RGMII_FLAG_HAS_MDIO))
163		return;
164
165	fer = in_be32(&p->fer);
166	fer &= ~(0x00080000u >> input);
167	out_be32(&p->fer, fer);
168	(void)in_be32(&p->fer);
169
170	DBG2(dev, " fer = 0x%08x\n", fer);
171
172	mutex_unlock(&dev->lock);
173}
174
175void rgmii_detach(struct platform_device *ofdev, int input)
176{
177	struct rgmii_instance *dev = platform_get_drvdata(ofdev);
178	struct rgmii_regs __iomem *p;
179
180	BUG_ON(!dev || dev->users == 0);
181	p = dev->base;
182
183	mutex_lock(&dev->lock);
184
185	RGMII_DBG(dev, "detach(%d)" NL, input);
186
187	/* Disable this input */
188	out_be32(&p->fer, in_be32(&p->fer) & ~RGMII_FER_MASK(input));
189
190	--dev->users;
191
192	mutex_unlock(&dev->lock);
193}
194
195int rgmii_get_regs_len(struct platform_device *ofdev)
196{
197	return sizeof(struct emac_ethtool_regs_subhdr) +
198		sizeof(struct rgmii_regs);
199}
200
201void *rgmii_dump_regs(struct platform_device *ofdev, void *buf)
202{
203	struct rgmii_instance *dev = platform_get_drvdata(ofdev);
204	struct emac_ethtool_regs_subhdr *hdr = buf;
205	struct rgmii_regs *regs = (struct rgmii_regs *)(hdr + 1);
206
207	hdr->version = 0;
208	hdr->index = 0; /* for now, are there chips with more than one
209			 * rgmii ? if yes, then we'll add a cell_index
210			 * like we do for emac
211			 */
212	memcpy_fromio(regs, dev->base, sizeof(struct rgmii_regs));
213	return regs + 1;
214}
215
216
217static int rgmii_probe(struct platform_device *ofdev)
218{
219	struct rgmii_instance *dev;
220	int err;
221
222	dev = devm_kzalloc(&ofdev->dev, sizeof(struct rgmii_instance),
223			   GFP_KERNEL);
224	if (!dev)
225		return -ENOMEM;
226
227	err = devm_mutex_init(&ofdev->dev, &dev->lock);
228	if (err)
229		return err;
230
231	dev->ofdev = ofdev;
232
233	dev->base = devm_platform_ioremap_resource(ofdev, 0);
234	if (IS_ERR(dev->base)) {
235		dev_err(&ofdev->dev, "can't map device registers");
236		return PTR_ERR(dev->base);
237	}
238
239	/* Check for RGMII flags */
240	if (of_property_read_bool(ofdev->dev.of_node, "has-mdio"))
241		dev->flags |= EMAC_RGMII_FLAG_HAS_MDIO;
242
243	/* CAB lacks the right properties, fix this up */
244	if (of_device_is_compatible(ofdev->dev.of_node, "ibm,rgmii-axon"))
245		dev->flags |= EMAC_RGMII_FLAG_HAS_MDIO;
246
247	DBG2(dev, " Boot FER = 0x%08x, SSR = 0x%08x\n",
248	     in_be32(&dev->base->fer), in_be32(&dev->base->ssr));
249
250	/* Disable all inputs by default */
251	out_be32(&dev->base->fer, 0);
252
253	printk(KERN_INFO
254	       "RGMII %pOF initialized with%s MDIO support\n",
255	       ofdev->dev.of_node,
256	       (dev->flags & EMAC_RGMII_FLAG_HAS_MDIO) ? "" : "out");
257
258	wmb();
259	platform_set_drvdata(ofdev, dev);
260
261	return 0;
262}
263
264static const struct of_device_id rgmii_match[] =
265{
266	{
267		.compatible	= "ibm,rgmii",
268	},
269	{
270		.type		= "emac-rgmii",
271	},
272	{},
273};
274
275static struct platform_driver rgmii_driver = {
276	.driver = {
277		.name = "emac-rgmii",
278		.of_match_table = rgmii_match,
279	},
280	.probe = rgmii_probe,
281};
282
283int __init rgmii_init(void)
284{
285	return platform_driver_register(&rgmii_driver);
286}
287
288void rgmii_exit(void)
289{
290	platform_driver_unregister(&rgmii_driver);
291}