enetc_pf_common.c

  1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
  2/* Copyright 2024 NXP */
  3
  4#include <linux/fsl/enetc_mdio.h>
  5#include <linux/of_mdio.h>
  6#include <linux/of_net.h>
  7
  8#include "enetc_pf_common.h"
  9
 10static void enetc_set_si_hw_addr(struct enetc_pf *pf, int si,
 11				 const u8 *mac_addr)
 12{
 13	struct enetc_hw *hw = &pf->si->hw;
 14
 15	pf->ops->set_si_primary_mac(hw, si, mac_addr);
 16}
 17
 18static void enetc_get_si_hw_addr(struct enetc_pf *pf, int si, u8 *mac_addr)
 19{
 20	struct enetc_hw *hw = &pf->si->hw;
 21
 22	pf->ops->get_si_primary_mac(hw, si, mac_addr);
 23}
 24
 25int enetc_pf_set_mac_addr(struct net_device *ndev, void *addr)
 26{
 27	struct enetc_ndev_priv *priv = netdev_priv(ndev);
 28	struct enetc_pf *pf = enetc_si_priv(priv->si);
 29	struct sockaddr *saddr = addr;
 30
 31	if (!is_valid_ether_addr(saddr->sa_data))
 32		return -EADDRNOTAVAIL;
 33
 34	eth_hw_addr_set(ndev, saddr->sa_data);
 35	enetc_set_si_hw_addr(pf, 0, saddr->sa_data);
 36
 37	return 0;
 38}
 39EXPORT_SYMBOL_GPL(enetc_pf_set_mac_addr);
 40
 41static int enetc_setup_mac_address(struct device_node *np, struct enetc_pf *pf,
 42				   int si)
 43{
 44	struct device *dev = &pf->si->pdev->dev;
 45	u8 mac_addr[ETH_ALEN] = { 0 };
 46	int err;
 47
 48	/* (1) try to get the MAC address from the device tree */
 49	if (np) {
 50		err = of_get_mac_address(np, mac_addr);
 51		if (err == -EPROBE_DEFER)
 52			return err;
 53	}
 54
 55	/* (2) bootloader supplied MAC address */
 56	if (is_zero_ether_addr(mac_addr))
 57		enetc_get_si_hw_addr(pf, si, mac_addr);
 58
 59	/* (3) choose a random one */
 60	if (is_zero_ether_addr(mac_addr)) {
 61		eth_random_addr(mac_addr);
 62		dev_info(dev, "no MAC address specified for SI%d, using %pM\n",
 63			 si, mac_addr);
 64	}
 65
 66	enetc_set_si_hw_addr(pf, si, mac_addr);
 67
 68	return 0;
 69}
 70
 71int enetc_setup_mac_addresses(struct device_node *np, struct enetc_pf *pf)
 72{
 73	int err, i;
 74
 75	/* The PF might take its MAC from the device tree */
 76	err = enetc_setup_mac_address(np, pf, 0);
 77	if (err)
 78		return err;
 79
 80	for (i = 0; i < pf->total_vfs; i++) {
 81		err = enetc_setup_mac_address(NULL, pf, i + 1);
 82		if (err)
 83			return err;
 84	}
 85
 86	return 0;
 87}
 88EXPORT_SYMBOL_GPL(enetc_setup_mac_addresses);
 89
 90void enetc_pf_netdev_setup(struct enetc_si *si, struct net_device *ndev,
 91			   const struct net_device_ops *ndev_ops)
 92{
 93	struct enetc_ndev_priv *priv = netdev_priv(ndev);
 94	struct enetc_pf *pf = enetc_si_priv(si);
 95
 96	SET_NETDEV_DEV(ndev, &si->pdev->dev);
 97	priv->ndev = ndev;
 98	priv->si = si;
 99	priv->dev = &si->pdev->dev;
100	si->ndev = ndev;
101
102	priv->msg_enable = (NETIF_MSG_WOL << 1) - 1;
103	priv->sysclk_freq = si->drvdata->sysclk_freq;
104	priv->max_frags = si->drvdata->max_frags;
105	ndev->netdev_ops = ndev_ops;
106	enetc_set_ethtool_ops(ndev);
107	ndev->watchdog_timeo = 5 * HZ;
108	ndev->max_mtu = ENETC_MAX_MTU;
109
110	ndev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM |
111			    NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
112			    NETIF_F_HW_VLAN_CTAG_FILTER |
113			    NETIF_F_HW_CSUM | NETIF_F_TSO | NETIF_F_TSO6 |
114			    NETIF_F_GSO_UDP_L4;
115	ndev->features = NETIF_F_HIGHDMA | NETIF_F_SG | NETIF_F_RXCSUM |
116			 NETIF_F_HW_VLAN_CTAG_TX |
117			 NETIF_F_HW_VLAN_CTAG_RX |
118			 NETIF_F_HW_CSUM | NETIF_F_TSO | NETIF_F_TSO6 |
119			 NETIF_F_GSO_UDP_L4;
120	ndev->vlan_features = NETIF_F_SG | NETIF_F_HW_CSUM |
121			      NETIF_F_TSO | NETIF_F_TSO6;
122
123	ndev->priv_flags |= IFF_UNICAST_FLT;
124
125	if (si->drvdata->tx_csum)
126		priv->active_offloads |= ENETC_F_TXCSUM;
127
128	if (si->hw_features & ENETC_SI_F_LSO)
129		priv->active_offloads |= ENETC_F_LSO;
130
131	if (si->num_rss) {
132		ndev->hw_features |= NETIF_F_RXHASH;
133		ndev->features |= NETIF_F_RXHASH;
134	}
135
136	if (!enetc_is_pseudo_mac(si))
137		ndev->hw_features |= NETIF_F_LOOPBACK;
138
139	/* TODO: currently, i.MX95 ENETC driver does not support advanced features */
140	if (!is_enetc_rev1(si))
141		goto end;
142
143	ndev->xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT |
144			     NETDEV_XDP_ACT_NDO_XMIT | NETDEV_XDP_ACT_RX_SG |
145			     NETDEV_XDP_ACT_NDO_XMIT_SG;
146
147	if (si->hw_features & ENETC_SI_F_PSFP && pf->ops->enable_psfp &&
148	    !pf->ops->enable_psfp(priv)) {
149		priv->active_offloads |= ENETC_F_QCI;
150		ndev->features |= NETIF_F_HW_TC;
151		ndev->hw_features |= NETIF_F_HW_TC;
152	}
153
154end:
155	/* pick up primary MAC address from SI */
156	enetc_load_primary_mac_addr(&si->hw, ndev);
157}
158EXPORT_SYMBOL_GPL(enetc_pf_netdev_setup);
159
160static int enetc_mdio_probe(struct enetc_pf *pf, struct device_node *np)
161{
162	struct device *dev = &pf->si->pdev->dev;
163	struct enetc_mdio_priv *mdio_priv;
164	struct mii_bus *bus;
165	int err;
166
167	bus = devm_mdiobus_alloc_size(dev, sizeof(*mdio_priv));
168	if (!bus)
169		return -ENOMEM;
170
171	bus->name = "Freescale ENETC MDIO Bus";
172	bus->read = enetc_mdio_read_c22;
173	bus->write = enetc_mdio_write_c22;
174	bus->read_c45 = enetc_mdio_read_c45;
175	bus->write_c45 = enetc_mdio_write_c45;
176	bus->parent = dev;
177	mdio_priv = bus->priv;
178	mdio_priv->hw = &pf->si->hw;
179
180	if (is_enetc_rev1(pf->si))
181		mdio_priv->mdio_base = ENETC_EMDIO_BASE;
182	else
183		mdio_priv->mdio_base = ENETC4_EMDIO_BASE;
184
185	snprintf(bus->id, MII_BUS_ID_SIZE, "%s", dev_name(dev));
186
187	err = of_mdiobus_register(bus, np);
188	if (err)
189		return dev_err_probe(dev, err, "cannot register MDIO bus\n");
190
191	pf->mdio = bus;
192
193	return 0;
194}
195
196static void enetc_mdio_remove(struct enetc_pf *pf)
197{
198	if (pf->mdio)
199		mdiobus_unregister(pf->mdio);
200}
201
202static int enetc_imdio_create(struct enetc_pf *pf)
203{
204	struct device *dev = &pf->si->pdev->dev;
205	struct enetc_mdio_priv *mdio_priv;
206	struct phylink_pcs *phylink_pcs;
207	struct mii_bus *bus;
208	int err;
209
210	if (!pf->ops->create_pcs) {
211		dev_err(dev, "Creating PCS is not supported\n");
212
213		return -EOPNOTSUPP;
214	}
215
216	bus = mdiobus_alloc_size(sizeof(*mdio_priv));
217	if (!bus)
218		return -ENOMEM;
219
220	bus->name = "Freescale ENETC internal MDIO Bus";
221	bus->read = enetc_mdio_read_c22;
222	bus->write = enetc_mdio_write_c22;
223	bus->read_c45 = enetc_mdio_read_c45;
224	bus->write_c45 = enetc_mdio_write_c45;
225	bus->parent = dev;
226	bus->phy_mask = ~0;
227	mdio_priv = bus->priv;
228	mdio_priv->hw = &pf->si->hw;
229
230	if (is_enetc_rev1(pf->si))
231		mdio_priv->mdio_base = ENETC_PM_IMDIO_BASE;
232	else
233		mdio_priv->mdio_base = ENETC4_PM_IMDIO_BASE;
234
235	snprintf(bus->id, MII_BUS_ID_SIZE, "%s-imdio", dev_name(dev));
236
237	err = mdiobus_register(bus);
238	if (err) {
239		dev_err(dev, "cannot register internal MDIO bus (%d)\n", err);
240		goto free_mdio_bus;
241	}
242
243	phylink_pcs = pf->ops->create_pcs(pf, bus);
244	if (IS_ERR(phylink_pcs)) {
245		err = PTR_ERR(phylink_pcs);
246		dev_err(dev, "cannot create lynx pcs (%d)\n", err);
247		goto unregister_mdiobus;
248	}
249
250	pf->imdio = bus;
251	pf->pcs = phylink_pcs;
252
253	return 0;
254
255unregister_mdiobus:
256	mdiobus_unregister(bus);
257free_mdio_bus:
258	mdiobus_free(bus);
259	return err;
260}
261
262static void enetc_imdio_remove(struct enetc_pf *pf)
263{
264	if (pf->pcs && pf->ops->destroy_pcs)
265		pf->ops->destroy_pcs(pf->pcs);
266
267	if (pf->imdio) {
268		mdiobus_unregister(pf->imdio);
269		mdiobus_free(pf->imdio);
270	}
271}
272
273static bool enetc_port_has_pcs(struct enetc_pf *pf)
274{
275	return (pf->if_mode == PHY_INTERFACE_MODE_SGMII ||
276		pf->if_mode == PHY_INTERFACE_MODE_1000BASEX ||
277		pf->if_mode == PHY_INTERFACE_MODE_2500BASEX ||
278		pf->if_mode == PHY_INTERFACE_MODE_USXGMII);
279}
280
281int enetc_mdiobus_create(struct enetc_pf *pf, struct device_node *node)
282{
283	struct device_node *mdio_np;
284	int err;
285
286	mdio_np = of_get_child_by_name(node, "mdio");
287	if (mdio_np) {
288		err = enetc_mdio_probe(pf, mdio_np);
289
290		of_node_put(mdio_np);
291		if (err)
292			return err;
293	}
294
295	if (enetc_port_has_pcs(pf)) {
296		err = enetc_imdio_create(pf);
297		if (err) {
298			enetc_mdio_remove(pf);
299			return err;
300		}
301	}
302
303	return 0;
304}
305EXPORT_SYMBOL_GPL(enetc_mdiobus_create);
306
307void enetc_mdiobus_destroy(struct enetc_pf *pf)
308{
309	enetc_mdio_remove(pf);
310	enetc_imdio_remove(pf);
311}
312EXPORT_SYMBOL_GPL(enetc_mdiobus_destroy);
313
314int enetc_phylink_create(struct enetc_ndev_priv *priv, struct device_node *node,
315			 const struct phylink_mac_ops *ops)
316{
317	struct enetc_pf *pf = enetc_si_priv(priv->si);
318	struct phylink *phylink;
319	int err;
320
321	pf->phylink_config.dev = &priv->ndev->dev;
322	pf->phylink_config.type = PHYLINK_NETDEV;
323	pf->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
324		MAC_10 | MAC_100 | MAC_1000 | MAC_2500FD;
325
326	__set_bit(PHY_INTERFACE_MODE_INTERNAL,
327		  pf->phylink_config.supported_interfaces);
328	__set_bit(PHY_INTERFACE_MODE_SGMII,
329		  pf->phylink_config.supported_interfaces);
330	__set_bit(PHY_INTERFACE_MODE_1000BASEX,
331		  pf->phylink_config.supported_interfaces);
332	__set_bit(PHY_INTERFACE_MODE_2500BASEX,
333		  pf->phylink_config.supported_interfaces);
334	__set_bit(PHY_INTERFACE_MODE_USXGMII,
335		  pf->phylink_config.supported_interfaces);
336	phy_interface_set_rgmii(pf->phylink_config.supported_interfaces);
337
338	phylink = phylink_create(&pf->phylink_config, of_fwnode_handle(node),
339				 pf->if_mode, ops);
340	if (IS_ERR(phylink)) {
341		err = PTR_ERR(phylink);
342		return err;
343	}
344
345	priv->phylink = phylink;
346
347	return 0;
348}
349EXPORT_SYMBOL_GPL(enetc_phylink_create);
350
351void enetc_phylink_destroy(struct enetc_ndev_priv *priv)
352{
353	phylink_destroy(priv->phylink);
354}
355EXPORT_SYMBOL_GPL(enetc_phylink_destroy);
356
357void enetc_set_default_rss_key(struct enetc_pf *pf)
358{
359	u8 hash_key[ENETC_RSSHASH_KEY_SIZE] = {0};
360
361	/* set up hash key */
362	get_random_bytes(hash_key, ENETC_RSSHASH_KEY_SIZE);
363	enetc_set_rss_key(pf->si, hash_key);
364}
365EXPORT_SYMBOL_GPL(enetc_set_default_rss_key);
366
367static int enetc_vid_hash_idx(unsigned int vid)
368{
369	int res = 0;
370	int i;
371
372	for (i = 0; i < 6; i++)
373		res |= (hweight8(vid & (BIT(i) | BIT(i + 6))) & 0x1) << i;
374
375	return res;
376}
377
378static void enetc_refresh_vlan_ht_filter(struct enetc_pf *pf)
379{
380	int i;
381
382	bitmap_zero(pf->vlan_ht_filter, ENETC_VLAN_HT_SIZE);
383	for_each_set_bit(i, pf->active_vlans, VLAN_N_VID) {
384		int hidx = enetc_vid_hash_idx(i);
385
386		__set_bit(hidx, pf->vlan_ht_filter);
387	}
388}
389
390static void enetc_set_si_vlan_ht_filter(struct enetc_si *si,
391					int si_id, u64 hash)
392{
393	struct enetc_hw *hw = &si->hw;
394	int high_reg_off, low_reg_off;
395
396	if (is_enetc_rev1(si)) {
397		low_reg_off = ENETC_PSIVHFR0(si_id);
398		high_reg_off = ENETC_PSIVHFR1(si_id);
399	} else {
400		low_reg_off = ENETC4_PSIVHFR0(si_id);
401		high_reg_off = ENETC4_PSIVHFR1(si_id);
402	}
403
404	enetc_port_wr(hw, low_reg_off, lower_32_bits(hash));
405	enetc_port_wr(hw, high_reg_off, upper_32_bits(hash));
406}
407
408int enetc_vlan_rx_add_vid(struct net_device *ndev, __be16 prot, u16 vid)
409{
410	struct enetc_ndev_priv *priv = netdev_priv(ndev);
411	struct enetc_pf *pf = enetc_si_priv(priv->si);
412	int idx;
413
414	__set_bit(vid, pf->active_vlans);
415
416	idx = enetc_vid_hash_idx(vid);
417	if (!__test_and_set_bit(idx, pf->vlan_ht_filter))
418		enetc_set_si_vlan_ht_filter(pf->si, 0, *pf->vlan_ht_filter);
419
420	return 0;
421}
422EXPORT_SYMBOL_GPL(enetc_vlan_rx_add_vid);
423
424int enetc_vlan_rx_del_vid(struct net_device *ndev, __be16 prot, u16 vid)
425{
426	struct enetc_ndev_priv *priv = netdev_priv(ndev);
427	struct enetc_pf *pf = enetc_si_priv(priv->si);
428
429	if (__test_and_clear_bit(vid, pf->active_vlans)) {
430		enetc_refresh_vlan_ht_filter(pf);
431		enetc_set_si_vlan_ht_filter(pf->si, 0, *pf->vlan_ht_filter);
432	}
433
434	return 0;
435}
436EXPORT_SYMBOL_GPL(enetc_vlan_rx_del_vid);
437
438MODULE_DESCRIPTION("NXP ENETC PF common functionality driver");
439MODULE_LICENSE("Dual BSD/GPL");