bnx2x_stats.c

   1/* bnx2x_stats.c: QLogic Everest network driver.
   2 *
   3 * Copyright (c) 2007-2013 Broadcom Corporation
   4 * Copyright (c) 2014 QLogic Corporation
   5 * All rights reserved
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License as published by
   9 * the Free Software Foundation.
  10 *
  11 * Maintained by: Ariel Elior <ariel.elior@qlogic.com>
  12 * Written by: Eliezer Tamir
  13 * Based on code from Michael Chan's bnx2 driver
  14 * UDP CSUM errata workaround by Arik Gendelman
  15 * Slowpath and fastpath rework by Vladislav Zolotarov
  16 * Statistics and Link management by Yitchak Gertner
  17 *
  18 */
  19
  20#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  21
  22#include "bnx2x_stats.h"
  23#include "bnx2x_cmn.h"
  24#include "bnx2x_sriov.h"
  25
  26/* Statistics */
  27
  28/*
  29 * General service functions
  30 */
  31
  32static inline long bnx2x_hilo(u32 *hiref)
  33{
  34	u32 lo = *(hiref + 1);
  35#if (BITS_PER_LONG == 64)
  36	u32 hi = *hiref;
  37
  38	return HILO_U64(hi, lo);
  39#else
  40	return lo;
  41#endif
  42}
  43
  44static inline u16 bnx2x_get_port_stats_dma_len(struct bnx2x *bp)
  45{
  46	u16 res = 0;
  47
  48	/* 'newest' convention - shmem2 cotains the size of the port stats */
  49	if (SHMEM2_HAS(bp, sizeof_port_stats)) {
  50		u32 size = SHMEM2_RD(bp, sizeof_port_stats);
  51		if (size)
  52			res = size;
  53
  54		/* prevent newer BC from causing buffer overflow */
  55		if (res > sizeof(struct host_port_stats))
  56			res = sizeof(struct host_port_stats);
  57	}
  58
  59	/* Older convention - all BCs support the port stats' fields up until
  60	 * the 'not_used' field
  61	 */
  62	if (!res) {
  63		res = offsetof(struct host_port_stats, not_used) + 4;
  64
  65		/* if PFC stats are supported by the MFW, DMA them as well */
  66		if (bp->flags & BC_SUPPORTS_PFC_STATS) {
  67			res += offsetof(struct host_port_stats,
  68					pfc_frames_rx_lo) -
  69			       offsetof(struct host_port_stats,
  70					pfc_frames_tx_hi) + 4 ;
  71		}
  72	}
  73
  74	res >>= 2;
  75
  76	WARN_ON(res > 2 * DMAE_LEN32_RD_MAX);
  77	return res;
  78}
  79
  80/*
  81 * Init service functions
  82 */
  83
  84static void bnx2x_dp_stats(struct bnx2x *bp)
  85{
  86	int i;
  87
  88	DP(BNX2X_MSG_STATS, "dumping stats:\n"
  89	   "fw_stats_req\n"
  90	   "    hdr\n"
  91	   "        cmd_num %d\n"
  92	   "        reserved0 %d\n"
  93	   "        drv_stats_counter %d\n"
  94	   "        reserved1 %d\n"
  95	   "        stats_counters_addrs %x %x\n",
  96	   bp->fw_stats_req->hdr.cmd_num,
  97	   bp->fw_stats_req->hdr.reserved0,
  98	   bp->fw_stats_req->hdr.drv_stats_counter,
  99	   bp->fw_stats_req->hdr.reserved1,
 100	   bp->fw_stats_req->hdr.stats_counters_addrs.hi,
 101	   bp->fw_stats_req->hdr.stats_counters_addrs.lo);
 102
 103	for (i = 0; i < bp->fw_stats_req->hdr.cmd_num; i++) {
 104		DP(BNX2X_MSG_STATS,
 105		   "query[%d]\n"
 106		   "              kind %d\n"
 107		   "              index %d\n"
 108		   "              funcID %d\n"
 109		   "              reserved %d\n"
 110		   "              address %x %x\n",
 111		   i, bp->fw_stats_req->query[i].kind,
 112		   bp->fw_stats_req->query[i].index,
 113		   bp->fw_stats_req->query[i].funcID,
 114		   bp->fw_stats_req->query[i].reserved,
 115		   bp->fw_stats_req->query[i].address.hi,
 116		   bp->fw_stats_req->query[i].address.lo);
 117	}
 118}
 119
 120/* Post the next statistics ramrod. Protect it with the spin in
 121 * order to ensure the strict order between statistics ramrods
 122 * (each ramrod has a sequence number passed in a
 123 * bp->fw_stats_req->hdr.drv_stats_counter and ramrods must be
 124 * sent in order).
 125 */
 126static void bnx2x_storm_stats_post(struct bnx2x *bp)
 127{
 128	int rc;
 129
 130	if (bp->stats_pending)
 131		return;
 132
 133	bp->fw_stats_req->hdr.drv_stats_counter =
 134		cpu_to_le16(bp->stats_counter++);
 135
 136	DP(BNX2X_MSG_STATS, "Sending statistics ramrod %d\n",
 137	   le16_to_cpu(bp->fw_stats_req->hdr.drv_stats_counter));
 138
 139	/* adjust the ramrod to include VF queues statistics */
 140	bnx2x_iov_adjust_stats_req(bp);
 141	bnx2x_dp_stats(bp);
 142
 143	/* send FW stats ramrod */
 144	rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0,
 145			   U64_HI(bp->fw_stats_req_mapping),
 146			   U64_LO(bp->fw_stats_req_mapping),
 147			   NONE_CONNECTION_TYPE);
 148	if (rc == 0)
 149		bp->stats_pending = 1;
 150}
 151
 152static void bnx2x_hw_stats_post(struct bnx2x *bp)
 153{
 154	struct dmae_command *dmae = &bp->stats_dmae;
 155	u32 *stats_comp = bnx2x_sp(bp, stats_comp);
 156
 157	*stats_comp = DMAE_COMP_VAL;
 158	if (CHIP_REV_IS_SLOW(bp))
 159		return;
 160
 161	/* Update MCP's statistics if possible */
 162	if (bp->func_stx)
 163		memcpy(bnx2x_sp(bp, func_stats), &bp->func_stats,
 164		       sizeof(bp->func_stats));
 165
 166	/* loader */
 167	if (bp->executer_idx) {
 168		int loader_idx = PMF_DMAE_C(bp);
 169		u32 opcode =  bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
 170						 true, DMAE_COMP_GRC);
 171		opcode = bnx2x_dmae_opcode_clr_src_reset(opcode);
 172
 173		memset(dmae, 0, sizeof(struct dmae_command));
 174		dmae->opcode = opcode;
 175		dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0]));
 176		dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0]));
 177		dmae->dst_addr_lo = (DMAE_REG_CMD_MEM +
 178				     sizeof(struct dmae_command) *
 179				     (loader_idx + 1)) >> 2;
 180		dmae->dst_addr_hi = 0;
 181		dmae->len = sizeof(struct dmae_command) >> 2;
 182		if (CHIP_IS_E1(bp))
 183			dmae->len--;
 184		dmae->comp_addr_lo = dmae_reg_go_c[loader_idx + 1] >> 2;
 185		dmae->comp_addr_hi = 0;
 186		dmae->comp_val = 1;
 187
 188		*stats_comp = 0;
 189		bnx2x_post_dmae(bp, dmae, loader_idx);
 190
 191	} else if (bp->func_stx) {
 192		*stats_comp = 0;
 193		bnx2x_issue_dmae_with_comp(bp, dmae, stats_comp);
 194	}
 195}
 196
 197static void bnx2x_stats_comp(struct bnx2x *bp)
 198{
 199	u32 *stats_comp = bnx2x_sp(bp, stats_comp);
 200	int cnt = 10;
 201
 202	might_sleep();
 203	while (*stats_comp != DMAE_COMP_VAL) {
 204		if (!cnt) {
 205			BNX2X_ERR("timeout waiting for stats finished\n");
 206			break;
 207		}
 208		cnt--;
 209		usleep_range(1000, 2000);
 210	}
 211}
 212
 213/*
 214 * Statistics service functions
 215 */
 216
 217/* should be called under stats_sema */
 218static void bnx2x_stats_pmf_update(struct bnx2x *bp)
 219{
 220	struct dmae_command *dmae;
 221	u32 opcode;
 222	int loader_idx = PMF_DMAE_C(bp);
 223	u32 *stats_comp = bnx2x_sp(bp, stats_comp);
 224
 225	/* sanity */
 226	if (!bp->port.pmf || !bp->port.port_stx) {
 227		BNX2X_ERR("BUG!\n");
 228		return;
 229	}
 230
 231	bp->executer_idx = 0;
 232
 233	opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, false, 0);
 234
 235	dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
 236	dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC);
 237	dmae->src_addr_lo = bp->port.port_stx >> 2;
 238	dmae->src_addr_hi = 0;
 239	dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
 240	dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
 241	dmae->len = DMAE_LEN32_RD_MAX;
 242	dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
 243	dmae->comp_addr_hi = 0;
 244	dmae->comp_val = 1;
 245
 246	dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
 247	dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
 248	dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX;
 249	dmae->src_addr_hi = 0;
 250	dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) +
 251				   DMAE_LEN32_RD_MAX * 4);
 252	dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats) +
 253				   DMAE_LEN32_RD_MAX * 4);
 254	dmae->len = bnx2x_get_port_stats_dma_len(bp) - DMAE_LEN32_RD_MAX;
 255
 256	dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
 257	dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
 258	dmae->comp_val = DMAE_COMP_VAL;
 259
 260	*stats_comp = 0;
 261	bnx2x_hw_stats_post(bp);
 262	bnx2x_stats_comp(bp);
 263}
 264
 265static void bnx2x_port_stats_init(struct bnx2x *bp)
 266{
 267	struct dmae_command *dmae;
 268	int port = BP_PORT(bp);
 269	u32 opcode;
 270	int loader_idx = PMF_DMAE_C(bp);
 271	u32 mac_addr;
 272	u32 *stats_comp = bnx2x_sp(bp, stats_comp);
 273
 274	/* sanity */
 275	if (!bp->link_vars.link_up || !bp->port.pmf) {
 276		BNX2X_ERR("BUG!\n");
 277		return;
 278	}
 279
 280	bp->executer_idx = 0;
 281
 282	/* MCP */
 283	opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
 284				    true, DMAE_COMP_GRC);
 285
 286	if (bp->port.port_stx) {
 287
 288		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
 289		dmae->opcode = opcode;
 290		dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
 291		dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
 292		dmae->dst_addr_lo = bp->port.port_stx >> 2;
 293		dmae->dst_addr_hi = 0;
 294		dmae->len = bnx2x_get_port_stats_dma_len(bp);
 295		dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
 296		dmae->comp_addr_hi = 0;
 297		dmae->comp_val = 1;
 298	}
 299
 300	if (bp->func_stx) {
 301
 302		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
 303		dmae->opcode = opcode;
 304		dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
 305		dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
 306		dmae->dst_addr_lo = bp->func_stx >> 2;
 307		dmae->dst_addr_hi = 0;
 308		dmae->len = sizeof(struct host_func_stats) >> 2;
 309		dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
 310		dmae->comp_addr_hi = 0;
 311		dmae->comp_val = 1;
 312	}
 313
 314	/* MAC */
 315	opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
 316				   true, DMAE_COMP_GRC);
 317
 318	/* EMAC is special */
 319	if (bp->link_vars.mac_type == MAC_TYPE_EMAC) {
 320		mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0);
 321
 322		/* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/
 323		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
 324		dmae->opcode = opcode;
 325		dmae->src_addr_lo = (mac_addr +
 326				     EMAC_REG_EMAC_RX_STAT_AC) >> 2;
 327		dmae->src_addr_hi = 0;
 328		dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
 329		dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
 330		dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT;
 331		dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
 332		dmae->comp_addr_hi = 0;
 333		dmae->comp_val = 1;
 334
 335		/* EMAC_REG_EMAC_RX_STAT_AC_28 */
 336		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
 337		dmae->opcode = opcode;
 338		dmae->src_addr_lo = (mac_addr +
 339				     EMAC_REG_EMAC_RX_STAT_AC_28) >> 2;
 340		dmae->src_addr_hi = 0;
 341		dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
 342		     offsetof(struct emac_stats, rx_stat_falsecarriererrors));
 343		dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
 344		     offsetof(struct emac_stats, rx_stat_falsecarriererrors));
 345		dmae->len = 1;
 346		dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
 347		dmae->comp_addr_hi = 0;
 348		dmae->comp_val = 1;
 349
 350		/* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/
 351		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
 352		dmae->opcode = opcode;
 353		dmae->src_addr_lo = (mac_addr +
 354				     EMAC_REG_EMAC_TX_STAT_AC) >> 2;
 355		dmae->src_addr_hi = 0;
 356		dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
 357			offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
 358		dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
 359			offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
 360		dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT;
 361		dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
 362		dmae->comp_addr_hi = 0;
 363		dmae->comp_val = 1;
 364	} else {
 365		u32 tx_src_addr_lo, rx_src_addr_lo;
 366		u16 rx_len, tx_len;
 367
 368		/* configure the params according to MAC type */
 369		switch (bp->link_vars.mac_type) {
 370		case MAC_TYPE_BMAC:
 371			mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM :
 372					   NIG_REG_INGRESS_BMAC0_MEM);
 373
 374			/* BIGMAC_REGISTER_TX_STAT_GTPKT ..
 375			   BIGMAC_REGISTER_TX_STAT_GTBYT */
 376			if (CHIP_IS_E1x(bp)) {
 377				tx_src_addr_lo = (mac_addr +
 378					BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
 379				tx_len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT -
 380					  BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
 381				rx_src_addr_lo = (mac_addr +
 382					BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
 383				rx_len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ -
 384					  BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
 385			} else {
 386				tx_src_addr_lo = (mac_addr +
 387					BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
 388				tx_len = (8 + BIGMAC2_REGISTER_TX_STAT_GTBYT -
 389					  BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
 390				rx_src_addr_lo = (mac_addr +
 391					BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
 392				rx_len = (8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ -
 393					  BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
 394			}
 395			break;
 396
 397		case MAC_TYPE_UMAC: /* handled by MSTAT */
 398		case MAC_TYPE_XMAC: /* handled by MSTAT */
 399		default:
 400			mac_addr = port ? GRCBASE_MSTAT1 : GRCBASE_MSTAT0;
 401			tx_src_addr_lo = (mac_addr +
 402					  MSTAT_REG_TX_STAT_GTXPOK_LO) >> 2;
 403			rx_src_addr_lo = (mac_addr +
 404					  MSTAT_REG_RX_STAT_GR64_LO) >> 2;
 405			tx_len = sizeof(bp->slowpath->
 406					mac_stats.mstat_stats.stats_tx) >> 2;
 407			rx_len = sizeof(bp->slowpath->
 408					mac_stats.mstat_stats.stats_rx) >> 2;
 409			break;
 410		}
 411
 412		/* TX stats */
 413		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
 414		dmae->opcode = opcode;
 415		dmae->src_addr_lo = tx_src_addr_lo;
 416		dmae->src_addr_hi = 0;
 417		dmae->len = tx_len;
 418		dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
 419		dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
 420		dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
 421		dmae->comp_addr_hi = 0;
 422		dmae->comp_val = 1;
 423
 424		/* RX stats */
 425		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
 426		dmae->opcode = opcode;
 427		dmae->src_addr_hi = 0;
 428		dmae->src_addr_lo = rx_src_addr_lo;
 429		dmae->dst_addr_lo =
 430			U64_LO(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
 431		dmae->dst_addr_hi =
 432			U64_HI(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
 433		dmae->len = rx_len;
 434		dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
 435		dmae->comp_addr_hi = 0;
 436		dmae->comp_val = 1;
 437	}
 438
 439	/* NIG */
 440	if (!CHIP_IS_E3(bp)) {
 441		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
 442		dmae->opcode = opcode;
 443		dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 :
 444					    NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2;
 445		dmae->src_addr_hi = 0;
 446		dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
 447				offsetof(struct nig_stats, egress_mac_pkt0_lo));
 448		dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
 449				offsetof(struct nig_stats, egress_mac_pkt0_lo));
 450		dmae->len = (2*sizeof(u32)) >> 2;
 451		dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
 452		dmae->comp_addr_hi = 0;
 453		dmae->comp_val = 1;
 454
 455		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
 456		dmae->opcode = opcode;
 457		dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 :
 458					    NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2;
 459		dmae->src_addr_hi = 0;
 460		dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
 461				offsetof(struct nig_stats, egress_mac_pkt1_lo));
 462		dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
 463				offsetof(struct nig_stats, egress_mac_pkt1_lo));
 464		dmae->len = (2*sizeof(u32)) >> 2;
 465		dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
 466		dmae->comp_addr_hi = 0;
 467		dmae->comp_val = 1;
 468	}
 469
 470	dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
 471	dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
 472						 true, DMAE_COMP_PCI);
 473	dmae->src_addr_lo = (port ? NIG_REG_STAT1_BRB_DISCARD :
 474				    NIG_REG_STAT0_BRB_DISCARD) >> 2;
 475	dmae->src_addr_hi = 0;
 476	dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats));
 477	dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats));
 478	dmae->len = (sizeof(struct nig_stats) - 4*sizeof(u32)) >> 2;
 479
 480	dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
 481	dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
 482	dmae->comp_val = DMAE_COMP_VAL;
 483
 484	*stats_comp = 0;
 485}
 486
 487static void bnx2x_func_stats_init(struct bnx2x *bp)
 488{
 489	struct dmae_command *dmae = &bp->stats_dmae;
 490	u32 *stats_comp = bnx2x_sp(bp, stats_comp);
 491
 492	/* sanity */
 493	if (!bp->func_stx) {
 494		BNX2X_ERR("BUG!\n");
 495		return;
 496	}
 497
 498	bp->executer_idx = 0;
 499	memset(dmae, 0, sizeof(struct dmae_command));
 500
 501	dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
 502					 true, DMAE_COMP_PCI);
 503	dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
 504	dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
 505	dmae->dst_addr_lo = bp->func_stx >> 2;
 506	dmae->dst_addr_hi = 0;
 507	dmae->len = sizeof(struct host_func_stats) >> 2;
 508	dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
 509	dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
 510	dmae->comp_val = DMAE_COMP_VAL;
 511
 512	*stats_comp = 0;
 513}
 514
 515/* should be called under stats_sema */
 516static void bnx2x_stats_start(struct bnx2x *bp)
 517{
 518	if (IS_PF(bp)) {
 519		if (bp->port.pmf)
 520			bnx2x_port_stats_init(bp);
 521
 522		else if (bp->func_stx)
 523			bnx2x_func_stats_init(bp);
 524
 525		bnx2x_hw_stats_post(bp);
 526		bnx2x_storm_stats_post(bp);
 527	}
 528}
 529
 530static void bnx2x_stats_pmf_start(struct bnx2x *bp)
 531{
 532	bnx2x_stats_comp(bp);
 533	bnx2x_stats_pmf_update(bp);
 534	bnx2x_stats_start(bp);
 535}
 536
 537static void bnx2x_stats_restart(struct bnx2x *bp)
 538{
 539	/* vfs travel through here as part of the statistics FSM, but no action
 540	 * is required
 541	 */
 542	if (IS_VF(bp))
 543		return;
 544
 545	bnx2x_stats_comp(bp);
 546	bnx2x_stats_start(bp);
 547}
 548
 549static void bnx2x_bmac_stats_update(struct bnx2x *bp)
 550{
 551	struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
 552	struct bnx2x_eth_stats *estats = &bp->eth_stats;
 553	struct {
 554		u32 lo;
 555		u32 hi;
 556	} diff;
 557
 558	if (CHIP_IS_E1x(bp)) {
 559		struct bmac1_stats *new = bnx2x_sp(bp, mac_stats.bmac1_stats);
 560
 561		/* the macros below will use "bmac1_stats" type */
 562		UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
 563		UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
 564		UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
 565		UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
 566		UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
 567		UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
 568		UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
 569		UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
 570		UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
 571
 572		UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
 573		UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
 574		UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
 575		UPDATE_STAT64(tx_stat_gt127,
 576				tx_stat_etherstatspkts65octetsto127octets);
 577		UPDATE_STAT64(tx_stat_gt255,
 578				tx_stat_etherstatspkts128octetsto255octets);
 579		UPDATE_STAT64(tx_stat_gt511,
 580				tx_stat_etherstatspkts256octetsto511octets);
 581		UPDATE_STAT64(tx_stat_gt1023,
 582				tx_stat_etherstatspkts512octetsto1023octets);
 583		UPDATE_STAT64(tx_stat_gt1518,
 584				tx_stat_etherstatspkts1024octetsto1522octets);
 585		UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
 586		UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
 587		UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
 588		UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
 589		UPDATE_STAT64(tx_stat_gterr,
 590				tx_stat_dot3statsinternalmactransmiterrors);
 591		UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
 592
 593	} else {
 594		struct bmac2_stats *new = bnx2x_sp(bp, mac_stats.bmac2_stats);
 595
 596		/* the macros below will use "bmac2_stats" type */
 597		UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
 598		UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
 599		UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
 600		UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
 601		UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
 602		UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
 603		UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
 604		UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
 605		UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
 606		UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
 607		UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
 608		UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
 609		UPDATE_STAT64(tx_stat_gt127,
 610				tx_stat_etherstatspkts65octetsto127octets);
 611		UPDATE_STAT64(tx_stat_gt255,
 612				tx_stat_etherstatspkts128octetsto255octets);
 613		UPDATE_STAT64(tx_stat_gt511,
 614				tx_stat_etherstatspkts256octetsto511octets);
 615		UPDATE_STAT64(tx_stat_gt1023,
 616				tx_stat_etherstatspkts512octetsto1023octets);
 617		UPDATE_STAT64(tx_stat_gt1518,
 618				tx_stat_etherstatspkts1024octetsto1522octets);
 619		UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
 620		UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
 621		UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
 622		UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
 623		UPDATE_STAT64(tx_stat_gterr,
 624				tx_stat_dot3statsinternalmactransmiterrors);
 625		UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
 626
 627		/* collect PFC stats */
 628		pstats->pfc_frames_tx_hi = new->tx_stat_gtpp_hi;
 629		pstats->pfc_frames_tx_lo = new->tx_stat_gtpp_lo;
 630
 631		pstats->pfc_frames_rx_hi = new->rx_stat_grpp_hi;
 632		pstats->pfc_frames_rx_lo = new->rx_stat_grpp_lo;
 633	}
 634
 635	estats->pause_frames_received_hi =
 636				pstats->mac_stx[1].rx_stat_mac_xpf_hi;
 637	estats->pause_frames_received_lo =
 638				pstats->mac_stx[1].rx_stat_mac_xpf_lo;
 639
 640	estats->pause_frames_sent_hi =
 641				pstats->mac_stx[1].tx_stat_outxoffsent_hi;
 642	estats->pause_frames_sent_lo =
 643				pstats->mac_stx[1].tx_stat_outxoffsent_lo;
 644
 645	estats->pfc_frames_received_hi =
 646				pstats->pfc_frames_rx_hi;
 647	estats->pfc_frames_received_lo =
 648				pstats->pfc_frames_rx_lo;
 649	estats->pfc_frames_sent_hi =
 650				pstats->pfc_frames_tx_hi;
 651	estats->pfc_frames_sent_lo =
 652				pstats->pfc_frames_tx_lo;
 653}
 654
 655static void bnx2x_mstat_stats_update(struct bnx2x *bp)
 656{
 657	struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
 658	struct bnx2x_eth_stats *estats = &bp->eth_stats;
 659
 660	struct mstat_stats *new = bnx2x_sp(bp, mac_stats.mstat_stats);
 661
 662	ADD_STAT64(stats_rx.rx_grerb, rx_stat_ifhcinbadoctets);
 663	ADD_STAT64(stats_rx.rx_grfcs, rx_stat_dot3statsfcserrors);
 664	ADD_STAT64(stats_rx.rx_grund, rx_stat_etherstatsundersizepkts);
 665	ADD_STAT64(stats_rx.rx_grovr, rx_stat_dot3statsframestoolong);
 666	ADD_STAT64(stats_rx.rx_grfrg, rx_stat_etherstatsfragments);
 667	ADD_STAT64(stats_rx.rx_grxcf, rx_stat_maccontrolframesreceived);
 668	ADD_STAT64(stats_rx.rx_grxpf, rx_stat_xoffstateentered);
 669	ADD_STAT64(stats_rx.rx_grxpf, rx_stat_mac_xpf);
 670	ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_outxoffsent);
 671	ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_flowcontroldone);
 672
 673	/* collect pfc stats */
 674	ADD_64(pstats->pfc_frames_tx_hi, new->stats_tx.tx_gtxpp_hi,
 675		pstats->pfc_frames_tx_lo, new->stats_tx.tx_gtxpp_lo);
 676	ADD_64(pstats->pfc_frames_rx_hi, new->stats_rx.rx_grxpp_hi,
 677		pstats->pfc_frames_rx_lo, new->stats_rx.rx_grxpp_lo);
 678
 679	ADD_STAT64(stats_tx.tx_gt64, tx_stat_etherstatspkts64octets);
 680	ADD_STAT64(stats_tx.tx_gt127,
 681			tx_stat_etherstatspkts65octetsto127octets);
 682	ADD_STAT64(stats_tx.tx_gt255,
 683			tx_stat_etherstatspkts128octetsto255octets);
 684	ADD_STAT64(stats_tx.tx_gt511,
 685			tx_stat_etherstatspkts256octetsto511octets);
 686	ADD_STAT64(stats_tx.tx_gt1023,
 687			tx_stat_etherstatspkts512octetsto1023octets);
 688	ADD_STAT64(stats_tx.tx_gt1518,
 689			tx_stat_etherstatspkts1024octetsto1522octets);
 690	ADD_STAT64(stats_tx.tx_gt2047, tx_stat_mac_2047);
 691
 692	ADD_STAT64(stats_tx.tx_gt4095, tx_stat_mac_4095);
 693	ADD_STAT64(stats_tx.tx_gt9216, tx_stat_mac_9216);
 694	ADD_STAT64(stats_tx.tx_gt16383, tx_stat_mac_16383);
 695
 696	ADD_STAT64(stats_tx.tx_gterr,
 697			tx_stat_dot3statsinternalmactransmiterrors);
 698	ADD_STAT64(stats_tx.tx_gtufl, tx_stat_mac_ufl);
 699
 700	estats->etherstatspkts1024octetsto1522octets_hi =
 701	    pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_hi;
 702	estats->etherstatspkts1024octetsto1522octets_lo =
 703	    pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_lo;
 704
 705	estats->etherstatspktsover1522octets_hi =
 706	    pstats->mac_stx[1].tx_stat_mac_2047_hi;
 707	estats->etherstatspktsover1522octets_lo =
 708	    pstats->mac_stx[1].tx_stat_mac_2047_lo;
 709
 710	ADD_64(estats->etherstatspktsover1522octets_hi,
 711	       pstats->mac_stx[1].tx_stat_mac_4095_hi,
 712	       estats->etherstatspktsover1522octets_lo,
 713	       pstats->mac_stx[1].tx_stat_mac_4095_lo);
 714
 715	ADD_64(estats->etherstatspktsover1522octets_hi,
 716	       pstats->mac_stx[1].tx_stat_mac_9216_hi,
 717	       estats->etherstatspktsover1522octets_lo,
 718	       pstats->mac_stx[1].tx_stat_mac_9216_lo);
 719
 720	ADD_64(estats->etherstatspktsover1522octets_hi,
 721	       pstats->mac_stx[1].tx_stat_mac_16383_hi,
 722	       estats->etherstatspktsover1522octets_lo,
 723	       pstats->mac_stx[1].tx_stat_mac_16383_lo);
 724
 725	estats->pause_frames_received_hi =
 726				pstats->mac_stx[1].rx_stat_mac_xpf_hi;
 727	estats->pause_frames_received_lo =
 728				pstats->mac_stx[1].rx_stat_mac_xpf_lo;
 729
 730	estats->pause_frames_sent_hi =
 731				pstats->mac_stx[1].tx_stat_outxoffsent_hi;
 732	estats->pause_frames_sent_lo =
 733				pstats->mac_stx[1].tx_stat_outxoffsent_lo;
 734
 735	estats->pfc_frames_received_hi =
 736				pstats->pfc_frames_rx_hi;
 737	estats->pfc_frames_received_lo =
 738				pstats->pfc_frames_rx_lo;
 739	estats->pfc_frames_sent_hi =
 740				pstats->pfc_frames_tx_hi;
 741	estats->pfc_frames_sent_lo =
 742				pstats->pfc_frames_tx_lo;
 743}
 744
 745static void bnx2x_emac_stats_update(struct bnx2x *bp)
 746{
 747	struct emac_stats *new = bnx2x_sp(bp, mac_stats.emac_stats);
 748	struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
 749	struct bnx2x_eth_stats *estats = &bp->eth_stats;
 750
 751	UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets);
 752	UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets);
 753	UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors);
 754	UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors);
 755	UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors);
 756	UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors);
 757	UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts);
 758	UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong);
 759	UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments);
 760	UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers);
 761	UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived);
 762	UPDATE_EXTEND_STAT(rx_stat_xoffstateentered);
 763	UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived);
 764	UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived);
 765	UPDATE_EXTEND_STAT(tx_stat_outxonsent);
 766	UPDATE_EXTEND_STAT(tx_stat_outxoffsent);
 767	UPDATE_EXTEND_STAT(tx_stat_flowcontroldone);
 768	UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions);
 769	UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes);
 770	UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes);
 771	UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions);
 772	UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions);
 773	UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions);
 774	UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets);
 775	UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets);
 776	UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets);
 777	UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets);
 778	UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets);
 779	UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets);
 780	UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets);
 781	UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors);
 782
 783	estats->pause_frames_received_hi =
 784			pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi;
 785	estats->pause_frames_received_lo =
 786			pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo;
 787	ADD_64(estats->pause_frames_received_hi,
 788	       pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi,
 789	       estats->pause_frames_received_lo,
 790	       pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo);
 791
 792	estats->pause_frames_sent_hi =
 793			pstats->mac_stx[1].tx_stat_outxonsent_hi;
 794	estats->pause_frames_sent_lo =
 795			pstats->mac_stx[1].tx_stat_outxonsent_lo;
 796	ADD_64(estats->pause_frames_sent_hi,
 797	       pstats->mac_stx[1].tx_stat_outxoffsent_hi,
 798	       estats->pause_frames_sent_lo,
 799	       pstats->mac_stx[1].tx_stat_outxoffsent_lo);
 800}
 801
 802static int bnx2x_hw_stats_update(struct bnx2x *bp)
 803{
 804	struct nig_stats *new = bnx2x_sp(bp, nig_stats);
 805	struct nig_stats *old = &(bp->port.old_nig_stats);
 806	struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
 807	struct bnx2x_eth_stats *estats = &bp->eth_stats;
 808	struct {
 809		u32 lo;
 810		u32 hi;
 811	} diff;
 812
 813	switch (bp->link_vars.mac_type) {
 814	case MAC_TYPE_BMAC:
 815		bnx2x_bmac_stats_update(bp);
 816		break;
 817
 818	case MAC_TYPE_EMAC:
 819		bnx2x_emac_stats_update(bp);
 820		break;
 821
 822	case MAC_TYPE_UMAC:
 823	case MAC_TYPE_XMAC:
 824		bnx2x_mstat_stats_update(bp);
 825		break;
 826
 827	case MAC_TYPE_NONE: /* unreached */
 828		DP(BNX2X_MSG_STATS,
 829		   "stats updated by DMAE but no MAC active\n");
 830		return -1;
 831
 832	default: /* unreached */
 833		BNX2X_ERR("Unknown MAC type\n");
 834	}
 835
 836	ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo,
 837		      new->brb_discard - old->brb_discard);
 838	ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo,
 839		      new->brb_truncate - old->brb_truncate);
 840
 841	if (!CHIP_IS_E3(bp)) {
 842		UPDATE_STAT64_NIG(egress_mac_pkt0,
 843					etherstatspkts1024octetsto1522octets);
 844		UPDATE_STAT64_NIG(egress_mac_pkt1,
 845					etherstatspktsover1522octets);
 846	}
 847
 848	memcpy(old, new, sizeof(struct nig_stats));
 849
 850	BUILD_BUG_ON(sizeof(estats->shared) != sizeof(pstats->mac_stx[1]));
 851	memcpy(&(estats->shared), &(pstats->mac_stx[1]),
 852	       sizeof(struct mac_stx));
 853	estats->brb_drop_hi = pstats->brb_drop_hi;
 854	estats->brb_drop_lo = pstats->brb_drop_lo;
 855
 856	pstats->host_port_stats_counter++;
 857
 858	if (CHIP_IS_E3(bp)) {
 859		u32 lpi_reg = BP_PORT(bp) ? MISC_REG_CPMU_LP_SM_ENT_CNT_P1
 860					  : MISC_REG_CPMU_LP_SM_ENT_CNT_P0;
 861		estats->eee_tx_lpi += REG_RD(bp, lpi_reg);
 862	}
 863
 864	if (!BP_NOMCP(bp)) {
 865		u32 nig_timer_max =
 866			SHMEM_RD(bp, port_mb[BP_PORT(bp)].stat_nig_timer);
 867		if (nig_timer_max != estats->nig_timer_max) {
 868			estats->nig_timer_max = nig_timer_max;
 869			BNX2X_ERR("NIG timer max (%u)\n",
 870				  estats->nig_timer_max);
 871		}
 872	}
 873
 874	return 0;
 875}
 876
 877static int bnx2x_storm_stats_validate_counters(struct bnx2x *bp)
 878{
 879	struct stats_counter *counters = &bp->fw_stats_data->storm_counters;
 880	u16 cur_stats_counter;
 881	/* Make sure we use the value of the counter
 882	 * used for sending the last stats ramrod.
 883	 */
 884	cur_stats_counter = bp->stats_counter - 1;
 885
 886	/* are storm stats valid? */
 887	if (le16_to_cpu(counters->xstats_counter) != cur_stats_counter) {
 888		DP(BNX2X_MSG_STATS,
 889		   "stats not updated by xstorm  xstorm counter (0x%x) != stats_counter (0x%x)\n",
 890		   le16_to_cpu(counters->xstats_counter), bp->stats_counter);
 891		return -EAGAIN;
 892	}
 893
 894	if (le16_to_cpu(counters->ustats_counter) != cur_stats_counter) {
 895		DP(BNX2X_MSG_STATS,
 896		   "stats not updated by ustorm  ustorm counter (0x%x) != stats_counter (0x%x)\n",
 897		   le16_to_cpu(counters->ustats_counter), bp->stats_counter);
 898		return -EAGAIN;
 899	}
 900
 901	if (le16_to_cpu(counters->cstats_counter) != cur_stats_counter) {
 902		DP(BNX2X_MSG_STATS,
 903		   "stats not updated by cstorm  cstorm counter (0x%x) != stats_counter (0x%x)\n",
 904		   le16_to_cpu(counters->cstats_counter), bp->stats_counter);
 905		return -EAGAIN;
 906	}
 907
 908	if (le16_to_cpu(counters->tstats_counter) != cur_stats_counter) {
 909		DP(BNX2X_MSG_STATS,
 910		   "stats not updated by tstorm  tstorm counter (0x%x) != stats_counter (0x%x)\n",
 911		   le16_to_cpu(counters->tstats_counter), bp->stats_counter);
 912		return -EAGAIN;
 913	}
 914	return 0;
 915}
 916
 917static int bnx2x_storm_stats_update(struct bnx2x *bp)
 918{
 919	struct tstorm_per_port_stats *tport =
 920				&bp->fw_stats_data->port.tstorm_port_statistics;
 921	struct tstorm_per_pf_stats *tfunc =
 922				&bp->fw_stats_data->pf.tstorm_pf_statistics;
 923	struct host_func_stats *fstats = &bp->func_stats;
 924	struct bnx2x_eth_stats *estats = &bp->eth_stats;
 925	struct bnx2x_eth_stats_old *estats_old = &bp->eth_stats_old;
 926	int i;
 927
 928	/* vfs stat counter is managed by pf */
 929	if (IS_PF(bp) && bnx2x_storm_stats_validate_counters(bp))
 930		return -EAGAIN;
 931
 932	estats->error_bytes_received_hi = 0;
 933	estats->error_bytes_received_lo = 0;
 934
 935	for_each_eth_queue(bp, i) {
 936		struct bnx2x_fastpath *fp = &bp->fp[i];
 937		struct tstorm_per_queue_stats *tclient =
 938			&bp->fw_stats_data->queue_stats[i].
 939			tstorm_queue_statistics;
 940		struct tstorm_per_queue_stats *old_tclient =
 941			&bnx2x_fp_stats(bp, fp)->old_tclient;
 942		struct ustorm_per_queue_stats *uclient =
 943			&bp->fw_stats_data->queue_stats[i].
 944			ustorm_queue_statistics;
 945		struct ustorm_per_queue_stats *old_uclient =
 946			&bnx2x_fp_stats(bp, fp)->old_uclient;
 947		struct xstorm_per_queue_stats *xclient =
 948			&bp->fw_stats_data->queue_stats[i].
 949			xstorm_queue_statistics;
 950		struct xstorm_per_queue_stats *old_xclient =
 951			&bnx2x_fp_stats(bp, fp)->old_xclient;
 952		struct bnx2x_eth_q_stats *qstats =
 953			&bnx2x_fp_stats(bp, fp)->eth_q_stats;
 954		struct bnx2x_eth_q_stats_old *qstats_old =
 955			&bnx2x_fp_stats(bp, fp)->eth_q_stats_old;
 956
 957		u32 diff;
 958
 959		DP(BNX2X_MSG_STATS, "queue[%d]: ucast_sent 0x%x, bcast_sent 0x%x mcast_sent 0x%x\n",
 960		   i, xclient->ucast_pkts_sent,
 961		   xclient->bcast_pkts_sent, xclient->mcast_pkts_sent);
 962
 963		DP(BNX2X_MSG_STATS, "---------------\n");
 964
 965		UPDATE_QSTAT(tclient->rcv_bcast_bytes,
 966			     total_broadcast_bytes_received);
 967		UPDATE_QSTAT(tclient->rcv_mcast_bytes,
 968			     total_multicast_bytes_received);
 969		UPDATE_QSTAT(tclient->rcv_ucast_bytes,
 970			     total_unicast_bytes_received);
 971
 972		/*
 973		 * sum to total_bytes_received all
 974		 * unicast/multicast/broadcast
 975		 */
 976		qstats->total_bytes_received_hi =
 977			qstats->total_broadcast_bytes_received_hi;
 978		qstats->total_bytes_received_lo =
 979			qstats->total_broadcast_bytes_received_lo;
 980
 981		ADD_64(qstats->total_bytes_received_hi,
 982		       qstats->total_multicast_bytes_received_hi,
 983		       qstats->total_bytes_received_lo,
 984		       qstats->total_multicast_bytes_received_lo);
 985
 986		ADD_64(qstats->total_bytes_received_hi,
 987		       qstats->total_unicast_bytes_received_hi,
 988		       qstats->total_bytes_received_lo,
 989		       qstats->total_unicast_bytes_received_lo);
 990
 991		qstats->valid_bytes_received_hi =
 992					qstats->total_bytes_received_hi;
 993		qstats->valid_bytes_received_lo =
 994					qstats->total_bytes_received_lo;
 995
 996		UPDATE_EXTEND_TSTAT(rcv_ucast_pkts,
 997					total_unicast_packets_received);
 998		UPDATE_EXTEND_TSTAT(rcv_mcast_pkts,
 999					total_multicast_packets_received);
1000		UPDATE_EXTEND_TSTAT(rcv_bcast_pkts,
1001					total_broadcast_packets_received);
1002		UPDATE_EXTEND_E_TSTAT(pkts_too_big_discard,
1003				      etherstatsoverrsizepkts, 32);
1004		UPDATE_EXTEND_E_TSTAT(no_buff_discard, no_buff_discard, 16);
1005
1006		SUB_EXTEND_USTAT(ucast_no_buff_pkts,
1007					total_unicast_packets_received);
1008		SUB_EXTEND_USTAT(mcast_no_buff_pkts,
1009					total_multicast_packets_received);
1010		SUB_EXTEND_USTAT(bcast_no_buff_pkts,
1011					total_broadcast_packets_received);
1012		UPDATE_EXTEND_E_USTAT(ucast_no_buff_pkts, no_buff_discard);
1013		UPDATE_EXTEND_E_USTAT(mcast_no_buff_pkts, no_buff_discard);
1014		UPDATE_EXTEND_E_USTAT(bcast_no_buff_pkts, no_buff_discard);
1015
1016		UPDATE_QSTAT(xclient->bcast_bytes_sent,
1017			     total_broadcast_bytes_transmitted);
1018		UPDATE_QSTAT(xclient->mcast_bytes_sent,
1019			     total_multicast_bytes_transmitted);
1020		UPDATE_QSTAT(xclient->ucast_bytes_sent,
1021			     total_unicast_bytes_transmitted);
1022
1023		/*
1024		 * sum to total_bytes_transmitted all
1025		 * unicast/multicast/broadcast
1026		 */
1027		qstats->total_bytes_transmitted_hi =
1028				qstats->total_unicast_bytes_transmitted_hi;
1029		qstats->total_bytes_transmitted_lo =
1030				qstats->total_unicast_bytes_transmitted_lo;
1031
1032		ADD_64(qstats->total_bytes_transmitted_hi,
1033		       qstats->total_broadcast_bytes_transmitted_hi,
1034		       qstats->total_bytes_transmitted_lo,
1035		       qstats->total_broadcast_bytes_transmitted_lo);
1036
1037		ADD_64(qstats->total_bytes_transmitted_hi,
1038		       qstats->total_multicast_bytes_transmitted_hi,
1039		       qstats->total_bytes_transmitted_lo,
1040		       qstats->total_multicast_bytes_transmitted_lo);
1041
1042		UPDATE_EXTEND_XSTAT(ucast_pkts_sent,
1043					total_unicast_packets_transmitted);
1044		UPDATE_EXTEND_XSTAT(mcast_pkts_sent,
1045					total_multicast_packets_transmitted);
1046		UPDATE_EXTEND_XSTAT(bcast_pkts_sent,
1047					total_broadcast_packets_transmitted);
1048
1049		UPDATE_EXTEND_TSTAT(checksum_discard,
1050				    total_packets_received_checksum_discarded);
1051		UPDATE_EXTEND_TSTAT(ttl0_discard,
1052				    total_packets_received_ttl0_discarded);
1053
1054		UPDATE_EXTEND_XSTAT(error_drop_pkts,
1055				    total_transmitted_dropped_packets_error);
1056
1057		/* TPA aggregations completed */
1058		UPDATE_EXTEND_E_USTAT(coalesced_events, total_tpa_aggregations);
1059		/* Number of network frames aggregated by TPA */
1060		UPDATE_EXTEND_E_USTAT(coalesced_pkts,
1061				      total_tpa_aggregated_frames);
1062		/* Total number of bytes in completed TPA aggregations */
1063		UPDATE_QSTAT(uclient->coalesced_bytes, total_tpa_bytes);
1064
1065		UPDATE_ESTAT_QSTAT_64(total_tpa_bytes);
1066
1067		UPDATE_FSTAT_QSTAT(total_bytes_received);
1068		UPDATE_FSTAT_QSTAT(total_bytes_transmitted);
1069		UPDATE_FSTAT_QSTAT(total_unicast_packets_received);
1070		UPDATE_FSTAT_QSTAT(total_multicast_packets_received);
1071		UPDATE_FSTAT_QSTAT(total_broadcast_packets_received);
1072		UPDATE_FSTAT_QSTAT(total_unicast_packets_transmitted);
1073		UPDATE_FSTAT_QSTAT(total_multicast_packets_transmitted);
1074		UPDATE_FSTAT_QSTAT(total_broadcast_packets_transmitted);
1075		UPDATE_FSTAT_QSTAT(valid_bytes_received);
1076	}
1077
1078	ADD_64(estats->total_bytes_received_hi,
1079	       estats->rx_stat_ifhcinbadoctets_hi,
1080	       estats->total_bytes_received_lo,
1081	       estats->rx_stat_ifhcinbadoctets_lo);
1082
1083	ADD_64_LE(estats->total_bytes_received_hi,
1084		  tfunc->rcv_error_bytes.hi,
1085		  estats->total_bytes_received_lo,
1086		  tfunc->rcv_error_bytes.lo);
1087
1088	ADD_64_LE(estats->error_bytes_received_hi,
1089		  tfunc->rcv_error_bytes.hi,
1090		  estats->error_bytes_received_lo,
1091		  tfunc->rcv_error_bytes.lo);
1092
1093	UPDATE_ESTAT(etherstatsoverrsizepkts, rx_stat_dot3statsframestoolong);
1094
1095	ADD_64(estats->error_bytes_received_hi,
1096	       estats->rx_stat_ifhcinbadoctets_hi,
1097	       estats->error_bytes_received_lo,
1098	       estats->rx_stat_ifhcinbadoctets_lo);
1099
1100	if (bp->port.pmf) {
1101		struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old;
1102		UPDATE_FW_STAT(mac_filter_discard);
1103		UPDATE_FW_STAT(mf_tag_discard);
1104		UPDATE_FW_STAT(brb_truncate_discard);
1105		UPDATE_FW_STAT(mac_discard);
1106	}
1107
1108	fstats->host_func_stats_start = ++fstats->host_func_stats_end;
1109
1110	bp->stats_pending = 0;
1111
1112	return 0;
1113}
1114
1115static void bnx2x_net_stats_update(struct bnx2x *bp)
1116{
1117	struct bnx2x_eth_stats *estats = &bp->eth_stats;
1118	struct net_device_stats *nstats = &bp->dev->stats;
1119	unsigned long tmp;
1120	int i;
1121
1122	nstats->rx_packets =
1123		bnx2x_hilo(&estats->total_unicast_packets_received_hi) +
1124		bnx2x_hilo(&estats->total_multicast_packets_received_hi) +
1125		bnx2x_hilo(&estats->total_broadcast_packets_received_hi);
1126
1127	nstats->tx_packets =
1128		bnx2x_hilo(&estats->total_unicast_packets_transmitted_hi) +
1129		bnx2x_hilo(&estats->total_multicast_packets_transmitted_hi) +
1130		bnx2x_hilo(&estats->total_broadcast_packets_transmitted_hi);
1131
1132	nstats->rx_bytes = bnx2x_hilo(&estats->total_bytes_received_hi);
1133
1134	nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi);
1135
1136	tmp = estats->mac_discard;
1137	for_each_rx_queue(bp, i) {
1138		struct tstorm_per_queue_stats *old_tclient =
1139			&bp->fp_stats[i].old_tclient;
1140		tmp += le32_to_cpu(old_tclient->checksum_discard);
1141	}
1142	nstats->rx_dropped = tmp + bp->net_stats_old.rx_dropped;
1143
1144	nstats->tx_dropped = 0;
1145
1146	nstats->multicast =
1147		bnx2x_hilo(&estats->total_multicast_packets_received_hi);
1148
1149	nstats->collisions =
1150		bnx2x_hilo(&estats->tx_stat_etherstatscollisions_hi);
1151
1152	nstats->rx_length_errors =
1153		bnx2x_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) +
1154		bnx2x_hilo(&estats->etherstatsoverrsizepkts_hi);
1155	nstats->rx_over_errors = bnx2x_hilo(&estats->brb_drop_hi) +
1156				 bnx2x_hilo(&estats->brb_truncate_hi);
1157	nstats->rx_crc_errors =
1158		bnx2x_hilo(&estats->rx_stat_dot3statsfcserrors_hi);
1159	nstats->rx_frame_errors =
1160		bnx2x_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi);
1161	nstats->rx_fifo_errors = bnx2x_hilo(&estats->no_buff_discard_hi);
1162	nstats->rx_missed_errors = 0;
1163
1164	nstats->rx_errors = nstats->rx_length_errors +
1165			    nstats->rx_over_errors +
1166			    nstats->rx_crc_errors +
1167			    nstats->rx_frame_errors +
1168			    nstats->rx_fifo_errors +
1169			    nstats->rx_missed_errors;
1170
1171	nstats->tx_aborted_errors =
1172		bnx2x_hilo(&estats->tx_stat_dot3statslatecollisions_hi) +
1173		bnx2x_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi);
1174	nstats->tx_carrier_errors =
1175		bnx2x_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi);
1176	nstats->tx_fifo_errors = 0;
1177	nstats->tx_heartbeat_errors = 0;
1178	nstats->tx_window_errors = 0;
1179
1180	nstats->tx_errors = nstats->tx_aborted_errors +
1181			    nstats->tx_carrier_errors +
1182	    bnx2x_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi);
1183}
1184
1185static void bnx2x_drv_stats_update(struct bnx2x *bp)
1186{
1187	struct bnx2x_eth_stats *estats = &bp->eth_stats;
1188	int i;
1189
1190	for_each_queue(bp, i) {
1191		struct bnx2x_eth_q_stats *qstats = &bp->fp_stats[i].eth_q_stats;
1192		struct bnx2x_eth_q_stats_old *qstats_old =
1193			&bp->fp_stats[i].eth_q_stats_old;
1194
1195		UPDATE_ESTAT_QSTAT(driver_xoff);
1196		UPDATE_ESTAT_QSTAT(rx_err_discard_pkt);
1197		UPDATE_ESTAT_QSTAT(rx_skb_alloc_failed);
1198		UPDATE_ESTAT_QSTAT(hw_csum_err);
1199		UPDATE_ESTAT_QSTAT(driver_filtered_tx_pkt);
1200	}
1201}
1202
1203static bool bnx2x_edebug_stats_stopped(struct bnx2x *bp)
1204{
1205	u32 val;
1206
1207	if (SHMEM2_HAS(bp, edebug_driver_if[1])) {
1208		val = SHMEM2_RD(bp, edebug_driver_if[1]);
1209
1210		if (val == EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT)
1211			return true;
1212	}
1213
1214	return false;
1215}
1216
1217static void bnx2x_stats_update(struct bnx2x *bp)
1218{
1219	u32 *stats_comp = bnx2x_sp(bp, stats_comp);
1220
1221	if (bnx2x_edebug_stats_stopped(bp))
1222		return;
1223
1224	if (IS_PF(bp)) {
1225		if (*stats_comp != DMAE_COMP_VAL)
1226			return;
1227
1228		if (bp->port.pmf)
1229			bnx2x_hw_stats_update(bp);
1230
1231		if (bnx2x_storm_stats_update(bp)) {
1232			if (bp->stats_pending++ == 3) {
1233				BNX2X_ERR("storm stats were not updated for 3 times\n");
1234				bnx2x_panic();
1235			}
1236			return;
1237		}
1238	} else {
1239		/* vf doesn't collect HW statistics, and doesn't get completions
1240		 * perform only update
1241		 */
1242		bnx2x_storm_stats_update(bp);
1243	}
1244
1245	bnx2x_net_stats_update(bp);
1246	bnx2x_drv_stats_update(bp);
1247
1248	/* vf is done */
1249	if (IS_VF(bp))
1250		return;
1251
1252	if (netif_msg_timer(bp)) {
1253		struct bnx2x_eth_stats *estats = &bp->eth_stats;
1254
1255		netdev_dbg(bp->dev, "brb drops %u  brb truncate %u\n",
1256		       estats->brb_drop_lo, estats->brb_truncate_lo);
1257	}
1258
1259	bnx2x_hw_stats_post(bp);
1260	bnx2x_storm_stats_post(bp);
1261}
1262
1263static void bnx2x_port_stats_stop(struct bnx2x *bp)
1264{
1265	struct dmae_command *dmae;
1266	u32 opcode;
1267	int loader_idx = PMF_DMAE_C(bp);
1268	u32 *stats_comp = bnx2x_sp(bp, stats_comp);
1269
1270	bp->executer_idx = 0;
1271
1272	opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, false, 0);
1273
1274	if (bp->port.port_stx) {
1275
1276		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
1277		if (bp->func_stx)
1278			dmae->opcode = bnx2x_dmae_opcode_add_comp(
1279						opcode, DMAE_COMP_GRC);
1280		else
1281			dmae->opcode = bnx2x_dmae_opcode_add_comp(
1282						opcode, DMAE_COMP_PCI);
1283
1284		dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
1285		dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
1286		dmae->dst_addr_lo = bp->port.port_stx >> 2;
1287		dmae->dst_addr_hi = 0;
1288		dmae->len = bnx2x_get_port_stats_dma_len(bp);
1289		if (bp->func_stx) {
1290			dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
1291			dmae->comp_addr_hi = 0;
1292			dmae->comp_val = 1;
1293		} else {
1294			dmae->comp_addr_lo =
1295				U64_LO(bnx2x_sp_mapping(bp, stats_comp));
1296			dmae->comp_addr_hi =
1297				U64_HI(bnx2x_sp_mapping(bp, stats_comp));
1298			dmae->comp_val = DMAE_COMP_VAL;
1299
1300			*stats_comp = 0;
1301		}
1302	}
1303
1304	if (bp->func_stx) {
1305
1306		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
1307		dmae->opcode =
1308			bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
1309		dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
1310		dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
1311		dmae->dst_addr_lo = bp->func_stx >> 2;
1312		dmae->dst_addr_hi = 0;
1313		dmae->len = sizeof(struct host_func_stats) >> 2;
1314		dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
1315		dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
1316		dmae->comp_val = DMAE_COMP_VAL;
1317
1318		*stats_comp = 0;
1319	}
1320}
1321
1322static void bnx2x_stats_stop(struct bnx2x *bp)
1323{
1324	bool update = false;
1325
1326	bnx2x_stats_comp(bp);
1327
1328	if (bp->port.pmf)
1329		update = (bnx2x_hw_stats_update(bp) == 0);
1330
1331	update |= (bnx2x_storm_stats_update(bp) == 0);
1332
1333	if (update) {
1334		bnx2x_net_stats_update(bp);
1335
1336		if (bp->port.pmf)
1337			bnx2x_port_stats_stop(bp);
1338
1339		bnx2x_hw_stats_post(bp);
1340		bnx2x_stats_comp(bp);
1341	}
1342}
1343
1344static void bnx2x_stats_do_nothing(struct bnx2x *bp)
1345{
1346}
1347
1348static const struct {
1349	void (*action)(struct bnx2x *bp);
1350	enum bnx2x_stats_state next_state;
1351} bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = {
1352/* state	event	*/
1353{
1354/* DISABLED	PMF	*/ {bnx2x_stats_pmf_update, STATS_STATE_DISABLED},
1355/*		LINK_UP	*/ {bnx2x_stats_start,      STATS_STATE_ENABLED},
1356/*		UPDATE	*/ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED},
1357/*		STOP	*/ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED}
1358},
1359{
1360/* ENABLED	PMF	*/ {bnx2x_stats_pmf_start,  STATS_STATE_ENABLED},
1361/*		LINK_UP	*/ {bnx2x_stats_restart,    STATS_STATE_ENABLED},
1362/*		UPDATE	*/ {bnx2x_stats_update,     STATS_STATE_ENABLED},
1363/*		STOP	*/ {bnx2x_stats_stop,       STATS_STATE_DISABLED}
1364}
1365};
1366
1367void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event)
1368{
1369	enum bnx2x_stats_state state = bp->stats_state;
1370
1371	if (unlikely(bp->panic))
1372		return;
1373
1374	/* Statistics update run from timer context, and we don't want to stop
1375	 * that context in case someone is in the middle of a transition.
1376	 * For other events, wait a bit until lock is taken.
1377	 */
1378	if (down_trylock(&bp->stats_lock)) {
1379		if (event == STATS_EVENT_UPDATE)
1380			return;
1381
1382		DP(BNX2X_MSG_STATS,
1383		   "Unlikely stats' lock contention [event %d]\n", event);
1384		if (unlikely(down_timeout(&bp->stats_lock, HZ / 10))) {
1385			BNX2X_ERR("Failed to take stats lock [event %d]\n",
1386				  event);
1387			return;
1388		}
1389	}
1390
1391	bnx2x_stats_stm[state][event].action(bp);
1392	bp->stats_state = bnx2x_stats_stm[state][event].next_state;
1393
1394	up(&bp->stats_lock);
1395
1396	if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
1397		DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
1398		   state, event, bp->stats_state);
1399}
1400
1401static void bnx2x_port_stats_base_init(struct bnx2x *bp)
1402{
1403	struct dmae_command *dmae;
1404	u32 *stats_comp = bnx2x_sp(bp, stats_comp);
1405
1406	/* sanity */
1407	if (!bp->port.pmf || !bp->port.port_stx) {
1408		BNX2X_ERR("BUG!\n");
1409		return;
1410	}
1411
1412	bp->executer_idx = 0;
1413
1414	dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
1415	dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
1416					 true, DMAE_COMP_PCI);
1417	dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
1418	dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
1419	dmae->dst_addr_lo = bp->port.port_stx >> 2;
1420	dmae->dst_addr_hi = 0;
1421	dmae->len = bnx2x_get_port_stats_dma_len(bp);
1422	dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
1423	dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
1424	dmae->comp_val = DMAE_COMP_VAL;
1425
1426	*stats_comp = 0;
1427	bnx2x_hw_stats_post(bp);
1428	bnx2x_stats_comp(bp);
1429}
1430
1431/* This function will prepare the statistics ramrod data the way
1432 * we will only have to increment the statistics counter and
1433 * send the ramrod each time we have to.
1434 */
1435static void bnx2x_prep_fw_stats_req(struct bnx2x *bp)
1436{
1437	int i;
1438	int first_queue_query_index;
1439	struct stats_query_header *stats_hdr = &bp->fw_stats_req->hdr;
1440
1441	dma_addr_t cur_data_offset;
1442	struct stats_query_entry *cur_query_entry;
1443
1444	stats_hdr->cmd_num = bp->fw_stats_num;
1445	stats_hdr->drv_stats_counter = 0;
1446
1447	/* storm_counters struct contains the counters of completed
1448	 * statistics requests per storm which are incremented by FW
1449	 * each time it completes hadning a statistics ramrod. We will
1450	 * check these counters in the timer handler and discard a
1451	 * (statistics) ramrod completion.
1452	 */
1453	cur_data_offset = bp->fw_stats_data_mapping +
1454		offsetof(struct bnx2x_fw_stats_data, storm_counters);
1455
1456	stats_hdr->stats_counters_addrs.hi =
1457		cpu_to_le32(U64_HI(cur_data_offset));
1458	stats_hdr->stats_counters_addrs.lo =
1459		cpu_to_le32(U64_LO(cur_data_offset));
1460
1461	/* prepare to the first stats ramrod (will be completed with
1462	 * the counters equal to zero) - init counters to somethig different.
1463	 */
1464	memset(&bp->fw_stats_data->storm_counters, 0xff,
1465	       sizeof(struct stats_counter));
1466
1467	/**** Port FW statistics data ****/
1468	cur_data_offset = bp->fw_stats_data_mapping +
1469		offsetof(struct bnx2x_fw_stats_data, port);
1470
1471	cur_query_entry = &bp->fw_stats_req->query[BNX2X_PORT_QUERY_IDX];
1472
1473	cur_query_entry->kind = STATS_TYPE_PORT;
1474	/* For port query index is a DONT CARE */
1475	cur_query_entry->index = BP_PORT(bp);
1476	/* For port query funcID is a DONT CARE */
1477	cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
1478	cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
1479	cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
1480
1481	/**** PF FW statistics data ****/
1482	cur_data_offset = bp->fw_stats_data_mapping +
1483		offsetof(struct bnx2x_fw_stats_data, pf);
1484
1485	cur_query_entry = &bp->fw_stats_req->query[BNX2X_PF_QUERY_IDX];
1486
1487	cur_query_entry->kind = STATS_TYPE_PF;
1488	/* For PF query index is a DONT CARE */
1489	cur_query_entry->index = BP_PORT(bp);
1490	cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
1491	cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
1492	cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
1493
1494	/**** FCoE FW statistics data ****/
1495	if (!NO_FCOE(bp)) {
1496		cur_data_offset = bp->fw_stats_data_mapping +
1497			offsetof(struct bnx2x_fw_stats_data, fcoe);
1498
1499		cur_query_entry =
1500			&bp->fw_stats_req->query[BNX2X_FCOE_QUERY_IDX];
1501
1502		cur_query_entry->kind = STATS_TYPE_FCOE;
1503		/* For FCoE query index is a DONT CARE */
1504		cur_query_entry->index = BP_PORT(bp);
1505		cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
1506		cur_query_entry->address.hi =
1507			cpu_to_le32(U64_HI(cur_data_offset));
1508		cur_query_entry->address.lo =
1509			cpu_to_le32(U64_LO(cur_data_offset));
1510	}
1511
1512	/**** Clients' queries ****/
1513	cur_data_offset = bp->fw_stats_data_mapping +
1514		offsetof(struct bnx2x_fw_stats_data, queue_stats);
1515
1516	/* first queue query index depends whether FCoE offloaded request will
1517	 * be included in the ramrod
1518	 */
1519	if (!NO_FCOE(bp))
1520		first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX;
1521	else
1522		first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX - 1;
1523
1524	for_each_eth_queue(bp, i) {
1525		cur_query_entry =
1526			&bp->fw_stats_req->
1527					query[first_queue_query_index + i];
1528
1529		cur_query_entry->kind = STATS_TYPE_QUEUE;
1530		cur_query_entry->index = bnx2x_stats_id(&bp->fp[i]);
1531		cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
1532		cur_query_entry->address.hi =
1533			cpu_to_le32(U64_HI(cur_data_offset));
1534		cur_query_entry->address.lo =
1535			cpu_to_le32(U64_LO(cur_data_offset));
1536
1537		cur_data_offset += sizeof(struct per_queue_stats);
1538	}
1539
1540	/* add FCoE queue query if needed */
1541	if (!NO_FCOE(bp)) {
1542		cur_query_entry =
1543			&bp->fw_stats_req->
1544					query[first_queue_query_index + i];
1545
1546		cur_query_entry->kind = STATS_TYPE_QUEUE;
1547		cur_query_entry->index = bnx2x_stats_id(&bp->fp[FCOE_IDX(bp)]);
1548		cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
1549		cur_query_entry->address.hi =
1550			cpu_to_le32(U64_HI(cur_data_offset));
1551		cur_query_entry->address.lo =
1552			cpu_to_le32(U64_LO(cur_data_offset));
1553	}
1554}
1555
1556void bnx2x_memset_stats(struct bnx2x *bp)
1557{
1558	int i;
1559
1560	/* function stats */
1561	for_each_queue(bp, i) {
1562		struct bnx2x_fp_stats *fp_stats = &bp->fp_stats[i];
1563
1564		memset(&fp_stats->old_tclient, 0,
1565		       sizeof(fp_stats->old_tclient));
1566		memset(&fp_stats->old_uclient, 0,
1567		       sizeof(fp_stats->old_uclient));
1568		memset(&fp_stats->old_xclient, 0,
1569		       sizeof(fp_stats->old_xclient));
1570		if (bp->stats_init) {
1571			memset(&fp_stats->eth_q_stats, 0,
1572			       sizeof(fp_stats->eth_q_stats));
1573			memset(&fp_stats->eth_q_stats_old, 0,
1574			       sizeof(fp_stats->eth_q_stats_old));
1575		}
1576	}
1577
1578	memset(&bp->dev->stats, 0, sizeof(bp->dev->stats));
1579
1580	if (bp->stats_init) {
1581		memset(&bp->net_stats_old, 0, sizeof(bp->net_stats_old));
1582		memset(&bp->fw_stats_old, 0, sizeof(bp->fw_stats_old));
1583		memset(&bp->eth_stats_old, 0, sizeof(bp->eth_stats_old));
1584		memset(&bp->eth_stats, 0, sizeof(bp->eth_stats));
1585		memset(&bp->func_stats, 0, sizeof(bp->func_stats));
1586	}
1587
1588	bp->stats_state = STATS_STATE_DISABLED;
1589
1590	if (bp->port.pmf && bp->port.port_stx)
1591		bnx2x_port_stats_base_init(bp);
1592
1593	/* mark the end of statistics initialization */
1594	bp->stats_init = false;
1595}
1596
1597void bnx2x_stats_init(struct bnx2x *bp)
1598{
1599	int /*abs*/port = BP_PORT(bp);
1600	int mb_idx = BP_FW_MB_IDX(bp);
1601
1602	if (IS_VF(bp)) {
1603		bnx2x_memset_stats(bp);
1604		return;
1605	}
1606
1607	bp->stats_pending = 0;
1608	bp->executer_idx = 0;
1609	bp->stats_counter = 0;
1610
1611	/* port and func stats for management */
1612	if (!BP_NOMCP(bp)) {
1613		bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx);
1614		bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param);
1615
1616	} else {
1617		bp->port.port_stx = 0;
1618		bp->func_stx = 0;
1619	}
1620	DP(BNX2X_MSG_STATS, "port_stx 0x%x  func_stx 0x%x\n",
1621	   bp->port.port_stx, bp->func_stx);
1622
1623	/* pmf should retrieve port statistics from SP on a non-init*/
1624	if (!bp->stats_init && bp->port.pmf && bp->port.port_stx)
1625		bnx2x_stats_handle(bp, STATS_EVENT_PMF);
1626
1627	port = BP_PORT(bp);
1628	/* port stats */
1629	memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats));
1630	bp->port.old_nig_stats.brb_discard =
1631			REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38);
1632	bp->port.old_nig_stats.brb_truncate =
1633			REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38);
1634	if (!CHIP_IS_E3(bp)) {
1635		REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50,
1636			    &(bp->port.old_nig_stats.egress_mac_pkt0), 2);
1637		REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50,
1638			    &(bp->port.old_nig_stats.egress_mac_pkt1), 2);
1639	}
1640
1641	/* Prepare statistics ramrod data */
1642	bnx2x_prep_fw_stats_req(bp);
1643
1644	/* Clean SP from previous statistics */
1645	if (bp->stats_init) {
1646		if (bp->func_stx) {
1647			memset(bnx2x_sp(bp, func_stats), 0,
1648			       sizeof(struct host_func_stats));
1649			bnx2x_func_stats_init(bp);
1650			bnx2x_hw_stats_post(bp);
1651			bnx2x_stats_comp(bp);
1652		}
1653	}
1654
1655	bnx2x_memset_stats(bp);
1656}
1657
1658void bnx2x_save_statistics(struct bnx2x *bp)
1659{
1660	int i;
1661	struct net_device_stats *nstats = &bp->dev->stats;
1662
1663	/* save queue statistics */
1664	for_each_eth_queue(bp, i) {
1665		struct bnx2x_fastpath *fp = &bp->fp[i];
1666		struct bnx2x_eth_q_stats *qstats =
1667			&bnx2x_fp_stats(bp, fp)->eth_q_stats;
1668		struct bnx2x_eth_q_stats_old *qstats_old =
1669			&bnx2x_fp_stats(bp, fp)->eth_q_stats_old;
1670
1671		UPDATE_QSTAT_OLD(total_unicast_bytes_received_hi);
1672		UPDATE_QSTAT_OLD(total_unicast_bytes_received_lo);
1673		UPDATE_QSTAT_OLD(total_broadcast_bytes_received_hi);
1674		UPDATE_QSTAT_OLD(total_broadcast_bytes_received_lo);
1675		UPDATE_QSTAT_OLD(total_multicast_bytes_received_hi);
1676		UPDATE_QSTAT_OLD(total_multicast_bytes_received_lo);
1677		UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_hi);
1678		UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_lo);
1679		UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_hi);
1680		UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_lo);
1681		UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_hi);
1682		UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_lo);
1683		UPDATE_QSTAT_OLD(total_tpa_bytes_hi);
1684		UPDATE_QSTAT_OLD(total_tpa_bytes_lo);
1685	}
1686
1687	/* save net_device_stats statistics */
1688	bp->net_stats_old.rx_dropped = nstats->rx_dropped;
1689
1690	/* store port firmware statistics */
1691	if (bp->port.pmf && IS_MF(bp)) {
1692		struct bnx2x_eth_stats *estats = &bp->eth_stats;
1693		struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old;
1694		UPDATE_FW_STAT_OLD(mac_filter_discard);
1695		UPDATE_FW_STAT_OLD(mf_tag_discard);
1696		UPDATE_FW_STAT_OLD(brb_truncate_discard);
1697		UPDATE_FW_STAT_OLD(mac_discard);
1698	}
1699}
1700
1701void bnx2x_afex_collect_stats(struct bnx2x *bp, void *void_afex_stats,
1702			      u32 stats_type)
1703{
1704	int i;
1705	struct afex_stats *afex_stats = (struct afex_stats *)void_afex_stats;
1706	struct bnx2x_eth_stats *estats = &bp->eth_stats;
1707	struct per_queue_stats *fcoe_q_stats =
1708		&bp->fw_stats_data->queue_stats[FCOE_IDX(bp)];
1709
1710	struct tstorm_per_queue_stats *fcoe_q_tstorm_stats =
1711		&fcoe_q_stats->tstorm_queue_statistics;
1712
1713	struct ustorm_per_queue_stats *fcoe_q_ustorm_stats =
1714		&fcoe_q_stats->ustorm_queue_statistics;
1715
1716	struct xstorm_per_queue_stats *fcoe_q_xstorm_stats =
1717		&fcoe_q_stats->xstorm_queue_statistics;
1718
1719	struct fcoe_statistics_params *fw_fcoe_stat =
1720		&bp->fw_stats_data->fcoe;
1721
1722	memset(afex_stats, 0, sizeof(struct afex_stats));
1723
1724	for_each_eth_queue(bp, i) {
1725		struct bnx2x_eth_q_stats *qstats = &bp->fp_stats[i].eth_q_stats;
1726
1727		ADD_64(afex_stats->rx_unicast_bytes_hi,
1728		       qstats->total_unicast_bytes_received_hi,
1729		       afex_stats->rx_unicast_bytes_lo,
1730		       qstats->total_unicast_bytes_received_lo);
1731
1732		ADD_64(afex_stats->rx_broadcast_bytes_hi,
1733		       qstats->total_broadcast_bytes_received_hi,
1734		       afex_stats->rx_broadcast_bytes_lo,
1735		       qstats->total_broadcast_bytes_received_lo);
1736
1737		ADD_64(afex_stats->rx_multicast_bytes_hi,
1738		       qstats->total_multicast_bytes_received_hi,
1739		       afex_stats->rx_multicast_bytes_lo,
1740		       qstats->total_multicast_bytes_received_lo);
1741
1742		ADD_64(afex_stats->rx_unicast_frames_hi,
1743		       qstats->total_unicast_packets_received_hi,
1744		       afex_stats->rx_unicast_frames_lo,
1745		       qstats->total_unicast_packets_received_lo);
1746
1747		ADD_64(afex_stats->rx_broadcast_frames_hi,
1748		       qstats->total_broadcast_packets_received_hi,
1749		       afex_stats->rx_broadcast_frames_lo,
1750		       qstats->total_broadcast_packets_received_lo);
1751
1752		ADD_64(afex_stats->rx_multicast_frames_hi,
1753		       qstats->total_multicast_packets_received_hi,
1754		       afex_stats->rx_multicast_frames_lo,
1755		       qstats->total_multicast_packets_received_lo);
1756
1757		/* sum to rx_frames_discarded all discraded
1758		 * packets due to size, ttl0 and checksum
1759		 */
1760		ADD_64(afex_stats->rx_frames_discarded_hi,
1761		       qstats->total_packets_received_checksum_discarded_hi,
1762		       afex_stats->rx_frames_discarded_lo,
1763		       qstats->total_packets_received_checksum_discarded_lo);
1764
1765		ADD_64(afex_stats->rx_frames_discarded_hi,
1766		       qstats->total_packets_received_ttl0_discarded_hi,
1767		       afex_stats->rx_frames_discarded_lo,
1768		       qstats->total_packets_received_ttl0_discarded_lo);
1769
1770		ADD_64(afex_stats->rx_frames_discarded_hi,
1771		       qstats->etherstatsoverrsizepkts_hi,
1772		       afex_stats->rx_frames_discarded_lo,
1773		       qstats->etherstatsoverrsizepkts_lo);
1774
1775		ADD_64(afex_stats->rx_frames_dropped_hi,
1776		       qstats->no_buff_discard_hi,
1777		       afex_stats->rx_frames_dropped_lo,
1778		       qstats->no_buff_discard_lo);
1779
1780		ADD_64(afex_stats->tx_unicast_bytes_hi,
1781		       qstats->total_unicast_bytes_transmitted_hi,
1782		       afex_stats->tx_unicast_bytes_lo,
1783		       qstats->total_unicast_bytes_transmitted_lo);
1784
1785		ADD_64(afex_stats->tx_broadcast_bytes_hi,
1786		       qstats->total_broadcast_bytes_transmitted_hi,
1787		       afex_stats->tx_broadcast_bytes_lo,
1788		       qstats->total_broadcast_bytes_transmitted_lo);
1789
1790		ADD_64(afex_stats->tx_multicast_bytes_hi,
1791		       qstats->total_multicast_bytes_transmitted_hi,
1792		       afex_stats->tx_multicast_bytes_lo,
1793		       qstats->total_multicast_bytes_transmitted_lo);
1794
1795		ADD_64(afex_stats->tx_unicast_frames_hi,
1796		       qstats->total_unicast_packets_transmitted_hi,
1797		       afex_stats->tx_unicast_frames_lo,
1798		       qstats->total_unicast_packets_transmitted_lo);
1799
1800		ADD_64(afex_stats->tx_broadcast_frames_hi,
1801		       qstats->total_broadcast_packets_transmitted_hi,
1802		       afex_stats->tx_broadcast_frames_lo,
1803		       qstats->total_broadcast_packets_transmitted_lo);
1804
1805		ADD_64(afex_stats->tx_multicast_frames_hi,
1806		       qstats->total_multicast_packets_transmitted_hi,
1807		       afex_stats->tx_multicast_frames_lo,
1808		       qstats->total_multicast_packets_transmitted_lo);
1809
1810		ADD_64(afex_stats->tx_frames_dropped_hi,
1811		       qstats->total_transmitted_dropped_packets_error_hi,
1812		       afex_stats->tx_frames_dropped_lo,
1813		       qstats->total_transmitted_dropped_packets_error_lo);
1814	}
1815
1816	/* now add FCoE statistics which are collected separately
1817	 * (both offloaded and non offloaded)
1818	 */
1819	if (!NO_FCOE(bp)) {
1820		ADD_64_LE(afex_stats->rx_unicast_bytes_hi,
1821			  LE32_0,
1822			  afex_stats->rx_unicast_bytes_lo,
1823			  fw_fcoe_stat->rx_stat0.fcoe_rx_byte_cnt);
1824
1825		ADD_64_LE(afex_stats->rx_unicast_bytes_hi,
1826			  fcoe_q_tstorm_stats->rcv_ucast_bytes.hi,
1827			  afex_stats->rx_unicast_bytes_lo,
1828			  fcoe_q_tstorm_stats->rcv_ucast_bytes.lo);
1829
1830		ADD_64_LE(afex_stats->rx_broadcast_bytes_hi,
1831			  fcoe_q_tstorm_stats->rcv_bcast_bytes.hi,
1832			  afex_stats->rx_broadcast_bytes_lo,
1833			  fcoe_q_tstorm_stats->rcv_bcast_bytes.lo);
1834
1835		ADD_64_LE(afex_stats->rx_multicast_bytes_hi,
1836			  fcoe_q_tstorm_stats->rcv_mcast_bytes.hi,
1837			  afex_stats->rx_multicast_bytes_lo,
1838			  fcoe_q_tstorm_stats->rcv_mcast_bytes.lo);
1839
1840		ADD_64_LE(afex_stats->rx_unicast_frames_hi,
1841			  LE32_0,
1842			  afex_stats->rx_unicast_frames_lo,
1843			  fw_fcoe_stat->rx_stat0.fcoe_rx_pkt_cnt);
1844
1845		ADD_64_LE(afex_stats->rx_unicast_frames_hi,
1846			  LE32_0,
1847			  afex_stats->rx_unicast_frames_lo,
1848			  fcoe_q_tstorm_stats->rcv_ucast_pkts);
1849
1850		ADD_64_LE(afex_stats->rx_broadcast_frames_hi,
1851			  LE32_0,
1852			  afex_stats->rx_broadcast_frames_lo,
1853			  fcoe_q_tstorm_stats->rcv_bcast_pkts);
1854
1855		ADD_64_LE(afex_stats->rx_multicast_frames_hi,
1856			  LE32_0,
1857			  afex_stats->rx_multicast_frames_lo,
1858			  fcoe_q_tstorm_stats->rcv_ucast_pkts);
1859
1860		ADD_64_LE(afex_stats->rx_frames_discarded_hi,
1861			  LE32_0,
1862			  afex_stats->rx_frames_discarded_lo,
1863			  fcoe_q_tstorm_stats->checksum_discard);
1864
1865		ADD_64_LE(afex_stats->rx_frames_discarded_hi,
1866			  LE32_0,
1867			  afex_stats->rx_frames_discarded_lo,
1868			  fcoe_q_tstorm_stats->pkts_too_big_discard);
1869
1870		ADD_64_LE(afex_stats->rx_frames_discarded_hi,
1871			  LE32_0,
1872			  afex_stats->rx_frames_discarded_lo,
1873			  fcoe_q_tstorm_stats->ttl0_discard);
1874
1875		ADD_64_LE16(afex_stats->rx_frames_dropped_hi,
1876			    LE16_0,
1877			    afex_stats->rx_frames_dropped_lo,
1878			    fcoe_q_tstorm_stats->no_buff_discard);
1879
1880		ADD_64_LE(afex_stats->rx_frames_dropped_hi,
1881			  LE32_0,
1882			  afex_stats->rx_frames_dropped_lo,
1883			  fcoe_q_ustorm_stats->ucast_no_buff_pkts);
1884
1885		ADD_64_LE(afex_stats->rx_frames_dropped_hi,
1886			  LE32_0,
1887			  afex_stats->rx_frames_dropped_lo,
1888			  fcoe_q_ustorm_stats->mcast_no_buff_pkts);
1889
1890		ADD_64_LE(afex_stats->rx_frames_dropped_hi,
1891			  LE32_0,
1892			  afex_stats->rx_frames_dropped_lo,
1893			  fcoe_q_ustorm_stats->bcast_no_buff_pkts);
1894
1895		ADD_64_LE(afex_stats->rx_frames_dropped_hi,
1896			  LE32_0,
1897			  afex_stats->rx_frames_dropped_lo,
1898			  fw_fcoe_stat->rx_stat1.fcoe_rx_drop_pkt_cnt);
1899
1900		ADD_64_LE(afex_stats->rx_frames_dropped_hi,
1901			  LE32_0,
1902			  afex_stats->rx_frames_dropped_lo,
1903			  fw_fcoe_stat->rx_stat2.fcoe_rx_drop_pkt_cnt);
1904
1905		ADD_64_LE(afex_stats->tx_unicast_bytes_hi,
1906			  LE32_0,
1907			  afex_stats->tx_unicast_bytes_lo,
1908			  fw_fcoe_stat->tx_stat.fcoe_tx_byte_cnt);
1909
1910		ADD_64_LE(afex_stats->tx_unicast_bytes_hi,
1911			  fcoe_q_xstorm_stats->ucast_bytes_sent.hi,
1912			  afex_stats->tx_unicast_bytes_lo,
1913			  fcoe_q_xstorm_stats->ucast_bytes_sent.lo);
1914
1915		ADD_64_LE(afex_stats->tx_broadcast_bytes_hi,
1916			  fcoe_q_xstorm_stats->bcast_bytes_sent.hi,
1917			  afex_stats->tx_broadcast_bytes_lo,
1918			  fcoe_q_xstorm_stats->bcast_bytes_sent.lo);
1919
1920		ADD_64_LE(afex_stats->tx_multicast_bytes_hi,
1921			  fcoe_q_xstorm_stats->mcast_bytes_sent.hi,
1922			  afex_stats->tx_multicast_bytes_lo,
1923			  fcoe_q_xstorm_stats->mcast_bytes_sent.lo);
1924
1925		ADD_64_LE(afex_stats->tx_unicast_frames_hi,
1926			  LE32_0,
1927			  afex_stats->tx_unicast_frames_lo,
1928			  fw_fcoe_stat->tx_stat.fcoe_tx_pkt_cnt);
1929
1930		ADD_64_LE(afex_stats->tx_unicast_frames_hi,
1931			  LE32_0,
1932			  afex_stats->tx_unicast_frames_lo,
1933			  fcoe_q_xstorm_stats->ucast_pkts_sent);
1934
1935		ADD_64_LE(afex_stats->tx_broadcast_frames_hi,
1936			  LE32_0,
1937			  afex_stats->tx_broadcast_frames_lo,
1938			  fcoe_q_xstorm_stats->bcast_pkts_sent);
1939
1940		ADD_64_LE(afex_stats->tx_multicast_frames_hi,
1941			  LE32_0,
1942			  afex_stats->tx_multicast_frames_lo,
1943			  fcoe_q_xstorm_stats->mcast_pkts_sent);
1944
1945		ADD_64_LE(afex_stats->tx_frames_dropped_hi,
1946			  LE32_0,
1947			  afex_stats->tx_frames_dropped_lo,
1948			  fcoe_q_xstorm_stats->error_drop_pkts);
1949	}
1950
1951	/* if port stats are requested, add them to the PMF
1952	 * stats, as anyway they will be accumulated by the
1953	 * MCP before sent to the switch
1954	 */
1955	if ((bp->port.pmf) && (stats_type == VICSTATST_UIF_INDEX)) {
1956		ADD_64(afex_stats->rx_frames_dropped_hi,
1957		       0,
1958		       afex_stats->rx_frames_dropped_lo,
1959		       estats->mac_filter_discard);
1960		ADD_64(afex_stats->rx_frames_dropped_hi,
1961		       0,
1962		       afex_stats->rx_frames_dropped_lo,
1963		       estats->brb_truncate_discard);
1964		ADD_64(afex_stats->rx_frames_discarded_hi,
1965		       0,
1966		       afex_stats->rx_frames_discarded_lo,
1967		       estats->mac_discard);
1968	}
1969}
1970
1971int bnx2x_stats_safe_exec(struct bnx2x *bp,
1972			  void (func_to_exec)(void *cookie),
1973			  void *cookie)
1974{
1975	int cnt = 10, rc = 0;
1976
1977	/* Wait for statistics to end [while blocking further requests],
1978	 * then run supplied function 'safely'.
1979	 */
1980	rc = down_timeout(&bp->stats_lock, HZ / 10);
1981	if (unlikely(rc)) {
1982		BNX2X_ERR("Failed to take statistics lock for safe execution\n");
1983		goto out_no_lock;
1984	}
1985
1986	bnx2x_stats_comp(bp);
1987	while (bp->stats_pending && cnt--)
1988		if (bnx2x_storm_stats_update(bp))
1989			usleep_range(1000, 2000);
1990	if (bp->stats_pending) {
1991		BNX2X_ERR("Failed to wait for stats pending to clear [possibly FW is stuck]\n");
1992		rc = -EBUSY;
1993		goto out;
1994	}
1995
1996	func_to_exec(cookie);
1997
1998out:
1999	/* No need to restart statistics - if they're enabled, the timer
2000	 * will restart the statistics.
2001	 */
2002	up(&bp->stats_lock);
2003out_no_lock:
2004	return rc;
2005}