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f81604.c
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linux-6.19.14/drivers/net/can/usb/f81604.c
1// SPDX-License-Identifier: GPL-2.0 2/* Fintek F81604 USB-to-2CAN controller driver. 3 * 4 * Copyright (C) 2023 Ji-Ze Hong (Peter Hong) <peter_hong@fintek.com.tw> 5 */ 6#include <linux/bitfield.h> 7#include <linux/netdevice.h> 8#include <linux/units.h> 9#include <linux/usb.h> 10 11#include <linux/can.h> 12#include <linux/can/dev.h> 13#include <linux/can/error.h> 14#include <linux/can/platform/sja1000.h> 15 16#include <linux/unaligned.h> 17 18/* vendor and product id */ 19#define F81604_VENDOR_ID 0x2c42 20#define F81604_PRODUCT_ID 0x1709 21#define F81604_CAN_CLOCK (12 * MEGA) 22#define F81604_MAX_DEV 2 23#define F81604_SET_DEVICE_RETRY 10 24 25#define F81604_USB_TIMEOUT 2000 26#define F81604_SET_GET_REGISTER 0xA0 27#define F81604_PORT_OFFSET 0x1000 28#define F81604_MAX_RX_URBS 4 29 30#define F81604_CMD_DATA 0x00 31 32#define F81604_DLC_LEN_MASK GENMASK(3, 0) 33#define F81604_DLC_EFF_BIT BIT(7) 34#define F81604_DLC_RTR_BIT BIT(6) 35 36#define F81604_SFF_SHIFT 5 37#define F81604_EFF_SHIFT 3 38 39#define F81604_BRP_MASK GENMASK(5, 0) 40#define F81604_SJW_MASK GENMASK(7, 6) 41 42#define F81604_SEG1_MASK GENMASK(3, 0) 43#define F81604_SEG2_MASK GENMASK(6, 4) 44 45#define F81604_CLEAR_ALC 0 46#define F81604_CLEAR_ECC 1 47#define F81604_CLEAR_OVERRUN 2 48 49/* device setting */ 50#define F81604_CTRL_MODE_REG 0x80 51#define F81604_TX_ONESHOT (0x03 << 3) 52#define F81604_TX_NORMAL (0x01 << 3) 53#define F81604_RX_AUTO_RELEASE_BUF BIT(1) 54#define F81604_INT_WHEN_CHANGE BIT(0) 55 56#define F81604_TERMINATOR_REG 0x105 57#define F81604_CAN0_TERM BIT(2) 58#define F81604_CAN1_TERM BIT(3) 59 60#define F81604_TERMINATION_DISABLED CAN_TERMINATION_DISABLED 61#define F81604_TERMINATION_ENABLED 120 62 63/* SJA1000 registers - manual section 6.4 (Pelican Mode) */ 64#define F81604_SJA1000_MOD 0x00 65#define F81604_SJA1000_CMR 0x01 66#define F81604_SJA1000_IR 0x03 67#define F81604_SJA1000_IER 0x04 68#define F81604_SJA1000_ALC 0x0B 69#define F81604_SJA1000_ECC 0x0C 70#define F81604_SJA1000_RXERR 0x0E 71#define F81604_SJA1000_TXERR 0x0F 72#define F81604_SJA1000_ACCC0 0x10 73#define F81604_SJA1000_ACCM0 0x14 74#define F81604_MAX_FILTER_CNT 4 75 76/* Common registers - manual section 6.5 */ 77#define F81604_SJA1000_BTR0 0x06 78#define F81604_SJA1000_BTR1 0x07 79#define F81604_SJA1000_BTR1_SAMPLE_TRIPLE BIT(7) 80#define F81604_SJA1000_OCR 0x08 81#define F81604_SJA1000_CDR 0x1F 82 83/* mode register */ 84#define F81604_SJA1000_MOD_RM 0x01 85#define F81604_SJA1000_MOD_LOM 0x02 86#define F81604_SJA1000_MOD_STM 0x04 87 88/* commands */ 89#define F81604_SJA1000_CMD_CDO 0x08 90 91/* interrupt sources */ 92#define F81604_SJA1000_IRQ_BEI 0x80 93#define F81604_SJA1000_IRQ_ALI 0x40 94#define F81604_SJA1000_IRQ_EPI 0x20 95#define F81604_SJA1000_IRQ_DOI 0x08 96#define F81604_SJA1000_IRQ_EI 0x04 97#define F81604_SJA1000_IRQ_TI 0x02 98#define F81604_SJA1000_IRQ_RI 0x01 99#define F81604_SJA1000_IRQ_ALL 0xFF 100#define F81604_SJA1000_IRQ_OFF 0x00 101 102/* status register content */ 103#define F81604_SJA1000_SR_BS 0x80 104#define F81604_SJA1000_SR_ES 0x40 105#define F81604_SJA1000_SR_TCS 0x08 106 107/* ECC register */ 108#define F81604_SJA1000_ECC_SEG 0x1F 109#define F81604_SJA1000_ECC_DIR 0x20 110#define F81604_SJA1000_ECC_BIT 0x00 111#define F81604_SJA1000_ECC_FORM 0x40 112#define F81604_SJA1000_ECC_STUFF 0x80 113#define F81604_SJA1000_ECC_MASK 0xc0 114 115/* ALC register */ 116#define F81604_SJA1000_ALC_MASK 0x1f 117 118/* table of devices that work with this driver */ 119static const struct usb_device_id f81604_table[] = { 120 { USB_DEVICE(F81604_VENDOR_ID, F81604_PRODUCT_ID) }, 121 {} /* Terminating entry */ 122}; 123 124MODULE_DEVICE_TABLE(usb, f81604_table); 125 126static const struct ethtool_ops f81604_ethtool_ops = { 127 .get_ts_info = ethtool_op_get_ts_info, 128}; 129 130static const u16 f81604_termination[] = { F81604_TERMINATION_DISABLED, 131 F81604_TERMINATION_ENABLED }; 132 133struct f81604_priv { 134 struct net_device *netdev[F81604_MAX_DEV]; 135}; 136 137struct f81604_port_priv { 138 struct can_priv can; 139 struct net_device *netdev; 140 struct sk_buff *echo_skb; 141 142 unsigned long clear_flags; 143 struct work_struct clear_reg_work; 144 145 struct usb_device *dev; 146 struct usb_interface *intf; 147 148 struct usb_anchor urbs_anchor; 149}; 150 151/* Interrupt endpoint data format: 152 * Byte 0: Status register. 153 * Byte 1: Interrupt register. 154 * Byte 2: Interrupt enable register. 155 * Byte 3: Arbitration lost capture(ALC) register. 156 * Byte 4: Error code capture(ECC) register. 157 * Byte 5: Error warning limit register. 158 * Byte 6: RX error counter register. 159 * Byte 7: TX error counter register. 160 * Byte 8: Reserved. 161 */ 162struct f81604_int_data { 163 u8 sr; 164 u8 isrc; 165 u8 ier; 166 u8 alc; 167 u8 ecc; 168 u8 ewlr; 169 u8 rxerr; 170 u8 txerr; 171 u8 val; 172} __packed __aligned(4); 173 174struct f81604_sff { 175 __be16 id; 176 u8 data[CAN_MAX_DLEN]; 177} __packed __aligned(2); 178 179struct f81604_eff { 180 __be32 id; 181 u8 data[CAN_MAX_DLEN]; 182} __packed __aligned(2); 183 184struct f81604_can_frame { 185 u8 cmd; 186 187 /* According for F81604 DLC define: 188 * bit 3~0: data length (0~8) 189 * bit6: is RTR flag. 190 * bit7: is EFF frame. 191 */ 192 u8 dlc; 193 194 union { 195 struct f81604_sff sff; 196 struct f81604_eff eff; 197 }; 198} __packed __aligned(2); 199 200static const u8 bulk_in_addr[F81604_MAX_DEV] = { 2, 4 }; 201static const u8 bulk_out_addr[F81604_MAX_DEV] = { 1, 3 }; 202static const u8 int_in_addr[F81604_MAX_DEV] = { 1, 3 }; 203 204static int f81604_write(struct usb_device *dev, u16 reg, u8 data) 205{ 206 int ret; 207 208 ret = usb_control_msg_send(dev, 0, F81604_SET_GET_REGISTER, 209 USB_TYPE_VENDOR | USB_DIR_OUT, 0, reg, 210 &data, sizeof(data), F81604_USB_TIMEOUT, 211 GFP_KERNEL); 212 if (ret) 213 dev_err(&dev->dev, "%s: reg: %x data: %x failed: %pe\n", 214 __func__, reg, data, ERR_PTR(ret)); 215 216 return ret; 217} 218 219static int f81604_read(struct usb_device *dev, u16 reg, u8 *data) 220{ 221 int ret; 222 223 ret = usb_control_msg_recv(dev, 0, F81604_SET_GET_REGISTER, 224 USB_TYPE_VENDOR | USB_DIR_IN, 0, reg, data, 225 sizeof(*data), F81604_USB_TIMEOUT, 226 GFP_KERNEL); 227 228 if (ret < 0) 229 dev_err(&dev->dev, "%s: reg: %x failed: %pe\n", __func__, reg, 230 ERR_PTR(ret)); 231 232 return ret; 233} 234 235static int f81604_update_bits(struct usb_device *dev, u16 reg, u8 mask, 236 u8 data) 237{ 238 int ret; 239 u8 tmp; 240 241 ret = f81604_read(dev, reg, &tmp); 242 if (ret) 243 return ret; 244 245 tmp &= ~mask; 246 tmp |= (mask & data); 247 248 return f81604_write(dev, reg, tmp); 249} 250 251static int f81604_sja1000_write(struct f81604_port_priv *priv, u16 reg, 252 u8 data) 253{ 254 int port = priv->netdev->dev_port; 255 int real_reg; 256 257 real_reg = reg + F81604_PORT_OFFSET * port + F81604_PORT_OFFSET; 258 return f81604_write(priv->dev, real_reg, data); 259} 260 261static int f81604_sja1000_read(struct f81604_port_priv *priv, u16 reg, 262 u8 *data) 263{ 264 int port = priv->netdev->dev_port; 265 int real_reg; 266 267 real_reg = reg + F81604_PORT_OFFSET * port + F81604_PORT_OFFSET; 268 return f81604_read(priv->dev, real_reg, data); 269} 270 271static int f81604_set_reset_mode(struct f81604_port_priv *priv) 272{ 273 int ret, i; 274 u8 tmp; 275 276 /* disable interrupts */ 277 ret = f81604_sja1000_write(priv, F81604_SJA1000_IER, 278 F81604_SJA1000_IRQ_OFF); 279 if (ret) 280 return ret; 281 282 for (i = 0; i < F81604_SET_DEVICE_RETRY; i++) { 283 ret = f81604_sja1000_read(priv, F81604_SJA1000_MOD, &tmp); 284 if (ret) 285 return ret; 286 287 /* check reset bit */ 288 if (tmp & F81604_SJA1000_MOD_RM) { 289 priv->can.state = CAN_STATE_STOPPED; 290 return 0; 291 } 292 293 /* reset chip */ 294 ret = f81604_sja1000_write(priv, F81604_SJA1000_MOD, 295 F81604_SJA1000_MOD_RM); 296 if (ret) 297 return ret; 298 } 299 300 return -EPERM; 301} 302 303static int f81604_set_normal_mode(struct f81604_port_priv *priv) 304{ 305 u8 tmp, ier = 0; 306 u8 mod_reg = 0; 307 int ret, i; 308 309 for (i = 0; i < F81604_SET_DEVICE_RETRY; i++) { 310 ret = f81604_sja1000_read(priv, F81604_SJA1000_MOD, &tmp); 311 if (ret) 312 return ret; 313 314 /* check reset bit */ 315 if ((tmp & F81604_SJA1000_MOD_RM) == 0) { 316 priv->can.state = CAN_STATE_ERROR_ACTIVE; 317 /* enable interrupts, RI handled by bulk-in */ 318 ier = F81604_SJA1000_IRQ_ALL & ~F81604_SJA1000_IRQ_RI; 319 if (!(priv->can.ctrlmode & 320 CAN_CTRLMODE_BERR_REPORTING)) 321 ier &= ~F81604_SJA1000_IRQ_BEI; 322 323 return f81604_sja1000_write(priv, F81604_SJA1000_IER, 324 ier); 325 } 326 327 /* set chip to normal mode */ 328 if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) 329 mod_reg |= F81604_SJA1000_MOD_LOM; 330 if (priv->can.ctrlmode & CAN_CTRLMODE_PRESUME_ACK) 331 mod_reg |= F81604_SJA1000_MOD_STM; 332 333 ret = f81604_sja1000_write(priv, F81604_SJA1000_MOD, mod_reg); 334 if (ret) 335 return ret; 336 } 337 338 return -EPERM; 339} 340 341static int f81604_chipset_init(struct f81604_port_priv *priv) 342{ 343 int i, ret; 344 345 /* set clock divider and output control register */ 346 ret = f81604_sja1000_write(priv, F81604_SJA1000_CDR, 347 CDR_CBP | CDR_PELICAN); 348 if (ret) 349 return ret; 350 351 /* set acceptance filter (accept all) */ 352 for (i = 0; i < F81604_MAX_FILTER_CNT; ++i) { 353 ret = f81604_sja1000_write(priv, F81604_SJA1000_ACCC0 + i, 0); 354 if (ret) 355 return ret; 356 } 357 358 for (i = 0; i < F81604_MAX_FILTER_CNT; ++i) { 359 ret = f81604_sja1000_write(priv, F81604_SJA1000_ACCM0 + i, 360 0xFF); 361 if (ret) 362 return ret; 363 } 364 365 return f81604_sja1000_write(priv, F81604_SJA1000_OCR, 366 OCR_TX0_PUSHPULL | OCR_TX1_PUSHPULL | 367 OCR_MODE_NORMAL); 368} 369 370static void f81604_process_rx_packet(struct net_device *netdev, 371 struct f81604_can_frame *frame) 372{ 373 struct net_device_stats *stats = &netdev->stats; 374 struct can_frame *cf; 375 struct sk_buff *skb; 376 377 if (frame->cmd != F81604_CMD_DATA) 378 return; 379 380 skb = alloc_can_skb(netdev, &cf); 381 if (!skb) { 382 stats->rx_dropped++; 383 return; 384 } 385 386 cf->len = can_cc_dlc2len(frame->dlc & F81604_DLC_LEN_MASK); 387 388 if (frame->dlc & F81604_DLC_EFF_BIT) { 389 cf->can_id = get_unaligned_be32(&frame->eff.id) >> 390 F81604_EFF_SHIFT; 391 cf->can_id |= CAN_EFF_FLAG; 392 393 if (!(frame->dlc & F81604_DLC_RTR_BIT)) 394 memcpy(cf->data, frame->eff.data, cf->len); 395 } else { 396 cf->can_id = get_unaligned_be16(&frame->sff.id) >> 397 F81604_SFF_SHIFT; 398 399 if (!(frame->dlc & F81604_DLC_RTR_BIT)) 400 memcpy(cf->data, frame->sff.data, cf->len); 401 } 402 403 if (frame->dlc & F81604_DLC_RTR_BIT) 404 cf->can_id |= CAN_RTR_FLAG; 405 else 406 stats->rx_bytes += cf->len; 407 408 stats->rx_packets++; 409 netif_rx(skb); 410} 411 412static void f81604_read_bulk_callback(struct urb *urb) 413{ 414 struct f81604_can_frame *frame = urb->transfer_buffer; 415 struct net_device *netdev = urb->context; 416 struct f81604_port_priv *priv = netdev_priv(netdev); 417 int ret; 418 419 if (!netif_device_present(netdev)) 420 return; 421 422 if (urb->status) 423 netdev_info(netdev, "%s: URB aborted %pe\n", __func__, 424 ERR_PTR(urb->status)); 425 426 switch (urb->status) { 427 case 0: /* success */ 428 break; 429 430 case -ENOENT: 431 case -EPIPE: 432 case -EPROTO: 433 case -ESHUTDOWN: 434 return; 435 436 default: 437 goto resubmit_urb; 438 } 439 440 if (urb->actual_length != sizeof(*frame)) { 441 netdev_warn(netdev, "URB length %u not equal to %zu\n", 442 urb->actual_length, sizeof(*frame)); 443 goto resubmit_urb; 444 } 445 446 f81604_process_rx_packet(netdev, frame); 447 448resubmit_urb: 449 usb_anchor_urb(urb, &priv->urbs_anchor); 450 ret = usb_submit_urb(urb, GFP_ATOMIC); 451 if (!ret) 452 return; 453 usb_unanchor_urb(urb); 454 455 if (ret == -ENODEV) 456 netif_device_detach(netdev); 457 else 458 netdev_err(netdev, 459 "%s: failed to resubmit read bulk urb: %pe\n", 460 __func__, ERR_PTR(ret)); 461} 462 463static void f81604_handle_tx(struct f81604_port_priv *priv, 464 struct f81604_int_data *data) 465{ 466 struct net_device *netdev = priv->netdev; 467 struct net_device_stats *stats = &netdev->stats; 468 469 /* transmission buffer released */ 470 if (priv->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT && 471 !(data->sr & F81604_SJA1000_SR_TCS)) { 472 stats->tx_errors++; 473 can_free_echo_skb(netdev, 0, NULL); 474 } else { 475 /* transmission complete */ 476 stats->tx_bytes += can_get_echo_skb(netdev, 0, NULL); 477 stats->tx_packets++; 478 } 479 480 netif_wake_queue(netdev); 481} 482 483static void f81604_handle_can_bus_errors(struct f81604_port_priv *priv, 484 struct f81604_int_data *data) 485{ 486 enum can_state can_state = priv->can.state; 487 struct net_device *netdev = priv->netdev; 488 struct net_device_stats *stats = &netdev->stats; 489 struct can_frame *cf; 490 struct sk_buff *skb; 491 492 /* Note: ALC/ECC will not auto clear by read here, must be cleared by 493 * read register (via clear_reg_work). 494 */ 495 496 skb = alloc_can_err_skb(netdev, &cf); 497 if (skb) { 498 cf->can_id |= CAN_ERR_CNT; 499 cf->data[6] = data->txerr; 500 cf->data[7] = data->rxerr; 501 } 502 503 if (data->isrc & F81604_SJA1000_IRQ_DOI) { 504 /* data overrun interrupt */ 505 netdev_dbg(netdev, "data overrun interrupt\n"); 506 507 if (skb) { 508 cf->can_id |= CAN_ERR_CRTL; 509 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; 510 } 511 512 stats->rx_over_errors++; 513 stats->rx_errors++; 514 515 set_bit(F81604_CLEAR_OVERRUN, &priv->clear_flags); 516 } 517 518 if (data->isrc & F81604_SJA1000_IRQ_EI) { 519 /* error warning interrupt */ 520 netdev_dbg(netdev, "error warning interrupt\n"); 521 522 if (data->sr & F81604_SJA1000_SR_BS) 523 can_state = CAN_STATE_BUS_OFF; 524 else if (data->sr & F81604_SJA1000_SR_ES) 525 can_state = CAN_STATE_ERROR_WARNING; 526 else 527 can_state = CAN_STATE_ERROR_ACTIVE; 528 } 529 530 if (data->isrc & F81604_SJA1000_IRQ_BEI) { 531 /* bus error interrupt */ 532 netdev_dbg(netdev, "bus error interrupt\n"); 533 534 priv->can.can_stats.bus_error++; 535 536 if (skb) { 537 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; 538 539 /* set error type */ 540 switch (data->ecc & F81604_SJA1000_ECC_MASK) { 541 case F81604_SJA1000_ECC_BIT: 542 cf->data[2] |= CAN_ERR_PROT_BIT; 543 break; 544 case F81604_SJA1000_ECC_FORM: 545 cf->data[2] |= CAN_ERR_PROT_FORM; 546 break; 547 case F81604_SJA1000_ECC_STUFF: 548 cf->data[2] |= CAN_ERR_PROT_STUFF; 549 break; 550 default: 551 break; 552 } 553 554 /* set error location */ 555 cf->data[3] = data->ecc & F81604_SJA1000_ECC_SEG; 556 } 557 558 /* Error occurred during transmission? */ 559 if ((data->ecc & F81604_SJA1000_ECC_DIR) == 0) { 560 stats->tx_errors++; 561 if (skb) 562 cf->data[2] |= CAN_ERR_PROT_TX; 563 } else { 564 stats->rx_errors++; 565 } 566 567 set_bit(F81604_CLEAR_ECC, &priv->clear_flags); 568 } 569 570 if (data->isrc & F81604_SJA1000_IRQ_EPI) { 571 if (can_state == CAN_STATE_ERROR_PASSIVE) 572 can_state = CAN_STATE_ERROR_WARNING; 573 else 574 can_state = CAN_STATE_ERROR_PASSIVE; 575 576 /* error passive interrupt */ 577 netdev_dbg(netdev, "error passive interrupt: %d\n", can_state); 578 } 579 580 if (data->isrc & F81604_SJA1000_IRQ_ALI) { 581 /* arbitration lost interrupt */ 582 netdev_dbg(netdev, "arbitration lost interrupt\n"); 583 584 priv->can.can_stats.arbitration_lost++; 585 586 if (skb) { 587 cf->can_id |= CAN_ERR_LOSTARB; 588 cf->data[0] = data->alc & F81604_SJA1000_ALC_MASK; 589 } 590 591 set_bit(F81604_CLEAR_ALC, &priv->clear_flags); 592 } 593 594 if (can_state != priv->can.state) { 595 enum can_state tx_state, rx_state; 596 597 tx_state = data->txerr >= data->rxerr ? can_state : 0; 598 rx_state = data->txerr <= data->rxerr ? can_state : 0; 599 600 can_change_state(netdev, cf, tx_state, rx_state); 601 602 if (can_state == CAN_STATE_BUS_OFF) 603 can_bus_off(netdev); 604 } 605 606 if (priv->clear_flags) 607 schedule_work(&priv->clear_reg_work); 608 609 if (skb) 610 netif_rx(skb); 611} 612 613static void f81604_read_int_callback(struct urb *urb) 614{ 615 struct f81604_int_data *data = urb->transfer_buffer; 616 struct net_device *netdev = urb->context; 617 struct f81604_port_priv *priv; 618 int ret; 619 620 priv = netdev_priv(netdev); 621 622 if (!netif_device_present(netdev)) 623 return; 624 625 if (urb->status) 626 netdev_info(netdev, "%s: Int URB aborted: %pe\n", __func__, 627 ERR_PTR(urb->status)); 628 629 if (urb->actual_length < sizeof(*data)) { 630 netdev_warn(netdev, "%s: short int URB: %u < %zu\n", 631 __func__, urb->actual_length, sizeof(*data)); 632 goto resubmit_urb; 633 } 634 635 switch (urb->status) { 636 case 0: /* success */ 637 break; 638 639 case -ENOENT: 640 case -EPIPE: 641 case -EPROTO: 642 case -ESHUTDOWN: 643 return; 644 645 default: 646 goto resubmit_urb; 647 } 648 649 /* handle Errors */ 650 if (data->isrc & (F81604_SJA1000_IRQ_DOI | F81604_SJA1000_IRQ_EI | 651 F81604_SJA1000_IRQ_BEI | F81604_SJA1000_IRQ_EPI | 652 F81604_SJA1000_IRQ_ALI)) 653 f81604_handle_can_bus_errors(priv, data); 654 655 /* handle TX */ 656 if (priv->can.state != CAN_STATE_BUS_OFF && 657 (data->isrc & F81604_SJA1000_IRQ_TI)) 658 f81604_handle_tx(priv, data); 659 660resubmit_urb: 661 usb_anchor_urb(urb, &priv->urbs_anchor); 662 ret = usb_submit_urb(urb, GFP_ATOMIC); 663 if (!ret) 664 return; 665 usb_unanchor_urb(urb); 666 667 if (ret == -ENODEV) 668 netif_device_detach(netdev); 669 else 670 netdev_err(netdev, "%s: failed to resubmit int urb: %pe\n", 671 __func__, ERR_PTR(ret)); 672} 673 674static void f81604_unregister_urbs(struct f81604_port_priv *priv) 675{ 676 usb_kill_anchored_urbs(&priv->urbs_anchor); 677} 678 679static int f81604_register_urbs(struct f81604_port_priv *priv) 680{ 681 struct net_device *netdev = priv->netdev; 682 struct f81604_int_data *int_data; 683 int id = netdev->dev_port; 684 struct urb *int_urb; 685 int rx_urb_cnt; 686 int ret; 687 688 for (rx_urb_cnt = 0; rx_urb_cnt < F81604_MAX_RX_URBS; ++rx_urb_cnt) { 689 struct f81604_can_frame *frame; 690 struct urb *rx_urb; 691 692 rx_urb = usb_alloc_urb(0, GFP_KERNEL); 693 if (!rx_urb) { 694 ret = -ENOMEM; 695 break; 696 } 697 698 frame = kmalloc(sizeof(*frame), GFP_KERNEL); 699 if (!frame) { 700 usb_free_urb(rx_urb); 701 ret = -ENOMEM; 702 break; 703 } 704 705 usb_fill_bulk_urb(rx_urb, priv->dev, 706 usb_rcvbulkpipe(priv->dev, bulk_in_addr[id]), 707 frame, sizeof(*frame), 708 f81604_read_bulk_callback, netdev); 709 710 rx_urb->transfer_flags |= URB_FREE_BUFFER; 711 usb_anchor_urb(rx_urb, &priv->urbs_anchor); 712 713 ret = usb_submit_urb(rx_urb, GFP_KERNEL); 714 if (ret) { 715 usb_unanchor_urb(rx_urb); 716 usb_free_urb(rx_urb); 717 break; 718 } 719 720 /* Drop reference, USB core will take care of freeing it */ 721 usb_free_urb(rx_urb); 722 } 723 724 if (rx_urb_cnt == 0) { 725 netdev_warn(netdev, "%s: submit rx urb failed: %pe\n", 726 __func__, ERR_PTR(ret)); 727 728 goto error; 729 } 730 731 int_urb = usb_alloc_urb(0, GFP_KERNEL); 732 if (!int_urb) { 733 ret = -ENOMEM; 734 goto error; 735 } 736 737 int_data = kmalloc(sizeof(*int_data), GFP_KERNEL); 738 if (!int_data) { 739 usb_free_urb(int_urb); 740 ret = -ENOMEM; 741 goto error; 742 } 743 744 usb_fill_int_urb(int_urb, priv->dev, 745 usb_rcvintpipe(priv->dev, int_in_addr[id]), int_data, 746 sizeof(*int_data), f81604_read_int_callback, netdev, 747 1); 748 749 int_urb->transfer_flags |= URB_FREE_BUFFER; 750 usb_anchor_urb(int_urb, &priv->urbs_anchor); 751 752 ret = usb_submit_urb(int_urb, GFP_KERNEL); 753 if (ret) { 754 usb_unanchor_urb(int_urb); 755 usb_free_urb(int_urb); 756 757 netdev_warn(netdev, "%s: submit int urb failed: %pe\n", 758 __func__, ERR_PTR(ret)); 759 goto error; 760 } 761 762 /* Drop reference, USB core will take care of freeing it */ 763 usb_free_urb(int_urb); 764 765 return 0; 766 767error: 768 f81604_unregister_urbs(priv); 769 return ret; 770} 771 772static int f81604_start(struct net_device *netdev) 773{ 774 struct f81604_port_priv *priv = netdev_priv(netdev); 775 int ret; 776 u8 mode; 777 u8 tmp; 778 779 mode = F81604_RX_AUTO_RELEASE_BUF | F81604_INT_WHEN_CHANGE; 780 781 /* Set TR/AT mode */ 782 if (priv->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT) 783 mode |= F81604_TX_ONESHOT; 784 else 785 mode |= F81604_TX_NORMAL; 786 787 ret = f81604_sja1000_write(priv, F81604_CTRL_MODE_REG, mode); 788 if (ret) 789 return ret; 790 791 /* set reset mode */ 792 ret = f81604_set_reset_mode(priv); 793 if (ret) 794 return ret; 795 796 ret = f81604_chipset_init(priv); 797 if (ret) 798 return ret; 799 800 /* Clear error counters and error code capture */ 801 ret = f81604_sja1000_write(priv, F81604_SJA1000_TXERR, 0); 802 if (ret) 803 return ret; 804 805 ret = f81604_sja1000_write(priv, F81604_SJA1000_RXERR, 0); 806 if (ret) 807 return ret; 808 809 /* Read clear for ECC/ALC/IR register */ 810 ret = f81604_sja1000_read(priv, F81604_SJA1000_ECC, &tmp); 811 if (ret) 812 return ret; 813 814 ret = f81604_sja1000_read(priv, F81604_SJA1000_ALC, &tmp); 815 if (ret) 816 return ret; 817 818 ret = f81604_sja1000_read(priv, F81604_SJA1000_IR, &tmp); 819 if (ret) 820 return ret; 821 822 ret = f81604_register_urbs(priv); 823 if (ret) 824 return ret; 825 826 ret = f81604_set_normal_mode(priv); 827 if (ret) { 828 f81604_unregister_urbs(priv); 829 return ret; 830 } 831 832 return 0; 833} 834 835static int f81604_set_bittiming(struct net_device *dev) 836{ 837 struct f81604_port_priv *priv = netdev_priv(dev); 838 struct can_bittiming *bt = &priv->can.bittiming; 839 u8 btr0, btr1; 840 int ret; 841 842 btr0 = FIELD_PREP(F81604_BRP_MASK, bt->brp - 1) | 843 FIELD_PREP(F81604_SJW_MASK, bt->sjw - 1); 844 845 btr1 = FIELD_PREP(F81604_SEG1_MASK, 846 bt->prop_seg + bt->phase_seg1 - 1) | 847 FIELD_PREP(F81604_SEG2_MASK, bt->phase_seg2 - 1); 848 849 if (priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) 850 btr1 |= F81604_SJA1000_BTR1_SAMPLE_TRIPLE; 851 852 ret = f81604_sja1000_write(priv, F81604_SJA1000_BTR0, btr0); 853 if (ret) { 854 netdev_warn(dev, "%s: Set BTR0 failed: %pe\n", __func__, 855 ERR_PTR(ret)); 856 return ret; 857 } 858 859 ret = f81604_sja1000_write(priv, F81604_SJA1000_BTR1, btr1); 860 if (ret) { 861 netdev_warn(dev, "%s: Set BTR1 failed: %pe\n", __func__, 862 ERR_PTR(ret)); 863 return ret; 864 } 865 866 return 0; 867} 868 869static int f81604_set_mode(struct net_device *netdev, enum can_mode mode) 870{ 871 int ret; 872 873 switch (mode) { 874 case CAN_MODE_START: 875 ret = f81604_start(netdev); 876 if (!ret && netif_queue_stopped(netdev)) 877 netif_wake_queue(netdev); 878 break; 879 880 default: 881 ret = -EOPNOTSUPP; 882 } 883 884 return ret; 885} 886 887static void f81604_write_bulk_callback(struct urb *urb) 888{ 889 struct net_device *netdev = urb->context; 890 891 if (!netif_device_present(netdev)) 892 return; 893 894 if (!urb->status) 895 return; 896 897 switch (urb->status) { 898 case -ENOENT: 899 case -ECONNRESET: 900 case -ESHUTDOWN: 901 return; 902 default: 903 break; 904 } 905 906 if (net_ratelimit()) 907 netdev_err(netdev, "%s: Tx URB error: %pe\n", __func__, 908 ERR_PTR(urb->status)); 909 910 can_free_echo_skb(netdev, 0, NULL); 911 netdev->stats.tx_dropped++; 912 netdev->stats.tx_errors++; 913 914 netif_wake_queue(netdev); 915} 916 917static void f81604_clear_reg_work(struct work_struct *work) 918{ 919 struct f81604_port_priv *priv; 920 u8 tmp; 921 922 priv = container_of(work, struct f81604_port_priv, clear_reg_work); 923 924 /* dummy read for clear Arbitration lost capture(ALC) register. */ 925 if (test_and_clear_bit(F81604_CLEAR_ALC, &priv->clear_flags)) 926 f81604_sja1000_read(priv, F81604_SJA1000_ALC, &tmp); 927 928 /* dummy read for clear Error code capture(ECC) register. */ 929 if (test_and_clear_bit(F81604_CLEAR_ECC, &priv->clear_flags)) 930 f81604_sja1000_read(priv, F81604_SJA1000_ECC, &tmp); 931 932 /* dummy write for clear data overrun flag. */ 933 if (test_and_clear_bit(F81604_CLEAR_OVERRUN, &priv->clear_flags)) 934 f81604_sja1000_write(priv, F81604_SJA1000_CMR, 935 F81604_SJA1000_CMD_CDO); 936} 937 938static netdev_tx_t f81604_start_xmit(struct sk_buff *skb, 939 struct net_device *netdev) 940{ 941 struct can_frame *cf = (struct can_frame *)skb->data; 942 struct f81604_port_priv *priv = netdev_priv(netdev); 943 struct net_device_stats *stats = &netdev->stats; 944 struct f81604_can_frame *frame; 945 struct urb *write_urb; 946 int ret; 947 948 if (can_dev_dropped_skb(netdev, skb)) 949 return NETDEV_TX_OK; 950 951 netif_stop_queue(netdev); 952 953 write_urb = usb_alloc_urb(0, GFP_ATOMIC); 954 if (!write_urb) 955 goto nomem_urb; 956 957 frame = kzalloc(sizeof(*frame), GFP_ATOMIC); 958 if (!frame) 959 goto nomem_buf; 960 961 usb_fill_bulk_urb(write_urb, priv->dev, 962 usb_sndbulkpipe(priv->dev, 963 bulk_out_addr[netdev->dev_port]), 964 frame, sizeof(*frame), f81604_write_bulk_callback, 965 priv->netdev); 966 967 write_urb->transfer_flags |= URB_FREE_BUFFER; 968 969 frame->cmd = F81604_CMD_DATA; 970 frame->dlc = cf->len; 971 972 if (cf->can_id & CAN_RTR_FLAG) 973 frame->dlc |= F81604_DLC_RTR_BIT; 974 975 if (cf->can_id & CAN_EFF_FLAG) { 976 u32 id = (cf->can_id & CAN_EFF_MASK) << F81604_EFF_SHIFT; 977 978 put_unaligned_be32(id, &frame->eff.id); 979 980 frame->dlc |= F81604_DLC_EFF_BIT; 981 982 if (!(cf->can_id & CAN_RTR_FLAG)) 983 memcpy(&frame->eff.data, cf->data, cf->len); 984 } else { 985 u32 id = (cf->can_id & CAN_SFF_MASK) << F81604_SFF_SHIFT; 986 987 put_unaligned_be16(id, &frame->sff.id); 988 989 if (!(cf->can_id & CAN_RTR_FLAG)) 990 memcpy(&frame->sff.data, cf->data, cf->len); 991 } 992 993 can_put_echo_skb(skb, netdev, 0, 0); 994 995 ret = usb_submit_urb(write_urb, GFP_ATOMIC); 996 if (ret) { 997 netdev_err(netdev, "%s: failed to resubmit tx bulk urb: %pe\n", 998 __func__, ERR_PTR(ret)); 999 1000 can_free_echo_skb(netdev, 0, NULL); 1001 stats->tx_dropped++; 1002 stats->tx_errors++; 1003 1004 if (ret == -ENODEV) 1005 netif_device_detach(netdev); 1006 else 1007 netif_wake_queue(netdev); 1008 } 1009 1010 /* let usb core take care of this urb */ 1011 usb_free_urb(write_urb); 1012 1013 return NETDEV_TX_OK; 1014 1015nomem_buf: 1016 usb_free_urb(write_urb); 1017 1018nomem_urb: 1019 dev_kfree_skb(skb); 1020 stats->tx_dropped++; 1021 stats->tx_errors++; 1022 netif_wake_queue(netdev); 1023 1024 return NETDEV_TX_OK; 1025} 1026 1027static int f81604_get_berr_counter(const struct net_device *netdev, 1028 struct can_berr_counter *bec) 1029{ 1030 struct f81604_port_priv *priv = netdev_priv(netdev); 1031 u8 txerr, rxerr; 1032 int ret; 1033 1034 ret = f81604_sja1000_read(priv, F81604_SJA1000_TXERR, &txerr); 1035 if (ret) 1036 return ret; 1037 1038 ret = f81604_sja1000_read(priv, F81604_SJA1000_RXERR, &rxerr); 1039 if (ret) 1040 return ret; 1041 1042 bec->txerr = txerr; 1043 bec->rxerr = rxerr; 1044 1045 return 0; 1046} 1047 1048/* Open USB device */ 1049static int f81604_open(struct net_device *netdev) 1050{ 1051 int ret; 1052 1053 ret = open_candev(netdev); 1054 if (ret) 1055 return ret; 1056 1057 ret = f81604_start(netdev); 1058 if (ret) { 1059 if (ret == -ENODEV) 1060 netif_device_detach(netdev); 1061 1062 close_candev(netdev); 1063 return ret; 1064 } 1065 1066 netif_start_queue(netdev); 1067 return 0; 1068} 1069 1070/* Close USB device */ 1071static int f81604_close(struct net_device *netdev) 1072{ 1073 struct f81604_port_priv *priv = netdev_priv(netdev); 1074 1075 f81604_set_reset_mode(priv); 1076 1077 netif_stop_queue(netdev); 1078 cancel_work_sync(&priv->clear_reg_work); 1079 close_candev(netdev); 1080 1081 f81604_unregister_urbs(priv); 1082 1083 return 0; 1084} 1085 1086static const struct net_device_ops f81604_netdev_ops = { 1087 .ndo_open = f81604_open, 1088 .ndo_stop = f81604_close, 1089 .ndo_start_xmit = f81604_start_xmit, 1090}; 1091 1092static const struct can_bittiming_const f81604_bittiming_const = { 1093 .name = KBUILD_MODNAME, 1094 .tseg1_min = 1, 1095 .tseg1_max = 16, 1096 .tseg2_min = 1, 1097 .tseg2_max = 8, 1098 .sjw_max = 4, 1099 .brp_min = 1, 1100 .brp_max = 64, 1101 .brp_inc = 1, 1102}; 1103 1104/* Called by the usb core when driver is unloaded or device is removed */ 1105static void f81604_disconnect(struct usb_interface *intf) 1106{ 1107 struct f81604_priv *priv = usb_get_intfdata(intf); 1108 int i; 1109 1110 for (i = 0; i < ARRAY_SIZE(priv->netdev); ++i) { 1111 if (!priv->netdev[i]) 1112 continue; 1113 1114 unregister_netdev(priv->netdev[i]); 1115 free_candev(priv->netdev[i]); 1116 } 1117} 1118 1119static int __f81604_set_termination(struct usb_device *dev, int idx, u16 term) 1120{ 1121 u8 mask, data = 0; 1122 1123 if (idx == 0) 1124 mask = F81604_CAN0_TERM; 1125 else 1126 mask = F81604_CAN1_TERM; 1127 1128 if (term) 1129 data = mask; 1130 1131 return f81604_update_bits(dev, F81604_TERMINATOR_REG, mask, data); 1132} 1133 1134static int f81604_set_termination(struct net_device *netdev, u16 term) 1135{ 1136 struct f81604_port_priv *port_priv = netdev_priv(netdev); 1137 1138 ASSERT_RTNL(); 1139 1140 return __f81604_set_termination(port_priv->dev, netdev->dev_port, 1141 term); 1142} 1143 1144static int f81604_probe(struct usb_interface *intf, 1145 const struct usb_device_id *id) 1146{ 1147 struct usb_device *dev = interface_to_usbdev(intf); 1148 struct net_device *netdev; 1149 struct f81604_priv *priv; 1150 int i, ret; 1151 1152 priv = devm_kzalloc(&intf->dev, sizeof(*priv), GFP_KERNEL); 1153 if (!priv) 1154 return -ENOMEM; 1155 1156 usb_set_intfdata(intf, priv); 1157 1158 for (i = 0; i < ARRAY_SIZE(priv->netdev); ++i) { 1159 ret = __f81604_set_termination(dev, i, 0); 1160 if (ret) { 1161 dev_err(&intf->dev, 1162 "Setting termination of CH#%d failed: %pe\n", 1163 i, ERR_PTR(ret)); 1164 return ret; 1165 } 1166 } 1167 1168 for (i = 0; i < ARRAY_SIZE(priv->netdev); ++i) { 1169 struct f81604_port_priv *port_priv; 1170 1171 netdev = alloc_candev(sizeof(*port_priv), 1); 1172 if (!netdev) { 1173 dev_err(&intf->dev, "Couldn't alloc candev: %d\n", i); 1174 ret = -ENOMEM; 1175 1176 goto failure_cleanup; 1177 } 1178 1179 port_priv = netdev_priv(netdev); 1180 1181 INIT_WORK(&port_priv->clear_reg_work, f81604_clear_reg_work); 1182 init_usb_anchor(&port_priv->urbs_anchor); 1183 1184 port_priv->intf = intf; 1185 port_priv->dev = dev; 1186 port_priv->netdev = netdev; 1187 port_priv->can.clock.freq = F81604_CAN_CLOCK; 1188 1189 port_priv->can.termination_const = f81604_termination; 1190 port_priv->can.termination_const_cnt = 1191 ARRAY_SIZE(f81604_termination); 1192 port_priv->can.bittiming_const = &f81604_bittiming_const; 1193 port_priv->can.do_set_bittiming = f81604_set_bittiming; 1194 port_priv->can.do_set_mode = f81604_set_mode; 1195 port_priv->can.do_set_termination = f81604_set_termination; 1196 port_priv->can.do_get_berr_counter = f81604_get_berr_counter; 1197 port_priv->can.ctrlmode_supported = 1198 CAN_CTRLMODE_LISTENONLY | CAN_CTRLMODE_3_SAMPLES | 1199 CAN_CTRLMODE_ONE_SHOT | CAN_CTRLMODE_BERR_REPORTING | 1200 CAN_CTRLMODE_PRESUME_ACK; 1201 1202 netdev->ethtool_ops = &f81604_ethtool_ops; 1203 netdev->netdev_ops = &f81604_netdev_ops; 1204 netdev->flags |= IFF_ECHO; 1205 netdev->dev_port = i; 1206 1207 SET_NETDEV_DEV(netdev, &intf->dev); 1208 1209 ret = register_candev(netdev); 1210 if (ret) { 1211 netdev_err(netdev, "register CAN device failed: %pe\n", 1212 ERR_PTR(ret)); 1213 free_candev(netdev); 1214 1215 goto failure_cleanup; 1216 } 1217 1218 priv->netdev[i] = netdev; 1219 } 1220 1221 return 0; 1222 1223failure_cleanup: 1224 f81604_disconnect(intf); 1225 return ret; 1226} 1227 1228static struct usb_driver f81604_driver = { 1229 .name = KBUILD_MODNAME, 1230 .probe = f81604_probe, 1231 .disconnect = f81604_disconnect, 1232 .id_table = f81604_table, 1233}; 1234 1235module_usb_driver(f81604_driver); 1236 1237MODULE_AUTHOR("Ji-Ze Hong (Peter Hong) <peter_hong@fintek.com.tw>"); 1238MODULE_DESCRIPTION("Fintek F81604 USB to 2xCANBUS"); 1239MODULE_LICENSE("GPL");
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