FILE
rockchip_canfd.h
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linux-6.19.14/drivers/net/can/rockchip/rockchip_canfd.h
1/* SPDX-License-Identifier: GPL-2.0 2 * 3 * Copyright (c) 2023, 2024 Pengutronix, 4 * Marc Kleine-Budde <kernel@pengutronix.de> 5 */ 6 7#ifndef _ROCKCHIP_CANFD_H 8#define _ROCKCHIP_CANFD_H 9 10#include <linux/bitfield.h> 11#include <linux/can/dev.h> 12#include <linux/can/rx-offload.h> 13#include <linux/clk.h> 14#include <linux/io.h> 15#include <linux/netdevice.h> 16#include <linux/reset.h> 17#include <linux/skbuff.h> 18#include <linux/timecounter.h> 19#include <linux/types.h> 20#include <linux/u64_stats_sync.h> 21#include <linux/units.h> 22 23#define RKCANFD_REG_MODE 0x000 24#define RKCANFD_REG_MODE_CAN_FD_MODE_ENABLE BIT(15) 25#define RKCANFD_REG_MODE_DPEE BIT(14) 26#define RKCANFD_REG_MODE_BRSD BIT(13) 27#define RKCANFD_REG_MODE_SPACE_RX_MODE BIT(12) 28#define RKCANFD_REG_MODE_AUTO_BUS_ON BIT(11) 29#define RKCANFD_REG_MODE_AUTO_RETX_MODE BIT(10) 30#define RKCANFD_REG_MODE_OVLD_MODE BIT(9) 31#define RKCANFD_REG_MODE_COVER_MODE BIT(8) 32#define RKCANFD_REG_MODE_RXSORT_MODE BIT(7) 33#define RKCANFD_REG_MODE_TXORDER_MODE BIT(6) 34#define RKCANFD_REG_MODE_RXSTX_MODE BIT(5) 35#define RKCANFD_REG_MODE_LBACK_MODE BIT(4) 36#define RKCANFD_REG_MODE_SILENT_MODE BIT(3) 37#define RKCANFD_REG_MODE_SELF_TEST BIT(2) 38#define RKCANFD_REG_MODE_SLEEP_MODE BIT(1) 39#define RKCANFD_REG_MODE_WORK_MODE BIT(0) 40 41#define RKCANFD_REG_CMD 0x004 42#define RKCANFD_REG_CMD_TX1_REQ BIT(1) 43#define RKCANFD_REG_CMD_TX0_REQ BIT(0) 44#define RKCANFD_REG_CMD_TX_REQ(i) (RKCANFD_REG_CMD_TX0_REQ << (i)) 45 46#define RKCANFD_REG_STATE 0x008 47#define RKCANFD_REG_STATE_SLEEP_STATE BIT(6) 48#define RKCANFD_REG_STATE_BUS_OFF_STATE BIT(5) 49#define RKCANFD_REG_STATE_ERROR_WARNING_STATE BIT(4) 50#define RKCANFD_REG_STATE_TX_PERIOD BIT(3) 51#define RKCANFD_REG_STATE_RX_PERIOD BIT(2) 52#define RKCANFD_REG_STATE_TX_BUFFER_FULL BIT(1) 53#define RKCANFD_REG_STATE_RX_BUFFER_FULL BIT(0) 54 55#define RKCANFD_REG_INT 0x00c 56#define RKCANFD_REG_INT_WAKEUP_INT BIT(14) 57#define RKCANFD_REG_INT_TXE_FIFO_FULL_INT BIT(13) 58#define RKCANFD_REG_INT_TXE_FIFO_OV_INT BIT(12) 59#define RKCANFD_REG_INT_TIMESTAMP_COUNTER_OVERFLOW_INT BIT(11) 60#define RKCANFD_REG_INT_BUS_OFF_RECOVERY_INT BIT(10) 61#define RKCANFD_REG_INT_BUS_OFF_INT BIT(9) 62#define RKCANFD_REG_INT_RX_FIFO_OVERFLOW_INT BIT(8) 63#define RKCANFD_REG_INT_RX_FIFO_FULL_INT BIT(7) 64#define RKCANFD_REG_INT_ERROR_INT BIT(6) 65#define RKCANFD_REG_INT_TX_ARBIT_FAIL_INT BIT(5) 66#define RKCANFD_REG_INT_PASSIVE_ERROR_INT BIT(4) 67#define RKCANFD_REG_INT_OVERLOAD_INT BIT(3) 68#define RKCANFD_REG_INT_ERROR_WARNING_INT BIT(2) 69#define RKCANFD_REG_INT_TX_FINISH_INT BIT(1) 70#define RKCANFD_REG_INT_RX_FINISH_INT BIT(0) 71 72#define RKCANFD_REG_INT_ALL \ 73 (RKCANFD_REG_INT_WAKEUP_INT | \ 74 RKCANFD_REG_INT_TXE_FIFO_FULL_INT | \ 75 RKCANFD_REG_INT_TXE_FIFO_OV_INT | \ 76 RKCANFD_REG_INT_TIMESTAMP_COUNTER_OVERFLOW_INT | \ 77 RKCANFD_REG_INT_BUS_OFF_RECOVERY_INT | \ 78 RKCANFD_REG_INT_BUS_OFF_INT | \ 79 RKCANFD_REG_INT_RX_FIFO_OVERFLOW_INT | \ 80 RKCANFD_REG_INT_RX_FIFO_FULL_INT | \ 81 RKCANFD_REG_INT_ERROR_INT | \ 82 RKCANFD_REG_INT_TX_ARBIT_FAIL_INT | \ 83 RKCANFD_REG_INT_PASSIVE_ERROR_INT | \ 84 RKCANFD_REG_INT_OVERLOAD_INT | \ 85 RKCANFD_REG_INT_ERROR_WARNING_INT | \ 86 RKCANFD_REG_INT_TX_FINISH_INT | \ 87 RKCANFD_REG_INT_RX_FINISH_INT) 88 89#define RKCANFD_REG_INT_ALL_ERROR \ 90 (RKCANFD_REG_INT_BUS_OFF_INT | \ 91 RKCANFD_REG_INT_ERROR_INT | \ 92 RKCANFD_REG_INT_PASSIVE_ERROR_INT | \ 93 RKCANFD_REG_INT_ERROR_WARNING_INT) 94 95#define RKCANFD_REG_INT_MASK 0x010 96 97#define RKCANFD_REG_DMA_CTL 0x014 98#define RKCANFD_REG_DMA_CTL_DMA_RX_MODE BIT(1) 99#define RKCANFD_REG_DMA_CTL_DMA_TX_MODE BIT(9) 100 101#define RKCANFD_REG_BITTIMING 0x018 102#define RKCANFD_REG_BITTIMING_SAMPLE_MODE BIT(16) 103#define RKCANFD_REG_BITTIMING_SJW GENMASK(15, 14) 104#define RKCANFD_REG_BITTIMING_BRP GENMASK(13, 8) 105#define RKCANFD_REG_BITTIMING_TSEG2 GENMASK(6, 4) 106#define RKCANFD_REG_BITTIMING_TSEG1 GENMASK(3, 0) 107 108#define RKCANFD_REG_ARBITFAIL 0x028 109#define RKCANFD_REG_ARBITFAIL_ARBIT_FAIL_CODE GENMASK(6, 0) 110 111/* Register seems to be clear or read */ 112#define RKCANFD_REG_ERROR_CODE 0x02c 113#define RKCANFD_REG_ERROR_CODE_PHASE BIT(29) 114#define RKCANFD_REG_ERROR_CODE_TYPE GENMASK(28, 26) 115#define RKCANFD_REG_ERROR_CODE_TYPE_BIT 0x0 116#define RKCANFD_REG_ERROR_CODE_TYPE_STUFF 0x1 117#define RKCANFD_REG_ERROR_CODE_TYPE_FORM 0x2 118#define RKCANFD_REG_ERROR_CODE_TYPE_ACK 0x3 119#define RKCANFD_REG_ERROR_CODE_TYPE_CRC 0x4 120#define RKCANFD_REG_ERROR_CODE_DIRECTION_RX BIT(25) 121#define RKCANFD_REG_ERROR_CODE_TX GENMASK(24, 16) 122#define RKCANFD_REG_ERROR_CODE_TX_OVERLOAD BIT(24) 123#define RKCANFD_REG_ERROR_CODE_TX_ERROR BIT(23) 124#define RKCANFD_REG_ERROR_CODE_TX_ACK BIT(22) 125#define RKCANFD_REG_ERROR_CODE_TX_ACK_EOF BIT(21) 126#define RKCANFD_REG_ERROR_CODE_TX_CRC BIT(20) 127#define RKCANFD_REG_ERROR_CODE_TX_STUFF_COUNT BIT(19) 128#define RKCANFD_REG_ERROR_CODE_TX_DATA BIT(18) 129#define RKCANFD_REG_ERROR_CODE_TX_SOF_DLC BIT(17) 130#define RKCANFD_REG_ERROR_CODE_TX_IDLE BIT(16) 131#define RKCANFD_REG_ERROR_CODE_RX GENMASK(15, 0) 132#define RKCANFD_REG_ERROR_CODE_RX_BUF_INT BIT(15) 133#define RKCANFD_REG_ERROR_CODE_RX_SPACE BIT(14) 134#define RKCANFD_REG_ERROR_CODE_RX_EOF BIT(13) 135#define RKCANFD_REG_ERROR_CODE_RX_ACK_LIM BIT(12) 136#define RKCANFD_REG_ERROR_CODE_RX_ACK BIT(11) 137#define RKCANFD_REG_ERROR_CODE_RX_CRC_LIM BIT(10) 138#define RKCANFD_REG_ERROR_CODE_RX_CRC BIT(9) 139#define RKCANFD_REG_ERROR_CODE_RX_STUFF_COUNT BIT(8) 140#define RKCANFD_REG_ERROR_CODE_RX_DATA BIT(7) 141#define RKCANFD_REG_ERROR_CODE_RX_DLC BIT(6) 142#define RKCANFD_REG_ERROR_CODE_RX_BRS_ESI BIT(5) 143#define RKCANFD_REG_ERROR_CODE_RX_RES BIT(4) 144#define RKCANFD_REG_ERROR_CODE_RX_FDF BIT(3) 145#define RKCANFD_REG_ERROR_CODE_RX_ID2_RTR BIT(2) 146#define RKCANFD_REG_ERROR_CODE_RX_SOF_IDE BIT(1) 147#define RKCANFD_REG_ERROR_CODE_RX_IDLE BIT(0) 148 149#define RKCANFD_REG_ERROR_CODE_NOACK \ 150 (FIELD_PREP(RKCANFD_REG_ERROR_CODE_TYPE, \ 151 RKCANFD_REG_ERROR_CODE_TYPE_ACK) | \ 152 RKCANFD_REG_ERROR_CODE_TX_ACK_EOF | \ 153 RKCANFD_REG_ERROR_CODE_RX_ACK) 154 155#define RKCANFD_REG_RXERRORCNT 0x034 156#define RKCANFD_REG_RXERRORCNT_RX_ERR_CNT GENMASK(7, 0) 157 158#define RKCANFD_REG_TXERRORCNT 0x038 159#define RKCANFD_REG_TXERRORCNT_TX_ERR_CNT GENMASK(8, 0) 160 161#define RKCANFD_REG_IDCODE 0x03c 162#define RKCANFD_REG_IDCODE_STANDARD_FRAME_ID GENMASK(10, 0) 163#define RKCANFD_REG_IDCODE_EXTENDED_FRAME_ID GENMASK(28, 0) 164 165#define RKCANFD_REG_IDMASK 0x040 166 167#define RKCANFD_REG_TXFRAMEINFO 0x050 168#define RKCANFD_REG_FRAMEINFO_FRAME_FORMAT BIT(7) 169#define RKCANFD_REG_FRAMEINFO_RTR BIT(6) 170#define RKCANFD_REG_FRAMEINFO_DATA_LENGTH GENMASK(3, 0) 171 172#define RKCANFD_REG_TXID 0x054 173#define RKCANFD_REG_TXID_TX_ID GENMASK(28, 0) 174 175#define RKCANFD_REG_TXDATA0 0x058 176#define RKCANFD_REG_TXDATA1 0x05C 177#define RKCANFD_REG_RXFRAMEINFO 0x060 178#define RKCANFD_REG_RXID 0x064 179#define RKCANFD_REG_RXDATA0 0x068 180#define RKCANFD_REG_RXDATA1 0x06c 181 182#define RKCANFD_REG_RTL_VERSION 0x070 183#define RKCANFD_REG_RTL_VERSION_MAJOR GENMASK(7, 4) 184#define RKCANFD_REG_RTL_VERSION_MINOR GENMASK(3, 0) 185 186#define RKCANFD_REG_FD_NOMINAL_BITTIMING 0x100 187#define RKCANFD_REG_FD_NOMINAL_BITTIMING_SAMPLE_MODE BIT(31) 188#define RKCANFD_REG_FD_NOMINAL_BITTIMING_SJW GENMASK(30, 24) 189#define RKCANFD_REG_FD_NOMINAL_BITTIMING_BRP GENMASK(23, 16) 190#define RKCANFD_REG_FD_NOMINAL_BITTIMING_TSEG2 GENMASK(14, 8) 191#define RKCANFD_REG_FD_NOMINAL_BITTIMING_TSEG1 GENMASK(7, 0) 192 193#define RKCANFD_REG_FD_DATA_BITTIMING 0x104 194#define RKCANFD_REG_FD_DATA_BITTIMING_SAMPLE_MODE BIT(21) 195#define RKCANFD_REG_FD_DATA_BITTIMING_SJW GENMASK(20, 17) 196#define RKCANFD_REG_FD_DATA_BITTIMING_BRP GENMASK(16, 9) 197#define RKCANFD_REG_FD_DATA_BITTIMING_TSEG2 GENMASK(8, 5) 198#define RKCANFD_REG_FD_DATA_BITTIMING_TSEG1 GENMASK(4, 0) 199 200#define RKCANFD_REG_TRANSMIT_DELAY_COMPENSATION 0x108 201#define RKCANFD_REG_TRANSMIT_DELAY_COMPENSATION_TDC_OFFSET GENMASK(6, 1) 202#define RKCANFD_REG_TRANSMIT_DELAY_COMPENSATION_TDC_ENABLE BIT(0) 203 204#define RKCANFD_REG_TIMESTAMP_CTRL 0x10c 205/* datasheet says 6:1, which is wrong */ 206#define RKCANFD_REG_TIMESTAMP_CTRL_TIME_BASE_COUNTER_PRESCALE GENMASK(5, 1) 207#define RKCANFD_REG_TIMESTAMP_CTRL_TIME_BASE_COUNTER_ENABLE BIT(0) 208 209#define RKCANFD_REG_TIMESTAMP 0x110 210 211#define RKCANFD_REG_TXEVENT_FIFO_CTRL 0x114 212#define RKCANFD_REG_TXEVENT_FIFO_CTRL_TXE_FIFO_CNT GENMASK(8, 5) 213#define RKCANFD_REG_TXEVENT_FIFO_CTRL_TXE_FIFO_WATERMARK GENMASK(4, 1) 214#define RKCANFD_REG_TXEVENT_FIFO_CTRL_TXE_FIFO_ENABLE BIT(0) 215 216#define RKCANFD_REG_RX_FIFO_CTRL 0x118 217#define RKCANFD_REG_RX_FIFO_CTRL_RX_FIFO_CNT GENMASK(6, 4) 218#define RKCANFD_REG_RX_FIFO_CTRL_RX_FIFO_FULL_WATERMARK GENMASK(3, 1) 219#define RKCANFD_REG_RX_FIFO_CTRL_RX_FIFO_ENABLE BIT(0) 220 221#define RKCANFD_REG_AFC_CTRL 0x11c 222#define RKCANFD_REG_AFC_CTRL_UAF5 BIT(4) 223#define RKCANFD_REG_AFC_CTRL_UAF4 BIT(3) 224#define RKCANFD_REG_AFC_CTRL_UAF3 BIT(2) 225#define RKCANFD_REG_AFC_CTRL_UAF2 BIT(1) 226#define RKCANFD_REG_AFC_CTRL_UAF1 BIT(0) 227 228#define RKCANFD_REG_IDCODE0 0x120 229#define RKCANFD_REG_IDMASK0 0x124 230#define RKCANFD_REG_IDCODE1 0x128 231#define RKCANFD_REG_IDMASK1 0x12c 232#define RKCANFD_REG_IDCODE2 0x130 233#define RKCANFD_REG_IDMASK2 0x134 234#define RKCANFD_REG_IDCODE3 0x138 235#define RKCANFD_REG_IDMASK3 0x13c 236#define RKCANFD_REG_IDCODE4 0x140 237#define RKCANFD_REG_IDMASK4 0x144 238 239#define RKCANFD_REG_FD_TXFRAMEINFO 0x200 240#define RKCANFD_REG_FD_FRAMEINFO_FRAME_FORMAT BIT(7) 241#define RKCANFD_REG_FD_FRAMEINFO_RTR BIT(6) 242#define RKCANFD_REG_FD_FRAMEINFO_FDF BIT(5) 243#define RKCANFD_REG_FD_FRAMEINFO_BRS BIT(4) 244#define RKCANFD_REG_FD_FRAMEINFO_DATA_LENGTH GENMASK(3, 0) 245 246#define RKCANFD_REG_FD_TXID 0x204 247#define RKCANFD_REG_FD_ID_EFF GENMASK(28, 0) 248#define RKCANFD_REG_FD_ID_SFF GENMASK(11, 0) 249 250#define RKCANFD_REG_FD_TXDATA0 0x208 251#define RKCANFD_REG_FD_TXDATA1 0x20c 252#define RKCANFD_REG_FD_TXDATA2 0x210 253#define RKCANFD_REG_FD_TXDATA3 0x214 254#define RKCANFD_REG_FD_TXDATA4 0x218 255#define RKCANFD_REG_FD_TXDATA5 0x21c 256#define RKCANFD_REG_FD_TXDATA6 0x220 257#define RKCANFD_REG_FD_TXDATA7 0x224 258#define RKCANFD_REG_FD_TXDATA8 0x228 259#define RKCANFD_REG_FD_TXDATA9 0x22c 260#define RKCANFD_REG_FD_TXDATA10 0x230 261#define RKCANFD_REG_FD_TXDATA11 0x234 262#define RKCANFD_REG_FD_TXDATA12 0x238 263#define RKCANFD_REG_FD_TXDATA13 0x23c 264#define RKCANFD_REG_FD_TXDATA14 0x240 265#define RKCANFD_REG_FD_TXDATA15 0x244 266 267#define RKCANFD_REG_FD_RXFRAMEINFO 0x300 268#define RKCANFD_REG_FD_RXID 0x304 269#define RKCANFD_REG_FD_RXTIMESTAMP 0x308 270#define RKCANFD_REG_FD_RXDATA0 0x30c 271#define RKCANFD_REG_FD_RXDATA1 0x310 272#define RKCANFD_REG_FD_RXDATA2 0x314 273#define RKCANFD_REG_FD_RXDATA3 0x318 274#define RKCANFD_REG_FD_RXDATA4 0x31c 275#define RKCANFD_REG_FD_RXDATA5 0x320 276#define RKCANFD_REG_FD_RXDATA6 0x320 277#define RKCANFD_REG_FD_RXDATA7 0x328 278#define RKCANFD_REG_FD_RXDATA8 0x32c 279#define RKCANFD_REG_FD_RXDATA9 0x330 280#define RKCANFD_REG_FD_RXDATA10 0x334 281#define RKCANFD_REG_FD_RXDATA11 0x338 282#define RKCANFD_REG_FD_RXDATA12 0x33c 283#define RKCANFD_REG_FD_RXDATA13 0x340 284#define RKCANFD_REG_FD_RXDATA14 0x344 285#define RKCANFD_REG_FD_RXDATA15 0x348 286 287#define RKCANFD_REG_RX_FIFO_RDATA 0x400 288#define RKCANFD_REG_TXE_FIFO_RDATA 0x500 289 290#define DEVICE_NAME "rockchip_canfd" 291#define RKCANFD_NAPI_WEIGHT 32 292#define RKCANFD_TXFIFO_DEPTH 2 293#define RKCANFD_TX_STOP_THRESHOLD 1 294#define RKCANFD_TX_START_THRESHOLD 1 295 296#define RKCANFD_TIMESTAMP_WORK_MAX_DELAY_SEC 60 297#define RKCANFD_ERRATUM_5_SYSCLOCK_HZ_MIN (300 * MEGA) 298 299/* rk3568 CAN-FD Errata, as of Tue 07 Nov 2023 11:25:31 +08:00 */ 300 301/* Erratum 1: The error frame sent by the CAN controller has an 302 * abnormal format. 303 */ 304#define RKCANFD_QUIRK_RK3568_ERRATUM_1 BIT(0) 305 306/* Erratum 2: The error frame sent after detecting a CRC error has an 307 * abnormal position. 308 */ 309#define RKCANFD_QUIRK_RK3568_ERRATUM_2 BIT(1) 310 311/* Erratum 3: Intermittent CRC calculation errors. */ 312#define RKCANFD_QUIRK_RK3568_ERRATUM_3 BIT(2) 313 314/* Erratum 4: Intermittent occurrence of stuffing errors. */ 315#define RKCANFD_QUIRK_RK3568_ERRATUM_4 BIT(3) 316 317/* Erratum 5: Counters related to the TXFIFO and RXFIFO exhibit 318 * abnormal counting behavior. 319 * 320 * The rk3568 CAN-FD errata sheet as of Tue 07 Nov 2023 11:25:31 +08:00 321 * states that only the rk3568v2 is affected by this erratum, but 322 * tests with the rk3568v2 and rk3568v3 show that the RX_FIFO_CNT is 323 * sometimes too high. This leads to CAN frames being read from the 324 * FIFO, which is then already empty. 325 * 326 * Further tests on the rk3568v2 and rk3568v3 show that in this 327 * situation (i.e. empty FIFO) all elements of the FIFO header 328 * (frameinfo, id, ts) contain the same data. 329 * 330 * On the rk3568v2 and rk3568v3, this problem only occurs extremely 331 * rarely with the standard clock of 300 MHz, but almost immediately 332 * at 80 MHz. 333 * 334 * To workaround this problem, check for empty FIFO with 335 * rkcanfd_fifo_header_empty() in rkcanfd_handle_rx_int_one() and exit 336 * early. 337 * 338 * To reproduce: 339 * assigned-clocks = <&cru CLK_CANx>; 340 * assigned-clock-rates = <80000000>; 341 */ 342#define RKCANFD_QUIRK_RK3568_ERRATUM_5 BIT(4) 343 344/* Erratum 6: The CAN controller's transmission of extended frames may 345 * intermittently change into standard frames 346 * 347 * Work around this issue by activating self reception (RXSTX). If we 348 * have pending TX CAN frames, check all RX'ed CAN frames in 349 * rkcanfd_rxstx_filter(). 350 * 351 * If it's a frame we've send and it's OK, call the TX complete 352 * handler: rkcanfd_handle_tx_done_one(). Mask the TX complete IRQ. 353 * 354 * If it's a frame we've send, but the CAN-ID is mangled, resend the 355 * original extended frame. 356 * 357 * To reproduce: 358 * host: 359 * canfdtest -evx -g can0 360 * candump any,0:80000000 -cexdtA 361 * dut: 362 * canfdtest -evx can0 363 * ethtool -S can0 364 */ 365#define RKCANFD_QUIRK_RK3568_ERRATUM_6 BIT(5) 366 367/* Erratum 7: In the passive error state, the CAN controller's 368 * interframe space segment counting is inaccurate. 369 */ 370#define RKCANFD_QUIRK_RK3568_ERRATUM_7 BIT(6) 371 372/* Erratum 8: The Format-Error error flag is transmitted one bit 373 * later. 374 */ 375#define RKCANFD_QUIRK_RK3568_ERRATUM_8 BIT(7) 376 377/* Erratum 9: In the arbitration segment, the CAN controller will 378 * identify stuffing errors as arbitration failures. 379 */ 380#define RKCANFD_QUIRK_RK3568_ERRATUM_9 BIT(8) 381 382/* Erratum 10: Does not support the BUSOFF slow recovery mechanism. */ 383#define RKCANFD_QUIRK_RK3568_ERRATUM_10 BIT(9) 384 385/* Erratum 11: Arbitration error. */ 386#define RKCANFD_QUIRK_RK3568_ERRATUM_11 BIT(10) 387 388/* Erratum 12: A dominant bit at the third bit of the intermission may 389 * cause a transmission error. 390 */ 391#define RKCANFD_QUIRK_RK3568_ERRATUM_12 BIT(11) 392 393/* Tests on the rk3568v2 and rk3568v3 show that receiving certain 394 * CAN-FD frames trigger an Error Interrupt. 395 * 396 * - Form Error in RX Arbitration Phase: TX_IDLE RX_STUFF_COUNT (0x0a010100) CMD=0 RX=0 TX=0 397 * Error-Warning=1 Bus-Off=0 398 * To reproduce: 399 * host: 400 * cansend can0 002##01f 401 * DUT: 402 * candump any,0:0,#FFFFFFFF -cexdHtA 403 * 404 * - Form Error in RX Arbitration Phase: TX_IDLE RX_CRC (0x0a010200) CMD=0 RX=0 TX=0 405 * Error-Warning=1 Bus-Off=0 406 * To reproduce: 407 * host: 408 * cansend can0 002##07217010000000000 409 * DUT: 410 * candump any,0:0,#FFFFFFFF -cexdHtA 411 */ 412#define RKCANFD_QUIRK_CANFD_BROKEN BIT(12) 413 414/* known issues with rk3568v3: 415 * 416 * - Overload situation during high bus load 417 * To reproduce: 418 * host: 419 * # add a 2nd CAN adapter to the CAN bus 420 * cangen can0 -I 1 -Li -Di -p10 -g 0.3 421 * cansequence -rve 422 * DUT: 423 * cangen can0 -I2 -L1 -Di -p10 -c10 -g 1 -e 424 * cansequence -rv -i 1 425 * 426 * - TX starvation after repeated Bus-Off 427 * To reproduce: 428 * host: 429 * sleep 3 && cangen can0 -I2 -Li -Di -p10 -g 0.0 430 * DUT: 431 * cangen can0 -I2 -Li -Di -p10 -g 0.05 432 */ 433 434enum rkcanfd_model { 435 RKCANFD_MODEL_RK3568V2 = 0x35682, 436 RKCANFD_MODEL_RK3568V3 = 0x35683, 437}; 438 439struct rkcanfd_devtype_data { 440 enum rkcanfd_model model; 441 u32 quirks; 442}; 443 444struct rkcanfd_fifo_header { 445 u32 frameinfo; 446 u32 id; 447 u32 ts; 448}; 449 450struct rkcanfd_stats { 451 struct u64_stats_sync syncp; 452 453 /* Erratum 5 */ 454 u64_stats_t rx_fifo_empty_errors; 455 456 /* Erratum 6 */ 457 u64_stats_t tx_extended_as_standard_errors; 458}; 459 460struct rkcanfd_priv { 461 struct can_priv can; 462 struct can_rx_offload offload; 463 struct net_device *ndev; 464 465 void __iomem *regs; 466 unsigned int tx_head; 467 unsigned int tx_tail; 468 469 u32 reg_mode_default; 470 u32 reg_int_mask_default; 471 struct rkcanfd_devtype_data devtype_data; 472 473 struct cyclecounter cc; 474 struct timecounter tc; 475 struct delayed_work timestamp; 476 unsigned long work_delay_jiffies; 477 478 struct can_berr_counter bec; 479 480 struct rkcanfd_stats stats; 481 482 struct reset_control *reset; 483 struct clk_bulk_data *clks; 484 int clks_num; 485}; 486 487static inline u32 488rkcanfd_read(const struct rkcanfd_priv *priv, u32 reg) 489{ 490 return readl(priv->regs + reg); 491} 492 493static inline void 494rkcanfd_read_rep(const struct rkcanfd_priv *priv, u32 reg, 495 void *buf, unsigned int len) 496{ 497 readsl(priv->regs + reg, buf, len / sizeof(u32)); 498} 499 500static inline void 501rkcanfd_write(const struct rkcanfd_priv *priv, u32 reg, u32 val) 502{ 503 writel(val, priv->regs + reg); 504} 505 506static inline u32 507rkcanfd_get_timestamp(const struct rkcanfd_priv *priv) 508{ 509 return rkcanfd_read(priv, RKCANFD_REG_TIMESTAMP); 510} 511 512static inline unsigned int 513rkcanfd_get_tx_head(const struct rkcanfd_priv *priv) 514{ 515 return READ_ONCE(priv->tx_head) & (RKCANFD_TXFIFO_DEPTH - 1); 516} 517 518static inline unsigned int 519rkcanfd_get_tx_tail(const struct rkcanfd_priv *priv) 520{ 521 return READ_ONCE(priv->tx_tail) & (RKCANFD_TXFIFO_DEPTH - 1); 522} 523 524static inline unsigned int 525rkcanfd_get_tx_pending(const struct rkcanfd_priv *priv) 526{ 527 return READ_ONCE(priv->tx_head) - READ_ONCE(priv->tx_tail); 528} 529 530static inline unsigned int 531rkcanfd_get_tx_free(const struct rkcanfd_priv *priv) 532{ 533 return RKCANFD_TXFIFO_DEPTH - rkcanfd_get_tx_pending(priv); 534} 535 536void rkcanfd_ethtool_init(struct rkcanfd_priv *priv); 537 538int rkcanfd_handle_rx_int(struct rkcanfd_priv *priv); 539 540void rkcanfd_skb_set_timestamp(const struct rkcanfd_priv *priv, 541 struct sk_buff *skb, const u32 timestamp); 542void rkcanfd_timestamp_init(struct rkcanfd_priv *priv); 543void rkcanfd_timestamp_start(struct rkcanfd_priv *priv); 544void rkcanfd_timestamp_stop(struct rkcanfd_priv *priv); 545void rkcanfd_timestamp_stop_sync(struct rkcanfd_priv *priv); 546 547unsigned int rkcanfd_get_effective_tx_free(const struct rkcanfd_priv *priv); 548void rkcanfd_xmit_retry(struct rkcanfd_priv *priv); 549netdev_tx_t rkcanfd_start_xmit(struct sk_buff *skb, struct net_device *ndev); 550void rkcanfd_handle_tx_done_one(struct rkcanfd_priv *priv, const u32 ts, 551 unsigned int *frame_len_p); 552 553#endif
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