sfdp.c

   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Copyright (C) 2005, Intec Automation Inc.
   4 * Copyright (C) 2014, Freescale Semiconductor, Inc.
   5 */
   6
   7#include <linux/bitfield.h>
   8#include <linux/mtd/spi-nor.h>
   9#include <linux/slab.h>
  10#include <linux/sort.h>
  11
  12#include "core.h"
  13
  14#define SFDP_PARAM_HEADER_ID(p)	(((p)->id_msb << 8) | (p)->id_lsb)
  15#define SFDP_PARAM_HEADER_PTP(p) \
  16	(((p)->parameter_table_pointer[2] << 16) | \
  17	 ((p)->parameter_table_pointer[1] <<  8) | \
  18	 ((p)->parameter_table_pointer[0] <<  0))
  19#define SFDP_PARAM_HEADER_PARAM_LEN(p) ((p)->length * 4)
  20
  21#define SFDP_BFPT_ID		0xff00	/* Basic Flash Parameter Table */
  22#define SFDP_SECTOR_MAP_ID	0xff81	/* Sector Map Table */
  23#define SFDP_4BAIT_ID		0xff84  /* 4-byte Address Instruction Table */
  24#define SFDP_PROFILE1_ID	0xff05	/* xSPI Profile 1.0 table. */
  25#define SFDP_SCCR_MAP_ID	0xff87	/*
  26					 * Status, Control and Configuration
  27					 * Register Map.
  28					 */
  29#define SFDP_SCCR_MAP_MC_ID	0xff88	/*
  30					 * Status, Control and Configuration
  31					 * Register Map Offsets for Multi-Chip
  32					 * SPI Memory Devices.
  33					 */
  34
  35#define SFDP_SIGNATURE		0x50444653U
  36
  37struct sfdp_header {
  38	u32		signature; /* Ox50444653U <=> "SFDP" */
  39	u8		minor;
  40	u8		major;
  41	u8		nph; /* 0-base number of parameter headers */
  42	u8		unused;
  43
  44	/* Basic Flash Parameter Table. */
  45	struct sfdp_parameter_header	bfpt_header;
  46};
  47
  48/* Fast Read settings. */
  49struct sfdp_bfpt_read {
  50	/* The Fast Read x-y-z hardware capability in params->hwcaps.mask. */
  51	u32			hwcaps;
  52
  53	/*
  54	 * The <supported_bit> bit in <supported_dword> BFPT DWORD tells us
  55	 * whether the Fast Read x-y-z command is supported.
  56	 */
  57	u32			supported_dword;
  58	u32			supported_bit;
  59
  60	/*
  61	 * The half-word at offset <setting_shift> in <setting_dword> BFPT DWORD
  62	 * encodes the op code, the number of mode clocks and the number of wait
  63	 * states to be used by Fast Read x-y-z command.
  64	 */
  65	u32			settings_dword;
  66	u32			settings_shift;
  67
  68	/* The SPI protocol for this Fast Read x-y-z command. */
  69	enum spi_nor_protocol	proto;
  70};
  71
  72struct sfdp_bfpt_erase {
  73	/*
  74	 * The half-word at offset <shift> in DWORD <dword> encodes the
  75	 * op code and erase sector size to be used by Sector Erase commands.
  76	 */
  77	u32			dword;
  78	u32			shift;
  79};
  80
  81#define SMPT_CMD_ADDRESS_LEN_MASK		GENMASK(23, 22)
  82#define SMPT_CMD_ADDRESS_LEN_0			(0x0UL << 22)
  83#define SMPT_CMD_ADDRESS_LEN_3			(0x1UL << 22)
  84#define SMPT_CMD_ADDRESS_LEN_4			(0x2UL << 22)
  85#define SMPT_CMD_ADDRESS_LEN_USE_CURRENT	(0x3UL << 22)
  86
  87#define SMPT_CMD_READ_DUMMY_MASK		GENMASK(19, 16)
  88#define SMPT_CMD_READ_DUMMY_SHIFT		16
  89#define SMPT_CMD_READ_DUMMY(_cmd) \
  90	(((_cmd) & SMPT_CMD_READ_DUMMY_MASK) >> SMPT_CMD_READ_DUMMY_SHIFT)
  91#define SMPT_CMD_READ_DUMMY_IS_VARIABLE		0xfUL
  92
  93#define SMPT_CMD_READ_DATA_MASK			GENMASK(31, 24)
  94#define SMPT_CMD_READ_DATA_SHIFT		24
  95#define SMPT_CMD_READ_DATA(_cmd) \
  96	(((_cmd) & SMPT_CMD_READ_DATA_MASK) >> SMPT_CMD_READ_DATA_SHIFT)
  97
  98#define SMPT_CMD_OPCODE_MASK			GENMASK(15, 8)
  99#define SMPT_CMD_OPCODE_SHIFT			8
 100#define SMPT_CMD_OPCODE(_cmd) \
 101	(((_cmd) & SMPT_CMD_OPCODE_MASK) >> SMPT_CMD_OPCODE_SHIFT)
 102
 103#define SMPT_MAP_REGION_COUNT_MASK		GENMASK(23, 16)
 104#define SMPT_MAP_REGION_COUNT_SHIFT		16
 105#define SMPT_MAP_REGION_COUNT(_header) \
 106	((((_header) & SMPT_MAP_REGION_COUNT_MASK) >> \
 107	  SMPT_MAP_REGION_COUNT_SHIFT) + 1)
 108
 109#define SMPT_MAP_ID_MASK			GENMASK(15, 8)
 110#define SMPT_MAP_ID_SHIFT			8
 111#define SMPT_MAP_ID(_header) \
 112	(((_header) & SMPT_MAP_ID_MASK) >> SMPT_MAP_ID_SHIFT)
 113
 114#define SMPT_MAP_REGION_SIZE_MASK		GENMASK(31, 8)
 115#define SMPT_MAP_REGION_SIZE_SHIFT		8
 116#define SMPT_MAP_REGION_SIZE(_region) \
 117	(((((_region) & SMPT_MAP_REGION_SIZE_MASK) >> \
 118	   SMPT_MAP_REGION_SIZE_SHIFT) + 1) * 256)
 119
 120#define SMPT_MAP_REGION_ERASE_TYPE_MASK		GENMASK(3, 0)
 121#define SMPT_MAP_REGION_ERASE_TYPE(_region) \
 122	((_region) & SMPT_MAP_REGION_ERASE_TYPE_MASK)
 123
 124#define SMPT_DESC_TYPE_MAP			BIT(1)
 125#define SMPT_DESC_END				BIT(0)
 126
 127#define SFDP_4BAIT_DWORD_MAX	2
 128
 129struct sfdp_4bait {
 130	/* The hardware capability. */
 131	u32		hwcaps;
 132
 133	/*
 134	 * The <supported_bit> bit in DWORD1 of the 4BAIT tells us whether
 135	 * the associated 4-byte address op code is supported.
 136	 */
 137	u32		supported_bit;
 138};
 139
 140/**
 141 * spi_nor_read_raw() - raw read of serial flash memory. read_opcode,
 142 *			addr_nbytes and read_dummy members of the struct spi_nor
 143 *			should be previously set.
 144 * @nor:	pointer to a 'struct spi_nor'
 145 * @addr:	offset in the serial flash memory
 146 * @len:	number of bytes to read
 147 * @buf:	buffer where the data is copied into (dma-safe memory)
 148 *
 149 * Return: 0 on success, -errno otherwise.
 150 */
 151static int spi_nor_read_raw(struct spi_nor *nor, u32 addr, size_t len, u8 *buf)
 152{
 153	ssize_t ret;
 154
 155	while (len) {
 156		ret = spi_nor_read_data(nor, addr, len, buf);
 157		if (ret < 0)
 158			return ret;
 159		if (!ret || ret > len)
 160			return -EIO;
 161
 162		buf += ret;
 163		addr += ret;
 164		len -= ret;
 165	}
 166	return 0;
 167}
 168
 169/**
 170 * spi_nor_read_sfdp() - read Serial Flash Discoverable Parameters.
 171 * @nor:	pointer to a 'struct spi_nor'
 172 * @addr:	offset in the SFDP area to start reading data from
 173 * @len:	number of bytes to read
 174 * @buf:	buffer where the SFDP data are copied into (dma-safe memory)
 175 *
 176 * Whatever the actual numbers of bytes for address and dummy cycles are
 177 * for (Fast) Read commands, the Read SFDP (5Ah) instruction is always
 178 * followed by a 3-byte address and 8 dummy clock cycles.
 179 *
 180 * Return: 0 on success, -errno otherwise.
 181 */
 182static int spi_nor_read_sfdp(struct spi_nor *nor, u32 addr,
 183			     size_t len, void *buf)
 184{
 185	u8 addr_nbytes, read_opcode, read_dummy;
 186	int ret;
 187
 188	read_opcode = nor->read_opcode;
 189	addr_nbytes = nor->addr_nbytes;
 190	read_dummy = nor->read_dummy;
 191
 192	nor->read_opcode = SPINOR_OP_RDSFDP;
 193	nor->addr_nbytes = 3;
 194	nor->read_dummy = 8;
 195
 196	ret = spi_nor_read_raw(nor, addr, len, buf);
 197
 198	nor->read_opcode = read_opcode;
 199	nor->addr_nbytes = addr_nbytes;
 200	nor->read_dummy = read_dummy;
 201
 202	return ret;
 203}
 204
 205/**
 206 * spi_nor_read_sfdp_dma_unsafe() - read Serial Flash Discoverable Parameters.
 207 * @nor:	pointer to a 'struct spi_nor'
 208 * @addr:	offset in the SFDP area to start reading data from
 209 * @len:	number of bytes to read
 210 * @buf:	buffer where the SFDP data are copied into
 211 *
 212 * Wrap spi_nor_read_sfdp() using a kmalloc'ed bounce buffer as @buf is now not
 213 * guaranteed to be dma-safe.
 214 *
 215 * Return: -ENOMEM if kmalloc() fails, the return code of spi_nor_read_sfdp()
 216 *          otherwise.
 217 */
 218static int spi_nor_read_sfdp_dma_unsafe(struct spi_nor *nor, u32 addr,
 219					size_t len, void *buf)
 220{
 221	void *dma_safe_buf;
 222	int ret;
 223
 224	dma_safe_buf = kmalloc(len, GFP_KERNEL);
 225	if (!dma_safe_buf)
 226		return -ENOMEM;
 227
 228	ret = spi_nor_read_sfdp(nor, addr, len, dma_safe_buf);
 229	memcpy(buf, dma_safe_buf, len);
 230	kfree(dma_safe_buf);
 231
 232	return ret;
 233}
 234
 235static void
 236spi_nor_set_read_settings_from_bfpt(struct spi_nor_read_command *read,
 237				    u16 half,
 238				    enum spi_nor_protocol proto)
 239{
 240	read->num_mode_clocks = (half >> 5) & 0x07;
 241	read->num_wait_states = (half >> 0) & 0x1f;
 242	read->opcode = (half >> 8) & 0xff;
 243	read->proto = proto;
 244}
 245
 246static const struct sfdp_bfpt_read sfdp_bfpt_reads[] = {
 247	/* Fast Read 1-1-2 */
 248	{
 249		SNOR_HWCAPS_READ_1_1_2,
 250		SFDP_DWORD(1), BIT(16),	/* Supported bit */
 251		SFDP_DWORD(4), 0,	/* Settings */
 252		SNOR_PROTO_1_1_2,
 253	},
 254
 255	/* Fast Read 1-2-2 */
 256	{
 257		SNOR_HWCAPS_READ_1_2_2,
 258		SFDP_DWORD(1), BIT(20),	/* Supported bit */
 259		SFDP_DWORD(4), 16,	/* Settings */
 260		SNOR_PROTO_1_2_2,
 261	},
 262
 263	/* Fast Read 2-2-2 */
 264	{
 265		SNOR_HWCAPS_READ_2_2_2,
 266		SFDP_DWORD(5),  BIT(0),	/* Supported bit */
 267		SFDP_DWORD(6), 16,	/* Settings */
 268		SNOR_PROTO_2_2_2,
 269	},
 270
 271	/* Fast Read 1-1-4 */
 272	{
 273		SNOR_HWCAPS_READ_1_1_4,
 274		SFDP_DWORD(1), BIT(22),	/* Supported bit */
 275		SFDP_DWORD(3), 16,	/* Settings */
 276		SNOR_PROTO_1_1_4,
 277	},
 278
 279	/* Fast Read 1-4-4 */
 280	{
 281		SNOR_HWCAPS_READ_1_4_4,
 282		SFDP_DWORD(1), BIT(21),	/* Supported bit */
 283		SFDP_DWORD(3), 0,	/* Settings */
 284		SNOR_PROTO_1_4_4,
 285	},
 286
 287	/* Fast Read 4-4-4 */
 288	{
 289		SNOR_HWCAPS_READ_4_4_4,
 290		SFDP_DWORD(5), BIT(4),	/* Supported bit */
 291		SFDP_DWORD(7), 16,	/* Settings */
 292		SNOR_PROTO_4_4_4,
 293	},
 294};
 295
 296static const struct sfdp_bfpt_erase sfdp_bfpt_erases[] = {
 297	/* Erase Type 1 in DWORD8 bits[15:0] */
 298	{SFDP_DWORD(8), 0},
 299
 300	/* Erase Type 2 in DWORD8 bits[31:16] */
 301	{SFDP_DWORD(8), 16},
 302
 303	/* Erase Type 3 in DWORD9 bits[15:0] */
 304	{SFDP_DWORD(9), 0},
 305
 306	/* Erase Type 4 in DWORD9 bits[31:16] */
 307	{SFDP_DWORD(9), 16},
 308};
 309
 310/**
 311 * spi_nor_set_erase_settings_from_bfpt() - set erase type settings from BFPT
 312 * @erase:	pointer to a structure that describes a SPI NOR erase type
 313 * @size:	the size of the sector/block erased by the erase type
 314 * @opcode:	the SPI command op code to erase the sector/block
 315 * @i:		erase type index as sorted in the Basic Flash Parameter Table
 316 *
 317 * The supported Erase Types will be sorted at init in ascending order, with
 318 * the smallest Erase Type size being the first member in the erase_type array
 319 * of the spi_nor_erase_map structure. Save the Erase Type index as sorted in
 320 * the Basic Flash Parameter Table since it will be used later on to
 321 * synchronize with the supported Erase Types defined in SFDP optional tables.
 322 */
 323static void
 324spi_nor_set_erase_settings_from_bfpt(struct spi_nor_erase_type *erase,
 325				     u32 size, u8 opcode, u8 i)
 326{
 327	erase->idx = i;
 328	spi_nor_set_erase_type(erase, size, opcode);
 329}
 330
 331/**
 332 * spi_nor_map_cmp_erase_type() - compare the map's erase types by size
 333 * @l:	member in the left half of the map's erase_type array
 334 * @r:	member in the right half of the map's erase_type array
 335 *
 336 * Comparison function used in the sort() call to sort in ascending order the
 337 * map's erase types, the smallest erase type size being the first member in the
 338 * sorted erase_type array.
 339 *
 340 * Return: the result of @l->size - @r->size
 341 */
 342static int spi_nor_map_cmp_erase_type(const void *l, const void *r)
 343{
 344	const struct spi_nor_erase_type *left = l, *right = r;
 345
 346	return left->size - right->size;
 347}
 348
 349/**
 350 * spi_nor_sort_erase_mask() - sort erase mask
 351 * @map:	the erase map of the SPI NOR
 352 * @erase_mask:	the erase type mask to be sorted
 353 *
 354 * Replicate the sort done for the map's erase types in BFPT: sort the erase
 355 * mask in ascending order with the smallest erase type size starting from
 356 * BIT(0) in the sorted erase mask.
 357 *
 358 * Return: sorted erase mask.
 359 */
 360static u8 spi_nor_sort_erase_mask(struct spi_nor_erase_map *map, u8 erase_mask)
 361{
 362	struct spi_nor_erase_type *erase_type = map->erase_type;
 363	int i;
 364	u8 sorted_erase_mask = 0;
 365
 366	if (!erase_mask)
 367		return 0;
 368
 369	/* Replicate the sort done for the map's erase types. */
 370	for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++)
 371		if (erase_type[i].size && erase_mask & BIT(erase_type[i].idx))
 372			sorted_erase_mask |= BIT(i);
 373
 374	return sorted_erase_mask;
 375}
 376
 377/**
 378 * spi_nor_regions_sort_erase_types() - sort erase types in each region
 379 * @map:	the erase map of the SPI NOR
 380 *
 381 * Function assumes that the erase types defined in the erase map are already
 382 * sorted in ascending order, with the smallest erase type size being the first
 383 * member in the erase_type array. It replicates the sort done for the map's
 384 * erase types. Each region's erase bitmask will indicate which erase types are
 385 * supported from the sorted erase types defined in the erase map.
 386 * Sort the all region's erase type at init in order to speed up the process of
 387 * finding the best erase command at runtime.
 388 */
 389static void spi_nor_regions_sort_erase_types(struct spi_nor_erase_map *map)
 390{
 391	struct spi_nor_erase_region *region = map->regions;
 392	u8 sorted_erase_mask;
 393	unsigned int i;
 394
 395	for (i = 0; i < map->n_regions; i++) {
 396		sorted_erase_mask =
 397			spi_nor_sort_erase_mask(map, region[i].erase_mask);
 398
 399		/* Overwrite erase mask. */
 400		region[i].erase_mask = sorted_erase_mask;
 401	}
 402}
 403
 404/**
 405 * spi_nor_parse_bfpt() - read and parse the Basic Flash Parameter Table.
 406 * @nor:		pointer to a 'struct spi_nor'
 407 * @bfpt_header:	pointer to the 'struct sfdp_parameter_header' describing
 408 *			the Basic Flash Parameter Table length and version
 409 *
 410 * The Basic Flash Parameter Table is the main and only mandatory table as
 411 * defined by the SFDP (JESD216) specification.
 412 * It provides us with the total size (memory density) of the data array and
 413 * the number of address bytes for Fast Read, Page Program and Sector Erase
 414 * commands.
 415 * For Fast READ commands, it also gives the number of mode clock cycles and
 416 * wait states (regrouped in the number of dummy clock cycles) for each
 417 * supported instruction op code.
 418 * For Page Program, the page size is now available since JESD216 rev A, however
 419 * the supported instruction op codes are still not provided.
 420 * For Sector Erase commands, this table stores the supported instruction op
 421 * codes and the associated sector sizes.
 422 * Finally, the Quad Enable Requirements (QER) are also available since JESD216
 423 * rev A. The QER bits encode the manufacturer dependent procedure to be
 424 * executed to set the Quad Enable (QE) bit in some internal register of the
 425 * Quad SPI memory. Indeed the QE bit, when it exists, must be set before
 426 * sending any Quad SPI command to the memory. Actually, setting the QE bit
 427 * tells the memory to reassign its WP# and HOLD#/RESET# pins to functions IO2
 428 * and IO3 hence enabling 4 (Quad) I/O lines.
 429 *
 430 * Return: 0 on success, -errno otherwise.
 431 */
 432static int spi_nor_parse_bfpt(struct spi_nor *nor,
 433			      const struct sfdp_parameter_header *bfpt_header)
 434{
 435	struct spi_nor_flash_parameter *params = nor->params;
 436	struct spi_nor_erase_map *map = &params->erase_map;
 437	struct spi_nor_erase_type *erase_type = map->erase_type;
 438	struct sfdp_bfpt bfpt;
 439	size_t len;
 440	int i, cmd, err;
 441	u32 addr, val;
 442	u32 dword;
 443	u16 half;
 444	u8 erase_mask;
 445	u8 wait_states, mode_clocks, opcode;
 446
 447	/* JESD216 Basic Flash Parameter Table length is at least 9 DWORDs. */
 448	if (bfpt_header->length < BFPT_DWORD_MAX_JESD216)
 449		return -EINVAL;
 450
 451	/* Read the Basic Flash Parameter Table. */
 452	len = min_t(size_t, sizeof(bfpt),
 453		    bfpt_header->length * sizeof(u32));
 454	addr = SFDP_PARAM_HEADER_PTP(bfpt_header);
 455	memset(&bfpt, 0, sizeof(bfpt));
 456	err = spi_nor_read_sfdp_dma_unsafe(nor,  addr, len, &bfpt);
 457	if (err < 0)
 458		return err;
 459
 460	/* Fix endianness of the BFPT DWORDs. */
 461	le32_to_cpu_array(bfpt.dwords, BFPT_DWORD_MAX);
 462
 463	/* Number of address bytes. */
 464	switch (bfpt.dwords[SFDP_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) {
 465	case BFPT_DWORD1_ADDRESS_BYTES_3_ONLY:
 466	case BFPT_DWORD1_ADDRESS_BYTES_3_OR_4:
 467		params->addr_nbytes = 3;
 468		params->addr_mode_nbytes = 3;
 469		break;
 470
 471	case BFPT_DWORD1_ADDRESS_BYTES_4_ONLY:
 472		params->addr_nbytes = 4;
 473		params->addr_mode_nbytes = 4;
 474		break;
 475
 476	default:
 477		break;
 478	}
 479
 480	/* Flash Memory Density (in bits). */
 481	val = bfpt.dwords[SFDP_DWORD(2)];
 482	if (val & BIT(31)) {
 483		val &= ~BIT(31);
 484
 485		/*
 486		 * Prevent overflows on params->size. Anyway, a NOR of 2^64
 487		 * bits is unlikely to exist so this error probably means
 488		 * the BFPT we are reading is corrupted/wrong.
 489		 */
 490		if (val > 63)
 491			return -EINVAL;
 492
 493		params->size = 1ULL << val;
 494	} else {
 495		params->size = val + 1;
 496	}
 497	params->size >>= 3; /* Convert to bytes. */
 498
 499	/* Fast Read settings. */
 500	for (i = 0; i < ARRAY_SIZE(sfdp_bfpt_reads); i++) {
 501		const struct sfdp_bfpt_read *rd = &sfdp_bfpt_reads[i];
 502		struct spi_nor_read_command *read;
 503
 504		if (!(bfpt.dwords[rd->supported_dword] & rd->supported_bit)) {
 505			params->hwcaps.mask &= ~rd->hwcaps;
 506			continue;
 507		}
 508
 509		params->hwcaps.mask |= rd->hwcaps;
 510		cmd = spi_nor_hwcaps_read2cmd(rd->hwcaps);
 511		read = &params->reads[cmd];
 512		half = bfpt.dwords[rd->settings_dword] >> rd->settings_shift;
 513		spi_nor_set_read_settings_from_bfpt(read, half, rd->proto);
 514	}
 515
 516	/*
 517	 * Sector Erase settings. Reinitialize the uniform erase map using the
 518	 * Erase Types defined in the bfpt table.
 519	 */
 520	erase_mask = 0;
 521	memset(&params->erase_map, 0, sizeof(params->erase_map));
 522	for (i = 0; i < ARRAY_SIZE(sfdp_bfpt_erases); i++) {
 523		const struct sfdp_bfpt_erase *er = &sfdp_bfpt_erases[i];
 524		u32 erasesize;
 525		u8 opcode;
 526
 527		half = bfpt.dwords[er->dword] >> er->shift;
 528		erasesize = half & 0xff;
 529
 530		/* erasesize == 0 means this Erase Type is not supported. */
 531		if (!erasesize)
 532			continue;
 533
 534		erasesize = 1U << erasesize;
 535		opcode = (half >> 8) & 0xff;
 536		erase_mask |= BIT(i);
 537		spi_nor_set_erase_settings_from_bfpt(&erase_type[i], erasesize,
 538						     opcode, i);
 539	}
 540	spi_nor_init_uniform_erase_map(map, erase_mask, params->size);
 541	/*
 542	 * Sort all the map's Erase Types in ascending order with the smallest
 543	 * erase size being the first member in the erase_type array.
 544	 */
 545	sort(erase_type, SNOR_ERASE_TYPE_MAX, sizeof(erase_type[0]),
 546	     spi_nor_map_cmp_erase_type, NULL);
 547	/*
 548	 * Sort the erase types in the uniform region in order to update the
 549	 * uniform_erase_type bitmask. The bitmask will be used later on when
 550	 * selecting the uniform erase.
 551	 */
 552	spi_nor_regions_sort_erase_types(map);
 553
 554	/* Stop here if not JESD216 rev A or later. */
 555	if (bfpt_header->length == BFPT_DWORD_MAX_JESD216)
 556		return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt);
 557
 558	/* Page size: this field specifies 'N' so the page size = 2^N bytes. */
 559	val = bfpt.dwords[SFDP_DWORD(11)];
 560	val &= BFPT_DWORD11_PAGE_SIZE_MASK;
 561	val >>= BFPT_DWORD11_PAGE_SIZE_SHIFT;
 562	params->page_size = 1U << val;
 563
 564	/* Quad Enable Requirements. */
 565	switch (bfpt.dwords[SFDP_DWORD(15)] & BFPT_DWORD15_QER_MASK) {
 566	case BFPT_DWORD15_QER_NONE:
 567		params->quad_enable = NULL;
 568		break;
 569
 570	case BFPT_DWORD15_QER_SR2_BIT1_BUGGY:
 571		/*
 572		 * Writing only one byte to the Status Register has the
 573		 * side-effect of clearing Status Register 2.
 574		 */
 575	case BFPT_DWORD15_QER_SR2_BIT1_NO_RD:
 576		/*
 577		 * Read Configuration Register (35h) instruction is not
 578		 * supported.
 579		 */
 580		nor->flags |= SNOR_F_HAS_16BIT_SR | SNOR_F_NO_READ_CR;
 581		params->quad_enable = spi_nor_sr2_bit1_quad_enable;
 582		break;
 583
 584	case BFPT_DWORD15_QER_SR1_BIT6:
 585		nor->flags &= ~SNOR_F_HAS_16BIT_SR;
 586		params->quad_enable = spi_nor_sr1_bit6_quad_enable;
 587		break;
 588
 589	case BFPT_DWORD15_QER_SR2_BIT7:
 590		nor->flags &= ~SNOR_F_HAS_16BIT_SR;
 591		params->quad_enable = spi_nor_sr2_bit7_quad_enable;
 592		break;
 593
 594	case BFPT_DWORD15_QER_SR2_BIT1:
 595		/*
 596		 * JESD216 rev B or later does not specify if writing only one
 597		 * byte to the Status Register clears or not the Status
 598		 * Register 2, so let's be cautious and keep the default
 599		 * assumption of a 16-bit Write Status (01h) command.
 600		 */
 601		nor->flags |= SNOR_F_HAS_16BIT_SR;
 602
 603		params->quad_enable = spi_nor_sr2_bit1_quad_enable;
 604		break;
 605
 606	default:
 607		dev_dbg(nor->dev, "BFPT QER reserved value used\n");
 608		break;
 609	}
 610
 611	dword = bfpt.dwords[SFDP_DWORD(16)] & BFPT_DWORD16_4B_ADDR_MODE_MASK;
 612	if (SFDP_MASK_CHECK(dword, BFPT_DWORD16_4B_ADDR_MODE_BRWR))
 613		params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode_brwr;
 614	else if (SFDP_MASK_CHECK(dword, BFPT_DWORD16_4B_ADDR_MODE_WREN_EN4B_EX4B))
 615		params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode_wren_en4b_ex4b;
 616	else if (SFDP_MASK_CHECK(dword, BFPT_DWORD16_4B_ADDR_MODE_EN4B_EX4B))
 617		params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode_en4b_ex4b;
 618	else
 619		dev_dbg(nor->dev, "BFPT: 4-Byte Address Mode method is not recognized or not implemented\n");
 620
 621	/* Soft Reset support. */
 622	if (bfpt.dwords[SFDP_DWORD(16)] & BFPT_DWORD16_SWRST_EN_RST)
 623		nor->flags |= SNOR_F_SOFT_RESET;
 624
 625	/* Stop here if not JESD216 rev C or later. */
 626	if (bfpt_header->length == BFPT_DWORD_MAX_JESD216B)
 627		return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt);
 628
 629	/* Parse 1-1-8 read instruction */
 630	opcode = FIELD_GET(BFPT_DWORD17_RD_1_1_8_CMD, bfpt.dwords[SFDP_DWORD(17)]);
 631	if (opcode) {
 632		mode_clocks = FIELD_GET(BFPT_DWORD17_RD_1_1_8_MODE_CLOCKS,
 633					bfpt.dwords[SFDP_DWORD(17)]);
 634		wait_states = FIELD_GET(BFPT_DWORD17_RD_1_1_8_WAIT_STATES,
 635					bfpt.dwords[SFDP_DWORD(17)]);
 636		params->hwcaps.mask |= SNOR_HWCAPS_READ_1_1_8;
 637		spi_nor_set_read_settings(&params->reads[SNOR_CMD_READ_1_1_8],
 638					  mode_clocks, wait_states, opcode,
 639					  SNOR_PROTO_1_1_8);
 640	}
 641
 642	/* Parse 1-8-8 read instruction */
 643	opcode = FIELD_GET(BFPT_DWORD17_RD_1_8_8_CMD, bfpt.dwords[SFDP_DWORD(17)]);
 644	if (opcode) {
 645		mode_clocks = FIELD_GET(BFPT_DWORD17_RD_1_8_8_MODE_CLOCKS,
 646					bfpt.dwords[SFDP_DWORD(17)]);
 647		wait_states = FIELD_GET(BFPT_DWORD17_RD_1_8_8_WAIT_STATES,
 648					bfpt.dwords[SFDP_DWORD(17)]);
 649		params->hwcaps.mask |= SNOR_HWCAPS_READ_1_8_8;
 650		spi_nor_set_read_settings(&params->reads[SNOR_CMD_READ_1_8_8],
 651					  mode_clocks, wait_states, opcode,
 652					  SNOR_PROTO_1_8_8);
 653	}
 654
 655	/* 8D-8D-8D command extension. */
 656	switch (bfpt.dwords[SFDP_DWORD(18)] & BFPT_DWORD18_CMD_EXT_MASK) {
 657	case BFPT_DWORD18_CMD_EXT_REP:
 658		nor->cmd_ext_type = SPI_NOR_EXT_REPEAT;
 659		break;
 660
 661	case BFPT_DWORD18_CMD_EXT_INV:
 662		nor->cmd_ext_type = SPI_NOR_EXT_INVERT;
 663		break;
 664
 665	case BFPT_DWORD18_CMD_EXT_RES:
 666		dev_dbg(nor->dev, "Reserved command extension used\n");
 667		break;
 668
 669	case BFPT_DWORD18_CMD_EXT_16B:
 670		dev_dbg(nor->dev, "16-bit opcodes not supported\n");
 671		return -EOPNOTSUPP;
 672	}
 673
 674	/* Byte order in 8D-8D-8D mode */
 675	if (bfpt.dwords[SFDP_DWORD(18)] & BFPT_DWORD18_BYTE_ORDER_SWAPPED)
 676		nor->flags |= SNOR_F_SWAP16;
 677
 678	return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt);
 679}
 680
 681/**
 682 * spi_nor_smpt_addr_nbytes() - return the number of address bytes used in the
 683 *			       configuration detection command.
 684 * @nor:	pointer to a 'struct spi_nor'
 685 * @settings:	configuration detection command descriptor, dword1
 686 */
 687static u8 spi_nor_smpt_addr_nbytes(const struct spi_nor *nor, const u32 settings)
 688{
 689	switch (settings & SMPT_CMD_ADDRESS_LEN_MASK) {
 690	case SMPT_CMD_ADDRESS_LEN_0:
 691		return 0;
 692	case SMPT_CMD_ADDRESS_LEN_3:
 693		return 3;
 694	case SMPT_CMD_ADDRESS_LEN_4:
 695		return 4;
 696	case SMPT_CMD_ADDRESS_LEN_USE_CURRENT:
 697	default:
 698		return nor->params->addr_mode_nbytes;
 699	}
 700}
 701
 702static void spi_nor_smpt_read_dummy_fixups(const struct spi_nor *nor,
 703					   u8 *read_dummy)
 704{
 705	if (nor->manufacturer && nor->manufacturer->fixups &&
 706	    nor->manufacturer->fixups->smpt_read_dummy)
 707		nor->manufacturer->fixups->smpt_read_dummy(nor, read_dummy);
 708
 709	if (nor->info->fixups && nor->info->fixups->smpt_read_dummy)
 710		nor->info->fixups->smpt_read_dummy(nor, read_dummy);
 711}
 712
 713/**
 714 * spi_nor_smpt_read_dummy() - return the configuration detection command read
 715 *			       latency, in clock cycles.
 716 * @nor:	pointer to a 'struct spi_nor'
 717 * @settings:	configuration detection command descriptor, dword1
 718 *
 719 * Return: the number of dummy cycles for an SMPT read
 720 */
 721static u8 spi_nor_smpt_read_dummy(const struct spi_nor *nor, const u32 settings)
 722{
 723	u8 read_dummy = SMPT_CMD_READ_DUMMY(settings);
 724
 725	if (read_dummy == SMPT_CMD_READ_DUMMY_IS_VARIABLE) {
 726		read_dummy = nor->read_dummy;
 727		spi_nor_smpt_read_dummy_fixups(nor, &read_dummy);
 728	}
 729
 730	return read_dummy;
 731}
 732
 733static void spi_nor_smpt_map_id_fixups(const struct spi_nor *nor, u8 *map_id)
 734{
 735	if (nor->manufacturer && nor->manufacturer->fixups &&
 736	    nor->manufacturer->fixups->smpt_map_id)
 737		nor->manufacturer->fixups->smpt_map_id(nor, map_id);
 738
 739	if (nor->info->fixups && nor->info->fixups->smpt_map_id)
 740		nor->info->fixups->smpt_map_id(nor, map_id);
 741}
 742
 743/**
 744 * spi_nor_get_map_in_use() - get the configuration map in use
 745 * @nor:	pointer to a 'struct spi_nor'
 746 * @smpt:	pointer to the sector map parameter table
 747 * @smpt_len:	sector map parameter table length
 748 *
 749 * Return: pointer to the map in use, ERR_PTR(-errno) otherwise.
 750 */
 751static const u32 *spi_nor_get_map_in_use(struct spi_nor *nor, const u32 *smpt,
 752					 u8 smpt_len)
 753{
 754	const u32 *ret;
 755	u8 *buf;
 756	u32 addr;
 757	int err;
 758	u8 i;
 759	u8 addr_nbytes, read_opcode, read_dummy;
 760	u8 read_data_mask, map_id;
 761
 762	/* Use a kmalloc'ed bounce buffer to guarantee it is DMA-able. */
 763	buf = kmalloc(sizeof(*buf), GFP_KERNEL);
 764	if (!buf)
 765		return ERR_PTR(-ENOMEM);
 766
 767	addr_nbytes = nor->addr_nbytes;
 768	read_dummy = nor->read_dummy;
 769	read_opcode = nor->read_opcode;
 770
 771	map_id = 0;
 772	/* Determine if there are any optional Detection Command Descriptors */
 773	for (i = 0; i < smpt_len; i += 2) {
 774		if (smpt[i] & SMPT_DESC_TYPE_MAP)
 775			break;
 776
 777		read_data_mask = SMPT_CMD_READ_DATA(smpt[i]);
 778		nor->addr_nbytes = spi_nor_smpt_addr_nbytes(nor, smpt[i]);
 779		nor->read_dummy = spi_nor_smpt_read_dummy(nor, smpt[i]);
 780		nor->read_opcode = SMPT_CMD_OPCODE(smpt[i]);
 781		addr = smpt[i + 1];
 782
 783		err = spi_nor_read_raw(nor, addr, 1, buf);
 784		if (err) {
 785			ret = ERR_PTR(err);
 786			goto out;
 787		}
 788
 789		/*
 790		 * Build an index value that is used to select the Sector Map
 791		 * Configuration that is currently in use.
 792		 */
 793		map_id = map_id << 1 | !!(*buf & read_data_mask);
 794	}
 795
 796	spi_nor_smpt_map_id_fixups(nor, &map_id);
 797
 798	/*
 799	 * If command descriptors are provided, they always precede map
 800	 * descriptors in the table. There is no need to start the iteration
 801	 * over smpt array all over again.
 802	 *
 803	 * Find the matching configuration map.
 804	 */
 805	ret = ERR_PTR(-EINVAL);
 806	while (i < smpt_len) {
 807		if (SMPT_MAP_ID(smpt[i]) == map_id) {
 808			ret = smpt + i;
 809			break;
 810		}
 811
 812		/*
 813		 * If there are no more configuration map descriptors and no
 814		 * configuration ID matched the configuration identifier, the
 815		 * sector address map is unknown.
 816		 */
 817		if (smpt[i] & SMPT_DESC_END)
 818			break;
 819
 820		/* increment the table index to the next map */
 821		i += SMPT_MAP_REGION_COUNT(smpt[i]) + 1;
 822	}
 823
 824	/* fall through */
 825out:
 826	kfree(buf);
 827	nor->addr_nbytes = addr_nbytes;
 828	nor->read_dummy = read_dummy;
 829	nor->read_opcode = read_opcode;
 830	return ret;
 831}
 832
 833/**
 834 * spi_nor_region_check_overlay() - set overlay bit when the region is overlaid
 835 * @region:	pointer to a structure that describes a SPI NOR erase region
 836 * @erase:	pointer to a structure that describes a SPI NOR erase type
 837 * @erase_type:	erase type bitmask
 838 */
 839static void
 840spi_nor_region_check_overlay(struct spi_nor_erase_region *region,
 841			     const struct spi_nor_erase_type *erase,
 842			     const u8 erase_type)
 843{
 844	int i;
 845
 846	for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) {
 847		if (!(erase[i].size && erase_type & BIT(erase[i].idx)))
 848			continue;
 849		if (region->size & erase[i].size_mask) {
 850			region->overlaid = true;
 851			return;
 852		}
 853	}
 854}
 855
 856/**
 857 * spi_nor_init_non_uniform_erase_map() - initialize the non-uniform erase map
 858 * @nor:	pointer to a 'struct spi_nor'
 859 * @smpt:	pointer to the sector map parameter table
 860 *
 861 * Return: 0 on success, -errno otherwise.
 862 */
 863static int spi_nor_init_non_uniform_erase_map(struct spi_nor *nor,
 864					      const u32 *smpt)
 865{
 866	struct spi_nor_erase_map *map = &nor->params->erase_map;
 867	struct spi_nor_erase_type *erase = map->erase_type;
 868	struct spi_nor_erase_region *region;
 869	u64 offset;
 870	u32 region_count;
 871	int i, j;
 872	u8 uniform_erase_type, save_uniform_erase_type;
 873	u8 erase_type, regions_erase_type;
 874
 875	region_count = SMPT_MAP_REGION_COUNT(*smpt);
 876	/*
 877	 * The regions will be freed when the driver detaches from the
 878	 * device.
 879	 */
 880	region = devm_kcalloc(nor->dev, region_count, sizeof(*region),
 881			      GFP_KERNEL);
 882	if (!region)
 883		return -ENOMEM;
 884	map->regions = region;
 885	map->n_regions = region_count;
 886
 887	uniform_erase_type = 0xff;
 888	regions_erase_type = 0;
 889	offset = 0;
 890	/* Populate regions. */
 891	for (i = 0; i < region_count; i++) {
 892		j = i + 1; /* index for the region dword */
 893		region[i].offset = offset;
 894		region[i].size = SMPT_MAP_REGION_SIZE(smpt[j]);
 895		erase_type = SMPT_MAP_REGION_ERASE_TYPE(smpt[j]);
 896		region[i].erase_mask = erase_type;
 897
 898		spi_nor_region_check_overlay(&region[i], erase, erase_type);
 899
 900		/*
 901		 * Save the erase types that are supported in all regions and
 902		 * can erase the entire flash memory.
 903		 */
 904		uniform_erase_type &= erase_type;
 905
 906		/*
 907		 * regions_erase_type mask will indicate all the erase types
 908		 * supported in this configuration map.
 909		 */
 910		regions_erase_type |= erase_type;
 911
 912		offset = region[i].offset + region[i].size;
 913	}
 914
 915	save_uniform_erase_type = map->uniform_region.erase_mask;
 916	map->uniform_region.erase_mask =
 917				spi_nor_sort_erase_mask(map,
 918							uniform_erase_type);
 919
 920	if (!regions_erase_type) {
 921		/*
 922		 * Roll back to the previous uniform_erase_type mask, SMPT is
 923		 * broken.
 924		 */
 925		map->uniform_region.erase_mask = save_uniform_erase_type;
 926		return -EINVAL;
 927	}
 928
 929	/*
 930	 * BFPT advertises all the erase types supported by all the possible
 931	 * map configurations. Mask out the erase types that are not supported
 932	 * by the current map configuration.
 933	 */
 934	for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++)
 935		if (!(regions_erase_type & BIT(erase[i].idx)))
 936			spi_nor_mask_erase_type(&erase[i]);
 937
 938	return 0;
 939}
 940
 941/**
 942 * spi_nor_parse_smpt() - parse Sector Map Parameter Table
 943 * @nor:		pointer to a 'struct spi_nor'
 944 * @smpt_header:	sector map parameter table header
 945 *
 946 * This table is optional, but when available, we parse it to identify the
 947 * location and size of sectors within the main data array of the flash memory
 948 * device and to identify which Erase Types are supported by each sector.
 949 *
 950 * Return: 0 on success, -errno otherwise.
 951 */
 952static int spi_nor_parse_smpt(struct spi_nor *nor,
 953			      const struct sfdp_parameter_header *smpt_header)
 954{
 955	const u32 *sector_map;
 956	u32 *smpt;
 957	size_t len;
 958	u32 addr;
 959	int ret;
 960
 961	/* Read the Sector Map Parameter Table. */
 962	len = smpt_header->length * sizeof(*smpt);
 963	smpt = kmalloc(len, GFP_KERNEL);
 964	if (!smpt)
 965		return -ENOMEM;
 966
 967	addr = SFDP_PARAM_HEADER_PTP(smpt_header);
 968	ret = spi_nor_read_sfdp(nor, addr, len, smpt);
 969	if (ret)
 970		goto out;
 971
 972	/* Fix endianness of the SMPT DWORDs. */
 973	le32_to_cpu_array(smpt, smpt_header->length);
 974
 975	sector_map = spi_nor_get_map_in_use(nor, smpt, smpt_header->length);
 976	if (IS_ERR(sector_map)) {
 977		ret = PTR_ERR(sector_map);
 978		goto out;
 979	}
 980
 981	ret = spi_nor_init_non_uniform_erase_map(nor, sector_map);
 982	if (ret)
 983		goto out;
 984
 985	spi_nor_regions_sort_erase_types(&nor->params->erase_map);
 986	/* fall through */
 987out:
 988	kfree(smpt);
 989	return ret;
 990}
 991
 992/**
 993 * spi_nor_parse_4bait() - parse the 4-Byte Address Instruction Table
 994 * @nor:		pointer to a 'struct spi_nor'.
 995 * @param_header:	pointer to the 'struct sfdp_parameter_header' describing
 996 *			the 4-Byte Address Instruction Table length and version.
 997 *
 998 * Return: 0 on success, -errno otherwise.
 999 */
1000static int spi_nor_parse_4bait(struct spi_nor *nor,
1001			       const struct sfdp_parameter_header *param_header)
1002{
1003	static const struct sfdp_4bait reads[] = {
1004		{ SNOR_HWCAPS_READ,		BIT(0) },
1005		{ SNOR_HWCAPS_READ_FAST,	BIT(1) },
1006		{ SNOR_HWCAPS_READ_1_1_2,	BIT(2) },
1007		{ SNOR_HWCAPS_READ_1_2_2,	BIT(3) },
1008		{ SNOR_HWCAPS_READ_1_1_4,	BIT(4) },
1009		{ SNOR_HWCAPS_READ_1_4_4,	BIT(5) },
1010		{ SNOR_HWCAPS_READ_1_1_1_DTR,	BIT(13) },
1011		{ SNOR_HWCAPS_READ_1_2_2_DTR,	BIT(14) },
1012		{ SNOR_HWCAPS_READ_1_4_4_DTR,	BIT(15) },
1013		{ SNOR_HWCAPS_READ_1_1_8,	BIT(20) },
1014		{ SNOR_HWCAPS_READ_1_8_8,	BIT(21) },
1015	};
1016	static const struct sfdp_4bait programs[] = {
1017		{ SNOR_HWCAPS_PP,		BIT(6) },
1018		{ SNOR_HWCAPS_PP_1_1_4,		BIT(7) },
1019		{ SNOR_HWCAPS_PP_1_4_4,		BIT(8) },
1020	};
1021	static const struct sfdp_4bait erases[SNOR_ERASE_TYPE_MAX] = {
1022		{ 0u /* not used */,		BIT(9) },
1023		{ 0u /* not used */,		BIT(10) },
1024		{ 0u /* not used */,		BIT(11) },
1025		{ 0u /* not used */,		BIT(12) },
1026	};
1027	struct spi_nor_flash_parameter *params = nor->params;
1028	struct spi_nor_pp_command *params_pp = params->page_programs;
1029	struct spi_nor_erase_map *map = &params->erase_map;
1030	struct spi_nor_erase_type *erase_type = map->erase_type;
1031	u32 *dwords;
1032	size_t len;
1033	u32 addr, discard_hwcaps, read_hwcaps, pp_hwcaps, erase_mask;
1034	int i, ret;
1035
1036	if (param_header->major != SFDP_JESD216_MAJOR ||
1037	    param_header->length < SFDP_4BAIT_DWORD_MAX)
1038		return -EINVAL;
1039
1040	/* Read the 4-byte Address Instruction Table. */
1041	len = sizeof(*dwords) * SFDP_4BAIT_DWORD_MAX;
1042
1043	/* Use a kmalloc'ed bounce buffer to guarantee it is DMA-able. */
1044	dwords = kmalloc(len, GFP_KERNEL);
1045	if (!dwords)
1046		return -ENOMEM;
1047
1048	addr = SFDP_PARAM_HEADER_PTP(param_header);
1049	ret = spi_nor_read_sfdp(nor, addr, len, dwords);
1050	if (ret)
1051		goto out;
1052
1053	/* Fix endianness of the 4BAIT DWORDs. */
1054	le32_to_cpu_array(dwords, SFDP_4BAIT_DWORD_MAX);
1055
1056	/*
1057	 * Compute the subset of (Fast) Read commands for which the 4-byte
1058	 * version is supported.
1059	 */
1060	discard_hwcaps = 0;
1061	read_hwcaps = 0;
1062	for (i = 0; i < ARRAY_SIZE(reads); i++) {
1063		const struct sfdp_4bait *read = &reads[i];
1064
1065		discard_hwcaps |= read->hwcaps;
1066		if ((params->hwcaps.mask & read->hwcaps) &&
1067		    (dwords[SFDP_DWORD(1)] & read->supported_bit))
1068			read_hwcaps |= read->hwcaps;
1069	}
1070
1071	/*
1072	 * Compute the subset of Page Program commands for which the 4-byte
1073	 * version is supported.
1074	 */
1075	pp_hwcaps = 0;
1076	for (i = 0; i < ARRAY_SIZE(programs); i++) {
1077		const struct sfdp_4bait *program = &programs[i];
1078
1079		/*
1080		 * The 4 Byte Address Instruction (Optional) Table is the only
1081		 * SFDP table that indicates support for Page Program Commands.
1082		 * Bypass the params->hwcaps.mask and consider 4BAIT the biggest
1083		 * authority for specifying Page Program support.
1084		 */
1085		discard_hwcaps |= program->hwcaps;
1086		if (dwords[SFDP_DWORD(1)] & program->supported_bit)
1087			pp_hwcaps |= program->hwcaps;
1088	}
1089
1090	/*
1091	 * Compute the subset of Sector Erase commands for which the 4-byte
1092	 * version is supported.
1093	 */
1094	erase_mask = 0;
1095	for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) {
1096		const struct sfdp_4bait *erase = &erases[i];
1097
1098		if (dwords[SFDP_DWORD(1)] & erase->supported_bit)
1099			erase_mask |= BIT(i);
1100	}
1101
1102	/* Replicate the sort done for the map's erase types in BFPT. */
1103	erase_mask = spi_nor_sort_erase_mask(map, erase_mask);
1104
1105	/*
1106	 * We need at least one 4-byte op code per read, program and erase
1107	 * operation; the .read(), .write() and .erase() hooks share the
1108	 * nor->addr_nbytes value.
1109	 */
1110	if (!read_hwcaps || !pp_hwcaps || !erase_mask)
1111		goto out;
1112
1113	/*
1114	 * Discard all operations from the 4-byte instruction set which are
1115	 * not supported by this memory.
1116	 */
1117	params->hwcaps.mask &= ~discard_hwcaps;
1118	params->hwcaps.mask |= (read_hwcaps | pp_hwcaps);
1119
1120	/* Use the 4-byte address instruction set. */
1121	for (i = 0; i < SNOR_CMD_READ_MAX; i++) {
1122		struct spi_nor_read_command *read_cmd = &params->reads[i];
1123
1124		read_cmd->opcode = spi_nor_convert_3to4_read(read_cmd->opcode);
1125	}
1126
1127	/* 4BAIT is the only SFDP table that indicates page program support. */
1128	if (pp_hwcaps & SNOR_HWCAPS_PP) {
1129		spi_nor_set_pp_settings(&params_pp[SNOR_CMD_PP],
1130					SPINOR_OP_PP_4B, SNOR_PROTO_1_1_1);
1131		/*
1132		 * Since xSPI Page Program opcode is backward compatible with
1133		 * Legacy SPI, use Legacy SPI opcode there as well.
1134		 */
1135		spi_nor_set_pp_settings(&params_pp[SNOR_CMD_PP_8_8_8_DTR],
1136					SPINOR_OP_PP_4B, SNOR_PROTO_8_8_8_DTR);
1137	}
1138	if (pp_hwcaps & SNOR_HWCAPS_PP_1_1_4)
1139		spi_nor_set_pp_settings(&params_pp[SNOR_CMD_PP_1_1_4],
1140					SPINOR_OP_PP_1_1_4_4B,
1141					SNOR_PROTO_1_1_4);
1142	if (pp_hwcaps & SNOR_HWCAPS_PP_1_4_4)
1143		spi_nor_set_pp_settings(&params_pp[SNOR_CMD_PP_1_4_4],
1144					SPINOR_OP_PP_1_4_4_4B,
1145					SNOR_PROTO_1_4_4);
1146
1147	for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) {
1148		if (erase_mask & BIT(i))
1149			erase_type[i].opcode = (dwords[SFDP_DWORD(2)] >>
1150						erase_type[i].idx * 8) & 0xFF;
1151		else
1152			spi_nor_mask_erase_type(&erase_type[i]);
1153	}
1154
1155	/*
1156	 * We set SNOR_F_HAS_4BAIT in order to skip spi_nor_set_4byte_opcodes()
1157	 * later because we already did the conversion to 4byte opcodes. Also,
1158	 * this latest function implements a legacy quirk for the erase size of
1159	 * Spansion memory. However this quirk is no longer needed with new
1160	 * SFDP compliant memories.
1161	 */
1162	params->addr_nbytes = 4;
1163	nor->flags |= SNOR_F_4B_OPCODES | SNOR_F_HAS_4BAIT;
1164
1165	/* fall through */
1166out:
1167	kfree(dwords);
1168	return ret;
1169}
1170
1171#define PROFILE1_DWORD1_RDSR_ADDR_BYTES		BIT(29)
1172#define PROFILE1_DWORD1_RDSR_DUMMY		BIT(28)
1173#define PROFILE1_DWORD1_RD_FAST_CMD		GENMASK(15, 8)
1174#define PROFILE1_DWORD4_DUMMY_200MHZ		GENMASK(11, 7)
1175#define PROFILE1_DWORD5_DUMMY_166MHZ		GENMASK(31, 27)
1176#define PROFILE1_DWORD5_DUMMY_133MHZ		GENMASK(21, 17)
1177#define PROFILE1_DWORD5_DUMMY_100MHZ		GENMASK(11, 7)
1178
1179/**
1180 * spi_nor_parse_profile1() - parse the xSPI Profile 1.0 table
1181 * @nor:		pointer to a 'struct spi_nor'
1182 * @profile1_header:	pointer to the 'struct sfdp_parameter_header' describing
1183 *			the Profile 1.0 Table length and version.
1184 *
1185 * Return: 0 on success, -errno otherwise.
1186 */
1187static int spi_nor_parse_profile1(struct spi_nor *nor,
1188				  const struct sfdp_parameter_header *profile1_header)
1189{
1190	u32 *dwords, addr;
1191	size_t len;
1192	int ret;
1193	u8 dummy, opcode;
1194
1195	len = profile1_header->length * sizeof(*dwords);
1196	dwords = kmalloc(len, GFP_KERNEL);
1197	if (!dwords)
1198		return -ENOMEM;
1199
1200	addr = SFDP_PARAM_HEADER_PTP(profile1_header);
1201	ret = spi_nor_read_sfdp(nor, addr, len, dwords);
1202	if (ret)
1203		goto out;
1204
1205	le32_to_cpu_array(dwords, profile1_header->length);
1206
1207	/* Get 8D-8D-8D fast read opcode and dummy cycles. */
1208	opcode = FIELD_GET(PROFILE1_DWORD1_RD_FAST_CMD, dwords[SFDP_DWORD(1)]);
1209
1210	 /* Set the Read Status Register dummy cycles and dummy address bytes. */
1211	if (dwords[SFDP_DWORD(1)] & PROFILE1_DWORD1_RDSR_DUMMY)
1212		nor->params->rdsr_dummy = 8;
1213	else
1214		nor->params->rdsr_dummy = 4;
1215
1216	if (dwords[SFDP_DWORD(1)] & PROFILE1_DWORD1_RDSR_ADDR_BYTES)
1217		nor->params->rdsr_addr_nbytes = 4;
1218	else
1219		nor->params->rdsr_addr_nbytes = 0;
1220
1221	/*
1222	 * We don't know what speed the controller is running at. Find the
1223	 * dummy cycles for the fastest frequency the flash can run at to be
1224	 * sure we are never short of dummy cycles. A value of 0 means the
1225	 * frequency is not supported.
1226	 *
1227	 * Default to PROFILE1_DUMMY_DEFAULT if we don't find anything, and let
1228	 * flashes set the correct value if needed in their fixup hooks.
1229	 */
1230	dummy = FIELD_GET(PROFILE1_DWORD4_DUMMY_200MHZ, dwords[SFDP_DWORD(4)]);
1231	if (!dummy)
1232		dummy = FIELD_GET(PROFILE1_DWORD5_DUMMY_166MHZ,
1233				  dwords[SFDP_DWORD(5)]);
1234	if (!dummy)
1235		dummy = FIELD_GET(PROFILE1_DWORD5_DUMMY_133MHZ,
1236				  dwords[SFDP_DWORD(5)]);
1237	if (!dummy)
1238		dummy = FIELD_GET(PROFILE1_DWORD5_DUMMY_100MHZ,
1239				  dwords[SFDP_DWORD(5)]);
1240	if (!dummy)
1241		dev_dbg(nor->dev,
1242			"Can't find dummy cycles from Profile 1.0 table\n");
1243
1244	/* Round up to an even value to avoid tripping controllers up. */
1245	dummy = round_up(dummy, 2);
1246
1247	/* Update the fast read settings. */
1248	nor->params->hwcaps.mask |= SNOR_HWCAPS_READ_8_8_8_DTR;
1249	spi_nor_set_read_settings(&nor->params->reads[SNOR_CMD_READ_8_8_8_DTR],
1250				  0, dummy, opcode,
1251				  SNOR_PROTO_8_8_8_DTR);
1252
1253	/*
1254	 * Page Program is "Required Command" in the xSPI Profile 1.0. Update
1255	 * the params->hwcaps.mask here.
1256	 */
1257	nor->params->hwcaps.mask |= SNOR_HWCAPS_PP_8_8_8_DTR;
1258
1259out:
1260	kfree(dwords);
1261	return ret;
1262}
1263
1264#define SCCR_DWORD22_OCTAL_DTR_EN_VOLATILE		BIT(31)
1265
1266/**
1267 * spi_nor_parse_sccr() - Parse the Status, Control and Configuration Register
1268 *                        Map.
1269 * @nor:		pointer to a 'struct spi_nor'
1270 * @sccr_header:	pointer to the 'struct sfdp_parameter_header' describing
1271 *			the SCCR Map table length and version.
1272 *
1273 * Return: 0 on success, -errno otherwise.
1274 */
1275static int spi_nor_parse_sccr(struct spi_nor *nor,
1276			      const struct sfdp_parameter_header *sccr_header)
1277{
1278	struct spi_nor_flash_parameter *params = nor->params;
1279	u32 *dwords, addr;
1280	size_t len;
1281	int ret;
1282
1283	len = sccr_header->length * sizeof(*dwords);
1284	dwords = kmalloc(len, GFP_KERNEL);
1285	if (!dwords)
1286		return -ENOMEM;
1287
1288	addr = SFDP_PARAM_HEADER_PTP(sccr_header);
1289	ret = spi_nor_read_sfdp(nor, addr, len, dwords);
1290	if (ret)
1291		goto out;
1292
1293	le32_to_cpu_array(dwords, sccr_header->length);
1294
1295	/* Address offset for volatile registers (die 0) */
1296	if (!params->vreg_offset) {
1297		params->vreg_offset = devm_kmalloc(nor->dev, sizeof(*dwords),
1298						   GFP_KERNEL);
1299		if (!params->vreg_offset) {
1300			ret = -ENOMEM;
1301			goto out;
1302		}
1303	}
1304	params->vreg_offset[0] = dwords[SFDP_DWORD(1)];
1305	params->n_dice = 1;
1306
1307	if (FIELD_GET(SCCR_DWORD22_OCTAL_DTR_EN_VOLATILE,
1308		      dwords[SFDP_DWORD(22)]))
1309		nor->flags |= SNOR_F_IO_MODE_EN_VOLATILE;
1310
1311out:
1312	kfree(dwords);
1313	return ret;
1314}
1315
1316/**
1317 * spi_nor_parse_sccr_mc() - Parse the Status, Control and Configuration
1318 *                           Register Map Offsets for Multi-Chip SPI Memory
1319 *                           Devices.
1320 * @nor:		pointer to a 'struct spi_nor'
1321 * @sccr_mc_header:	pointer to the 'struct sfdp_parameter_header' describing
1322 *			the SCCR Map offsets table length and version.
1323 *
1324 * Return: 0 on success, -errno otherwise.
1325 */
1326static int spi_nor_parse_sccr_mc(struct spi_nor *nor,
1327				 const struct sfdp_parameter_header *sccr_mc_header)
1328{
1329	struct spi_nor_flash_parameter *params = nor->params;
1330	u32 *dwords, addr;
1331	u8 i, n_dice;
1332	size_t len;
1333	int ret;
1334
1335	len = sccr_mc_header->length * sizeof(*dwords);
1336	dwords = kmalloc(len, GFP_KERNEL);
1337	if (!dwords)
1338		return -ENOMEM;
1339
1340	addr = SFDP_PARAM_HEADER_PTP(sccr_mc_header);
1341	ret = spi_nor_read_sfdp(nor, addr, len, dwords);
1342	if (ret)
1343		goto out;
1344
1345	le32_to_cpu_array(dwords, sccr_mc_header->length);
1346
1347	/*
1348	 * Pair of DOWRDs (volatile and non-volatile register offsets) per
1349	 * additional die. Hence, length = 2 * (number of additional dice).
1350	 */
1351	n_dice = 1 + sccr_mc_header->length / 2;
1352
1353	/* Address offset for volatile registers of additional dice */
1354	params->vreg_offset =
1355			devm_krealloc(nor->dev, params->vreg_offset,
1356				      n_dice * sizeof(*dwords),
1357				      GFP_KERNEL);
1358	if (!params->vreg_offset) {
1359		ret = -ENOMEM;
1360		goto out;
1361	}
1362
1363	for (i = 1; i < n_dice; i++)
1364		params->vreg_offset[i] = dwords[SFDP_DWORD(i) * 2];
1365
1366	params->n_dice = n_dice;
1367
1368out:
1369	kfree(dwords);
1370	return ret;
1371}
1372
1373/**
1374 * spi_nor_post_sfdp_fixups() - Updates the flash's parameters and settings
1375 * after SFDP has been parsed. Called only for flashes that define JESD216 SFDP
1376 * tables.
1377 * @nor:	pointer to a 'struct spi_nor'
1378 *
1379 * Used to tweak various flash parameters when information provided by the SFDP
1380 * tables are wrong.
1381 */
1382static int spi_nor_post_sfdp_fixups(struct spi_nor *nor)
1383{
1384	int ret;
1385
1386	if (nor->manufacturer && nor->manufacturer->fixups &&
1387	    nor->manufacturer->fixups->post_sfdp) {
1388		ret = nor->manufacturer->fixups->post_sfdp(nor);
1389		if (ret)
1390			return ret;
1391	}
1392
1393	if (nor->info->fixups && nor->info->fixups->post_sfdp)
1394		return nor->info->fixups->post_sfdp(nor);
1395
1396	return 0;
1397}
1398
1399/**
1400 * spi_nor_check_sfdp_signature() - check for a valid SFDP signature
1401 * @nor:	pointer to a 'struct spi_nor'
1402 *
1403 * Used to detect if the flash supports the RDSFDP command as well as the
1404 * presence of a valid SFDP table.
1405 *
1406 * Return: 0 on success, -errno otherwise.
1407 */
1408int spi_nor_check_sfdp_signature(struct spi_nor *nor)
1409{
1410	u32 signature;
1411	int err;
1412
1413	/* Get the SFDP header. */
1414	err = spi_nor_read_sfdp_dma_unsafe(nor, 0, sizeof(signature),
1415					   &signature);
1416	if (err < 0)
1417		return err;
1418
1419	/* Check the SFDP signature. */
1420	if (le32_to_cpu(signature) != SFDP_SIGNATURE)
1421		return -EINVAL;
1422
1423	return 0;
1424}
1425
1426/**
1427 * spi_nor_parse_sfdp() - parse the Serial Flash Discoverable Parameters.
1428 * @nor:		pointer to a 'struct spi_nor'
1429 *
1430 * The Serial Flash Discoverable Parameters are described by the JEDEC JESD216
1431 * specification. This is a standard which tends to supported by almost all
1432 * (Q)SPI memory manufacturers. Those hard-coded tables allow us to learn at
1433 * runtime the main parameters needed to perform basic SPI flash operations such
1434 * as Fast Read, Page Program or Sector Erase commands.
1435 *
1436 * Return: 0 on success, -errno otherwise.
1437 */
1438int spi_nor_parse_sfdp(struct spi_nor *nor)
1439{
1440	const struct sfdp_parameter_header *param_header, *bfpt_header;
1441	struct sfdp_parameter_header *param_headers = NULL;
1442	struct sfdp_header header;
1443	struct device *dev = nor->dev;
1444	struct sfdp *sfdp;
1445	size_t sfdp_size;
1446	size_t psize;
1447	int i, err;
1448
1449	/* Get the SFDP header. */
1450	err = spi_nor_read_sfdp_dma_unsafe(nor, 0, sizeof(header), &header);
1451	if (err < 0)
1452		return err;
1453
1454	/* Check the SFDP header version. */
1455	if (le32_to_cpu(header.signature) != SFDP_SIGNATURE ||
1456	    header.major != SFDP_JESD216_MAJOR)
1457		return -EINVAL;
1458
1459	/*
1460	 * Verify that the first and only mandatory parameter header is a
1461	 * Basic Flash Parameter Table header as specified in JESD216.
1462	 */
1463	bfpt_header = &header.bfpt_header;
1464	if (SFDP_PARAM_HEADER_ID(bfpt_header) != SFDP_BFPT_ID ||
1465	    bfpt_header->major != SFDP_JESD216_MAJOR)
1466		return -EINVAL;
1467
1468	sfdp_size = SFDP_PARAM_HEADER_PTP(bfpt_header) +
1469		    SFDP_PARAM_HEADER_PARAM_LEN(bfpt_header);
1470
1471	/*
1472	 * Allocate memory then read all parameter headers with a single
1473	 * Read SFDP command. These parameter headers will actually be parsed
1474	 * twice: a first time to get the latest revision of the basic flash
1475	 * parameter table, then a second time to handle the supported optional
1476	 * tables.
1477	 * Hence we read the parameter headers once for all to reduce the
1478	 * processing time. Also we use kmalloc() instead of devm_kmalloc()
1479	 * because we don't need to keep these parameter headers: the allocated
1480	 * memory is always released with kfree() before exiting this function.
1481	 */
1482	if (header.nph) {
1483		psize = header.nph * sizeof(*param_headers);
1484
1485		param_headers = kmalloc(psize, GFP_KERNEL);
1486		if (!param_headers)
1487			return -ENOMEM;
1488
1489		err = spi_nor_read_sfdp(nor, sizeof(header),
1490					psize, param_headers);
1491		if (err < 0) {
1492			dev_dbg(dev, "failed to read SFDP parameter headers\n");
1493			goto exit;
1494		}
1495	}
1496
1497	/*
1498	 * Cache the complete SFDP data. It is not (easily) possible to fetch
1499	 * SFDP after probe time and we need it for the sysfs access.
1500	 */
1501	for (i = 0; i < header.nph; i++) {
1502		param_header = &param_headers[i];
1503		sfdp_size = max_t(size_t, sfdp_size,
1504				  SFDP_PARAM_HEADER_PTP(param_header) +
1505				  SFDP_PARAM_HEADER_PARAM_LEN(param_header));
1506	}
1507
1508	/*
1509	 * Limit the total size to a reasonable value to avoid allocating too
1510	 * much memory just of because the flash returned some insane values.
1511	 */
1512	if (sfdp_size > PAGE_SIZE) {
1513		dev_dbg(dev, "SFDP data (%zu) too big, truncating\n",
1514			sfdp_size);
1515		sfdp_size = PAGE_SIZE;
1516	}
1517
1518	sfdp = devm_kzalloc(dev, sizeof(*sfdp), GFP_KERNEL);
1519	if (!sfdp) {
1520		err = -ENOMEM;
1521		goto exit;
1522	}
1523
1524	/*
1525	 * The SFDP is organized in chunks of DWORDs. Thus, in theory, the
1526	 * sfdp_size should be a multiple of DWORDs. But in case a flash
1527	 * is not spec compliant, make sure that we have enough space to store
1528	 * the complete SFDP data.
1529	 */
1530	sfdp->num_dwords = DIV_ROUND_UP(sfdp_size, sizeof(*sfdp->dwords));
1531	sfdp->dwords = devm_kcalloc(dev, sfdp->num_dwords,
1532				    sizeof(*sfdp->dwords), GFP_KERNEL);
1533	if (!sfdp->dwords) {
1534		err = -ENOMEM;
1535		devm_kfree(dev, sfdp);
1536		goto exit;
1537	}
1538
1539	err = spi_nor_read_sfdp(nor, 0, sfdp_size, sfdp->dwords);
1540	if (err < 0) {
1541		dev_dbg(dev, "failed to read SFDP data\n");
1542		devm_kfree(dev, sfdp->dwords);
1543		devm_kfree(dev, sfdp);
1544		goto exit;
1545	}
1546
1547	nor->sfdp = sfdp;
1548
1549	/*
1550	 * Check other parameter headers to get the latest revision of
1551	 * the basic flash parameter table.
1552	 */
1553	for (i = 0; i < header.nph; i++) {
1554		param_header = &param_headers[i];
1555
1556		if (SFDP_PARAM_HEADER_ID(param_header) == SFDP_BFPT_ID &&
1557		    param_header->major == SFDP_JESD216_MAJOR &&
1558		    (param_header->minor > bfpt_header->minor ||
1559		     (param_header->minor == bfpt_header->minor &&
1560		      param_header->length > bfpt_header->length)))
1561			bfpt_header = param_header;
1562	}
1563
1564	err = spi_nor_parse_bfpt(nor, bfpt_header);
1565	if (err)
1566		goto exit;
1567
1568	/* Parse optional parameter tables. */
1569	for (i = 0; i < header.nph; i++) {
1570		param_header = &param_headers[i];
1571
1572		switch (SFDP_PARAM_HEADER_ID(param_header)) {
1573		case SFDP_SECTOR_MAP_ID:
1574			err = spi_nor_parse_smpt(nor, param_header);
1575			break;
1576
1577		case SFDP_4BAIT_ID:
1578			err = spi_nor_parse_4bait(nor, param_header);
1579			break;
1580
1581		case SFDP_PROFILE1_ID:
1582			err = spi_nor_parse_profile1(nor, param_header);
1583			break;
1584
1585		case SFDP_SCCR_MAP_ID:
1586			err = spi_nor_parse_sccr(nor, param_header);
1587			break;
1588
1589		case SFDP_SCCR_MAP_MC_ID:
1590			err = spi_nor_parse_sccr_mc(nor, param_header);
1591			break;
1592
1593		default:
1594			break;
1595		}
1596
1597		if (err) {
1598			dev_warn(dev, "Failed to parse optional parameter table: %04x\n",
1599				 SFDP_PARAM_HEADER_ID(param_header));
1600			/*
1601			 * Let's not drop all information we extracted so far
1602			 * if optional table parsers fail. In case of failing,
1603			 * each optional parser is responsible to roll back to
1604			 * the previously known spi_nor data.
1605			 */
1606			err = 0;
1607		}
1608	}
1609
1610	err = spi_nor_post_sfdp_fixups(nor);
1611exit:
1612	kfree(param_headers);
1613	return err;
1614}