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core.h
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linux-6.19.14/drivers/mtd/spi-nor/core.h
1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright (C) 2005, Intec Automation Inc. 4 * Copyright (C) 2014, Freescale Semiconductor, Inc. 5 */ 6 7#ifndef __LINUX_MTD_SPI_NOR_INTERNAL_H 8#define __LINUX_MTD_SPI_NOR_INTERNAL_H 9 10#include "sfdp.h" 11 12#define SPI_NOR_MAX_ID_LEN 6 13/* 14 * 256 bytes is a sane default for most older flashes. Newer flashes will 15 * have the page size defined within their SFDP tables. 16 */ 17#define SPI_NOR_DEFAULT_PAGE_SIZE 256 18#define SPI_NOR_DEFAULT_N_BANKS 1 19#define SPI_NOR_DEFAULT_SECTOR_SIZE SZ_64K 20 21/* Standard SPI NOR flash operations. */ 22#define SPI_NOR_READID_OP(naddr, ndummy, buf, len) \ 23 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDID, 0), \ 24 SPI_MEM_OP_ADDR(naddr, 0, 0), \ 25 SPI_MEM_OP_DUMMY(ndummy, 0), \ 26 SPI_MEM_OP_DATA_IN(len, buf, 0)) 27 28#define SPI_NOR_WREN_OP \ 29 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WREN, 0), \ 30 SPI_MEM_OP_NO_ADDR, \ 31 SPI_MEM_OP_NO_DUMMY, \ 32 SPI_MEM_OP_NO_DATA) 33 34#define SPI_NOR_WRDI_OP \ 35 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRDI, 0), \ 36 SPI_MEM_OP_NO_ADDR, \ 37 SPI_MEM_OP_NO_DUMMY, \ 38 SPI_MEM_OP_NO_DATA) 39 40#define SPI_NOR_RDSR_OP(buf) \ 41 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR, 0), \ 42 SPI_MEM_OP_NO_ADDR, \ 43 SPI_MEM_OP_NO_DUMMY, \ 44 SPI_MEM_OP_DATA_IN(1, buf, 0)) 45 46#define SPI_NOR_WRSR_OP(buf, len) \ 47 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR, 0), \ 48 SPI_MEM_OP_NO_ADDR, \ 49 SPI_MEM_OP_NO_DUMMY, \ 50 SPI_MEM_OP_DATA_OUT(len, buf, 0)) 51 52#define SPI_NOR_RDSR2_OP(buf) \ 53 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR2, 0), \ 54 SPI_MEM_OP_NO_ADDR, \ 55 SPI_MEM_OP_NO_DUMMY, \ 56 SPI_MEM_OP_DATA_OUT(1, buf, 0)) 57 58#define SPI_NOR_WRSR2_OP(buf) \ 59 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR2, 0), \ 60 SPI_MEM_OP_NO_ADDR, \ 61 SPI_MEM_OP_NO_DUMMY, \ 62 SPI_MEM_OP_DATA_OUT(1, buf, 0)) 63 64#define SPI_NOR_RDCR_OP(buf) \ 65 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDCR, 0), \ 66 SPI_MEM_OP_NO_ADDR, \ 67 SPI_MEM_OP_NO_DUMMY, \ 68 SPI_MEM_OP_DATA_IN(1, buf, 0)) 69 70#define SPI_NOR_EN4B_EX4B_OP(enable) \ 71 SPI_MEM_OP(SPI_MEM_OP_CMD(enable ? SPINOR_OP_EN4B : SPINOR_OP_EX4B, 0), \ 72 SPI_MEM_OP_NO_ADDR, \ 73 SPI_MEM_OP_NO_DUMMY, \ 74 SPI_MEM_OP_NO_DATA) 75 76#define SPI_NOR_BRWR_OP(buf) \ 77 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_BRWR, 0), \ 78 SPI_MEM_OP_NO_ADDR, \ 79 SPI_MEM_OP_NO_DUMMY, \ 80 SPI_MEM_OP_DATA_OUT(1, buf, 0)) 81 82#define SPI_NOR_GBULK_OP \ 83 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_GBULK, 0), \ 84 SPI_MEM_OP_NO_ADDR, \ 85 SPI_MEM_OP_NO_DUMMY, \ 86 SPI_MEM_OP_NO_DATA) 87 88#define SPI_NOR_DIE_ERASE_OP(opcode, addr_nbytes, addr, dice) \ 89 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \ 90 SPI_MEM_OP_ADDR(dice ? addr_nbytes : 0, addr, 0), \ 91 SPI_MEM_OP_NO_DUMMY, \ 92 SPI_MEM_OP_NO_DATA) 93 94#define SPI_NOR_SECTOR_ERASE_OP(opcode, addr_nbytes, addr) \ 95 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \ 96 SPI_MEM_OP_ADDR(addr_nbytes, addr, 0), \ 97 SPI_MEM_OP_NO_DUMMY, \ 98 SPI_MEM_OP_NO_DATA) 99 100#define SPI_NOR_READ_OP(opcode) \ 101 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \ 102 SPI_MEM_OP_ADDR(3, 0, 0), \ 103 SPI_MEM_OP_DUMMY(1, 0), \ 104 SPI_MEM_OP_DATA_IN(2, NULL, 0)) 105 106#define SPI_NOR_PP_OP(opcode) \ 107 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \ 108 SPI_MEM_OP_ADDR(3, 0, 0), \ 109 SPI_MEM_OP_NO_DUMMY, \ 110 SPI_MEM_OP_DATA_OUT(2, NULL, 0)) 111 112#define SPINOR_SRSTEN_OP \ 113 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRSTEN, 0), \ 114 SPI_MEM_OP_NO_DUMMY, \ 115 SPI_MEM_OP_NO_ADDR, \ 116 SPI_MEM_OP_NO_DATA) 117 118#define SPINOR_SRST_OP \ 119 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRST, 0), \ 120 SPI_MEM_OP_NO_DUMMY, \ 121 SPI_MEM_OP_NO_ADDR, \ 122 SPI_MEM_OP_NO_DATA) 123 124/* Keep these in sync with the list in debugfs.c */ 125enum spi_nor_option_flags { 126 SNOR_F_HAS_SR_TB = BIT(0), 127 SNOR_F_NO_OP_CHIP_ERASE = BIT(1), 128 SNOR_F_BROKEN_RESET = BIT(2), 129 SNOR_F_4B_OPCODES = BIT(3), 130 SNOR_F_HAS_4BAIT = BIT(4), 131 SNOR_F_HAS_LOCK = BIT(5), 132 SNOR_F_HAS_16BIT_SR = BIT(6), 133 SNOR_F_NO_READ_CR = BIT(7), 134 SNOR_F_HAS_SR_TB_BIT6 = BIT(8), 135 SNOR_F_HAS_4BIT_BP = BIT(9), 136 SNOR_F_HAS_SR_BP3_BIT6 = BIT(10), 137 SNOR_F_IO_MODE_EN_VOLATILE = BIT(11), 138 SNOR_F_SOFT_RESET = BIT(12), 139 SNOR_F_SWP_IS_VOLATILE = BIT(13), 140 SNOR_F_RWW = BIT(14), 141 SNOR_F_ECC = BIT(15), 142 SNOR_F_NO_WP = BIT(16), 143 SNOR_F_SWAP16 = BIT(17), 144}; 145 146struct spi_nor_read_command { 147 u8 num_mode_clocks; 148 u8 num_wait_states; 149 u8 opcode; 150 enum spi_nor_protocol proto; 151}; 152 153struct spi_nor_pp_command { 154 u8 opcode; 155 enum spi_nor_protocol proto; 156}; 157 158enum spi_nor_read_command_index { 159 SNOR_CMD_READ, 160 SNOR_CMD_READ_FAST, 161 SNOR_CMD_READ_1_1_1_DTR, 162 163 /* Dual SPI */ 164 SNOR_CMD_READ_1_1_2, 165 SNOR_CMD_READ_1_2_2, 166 SNOR_CMD_READ_2_2_2, 167 SNOR_CMD_READ_1_2_2_DTR, 168 169 /* Quad SPI */ 170 SNOR_CMD_READ_1_1_4, 171 SNOR_CMD_READ_1_4_4, 172 SNOR_CMD_READ_4_4_4, 173 SNOR_CMD_READ_1_4_4_DTR, 174 175 /* Octal SPI */ 176 SNOR_CMD_READ_1_1_8, 177 SNOR_CMD_READ_1_8_8, 178 SNOR_CMD_READ_8_8_8, 179 SNOR_CMD_READ_1_8_8_DTR, 180 SNOR_CMD_READ_8_8_8_DTR, 181 182 SNOR_CMD_READ_MAX 183}; 184 185enum spi_nor_pp_command_index { 186 SNOR_CMD_PP, 187 188 /* Quad SPI */ 189 SNOR_CMD_PP_1_1_4, 190 SNOR_CMD_PP_1_4_4, 191 SNOR_CMD_PP_4_4_4, 192 193 /* Octal SPI */ 194 SNOR_CMD_PP_1_1_8, 195 SNOR_CMD_PP_1_8_8, 196 SNOR_CMD_PP_8_8_8, 197 SNOR_CMD_PP_8_8_8_DTR, 198 199 SNOR_CMD_PP_MAX 200}; 201 202/** 203 * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type 204 * @size: the size of the sector/block erased by the erase type. 205 * JEDEC JESD216B imposes erase sizes to be a power of 2. 206 * @size_shift: @size is a power of 2, the shift is stored in 207 * @size_shift. 208 * @size_mask: the size mask based on @size_shift. 209 * @opcode: the SPI command op code to erase the sector/block. 210 * @idx: Erase Type index as sorted in the Basic Flash Parameter 211 * Table. It will be used to synchronize the supported 212 * Erase Types with the ones identified in the SFDP 213 * optional tables. 214 */ 215struct spi_nor_erase_type { 216 u32 size; 217 u32 size_shift; 218 u32 size_mask; 219 u8 opcode; 220 u8 idx; 221}; 222 223/** 224 * struct spi_nor_erase_command - Used for non-uniform erases 225 * The structure is used to describe a list of erase commands to be executed 226 * once we validate that the erase can be performed. The elements in the list 227 * are run-length encoded. 228 * @list: for inclusion into the list of erase commands. 229 * @count: how many times the same erase command should be 230 * consecutively used. 231 * @size: the size of the sector/block erased by the command. 232 * @opcode: the SPI command op code to erase the sector/block. 233 */ 234struct spi_nor_erase_command { 235 struct list_head list; 236 u32 count; 237 u32 size; 238 u8 opcode; 239}; 240 241/** 242 * struct spi_nor_erase_region - Structure to describe a SPI NOR erase region 243 * @offset: the offset in the data array of erase region start. 244 * @size: the size of the region in bytes. 245 * @erase_mask: bitmask to indicate all the supported erase commands 246 * inside this region. The erase types are sorted in 247 * ascending order with the smallest Erase Type size being 248 * at BIT(0). 249 * @overlaid: determine if this region is overlaid. 250 */ 251struct spi_nor_erase_region { 252 u64 offset; 253 u64 size; 254 u8 erase_mask; 255 bool overlaid; 256}; 257 258#define SNOR_ERASE_TYPE_MAX 4 259 260/** 261 * struct spi_nor_erase_map - Structure to describe the SPI NOR erase map 262 * @regions: array of erase regions. The regions are consecutive in 263 * address space. Walking through the regions is done 264 * incrementally. 265 * @uniform_region: a pre-allocated erase region for SPI NOR with a uniform 266 * sector size (legacy implementation). 267 * @erase_type: an array of erase types shared by all the regions. 268 * The erase types are sorted in ascending order, with the 269 * smallest Erase Type size being the first member in the 270 * erase_type array. 271 * @n_regions: number of erase regions. 272 */ 273struct spi_nor_erase_map { 274 struct spi_nor_erase_region *regions; 275 struct spi_nor_erase_region uniform_region; 276 struct spi_nor_erase_type erase_type[SNOR_ERASE_TYPE_MAX]; 277 unsigned int n_regions; 278}; 279 280/** 281 * struct spi_nor_locking_ops - SPI NOR locking methods 282 * @lock: lock a region of the SPI NOR. 283 * @unlock: unlock a region of the SPI NOR. 284 * @is_locked: check if a region of the SPI NOR is completely locked 285 */ 286struct spi_nor_locking_ops { 287 int (*lock)(struct spi_nor *nor, loff_t ofs, u64 len); 288 int (*unlock)(struct spi_nor *nor, loff_t ofs, u64 len); 289 int (*is_locked)(struct spi_nor *nor, loff_t ofs, u64 len); 290}; 291 292/** 293 * struct spi_nor_otp_organization - Structure to describe the SPI NOR OTP regions 294 * @len: size of one OTP region in bytes. 295 * @base: start address of the OTP area. 296 * @offset: offset between consecutive OTP regions if there are more 297 * than one. 298 * @n_regions: number of individual OTP regions. 299 */ 300struct spi_nor_otp_organization { 301 size_t len; 302 loff_t base; 303 loff_t offset; 304 unsigned int n_regions; 305}; 306 307/** 308 * struct spi_nor_otp_ops - SPI NOR OTP methods 309 * @read: read from the SPI NOR OTP area. 310 * @write: write to the SPI NOR OTP area. 311 * @lock: lock an OTP region. 312 * @erase: erase an OTP region. 313 * @is_locked: check if an OTP region of the SPI NOR is locked. 314 */ 315struct spi_nor_otp_ops { 316 int (*read)(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf); 317 int (*write)(struct spi_nor *nor, loff_t addr, size_t len, 318 const u8 *buf); 319 int (*lock)(struct spi_nor *nor, unsigned int region); 320 int (*erase)(struct spi_nor *nor, loff_t addr); 321 int (*is_locked)(struct spi_nor *nor, unsigned int region); 322}; 323 324/** 325 * struct spi_nor_otp - SPI NOR OTP grouping structure 326 * @org: OTP region organization 327 * @ops: OTP access ops 328 */ 329struct spi_nor_otp { 330 const struct spi_nor_otp_organization *org; 331 const struct spi_nor_otp_ops *ops; 332}; 333 334/** 335 * struct spi_nor_flash_parameter - SPI NOR flash parameters and settings. 336 * Includes legacy flash parameters and settings that can be overwritten 337 * by the spi_nor_fixups hooks, or dynamically when parsing the JESD216 338 * Serial Flash Discoverable Parameters (SFDP) tables. 339 * 340 * @bank_size: the flash memory bank density in bytes. 341 * @size: the total flash memory density in bytes. 342 * @writesize Minimal writable flash unit size. Defaults to 1. Set to 343 * ECC unit size for ECC-ed flashes. 344 * @page_size: the page size of the SPI NOR flash memory. 345 * @addr_nbytes: number of address bytes to send. 346 * @addr_mode_nbytes: number of address bytes of current address mode. Useful 347 * when the flash operates with 4B opcodes but needs the 348 * internal address mode for opcodes that don't have a 4B 349 * opcode correspondent. 350 * @rdsr_dummy: dummy cycles needed for Read Status Register command 351 * in octal DTR mode. 352 * @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register 353 * command in octal DTR mode. 354 * @n_banks: number of banks. 355 * @n_dice: number of dice in the flash memory. 356 * @die_erase_opcode: die erase opcode. Defaults to SPINOR_OP_CHIP_ERASE. 357 * @vreg_offset: volatile register offset for each die. 358 * @hwcaps: describes the read and page program hardware 359 * capabilities. 360 * @reads: read capabilities ordered by priority: the higher index 361 * in the array, the higher priority. 362 * @page_programs: page program capabilities ordered by priority: the 363 * higher index in the array, the higher priority. 364 * @erase_map: the erase map parsed from the SFDP Sector Map Parameter 365 * Table. 366 * @otp: SPI NOR OTP info. 367 * @set_octal_dtr: enables or disables SPI NOR octal DTR mode. 368 * @quad_enable: enables SPI NOR quad mode. 369 * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode. 370 * @ready: (optional) flashes might use a different mechanism 371 * than reading the status register to indicate they 372 * are ready for a new command 373 * @locking_ops: SPI NOR locking methods. 374 * @priv: flash's private data. 375 */ 376struct spi_nor_flash_parameter { 377 u64 bank_size; 378 u64 size; 379 u32 writesize; 380 u32 page_size; 381 u8 addr_nbytes; 382 u8 addr_mode_nbytes; 383 u8 rdsr_dummy; 384 u8 rdsr_addr_nbytes; 385 u8 n_banks; 386 u8 n_dice; 387 u8 die_erase_opcode; 388 u32 *vreg_offset; 389 390 struct spi_nor_hwcaps hwcaps; 391 struct spi_nor_read_command reads[SNOR_CMD_READ_MAX]; 392 struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX]; 393 394 struct spi_nor_erase_map erase_map; 395 struct spi_nor_otp otp; 396 397 int (*set_octal_dtr)(struct spi_nor *nor, bool enable); 398 int (*quad_enable)(struct spi_nor *nor); 399 int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable); 400 int (*ready)(struct spi_nor *nor); 401 402 const struct spi_nor_locking_ops *locking_ops; 403 void *priv; 404}; 405 406/** 407 * struct spi_nor_fixups - SPI NOR fixup hooks 408 * @default_init: called after default flash parameters init. Used to tweak 409 * flash parameters when information provided by the flash_info 410 * table is incomplete or wrong. 411 * @post_bfpt: called after the BFPT table has been parsed 412 * @smpt_read_dummy: called during SMPT table is being parsed. Used to fix the 413 * number of dummy cycles in read register ops. 414 * @smpt_map_id: called after map ID in SMPT table has been determined for the 415 * case the map ID is wrong and needs to be fixed. 416 * @post_sfdp: called after SFDP has been parsed (is also called for SPI NORs 417 * that do not support RDSFDP). Typically used to tweak various 418 * parameters that could not be extracted by other means (i.e. 419 * when information provided by the SFDP/flash_info tables are 420 * incomplete or wrong). 421 * @late_init: used to initialize flash parameters that are not declared in the 422 * JESD216 SFDP standard, or where SFDP tables not defined at all. 423 * Will replace the default_init() hook. 424 * 425 * Those hooks can be used to tweak the SPI NOR configuration when the SFDP 426 * table is broken or not available. 427 */ 428struct spi_nor_fixups { 429 void (*default_init)(struct spi_nor *nor); 430 int (*post_bfpt)(struct spi_nor *nor, 431 const struct sfdp_parameter_header *bfpt_header, 432 const struct sfdp_bfpt *bfpt); 433 void (*smpt_read_dummy)(const struct spi_nor *nor, u8 *read_dummy); 434 void (*smpt_map_id)(const struct spi_nor *nor, u8 *map_id); 435 int (*post_sfdp)(struct spi_nor *nor); 436 int (*late_init)(struct spi_nor *nor); 437}; 438 439/** 440 * struct spi_nor_id - SPI NOR flash ID. 441 * 442 * @bytes: the bytes returned by the flash when issuing command 9F. Typically, 443 * the first byte is the manufacturer ID code (see JEP106) and the next 444 * two bytes are a flash part specific ID. 445 * @len: the number of bytes of ID. 446 */ 447struct spi_nor_id { 448 const u8 *bytes; 449 u8 len; 450}; 451 452/** 453 * struct flash_info - SPI NOR flash_info entry. 454 * @id: pointer to struct spi_nor_id or NULL, which means "no ID" (mostly 455 * older chips). 456 * @name: (obsolete) the name of the flash. Do not set it for new additions. 457 * @size: the size of the flash in bytes. The flash size is one 458 * property parsed by the SFDP. We use it as an indicator 459 * whether we need SFDP parsing for a particular flash. 460 * I.e. non-legacy flash entries in flash_info will have 461 * a size of zero iff SFDP should be used. 462 * @sector_size: (optional) the size listed here is what works with 463 * SPINOR_OP_SE, which isn't necessarily called a "sector" by 464 * the vendor. Defaults to 64k. 465 * @n_banks: (optional) the number of banks. Defaults to 1. 466 * @page_size: (optional) the flash's page size. Defaults to 256. 467 * @addr_nbytes: number of address bytes to send. 468 * 469 * @flags: flags that indicate support that is not defined by the 470 * JESD216 standard in its SFDP tables. Flag meanings: 471 * SPI_NOR_HAS_LOCK: flash supports lock/unlock via SR 472 * SPI_NOR_HAS_TB: flash SR has Top/Bottom (TB) protect bit. Must be 473 * used with SPI_NOR_HAS_LOCK. 474 * SPI_NOR_TB_SR_BIT6: Top/Bottom (TB) is bit 6 of status register. 475 * Must be used with SPI_NOR_HAS_TB. 476 * SPI_NOR_4BIT_BP: flash SR has 4 bit fields (BP0-3) for block 477 * protection. 478 * SPI_NOR_BP3_SR_BIT6: BP3 is bit 6 of status register. Must be used with 479 * SPI_NOR_4BIT_BP. 480 * SPI_NOR_SWP_IS_VOLATILE: flash has volatile software write protection bits. 481 * Usually these will power-up in a write-protected 482 * state. 483 * SPI_NOR_NO_ERASE: no erase command needed. 484 * SPI_NOR_QUAD_PP: flash supports Quad Input Page Program. 485 * SPI_NOR_RWW: flash supports reads while write. 486 * 487 * @no_sfdp_flags: flags that indicate support that can be discovered via SFDP. 488 * Used when SFDP tables are not defined in the flash. These 489 * flags are used together with the SPI_NOR_SKIP_SFDP flag. 490 * SPI_NOR_SKIP_SFDP: skip parsing of SFDP tables. 491 * SECT_4K: SPINOR_OP_BE_4K works uniformly. 492 * SPI_NOR_DUAL_READ: flash supports Dual Read. 493 * SPI_NOR_QUAD_READ: flash supports Quad Read. 494 * SPI_NOR_OCTAL_READ: flash supports Octal Read. 495 * SPI_NOR_OCTAL_DTR_READ: flash supports octal DTR Read. 496 * SPI_NOR_OCTAL_DTR_PP: flash supports Octal DTR Page Program. 497 * 498 * @fixup_flags: flags that indicate support that can be discovered via SFDP 499 * ideally, but can not be discovered for this particular flash 500 * because the SFDP table that indicates this support is not 501 * defined by the flash. In case the table for this support is 502 * defined but has wrong values, one should instead use a 503 * post_sfdp() hook to set the SNOR_F equivalent flag. 504 * 505 * SPI_NOR_4B_OPCODES: use dedicated 4byte address op codes to support 506 * memory size above 128Mib. 507 * SPI_NOR_IO_MODE_EN_VOLATILE: flash enables the best available I/O mode 508 * via a volatile bit. 509 * @mfr_flags: manufacturer private flags. Used in the manufacturer fixup 510 * hooks to differentiate support between flashes of the same 511 * manufacturer. 512 * @otp_org: flash's OTP organization. 513 * @fixups: part specific fixup hooks. 514 */ 515struct flash_info { 516 char *name; 517 const struct spi_nor_id *id; 518 size_t size; 519 unsigned sector_size; 520 u16 page_size; 521 u8 n_banks; 522 u8 addr_nbytes; 523 524 u16 flags; 525#define SPI_NOR_HAS_LOCK BIT(0) 526#define SPI_NOR_HAS_TB BIT(1) 527#define SPI_NOR_TB_SR_BIT6 BIT(2) 528#define SPI_NOR_4BIT_BP BIT(3) 529#define SPI_NOR_BP3_SR_BIT6 BIT(4) 530#define SPI_NOR_SWP_IS_VOLATILE BIT(5) 531#define SPI_NOR_NO_ERASE BIT(6) 532#define SPI_NOR_QUAD_PP BIT(8) 533#define SPI_NOR_RWW BIT(9) 534 535 u8 no_sfdp_flags; 536#define SPI_NOR_SKIP_SFDP BIT(0) 537#define SECT_4K BIT(1) 538#define SPI_NOR_DUAL_READ BIT(3) 539#define SPI_NOR_QUAD_READ BIT(4) 540#define SPI_NOR_OCTAL_READ BIT(5) 541#define SPI_NOR_OCTAL_DTR_READ BIT(6) 542#define SPI_NOR_OCTAL_DTR_PP BIT(7) 543 544 u8 fixup_flags; 545#define SPI_NOR_4B_OPCODES BIT(0) 546#define SPI_NOR_IO_MODE_EN_VOLATILE BIT(1) 547 548 u8 mfr_flags; 549 550 const struct spi_nor_otp_organization *otp; 551 const struct spi_nor_fixups *fixups; 552}; 553 554#define SNOR_ID(...) \ 555 (&(const struct spi_nor_id){ \ 556 .bytes = (const u8[]){ __VA_ARGS__ }, \ 557 .len = sizeof((u8[]){ __VA_ARGS__ }), \ 558 }) 559 560#define SNOR_OTP(_len, _n_regions, _base, _offset) \ 561 (&(const struct spi_nor_otp_organization){ \ 562 .len = (_len), \ 563 .base = (_base), \ 564 .offset = (_offset), \ 565 .n_regions = (_n_regions), \ 566 }) 567 568/** 569 * struct spi_nor_manufacturer - SPI NOR manufacturer object 570 * @name: manufacturer name 571 * @parts: array of parts supported by this manufacturer 572 * @nparts: number of entries in the parts array 573 * @fixups: hooks called at various points in time during spi_nor_scan() 574 */ 575struct spi_nor_manufacturer { 576 const char *name; 577 const struct flash_info *parts; 578 unsigned int nparts; 579 const struct spi_nor_fixups *fixups; 580}; 581 582/** 583 * struct sfdp - SFDP data 584 * @num_dwords: number of entries in the dwords array 585 * @dwords: array of double words of the SFDP data 586 */ 587struct sfdp { 588 size_t num_dwords; 589 u32 *dwords; 590}; 591 592/* Manufacturer drivers. */ 593extern const struct spi_nor_manufacturer spi_nor_atmel; 594extern const struct spi_nor_manufacturer spi_nor_eon; 595extern const struct spi_nor_manufacturer spi_nor_esmt; 596extern const struct spi_nor_manufacturer spi_nor_everspin; 597extern const struct spi_nor_manufacturer spi_nor_gigadevice; 598extern const struct spi_nor_manufacturer spi_nor_intel; 599extern const struct spi_nor_manufacturer spi_nor_issi; 600extern const struct spi_nor_manufacturer spi_nor_macronix; 601extern const struct spi_nor_manufacturer spi_nor_micron; 602extern const struct spi_nor_manufacturer spi_nor_st; 603extern const struct spi_nor_manufacturer spi_nor_spansion; 604extern const struct spi_nor_manufacturer spi_nor_sst; 605extern const struct spi_nor_manufacturer spi_nor_winbond; 606extern const struct spi_nor_manufacturer spi_nor_xmc; 607 608extern const struct attribute_group *spi_nor_sysfs_groups[]; 609 610void spi_nor_spimem_setup_op(const struct spi_nor *nor, 611 struct spi_mem_op *op, 612 const enum spi_nor_protocol proto); 613int spi_nor_write_enable(struct spi_nor *nor); 614int spi_nor_write_disable(struct spi_nor *nor); 615int spi_nor_set_4byte_addr_mode_en4b_ex4b(struct spi_nor *nor, bool enable); 616int spi_nor_set_4byte_addr_mode_wren_en4b_ex4b(struct spi_nor *nor, 617 bool enable); 618int spi_nor_set_4byte_addr_mode_brwr(struct spi_nor *nor, bool enable); 619int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable); 620int spi_nor_wait_till_ready(struct spi_nor *nor); 621int spi_nor_global_block_unlock(struct spi_nor *nor); 622int spi_nor_prep_and_lock(struct spi_nor *nor); 623void spi_nor_unlock_and_unprep(struct spi_nor *nor); 624int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor); 625int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor); 626int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor); 627int spi_nor_read_id(struct spi_nor *nor, u8 naddr, u8 ndummy, u8 *id, 628 enum spi_nor_protocol reg_proto); 629int spi_nor_read_sr(struct spi_nor *nor, u8 *sr); 630int spi_nor_sr_ready(struct spi_nor *nor); 631int spi_nor_read_cr(struct spi_nor *nor, u8 *cr); 632int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len); 633int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1); 634int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr); 635 636ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len, 637 u8 *buf); 638ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len, 639 const u8 *buf); 640int spi_nor_read_any_reg(struct spi_nor *nor, struct spi_mem_op *op, 641 enum spi_nor_protocol proto); 642int spi_nor_write_any_volatile_reg(struct spi_nor *nor, struct spi_mem_op *op, 643 enum spi_nor_protocol proto); 644int spi_nor_erase_sector(struct spi_nor *nor, u32 addr); 645 646int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf); 647int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, size_t len, 648 const u8 *buf); 649int spi_nor_otp_erase_secr(struct spi_nor *nor, loff_t addr); 650int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigned int region); 651int spi_nor_otp_is_locked_sr2(struct spi_nor *nor, unsigned int region); 652 653int spi_nor_hwcaps_read2cmd(u32 hwcaps); 654int spi_nor_hwcaps_pp2cmd(u32 hwcaps); 655u8 spi_nor_convert_3to4_read(u8 opcode); 656void spi_nor_set_read_settings(struct spi_nor_read_command *read, 657 u8 num_mode_clocks, 658 u8 num_wait_states, 659 u8 opcode, 660 enum spi_nor_protocol proto); 661void spi_nor_set_pp_settings(struct spi_nor_pp_command *pp, u8 opcode, 662 enum spi_nor_protocol proto); 663 664void spi_nor_set_erase_type(struct spi_nor_erase_type *erase, u32 size, 665 u8 opcode); 666void spi_nor_mask_erase_type(struct spi_nor_erase_type *erase); 667void spi_nor_init_uniform_erase_map(struct spi_nor_erase_map *map, 668 u8 erase_mask, u64 flash_size); 669 670int spi_nor_post_bfpt_fixups(struct spi_nor *nor, 671 const struct sfdp_parameter_header *bfpt_header, 672 const struct sfdp_bfpt *bfpt); 673 674void spi_nor_init_default_locking_ops(struct spi_nor *nor); 675void spi_nor_try_unlock_all(struct spi_nor *nor); 676void spi_nor_set_mtd_locking_ops(struct spi_nor *nor); 677void spi_nor_set_mtd_otp_ops(struct spi_nor *nor); 678 679int spi_nor_controller_ops_read_reg(struct spi_nor *nor, u8 opcode, 680 u8 *buf, size_t len); 681int spi_nor_controller_ops_write_reg(struct spi_nor *nor, u8 opcode, 682 const u8 *buf, size_t len); 683 684int spi_nor_check_sfdp_signature(struct spi_nor *nor); 685int spi_nor_parse_sfdp(struct spi_nor *nor); 686 687static inline struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd) 688{ 689 return container_of(mtd, struct spi_nor, mtd); 690} 691 692/** 693 * spi_nor_needs_sfdp() - returns true if SFDP parsing is used for this flash. 694 * 695 * Return: true if SFDP parsing is needed 696 */ 697static inline bool spi_nor_needs_sfdp(const struct spi_nor *nor) 698{ 699 /* 700 * The flash size is one property parsed by the SFDP. We use it as an 701 * indicator whether we need SFDP parsing for a particular flash. I.e. 702 * non-legacy flash entries in flash_info will have a size of zero iff 703 * SFDP should be used. 704 */ 705 return !nor->info->size; 706} 707 708#ifdef CONFIG_DEBUG_FS 709void spi_nor_debugfs_register(struct spi_nor *nor); 710void spi_nor_debugfs_shutdown(void); 711#else 712static inline void spi_nor_debugfs_register(struct spi_nor *nor) {} 713static inline void spi_nor_debugfs_shutdown(void) {} 714#endif 715 716#endif /* __LINUX_MTD_SPI_NOR_INTERNAL_H */
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