r852.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Copyright © 2009 - Maxim Levitsky
   4 * driver for Ricoh xD readers
   5 */
   6
   7#define DRV_NAME "r852"
   8#define pr_fmt(fmt)  DRV_NAME ": " fmt
   9
  10#include <linux/kernel.h>
  11#include <linux/module.h>
  12#include <linux/jiffies.h>
  13#include <linux/workqueue.h>
  14#include <linux/interrupt.h>
  15#include <linux/pci.h>
  16#include <linux/pci_ids.h>
  17#include <linux/delay.h>
  18#include <linux/slab.h>
  19#include <asm/byteorder.h>
  20#include <linux/sched.h>
  21#include "sm_common.h"
  22#include "r852.h"
  23
  24
  25static bool r852_enable_dma = 1;
  26module_param(r852_enable_dma, bool, S_IRUGO);
  27MODULE_PARM_DESC(r852_enable_dma, "Enable usage of the DMA (default)");
  28
  29static int debug;
  30module_param(debug, int, S_IRUGO | S_IWUSR);
  31MODULE_PARM_DESC(debug, "Debug level (0-2)");
  32
  33/* read register */
  34static inline uint8_t r852_read_reg(struct r852_device *dev, int address)
  35{
  36	uint8_t reg = readb(dev->mmio + address);
  37	return reg;
  38}
  39
  40/* write register */
  41static inline void r852_write_reg(struct r852_device *dev,
  42						int address, uint8_t value)
  43{
  44	writeb(value, dev->mmio + address);
  45}
  46
  47
  48/* read dword sized register */
  49static inline uint32_t r852_read_reg_dword(struct r852_device *dev, int address)
  50{
  51	uint32_t reg = le32_to_cpu(readl(dev->mmio + address));
  52	return reg;
  53}
  54
  55/* write dword sized register */
  56static inline void r852_write_reg_dword(struct r852_device *dev,
  57							int address, uint32_t value)
  58{
  59	writel(cpu_to_le32(value), dev->mmio + address);
  60}
  61
  62/* returns pointer to our private structure */
  63static inline struct r852_device *r852_get_dev(struct mtd_info *mtd)
  64{
  65	struct nand_chip *chip = mtd_to_nand(mtd);
  66	return nand_get_controller_data(chip);
  67}
  68
  69
  70/* check if controller supports dma */
  71static void r852_dma_test(struct r852_device *dev)
  72{
  73	dev->dma_usable = (r852_read_reg(dev, R852_DMA_CAP) &
  74		(R852_DMA1 | R852_DMA2)) == (R852_DMA1 | R852_DMA2);
  75
  76	if (!dev->dma_usable)
  77		message("Non dma capable device detected, dma disabled");
  78
  79	if (!r852_enable_dma) {
  80		message("disabling dma on user request");
  81		dev->dma_usable = 0;
  82	}
  83}
  84
  85/*
  86 * Enable dma. Enables ether first or second stage of the DMA,
  87 * Expects dev->dma_dir and dev->dma_state be set
  88 */
  89static void r852_dma_enable(struct r852_device *dev)
  90{
  91	uint8_t dma_reg, dma_irq_reg;
  92
  93	/* Set up dma settings */
  94	dma_reg = r852_read_reg_dword(dev, R852_DMA_SETTINGS);
  95	dma_reg &= ~(R852_DMA_READ | R852_DMA_INTERNAL | R852_DMA_MEMORY);
  96
  97	if (dev->dma_dir)
  98		dma_reg |= R852_DMA_READ;
  99
 100	if (dev->dma_state == DMA_INTERNAL) {
 101		dma_reg |= R852_DMA_INTERNAL;
 102		/* Precaution to make sure HW doesn't write */
 103			/* to random kernel memory */
 104		r852_write_reg_dword(dev, R852_DMA_ADDR,
 105			cpu_to_le32(dev->phys_bounce_buffer));
 106	} else {
 107		dma_reg |= R852_DMA_MEMORY;
 108		r852_write_reg_dword(dev, R852_DMA_ADDR,
 109			cpu_to_le32(dev->phys_dma_addr));
 110	}
 111
 112	/* Precaution: make sure write reached the device */
 113	r852_read_reg_dword(dev, R852_DMA_ADDR);
 114
 115	r852_write_reg_dword(dev, R852_DMA_SETTINGS, dma_reg);
 116
 117	/* Set dma irq */
 118	dma_irq_reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE);
 119	r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE,
 120		dma_irq_reg |
 121		R852_DMA_IRQ_INTERNAL |
 122		R852_DMA_IRQ_ERROR |
 123		R852_DMA_IRQ_MEMORY);
 124}
 125
 126/*
 127 * Disable dma, called from the interrupt handler, which specifies
 128 * success of the operation via 'error' argument
 129 */
 130static void r852_dma_done(struct r852_device *dev, int error)
 131{
 132	WARN_ON(dev->dma_stage == 0);
 133
 134	r852_write_reg_dword(dev, R852_DMA_IRQ_STA,
 135			r852_read_reg_dword(dev, R852_DMA_IRQ_STA));
 136
 137	r852_write_reg_dword(dev, R852_DMA_SETTINGS, 0);
 138	r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, 0);
 139
 140	/* Precaution to make sure HW doesn't write to random kernel memory */
 141	r852_write_reg_dword(dev, R852_DMA_ADDR,
 142		cpu_to_le32(dev->phys_bounce_buffer));
 143	r852_read_reg_dword(dev, R852_DMA_ADDR);
 144
 145	dev->dma_error = error;
 146	dev->dma_stage = 0;
 147
 148	if (dev->phys_dma_addr && dev->phys_dma_addr != dev->phys_bounce_buffer)
 149		dma_unmap_single(&dev->pci_dev->dev, dev->phys_dma_addr,
 150			R852_DMA_LEN,
 151			dev->dma_dir ? DMA_FROM_DEVICE : DMA_TO_DEVICE);
 152}
 153
 154/*
 155 * Wait, till dma is done, which includes both phases of it
 156 */
 157static int r852_dma_wait(struct r852_device *dev)
 158{
 159	long timeout = wait_for_completion_timeout(&dev->dma_done,
 160				msecs_to_jiffies(1000));
 161	if (!timeout) {
 162		dbg("timeout waiting for DMA interrupt");
 163		return -ETIMEDOUT;
 164	}
 165
 166	return 0;
 167}
 168
 169/*
 170 * Read/Write one page using dma. Only pages can be read (512 bytes)
 171*/
 172static void r852_do_dma(struct r852_device *dev, uint8_t *buf, int do_read)
 173{
 174	int bounce = 0;
 175	unsigned long flags;
 176	int error;
 177
 178	dev->dma_error = 0;
 179
 180	/* Set dma direction */
 181	dev->dma_dir = do_read;
 182	dev->dma_stage = 1;
 183	reinit_completion(&dev->dma_done);
 184
 185	dbg_verbose("doing dma %s ", do_read ? "read" : "write");
 186
 187	/* Set initial dma state: for reading first fill on board buffer,
 188	  from device, for writes first fill the buffer  from memory*/
 189	dev->dma_state = do_read ? DMA_INTERNAL : DMA_MEMORY;
 190
 191	/* if incoming buffer is not page aligned, we should do bounce */
 192	if ((unsigned long)buf & (R852_DMA_LEN-1))
 193		bounce = 1;
 194
 195	if (!bounce) {
 196		dev->phys_dma_addr = dma_map_single(&dev->pci_dev->dev, buf,
 197			R852_DMA_LEN,
 198			do_read ? DMA_FROM_DEVICE : DMA_TO_DEVICE);
 199		if (dma_mapping_error(&dev->pci_dev->dev, dev->phys_dma_addr))
 200			bounce = 1;
 201	}
 202
 203	if (bounce) {
 204		dbg_verbose("dma: using bounce buffer");
 205		dev->phys_dma_addr = dev->phys_bounce_buffer;
 206		if (!do_read)
 207			memcpy(dev->bounce_buffer, buf, R852_DMA_LEN);
 208	}
 209
 210	/* Enable DMA */
 211	spin_lock_irqsave(&dev->irqlock, flags);
 212	r852_dma_enable(dev);
 213	spin_unlock_irqrestore(&dev->irqlock, flags);
 214
 215	/* Wait till complete */
 216	error = r852_dma_wait(dev);
 217
 218	if (error) {
 219		r852_dma_done(dev, error);
 220		return;
 221	}
 222
 223	if (do_read && bounce)
 224		memcpy((void *)buf, dev->bounce_buffer, R852_DMA_LEN);
 225}
 226
 227/*
 228 * Program data lines of the nand chip to send data to it
 229 */
 230static void r852_write_buf(struct nand_chip *chip, const uint8_t *buf, int len)
 231{
 232	struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
 233	uint32_t reg;
 234
 235	/* Don't allow any access to hardware if we suspect card removal */
 236	if (dev->card_unstable)
 237		return;
 238
 239	/* Special case for whole sector read */
 240	if (len == R852_DMA_LEN && dev->dma_usable) {
 241		r852_do_dma(dev, (uint8_t *)buf, 0);
 242		return;
 243	}
 244
 245	/* write DWORD chinks - faster */
 246	while (len >= 4) {
 247		reg = buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24;
 248		r852_write_reg_dword(dev, R852_DATALINE, reg);
 249		buf += 4;
 250		len -= 4;
 251
 252	}
 253
 254	/* write rest */
 255	while (len > 0) {
 256		r852_write_reg(dev, R852_DATALINE, *buf++);
 257		len--;
 258	}
 259}
 260
 261/*
 262 * Read data lines of the nand chip to retrieve data
 263 */
 264static void r852_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
 265{
 266	struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
 267	uint32_t reg;
 268
 269	if (dev->card_unstable) {
 270		/* since we can't signal error here, at least, return
 271			predictable buffer */
 272		memset(buf, 0, len);
 273		return;
 274	}
 275
 276	/* special case for whole sector read */
 277	if (len == R852_DMA_LEN && dev->dma_usable) {
 278		r852_do_dma(dev, buf, 1);
 279		return;
 280	}
 281
 282	/* read in dword sized chunks */
 283	while (len >= 4) {
 284
 285		reg = r852_read_reg_dword(dev, R852_DATALINE);
 286		*buf++ = reg & 0xFF;
 287		*buf++ = (reg >> 8) & 0xFF;
 288		*buf++ = (reg >> 16) & 0xFF;
 289		*buf++ = (reg >> 24) & 0xFF;
 290		len -= 4;
 291	}
 292
 293	/* read the reset by bytes */
 294	while (len--)
 295		*buf++ = r852_read_reg(dev, R852_DATALINE);
 296}
 297
 298/*
 299 * Read one byte from nand chip
 300 */
 301static uint8_t r852_read_byte(struct nand_chip *chip)
 302{
 303	struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
 304
 305	/* Same problem as in r852_read_buf.... */
 306	if (dev->card_unstable)
 307		return 0;
 308
 309	return r852_read_reg(dev, R852_DATALINE);
 310}
 311
 312/*
 313 * Control several chip lines & send commands
 314 */
 315static void r852_cmdctl(struct nand_chip *chip, int dat, unsigned int ctrl)
 316{
 317	struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
 318
 319	if (dev->card_unstable)
 320		return;
 321
 322	if (ctrl & NAND_CTRL_CHANGE) {
 323
 324		dev->ctlreg &= ~(R852_CTL_DATA | R852_CTL_COMMAND |
 325				 R852_CTL_ON | R852_CTL_CARDENABLE);
 326
 327		if (ctrl & NAND_ALE)
 328			dev->ctlreg |= R852_CTL_DATA;
 329
 330		if (ctrl & NAND_CLE)
 331			dev->ctlreg |= R852_CTL_COMMAND;
 332
 333		if (ctrl & NAND_NCE)
 334			dev->ctlreg |= (R852_CTL_CARDENABLE | R852_CTL_ON);
 335		else
 336			dev->ctlreg &= ~R852_CTL_WRITE;
 337
 338		/* when write is started, enable write access */
 339		if (dat == NAND_CMD_ERASE1)
 340			dev->ctlreg |= R852_CTL_WRITE;
 341
 342		r852_write_reg(dev, R852_CTL, dev->ctlreg);
 343	}
 344
 345	 /* HACK: NAND_CMD_SEQIN is called without NAND_CTRL_CHANGE, but we need
 346		to set write mode */
 347	if (dat == NAND_CMD_SEQIN && (dev->ctlreg & R852_CTL_COMMAND)) {
 348		dev->ctlreg |= R852_CTL_WRITE;
 349		r852_write_reg(dev, R852_CTL, dev->ctlreg);
 350	}
 351
 352	if (dat != NAND_CMD_NONE)
 353		r852_write_reg(dev, R852_DATALINE, dat);
 354}
 355
 356/*
 357 * Wait till card is ready.
 358 * based on nand_wait, but returns errors on DMA error
 359 */
 360static int r852_wait(struct nand_chip *chip)
 361{
 362	struct r852_device *dev = nand_get_controller_data(chip);
 363
 364	unsigned long timeout;
 365	u8 status;
 366
 367	timeout = jiffies + msecs_to_jiffies(400);
 368
 369	while (time_before(jiffies, timeout))
 370		if (chip->legacy.dev_ready(chip))
 371			break;
 372
 373	nand_status_op(chip, &status);
 374
 375	/* Unfortunately, no way to send detailed error status... */
 376	if (dev->dma_error) {
 377		status |= NAND_STATUS_FAIL;
 378		dev->dma_error = 0;
 379	}
 380	return status;
 381}
 382
 383/*
 384 * Check if card is ready
 385 */
 386
 387static int r852_ready(struct nand_chip *chip)
 388{
 389	struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
 390	if (dev->card_unstable)
 391		return 0;
 392
 393	return !(r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_BUSY);
 394}
 395
 396
 397/*
 398 * Set ECC engine mode
 399*/
 400
 401static void r852_ecc_hwctl(struct nand_chip *chip, int mode)
 402{
 403	struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
 404
 405	if (dev->card_unstable)
 406		return;
 407
 408	switch (mode) {
 409	case NAND_ECC_READ:
 410	case NAND_ECC_WRITE:
 411		/* enable ecc generation/check*/
 412		dev->ctlreg |= R852_CTL_ECC_ENABLE;
 413
 414		/* flush ecc buffer */
 415		r852_write_reg(dev, R852_CTL,
 416			dev->ctlreg | R852_CTL_ECC_ACCESS);
 417
 418		r852_read_reg_dword(dev, R852_DATALINE);
 419		r852_write_reg(dev, R852_CTL, dev->ctlreg);
 420		return;
 421
 422	case NAND_ECC_READSYN:
 423		/* disable ecc generation */
 424		dev->ctlreg &= ~R852_CTL_ECC_ENABLE;
 425		r852_write_reg(dev, R852_CTL, dev->ctlreg);
 426	}
 427}
 428
 429/*
 430 * Calculate ECC, only used for writes
 431 */
 432
 433static int r852_ecc_calculate(struct nand_chip *chip, const uint8_t *dat,
 434			      uint8_t *ecc_code)
 435{
 436	struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
 437	struct sm_oob *oob = (struct sm_oob *)ecc_code;
 438	uint32_t ecc1, ecc2;
 439
 440	if (dev->card_unstable)
 441		return 0;
 442
 443	dev->ctlreg &= ~R852_CTL_ECC_ENABLE;
 444	r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS);
 445
 446	ecc1 = r852_read_reg_dword(dev, R852_DATALINE);
 447	ecc2 = r852_read_reg_dword(dev, R852_DATALINE);
 448
 449	oob->ecc1[0] = (ecc1) & 0xFF;
 450	oob->ecc1[1] = (ecc1 >> 8) & 0xFF;
 451	oob->ecc1[2] = (ecc1 >> 16) & 0xFF;
 452
 453	oob->ecc2[0] = (ecc2) & 0xFF;
 454	oob->ecc2[1] = (ecc2 >> 8) & 0xFF;
 455	oob->ecc2[2] = (ecc2 >> 16) & 0xFF;
 456
 457	r852_write_reg(dev, R852_CTL, dev->ctlreg);
 458	return 0;
 459}
 460
 461/*
 462 * Correct the data using ECC, hw did almost everything for us
 463 */
 464
 465static int r852_ecc_correct(struct nand_chip *chip, uint8_t *dat,
 466			    uint8_t *read_ecc, uint8_t *calc_ecc)
 467{
 468	uint32_t ecc_reg;
 469	uint8_t ecc_status, err_byte;
 470	int i, error = 0;
 471
 472	struct r852_device *dev = r852_get_dev(nand_to_mtd(chip));
 473
 474	if (dev->card_unstable)
 475		return 0;
 476
 477	if (dev->dma_error) {
 478		dev->dma_error = 0;
 479		return -EIO;
 480	}
 481
 482	r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS);
 483	ecc_reg = r852_read_reg_dword(dev, R852_DATALINE);
 484	r852_write_reg(dev, R852_CTL, dev->ctlreg);
 485
 486	for (i = 0 ; i <= 1 ; i++) {
 487
 488		ecc_status = (ecc_reg >> 8) & 0xFF;
 489
 490		/* ecc uncorrectable error */
 491		if (ecc_status & R852_ECC_FAIL) {
 492			dbg("ecc: unrecoverable error, in half %d", i);
 493			error = -EBADMSG;
 494			goto exit;
 495		}
 496
 497		/* correctable error */
 498		if (ecc_status & R852_ECC_CORRECTABLE) {
 499
 500			err_byte = ecc_reg & 0xFF;
 501			dbg("ecc: recoverable error, "
 502				"in half %d, byte %d, bit %d", i,
 503				err_byte, ecc_status & R852_ECC_ERR_BIT_MSK);
 504
 505			dat[err_byte] ^=
 506				1 << (ecc_status & R852_ECC_ERR_BIT_MSK);
 507			error++;
 508		}
 509
 510		dat += 256;
 511		ecc_reg >>= 16;
 512	}
 513exit:
 514	return error;
 515}
 516
 517/*
 518 * This is copy of nand_read_oob_std
 519 * nand_read_oob_syndrome assumes we can send column address - we can't
 520 */
 521static int r852_read_oob(struct nand_chip *chip, int page)
 522{
 523	struct mtd_info *mtd = nand_to_mtd(chip);
 524
 525	return nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
 526}
 527
 528/*
 529 * Start the nand engine
 530 */
 531
 532static void r852_engine_enable(struct r852_device *dev)
 533{
 534	if (r852_read_reg_dword(dev, R852_HW) & R852_HW_UNKNOWN) {
 535		r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON);
 536		r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED);
 537	} else {
 538		r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED);
 539		r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON);
 540	}
 541	msleep(300);
 542	r852_write_reg(dev, R852_CTL, 0);
 543}
 544
 545
 546/*
 547 * Stop the nand engine
 548 */
 549
 550static void r852_engine_disable(struct r852_device *dev)
 551{
 552	r852_write_reg_dword(dev, R852_HW, 0);
 553	r852_write_reg(dev, R852_CTL, R852_CTL_RESET);
 554}
 555
 556/*
 557 * Test if card is present
 558 */
 559
 560static void r852_card_update_present(struct r852_device *dev)
 561{
 562	unsigned long flags;
 563	uint8_t reg;
 564
 565	spin_lock_irqsave(&dev->irqlock, flags);
 566	reg = r852_read_reg(dev, R852_CARD_STA);
 567	dev->card_detected = !!(reg & R852_CARD_STA_PRESENT);
 568	spin_unlock_irqrestore(&dev->irqlock, flags);
 569}
 570
 571/*
 572 * Update card detection IRQ state according to current card state
 573 * which is read in r852_card_update_present
 574 */
 575static void r852_update_card_detect(struct r852_device *dev)
 576{
 577	int card_detect_reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE);
 578	dev->card_unstable = 0;
 579
 580	card_detect_reg &= ~(R852_CARD_IRQ_REMOVE | R852_CARD_IRQ_INSERT);
 581	card_detect_reg |= R852_CARD_IRQ_GENABLE;
 582
 583	card_detect_reg |= dev->card_detected ?
 584		R852_CARD_IRQ_REMOVE : R852_CARD_IRQ_INSERT;
 585
 586	r852_write_reg(dev, R852_CARD_IRQ_ENABLE, card_detect_reg);
 587}
 588
 589static ssize_t media_type_show(struct device *sys_dev,
 590			       struct device_attribute *attr, char *buf)
 591{
 592	struct mtd_info *mtd = container_of(sys_dev, struct mtd_info, dev);
 593	struct r852_device *dev = r852_get_dev(mtd);
 594	char *data = dev->sm ? "smartmedia" : "xd";
 595
 596	strcpy(buf, data);
 597	return strlen(data);
 598}
 599static DEVICE_ATTR_RO(media_type);
 600
 601
 602/* Detect properties of card in slot */
 603static void r852_update_media_status(struct r852_device *dev)
 604{
 605	uint8_t reg;
 606	unsigned long flags;
 607	int readonly;
 608
 609	spin_lock_irqsave(&dev->irqlock, flags);
 610	if (!dev->card_detected) {
 611		message("card removed");
 612		spin_unlock_irqrestore(&dev->irqlock, flags);
 613		return ;
 614	}
 615
 616	readonly  = r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_RO;
 617	reg = r852_read_reg(dev, R852_DMA_CAP);
 618	dev->sm = (reg & (R852_DMA1 | R852_DMA2)) && (reg & R852_SMBIT);
 619
 620	message("detected %s %s card in slot",
 621		dev->sm ? "SmartMedia" : "xD",
 622		readonly ? "readonly" : "writeable");
 623
 624	dev->readonly = readonly;
 625	spin_unlock_irqrestore(&dev->irqlock, flags);
 626}
 627
 628/*
 629 * Register the nand device
 630 * Called when the card is detected
 631 */
 632static int r852_register_nand_device(struct r852_device *dev)
 633{
 634	struct mtd_info *mtd = nand_to_mtd(dev->chip);
 635
 636	WARN_ON(dev->card_registered);
 637
 638	mtd->dev.parent = &dev->pci_dev->dev;
 639
 640	if (dev->readonly)
 641		dev->chip->options |= NAND_ROM;
 642
 643	r852_engine_enable(dev);
 644
 645	if (sm_register_device(mtd, dev->sm))
 646		goto error1;
 647
 648	if (device_create_file(&mtd->dev, &dev_attr_media_type)) {
 649		message("can't create media type sysfs attribute");
 650		goto error3;
 651	}
 652
 653	dev->card_registered = 1;
 654	return 0;
 655error3:
 656	WARN_ON(mtd_device_unregister(nand_to_mtd(dev->chip)));
 657	nand_cleanup(dev->chip);
 658error1:
 659	/* Force card redetect */
 660	dev->card_detected = 0;
 661	return -1;
 662}
 663
 664/*
 665 * Unregister the card
 666 */
 667
 668static void r852_unregister_nand_device(struct r852_device *dev)
 669{
 670	struct mtd_info *mtd = nand_to_mtd(dev->chip);
 671
 672	if (!dev->card_registered)
 673		return;
 674
 675	device_remove_file(&mtd->dev, &dev_attr_media_type);
 676	WARN_ON(mtd_device_unregister(mtd));
 677	nand_cleanup(dev->chip);
 678	r852_engine_disable(dev);
 679	dev->card_registered = 0;
 680}
 681
 682/* Card state updater */
 683static void r852_card_detect_work(struct work_struct *work)
 684{
 685	struct r852_device *dev =
 686		container_of(work, struct r852_device, card_detect_work.work);
 687
 688	r852_card_update_present(dev);
 689	r852_update_card_detect(dev);
 690	dev->card_unstable = 0;
 691
 692	/* False alarm */
 693	if (dev->card_detected == dev->card_registered)
 694		goto exit;
 695
 696	/* Read media properties */
 697	r852_update_media_status(dev);
 698
 699	/* Register the card */
 700	if (dev->card_detected)
 701		r852_register_nand_device(dev);
 702	else
 703		r852_unregister_nand_device(dev);
 704exit:
 705	r852_update_card_detect(dev);
 706}
 707
 708/* Ack + disable IRQ generation */
 709static void r852_disable_irqs(struct r852_device *dev)
 710{
 711	uint8_t reg;
 712	reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE);
 713	r852_write_reg(dev, R852_CARD_IRQ_ENABLE, reg & ~R852_CARD_IRQ_MASK);
 714
 715	reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE);
 716	r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE,
 717					reg & ~R852_DMA_IRQ_MASK);
 718
 719	r852_write_reg(dev, R852_CARD_IRQ_STA, R852_CARD_IRQ_MASK);
 720	r852_write_reg_dword(dev, R852_DMA_IRQ_STA, R852_DMA_IRQ_MASK);
 721}
 722
 723/* Interrupt handler */
 724static irqreturn_t r852_irq(int irq, void *data)
 725{
 726	struct r852_device *dev = (struct r852_device *)data;
 727
 728	uint8_t card_status, dma_status;
 729	irqreturn_t ret = IRQ_NONE;
 730
 731	spin_lock(&dev->irqlock);
 732
 733	/* handle card detection interrupts first */
 734	card_status = r852_read_reg(dev, R852_CARD_IRQ_STA);
 735	r852_write_reg(dev, R852_CARD_IRQ_STA, card_status);
 736
 737	if (card_status & (R852_CARD_IRQ_INSERT|R852_CARD_IRQ_REMOVE)) {
 738
 739		ret = IRQ_HANDLED;
 740		dev->card_detected = !!(card_status & R852_CARD_IRQ_INSERT);
 741
 742		/* we shouldn't receive any interrupts if we wait for card
 743			to settle */
 744		WARN_ON(dev->card_unstable);
 745
 746		/* disable irqs while card is unstable */
 747		/* this will timeout DMA if active, but better that garbage */
 748		r852_disable_irqs(dev);
 749
 750		if (dev->card_unstable)
 751			goto out;
 752
 753		/* let, card state to settle a bit, and then do the work */
 754		dev->card_unstable = 1;
 755		queue_delayed_work(dev->card_workqueue,
 756			&dev->card_detect_work, msecs_to_jiffies(100));
 757		goto out;
 758	}
 759
 760
 761	/* Handle dma interrupts */
 762	dma_status = r852_read_reg_dword(dev, R852_DMA_IRQ_STA);
 763	r852_write_reg_dword(dev, R852_DMA_IRQ_STA, dma_status);
 764
 765	if (dma_status & R852_DMA_IRQ_MASK) {
 766
 767		ret = IRQ_HANDLED;
 768
 769		if (dma_status & R852_DMA_IRQ_ERROR) {
 770			dbg("received dma error IRQ");
 771			r852_dma_done(dev, -EIO);
 772			complete(&dev->dma_done);
 773			goto out;
 774		}
 775
 776		/* received DMA interrupt out of nowhere? */
 777		WARN_ON_ONCE(dev->dma_stage == 0);
 778
 779		if (dev->dma_stage == 0)
 780			goto out;
 781
 782		/* done device access */
 783		if (dev->dma_state == DMA_INTERNAL &&
 784				(dma_status & R852_DMA_IRQ_INTERNAL)) {
 785
 786			dev->dma_state = DMA_MEMORY;
 787			dev->dma_stage++;
 788		}
 789
 790		/* done memory DMA */
 791		if (dev->dma_state == DMA_MEMORY &&
 792				(dma_status & R852_DMA_IRQ_MEMORY)) {
 793			dev->dma_state = DMA_INTERNAL;
 794			dev->dma_stage++;
 795		}
 796
 797		/* Enable 2nd half of dma dance */
 798		if (dev->dma_stage == 2)
 799			r852_dma_enable(dev);
 800
 801		/* Operation done */
 802		if (dev->dma_stage == 3) {
 803			r852_dma_done(dev, 0);
 804			complete(&dev->dma_done);
 805		}
 806		goto out;
 807	}
 808
 809	/* Handle unknown interrupts */
 810	if (dma_status)
 811		dbg("bad dma IRQ status = %x", dma_status);
 812
 813	if (card_status & ~R852_CARD_STA_CD)
 814		dbg("strange card status = %x", card_status);
 815
 816out:
 817	spin_unlock(&dev->irqlock);
 818	return ret;
 819}
 820
 821static int r852_attach_chip(struct nand_chip *chip)
 822{
 823	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
 824		return 0;
 825
 826	chip->ecc.placement = NAND_ECC_PLACEMENT_INTERLEAVED;
 827	chip->ecc.size = R852_DMA_LEN;
 828	chip->ecc.bytes = SM_OOB_SIZE;
 829	chip->ecc.strength = 2;
 830	chip->ecc.hwctl = r852_ecc_hwctl;
 831	chip->ecc.calculate = r852_ecc_calculate;
 832	chip->ecc.correct = r852_ecc_correct;
 833
 834	/* TODO: hack */
 835	chip->ecc.read_oob = r852_read_oob;
 836
 837	return 0;
 838}
 839
 840static const struct nand_controller_ops r852_ops = {
 841	.attach_chip = r852_attach_chip,
 842};
 843
 844static int  r852_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
 845{
 846	int error;
 847	struct nand_chip *chip;
 848	struct r852_device *dev;
 849
 850	/* pci initialization */
 851	error = pci_enable_device(pci_dev);
 852
 853	if (error)
 854		goto error1;
 855
 856	pci_set_master(pci_dev);
 857
 858	error = dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32));
 859	if (error)
 860		goto error2;
 861
 862	error = pci_request_regions(pci_dev, DRV_NAME);
 863
 864	if (error)
 865		goto error3;
 866
 867	error = -ENOMEM;
 868
 869	/* init nand chip, but register it only on card insert */
 870	chip = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
 871
 872	if (!chip)
 873		goto error4;
 874
 875	/* commands */
 876	chip->legacy.cmd_ctrl = r852_cmdctl;
 877	chip->legacy.waitfunc = r852_wait;
 878	chip->legacy.dev_ready = r852_ready;
 879
 880	/* I/O */
 881	chip->legacy.read_byte = r852_read_byte;
 882	chip->legacy.read_buf = r852_read_buf;
 883	chip->legacy.write_buf = r852_write_buf;
 884
 885	/* init our device structure */
 886	dev = kzalloc(sizeof(struct r852_device), GFP_KERNEL);
 887
 888	if (!dev)
 889		goto error5;
 890
 891	nand_set_controller_data(chip, dev);
 892	dev->chip = chip;
 893	dev->pci_dev = pci_dev;
 894	pci_set_drvdata(pci_dev, dev);
 895
 896	nand_controller_init(&dev->controller);
 897	dev->controller.ops = &r852_ops;
 898	chip->controller = &dev->controller;
 899
 900	dev->bounce_buffer = dma_alloc_coherent(&pci_dev->dev, R852_DMA_LEN,
 901		&dev->phys_bounce_buffer, GFP_KERNEL);
 902
 903	if (!dev->bounce_buffer)
 904		goto error6;
 905
 906
 907	error = -ENODEV;
 908	dev->mmio = pci_ioremap_bar(pci_dev, 0);
 909
 910	if (!dev->mmio)
 911		goto error7;
 912
 913	error = -ENOMEM;
 914	dev->tmp_buffer = kzalloc(SM_SECTOR_SIZE, GFP_KERNEL);
 915
 916	if (!dev->tmp_buffer)
 917		goto error8;
 918
 919	init_completion(&dev->dma_done);
 920
 921	dev->card_workqueue = create_freezable_workqueue(DRV_NAME);
 922
 923	if (!dev->card_workqueue)
 924		goto error9;
 925
 926	INIT_DELAYED_WORK(&dev->card_detect_work, r852_card_detect_work);
 927
 928	/* shutdown everything - precation */
 929	r852_engine_disable(dev);
 930	r852_disable_irqs(dev);
 931
 932	r852_dma_test(dev);
 933
 934	dev->irq = pci_dev->irq;
 935	spin_lock_init(&dev->irqlock);
 936
 937	dev->card_detected = 0;
 938	r852_card_update_present(dev);
 939
 940	/*register irq handler*/
 941	error = -ENODEV;
 942	if (request_irq(pci_dev->irq, &r852_irq, IRQF_SHARED,
 943			  DRV_NAME, dev))
 944		goto error10;
 945
 946	/* kick initial present test */
 947	queue_delayed_work(dev->card_workqueue,
 948		&dev->card_detect_work, 0);
 949
 950
 951	pr_notice("driver loaded successfully\n");
 952	return 0;
 953
 954error10:
 955	destroy_workqueue(dev->card_workqueue);
 956error9:
 957	kfree(dev->tmp_buffer);
 958error8:
 959	pci_iounmap(pci_dev, dev->mmio);
 960error7:
 961	dma_free_coherent(&pci_dev->dev, R852_DMA_LEN, dev->bounce_buffer,
 962			  dev->phys_bounce_buffer);
 963error6:
 964	kfree(dev);
 965error5:
 966	kfree(chip);
 967error4:
 968	pci_release_regions(pci_dev);
 969error3:
 970error2:
 971	pci_disable_device(pci_dev);
 972error1:
 973	return error;
 974}
 975
 976static void r852_remove(struct pci_dev *pci_dev)
 977{
 978	struct r852_device *dev = pci_get_drvdata(pci_dev);
 979
 980	/* Stop detect workqueue -
 981		we are going to unregister the device anyway*/
 982	cancel_delayed_work_sync(&dev->card_detect_work);
 983	destroy_workqueue(dev->card_workqueue);
 984
 985	/* Unregister the device, this might make more IO */
 986	r852_unregister_nand_device(dev);
 987
 988	/* Stop interrupts */
 989	r852_disable_irqs(dev);
 990	free_irq(dev->irq, dev);
 991
 992	/* Cleanup */
 993	kfree(dev->tmp_buffer);
 994	pci_iounmap(pci_dev, dev->mmio);
 995	dma_free_coherent(&pci_dev->dev, R852_DMA_LEN, dev->bounce_buffer,
 996			  dev->phys_bounce_buffer);
 997
 998	kfree(dev->chip);
 999	kfree(dev);
1000
1001	/* Shutdown the PCI device */
1002	pci_release_regions(pci_dev);
1003	pci_disable_device(pci_dev);
1004}
1005
1006static void r852_shutdown(struct pci_dev *pci_dev)
1007{
1008	struct r852_device *dev = pci_get_drvdata(pci_dev);
1009
1010	cancel_delayed_work_sync(&dev->card_detect_work);
1011	r852_disable_irqs(dev);
1012	synchronize_irq(dev->irq);
1013	pci_disable_device(pci_dev);
1014}
1015
1016#ifdef CONFIG_PM_SLEEP
1017static int r852_suspend(struct device *device)
1018{
1019	struct r852_device *dev = dev_get_drvdata(device);
1020
1021	if (dev->ctlreg & R852_CTL_CARDENABLE)
1022		return -EBUSY;
1023
1024	/* First make sure the detect work is gone */
1025	cancel_delayed_work_sync(&dev->card_detect_work);
1026
1027	/* Turn off the interrupts and stop the device */
1028	r852_disable_irqs(dev);
1029	r852_engine_disable(dev);
1030
1031	/* If card was pulled off just during the suspend, which is very
1032		unlikely, we will remove it on resume, it too late now
1033		anyway... */
1034	dev->card_unstable = 0;
1035	return 0;
1036}
1037
1038static int r852_resume(struct device *device)
1039{
1040	struct r852_device *dev = dev_get_drvdata(device);
1041
1042	r852_disable_irqs(dev);
1043	r852_card_update_present(dev);
1044	r852_engine_disable(dev);
1045
1046
1047	/* If card status changed, just do the work */
1048	if (dev->card_detected != dev->card_registered) {
1049		dbg("card was %s during low power state",
1050			dev->card_detected ? "added" : "removed");
1051
1052		queue_delayed_work(dev->card_workqueue,
1053		&dev->card_detect_work, msecs_to_jiffies(1000));
1054		return 0;
1055	}
1056
1057	/* Otherwise, initialize the card */
1058	if (dev->card_registered) {
1059		r852_engine_enable(dev);
1060		nand_select_target(dev->chip, 0);
1061		nand_reset_op(dev->chip);
1062		nand_deselect_target(dev->chip);
1063	}
1064
1065	/* Program card detection IRQ */
1066	r852_update_card_detect(dev);
1067	return 0;
1068}
1069#endif
1070
1071static const struct pci_device_id r852_pci_id_tbl[] = {
1072
1073	{ PCI_VDEVICE(RICOH, 0x0852), },
1074	{ },
1075};
1076
1077MODULE_DEVICE_TABLE(pci, r852_pci_id_tbl);
1078
1079static SIMPLE_DEV_PM_OPS(r852_pm_ops, r852_suspend, r852_resume);
1080
1081static struct pci_driver r852_pci_driver = {
1082	.name		= DRV_NAME,
1083	.id_table	= r852_pci_id_tbl,
1084	.probe		= r852_probe,
1085	.remove		= r852_remove,
1086	.shutdown	= r852_shutdown,
1087	.driver.pm	= &r852_pm_ops,
1088};
1089
1090module_pci_driver(r852_pci_driver);
1091
1092MODULE_LICENSE("GPL");
1093MODULE_AUTHOR("Maxim Levitsky <maximlevitsky@gmail.com>");
1094MODULE_DESCRIPTION("Ricoh 85xx xD/smartmedia card reader driver");