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idt_89hpesx.c
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linux-6.19.14/drivers/misc/eeprom/idt_89hpesx.c
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2016 T-Platforms. All Rights Reserved. 4 * 5 * IDT PCIe-switch NTB Linux driver 6 * 7 * Contact Information: 8 * Serge Semin <fancer.lancer@gmail.com>, <Sergey.Semin@t-platforms.ru> 9 */ 10/* 11 * NOTE of the IDT 89HPESx SMBus-slave interface driver 12 * This driver primarily is developed to have an access to EEPROM device of 13 * IDT PCIe-switches. IDT provides a simple SMBus interface to perform IO- 14 * operations from/to EEPROM, which is located at private (so called Master) 15 * SMBus of switches. Using that interface this the driver creates a simple 16 * binary sysfs-file in the device directory: 17 * /sys/bus/i2c/devices/<bus>-<devaddr>/eeprom 18 * In case if read-only flag is specified in the dts-node of device desription, 19 * User-space applications won't be able to write to the EEPROM sysfs-node. 20 * Additionally IDT 89HPESx SMBus interface has an ability to write/read 21 * data of device CSRs. This driver exposes debugf-file to perform simple IO 22 * operations using that ability for just basic debug purpose. Particularly 23 * next file is created in the specific debugfs-directory: 24 * /sys/kernel/debug/idt_csr/ 25 * Format of the debugfs-node is: 26 * $ cat /sys/kernel/debug/idt_csr/<bus>-<devaddr>/<devname>; 27 * <CSR address>:<CSR value> 28 * So reading the content of the file gives current CSR address and it value. 29 * If User-space application wishes to change current CSR address, 30 * it can just write a proper value to the sysfs-file: 31 * $ echo "<CSR address>" > /sys/kernel/debug/idt_csr/<bus>-<devaddr>/<devname> 32 * If it wants to change the CSR value as well, the format of the write 33 * operation is: 34 * $ echo "<CSR address>:<CSR value>" > \ 35 * /sys/kernel/debug/idt_csr/<bus>-<devaddr>/<devname>; 36 * CSR address and value can be any of hexadecimal, decimal or octal format. 37 */ 38 39#include <linux/kernel.h> 40#include <linux/init.h> 41#include <linux/module.h> 42#include <linux/types.h> 43#include <linux/sizes.h> 44#include <linux/slab.h> 45#include <linux/mutex.h> 46#include <linux/sysfs.h> 47#include <linux/debugfs.h> 48#include <linux/mod_devicetable.h> 49#include <linux/property.h> 50#include <linux/i2c.h> 51#include <linux/pci_ids.h> 52#include <linux/delay.h> 53 54#define IDT_NAME "89hpesx" 55#define IDT_89HPESX_DESC "IDT 89HPESx SMBus-slave interface driver" 56#define IDT_89HPESX_VER "1.0" 57 58MODULE_DESCRIPTION(IDT_89HPESX_DESC); 59MODULE_VERSION(IDT_89HPESX_VER); 60MODULE_LICENSE("GPL v2"); 61MODULE_AUTHOR("T-platforms"); 62 63/* 64 * struct idt_89hpesx_dev - IDT 89HPESx device data structure 65 * @eesize: Size of EEPROM in bytes (calculated from "idt,eecompatible") 66 * @eero: EEPROM Read-only flag 67 * @eeaddr: EEPROM custom address 68 * 69 * @inieecmd: Initial cmd value for EEPROM read/write operations 70 * @inicsrcmd: Initial cmd value for CSR read/write operations 71 * @iniccode: Initialial command code value for IO-operations 72 * 73 * @csr: CSR address to perform read operation 74 * 75 * @smb_write: SMBus write method 76 * @smb_read: SMBus read method 77 * @smb_mtx: SMBus mutex 78 * 79 * @client: i2c client used to perform IO operations 80 * 81 * @ee_file: EEPROM read/write sysfs-file 82 */ 83struct idt_smb_seq; 84struct idt_89hpesx_dev { 85 u32 eesize; 86 bool eero; 87 u8 eeaddr; 88 89 u8 inieecmd; 90 u8 inicsrcmd; 91 u8 iniccode; 92 93 u16 csr; 94 95 int (*smb_write)(struct idt_89hpesx_dev *, const struct idt_smb_seq *); 96 int (*smb_read)(struct idt_89hpesx_dev *, struct idt_smb_seq *); 97 struct mutex smb_mtx; 98 99 struct i2c_client *client; 100 101 struct bin_attribute *ee_file; 102 struct dentry *csr_dir; 103}; 104 105/* 106 * struct idt_smb_seq - sequence of data to be read/written from/to IDT 89HPESx 107 * @ccode: SMBus command code 108 * @bytecnt: Byte count of operation 109 * @data: Data to by written 110 */ 111struct idt_smb_seq { 112 u8 ccode; 113 u8 bytecnt; 114 u8 *data; 115}; 116 117/* 118 * struct idt_eeprom_seq - sequence of data to be read/written from/to EEPROM 119 * @cmd: Transaction CMD 120 * @eeaddr: EEPROM custom address 121 * @memaddr: Internal memory address of EEPROM 122 * @data: Data to be written at the memory address 123 */ 124struct idt_eeprom_seq { 125 u8 cmd; 126 u8 eeaddr; 127 __le16 memaddr; 128 u8 data; 129} __packed; 130 131/* 132 * struct idt_csr_seq - sequence of data to be read/written from/to CSR 133 * @cmd: Transaction CMD 134 * @csraddr: Internal IDT device CSR address 135 * @data: Data to be read/written from/to the CSR address 136 */ 137struct idt_csr_seq { 138 u8 cmd; 139 __le16 csraddr; 140 __le32 data; 141} __packed; 142 143/* 144 * SMBus command code macros 145 * @CCODE_END: Indicates the end of transaction 146 * @CCODE_START: Indicates the start of transaction 147 * @CCODE_CSR: CSR read/write transaction 148 * @CCODE_EEPROM: EEPROM read/write transaction 149 * @CCODE_BYTE: Supplied data has BYTE length 150 * @CCODE_WORD: Supplied data has WORD length 151 * @CCODE_BLOCK: Supplied data has variable length passed in bytecnt 152 * byte right following CCODE byte 153 */ 154#define CCODE_END ((u8)0x01) 155#define CCODE_START ((u8)0x02) 156#define CCODE_CSR ((u8)0x00) 157#define CCODE_EEPROM ((u8)0x04) 158#define CCODE_BYTE ((u8)0x00) 159#define CCODE_WORD ((u8)0x20) 160#define CCODE_BLOCK ((u8)0x40) 161#define CCODE_PEC ((u8)0x80) 162 163/* 164 * EEPROM command macros 165 * @EEPROM_OP_WRITE: EEPROM write operation 166 * @EEPROM_OP_READ: EEPROM read operation 167 * @EEPROM_USA: Use specified address of EEPROM 168 * @EEPROM_NAERR: EEPROM device is not ready to respond 169 * @EEPROM_LAERR: EEPROM arbitration loss error 170 * @EEPROM_MSS: EEPROM misplace start & stop bits error 171 * @EEPROM_WR_CNT: Bytes count to perform write operation 172 * @EEPROM_WRRD_CNT: Bytes count to write before reading 173 * @EEPROM_RD_CNT: Bytes count to perform read operation 174 * @EEPROM_DEF_SIZE: Fall back size of EEPROM 175 * @EEPROM_DEF_ADDR: Defatul EEPROM address 176 * @EEPROM_TOUT: Timeout before retry read operation if eeprom is busy 177 */ 178#define EEPROM_OP_WRITE ((u8)0x00) 179#define EEPROM_OP_READ ((u8)0x01) 180#define EEPROM_USA ((u8)0x02) 181#define EEPROM_NAERR ((u8)0x08) 182#define EEPROM_LAERR ((u8)0x10) 183#define EEPROM_MSS ((u8)0x20) 184#define EEPROM_WR_CNT ((u8)5) 185#define EEPROM_WRRD_CNT ((u8)4) 186#define EEPROM_RD_CNT ((u8)5) 187#define EEPROM_DEF_SIZE ((u16)4096) 188#define EEPROM_DEF_ADDR ((u8)0x50) 189#define EEPROM_TOUT (100) 190 191/* 192 * CSR command macros 193 * @CSR_DWE: Enable all four bytes of the operation 194 * @CSR_OP_WRITE: CSR write operation 195 * @CSR_OP_READ: CSR read operation 196 * @CSR_RERR: Read operation error 197 * @CSR_WERR: Write operation error 198 * @CSR_WR_CNT: Bytes count to perform write operation 199 * @CSR_WRRD_CNT: Bytes count to write before reading 200 * @CSR_RD_CNT: Bytes count to perform read operation 201 * @CSR_MAX: Maximum CSR address 202 * @CSR_DEF: Default CSR address 203 * @CSR_REAL_ADDR: CSR real unshifted address 204 */ 205#define CSR_DWE ((u8)0x0F) 206#define CSR_OP_WRITE ((u8)0x00) 207#define CSR_OP_READ ((u8)0x10) 208#define CSR_RERR ((u8)0x40) 209#define CSR_WERR ((u8)0x80) 210#define CSR_WR_CNT ((u8)7) 211#define CSR_WRRD_CNT ((u8)3) 212#define CSR_RD_CNT ((u8)7) 213#define CSR_MAX ((u32)0x3FFFF) 214#define CSR_DEF ((u16)0x0000) 215#define CSR_REAL_ADDR(val) ((unsigned int)val << 2) 216 217/* 218 * IDT 89HPESx basic register 219 * @IDT_VIDDID_CSR: PCIe VID and DID of IDT 89HPESx 220 * @IDT_VID_MASK: Mask of VID 221 */ 222#define IDT_VIDDID_CSR ((u32)0x0000) 223#define IDT_VID_MASK ((u32)0xFFFF) 224 225/* 226 * IDT 89HPESx can send NACK when new command is sent before previous one 227 * fininshed execution. In this case driver retries operation 228 * certain times. 229 * @RETRY_CNT: Number of retries before giving up and fail 230 * @idt_smb_safe: Generate a retry loop on corresponding SMBus method 231 */ 232#define RETRY_CNT (128) 233#define idt_smb_safe(ops, args...) ({ \ 234 int __retry = RETRY_CNT; \ 235 s32 __sts; \ 236 do { \ 237 __sts = i2c_smbus_ ## ops ## _data(args); \ 238 } while (__retry-- && __sts < 0); \ 239 __sts; \ 240}) 241 242/*=========================================================================== 243 * i2c bus level IO-operations 244 *=========================================================================== 245 */ 246 247/* 248 * idt_smb_write_byte() - SMBus write method when I2C_SMBUS_BYTE_DATA operation 249 * is only available 250 * @pdev: Pointer to the driver data 251 * @seq: Sequence of data to be written 252 */ 253static int idt_smb_write_byte(struct idt_89hpesx_dev *pdev, 254 const struct idt_smb_seq *seq) 255{ 256 s32 sts; 257 u8 ccode; 258 int idx; 259 260 /* Loop over the supplied data sending byte one-by-one */ 261 for (idx = 0; idx < seq->bytecnt; idx++) { 262 /* Collect the command code byte */ 263 ccode = seq->ccode | CCODE_BYTE; 264 if (idx == 0) 265 ccode |= CCODE_START; 266 if (idx == seq->bytecnt - 1) 267 ccode |= CCODE_END; 268 269 /* Send data to the device */ 270 sts = idt_smb_safe(write_byte, pdev->client, ccode, 271 seq->data[idx]); 272 if (sts != 0) 273 return (int)sts; 274 } 275 276 return 0; 277} 278 279/* 280 * idt_smb_read_byte() - SMBus read method when I2C_SMBUS_BYTE_DATA operation 281 * is only available 282 * @pdev: Pointer to the driver data 283 * @seq: Buffer to read data to 284 */ 285static int idt_smb_read_byte(struct idt_89hpesx_dev *pdev, 286 struct idt_smb_seq *seq) 287{ 288 s32 sts; 289 u8 ccode; 290 int idx; 291 292 /* Loop over the supplied buffer receiving byte one-by-one */ 293 for (idx = 0; idx < seq->bytecnt; idx++) { 294 /* Collect the command code byte */ 295 ccode = seq->ccode | CCODE_BYTE; 296 if (idx == 0) 297 ccode |= CCODE_START; 298 if (idx == seq->bytecnt - 1) 299 ccode |= CCODE_END; 300 301 /* Read data from the device */ 302 sts = idt_smb_safe(read_byte, pdev->client, ccode); 303 if (sts < 0) 304 return (int)sts; 305 306 seq->data[idx] = (u8)sts; 307 } 308 309 return 0; 310} 311 312/* 313 * idt_smb_write_word() - SMBus write method when I2C_SMBUS_BYTE_DATA and 314 * I2C_FUNC_SMBUS_WORD_DATA operations are available 315 * @pdev: Pointer to the driver data 316 * @seq: Sequence of data to be written 317 */ 318static int idt_smb_write_word(struct idt_89hpesx_dev *pdev, 319 const struct idt_smb_seq *seq) 320{ 321 s32 sts; 322 u8 ccode; 323 int idx, evencnt; 324 325 /* Calculate the even count of data to send */ 326 evencnt = seq->bytecnt - (seq->bytecnt % 2); 327 328 /* Loop over the supplied data sending two bytes at a time */ 329 for (idx = 0; idx < evencnt; idx += 2) { 330 /* Collect the command code byte */ 331 ccode = seq->ccode | CCODE_WORD; 332 if (idx == 0) 333 ccode |= CCODE_START; 334 if (idx == evencnt - 2) 335 ccode |= CCODE_END; 336 337 /* Send word data to the device */ 338 sts = idt_smb_safe(write_word, pdev->client, ccode, 339 *(u16 *)&seq->data[idx]); 340 if (sts != 0) 341 return (int)sts; 342 } 343 344 /* If there is odd number of bytes then send just one last byte */ 345 if (seq->bytecnt != evencnt) { 346 /* Collect the command code byte */ 347 ccode = seq->ccode | CCODE_BYTE | CCODE_END; 348 if (idx == 0) 349 ccode |= CCODE_START; 350 351 /* Send byte data to the device */ 352 sts = idt_smb_safe(write_byte, pdev->client, ccode, 353 seq->data[idx]); 354 if (sts != 0) 355 return (int)sts; 356 } 357 358 return 0; 359} 360 361/* 362 * idt_smb_read_word() - SMBus read method when I2C_SMBUS_BYTE_DATA and 363 * I2C_FUNC_SMBUS_WORD_DATA operations are available 364 * @pdev: Pointer to the driver data 365 * @seq: Buffer to read data to 366 */ 367static int idt_smb_read_word(struct idt_89hpesx_dev *pdev, 368 struct idt_smb_seq *seq) 369{ 370 s32 sts; 371 u8 ccode; 372 int idx, evencnt; 373 374 /* Calculate the even count of data to send */ 375 evencnt = seq->bytecnt - (seq->bytecnt % 2); 376 377 /* Loop over the supplied data reading two bytes at a time */ 378 for (idx = 0; idx < evencnt; idx += 2) { 379 /* Collect the command code byte */ 380 ccode = seq->ccode | CCODE_WORD; 381 if (idx == 0) 382 ccode |= CCODE_START; 383 if (idx == evencnt - 2) 384 ccode |= CCODE_END; 385 386 /* Read word data from the device */ 387 sts = idt_smb_safe(read_word, pdev->client, ccode); 388 if (sts < 0) 389 return (int)sts; 390 391 *(u16 *)&seq->data[idx] = (u16)sts; 392 } 393 394 /* If there is odd number of bytes then receive just one last byte */ 395 if (seq->bytecnt != evencnt) { 396 /* Collect the command code byte */ 397 ccode = seq->ccode | CCODE_BYTE | CCODE_END; 398 if (idx == 0) 399 ccode |= CCODE_START; 400 401 /* Read last data byte from the device */ 402 sts = idt_smb_safe(read_byte, pdev->client, ccode); 403 if (sts < 0) 404 return (int)sts; 405 406 seq->data[idx] = (u8)sts; 407 } 408 409 return 0; 410} 411 412/* 413 * idt_smb_write_block() - SMBus write method when I2C_SMBUS_BLOCK_DATA 414 * operation is available 415 * @pdev: Pointer to the driver data 416 * @seq: Sequence of data to be written 417 */ 418static int idt_smb_write_block(struct idt_89hpesx_dev *pdev, 419 const struct idt_smb_seq *seq) 420{ 421 u8 ccode; 422 423 /* Return error if too much data passed to send */ 424 if (seq->bytecnt > I2C_SMBUS_BLOCK_MAX) 425 return -EINVAL; 426 427 /* Collect the command code byte */ 428 ccode = seq->ccode | CCODE_BLOCK | CCODE_START | CCODE_END; 429 430 /* Send block of data to the device */ 431 return idt_smb_safe(write_block, pdev->client, ccode, seq->bytecnt, 432 seq->data); 433} 434 435/* 436 * idt_smb_read_block() - SMBus read method when I2C_SMBUS_BLOCK_DATA 437 * operation is available 438 * @pdev: Pointer to the driver data 439 * @seq: Buffer to read data to 440 */ 441static int idt_smb_read_block(struct idt_89hpesx_dev *pdev, 442 struct idt_smb_seq *seq) 443{ 444 s32 sts; 445 u8 ccode; 446 447 /* Return error if too much data passed to send */ 448 if (seq->bytecnt > I2C_SMBUS_BLOCK_MAX) 449 return -EINVAL; 450 451 /* Collect the command code byte */ 452 ccode = seq->ccode | CCODE_BLOCK | CCODE_START | CCODE_END; 453 454 /* Read block of data from the device */ 455 sts = idt_smb_safe(read_block, pdev->client, ccode, seq->data); 456 if (sts != seq->bytecnt) 457 return (sts < 0 ? sts : -ENODATA); 458 459 return 0; 460} 461 462/* 463 * idt_smb_write_i2c_block() - SMBus write method when I2C_SMBUS_I2C_BLOCK_DATA 464 * operation is available 465 * @pdev: Pointer to the driver data 466 * @seq: Sequence of data to be written 467 * 468 * NOTE It's usual SMBus write block operation, except the actual data length is 469 * sent as first byte of data 470 */ 471static int idt_smb_write_i2c_block(struct idt_89hpesx_dev *pdev, 472 const struct idt_smb_seq *seq) 473{ 474 u8 ccode, buf[I2C_SMBUS_BLOCK_MAX + 1]; 475 476 /* Return error if too much data passed to send */ 477 if (seq->bytecnt > I2C_SMBUS_BLOCK_MAX) 478 return -EINVAL; 479 480 /* Collect the data to send. Length byte must be added prior the data */ 481 buf[0] = seq->bytecnt; 482 memcpy(&buf[1], seq->data, seq->bytecnt); 483 484 /* Collect the command code byte */ 485 ccode = seq->ccode | CCODE_BLOCK | CCODE_START | CCODE_END; 486 487 /* Send length and block of data to the device */ 488 return idt_smb_safe(write_i2c_block, pdev->client, ccode, 489 seq->bytecnt + 1, buf); 490} 491 492/* 493 * idt_smb_read_i2c_block() - SMBus read method when I2C_SMBUS_I2C_BLOCK_DATA 494 * operation is available 495 * @pdev: Pointer to the driver data 496 * @seq: Buffer to read data to 497 * 498 * NOTE It's usual SMBus read block operation, except the actual data length is 499 * retrieved as first byte of data 500 */ 501static int idt_smb_read_i2c_block(struct idt_89hpesx_dev *pdev, 502 struct idt_smb_seq *seq) 503{ 504 u8 ccode, buf[I2C_SMBUS_BLOCK_MAX + 1]; 505 s32 sts; 506 507 /* Return error if too much data passed to send */ 508 if (seq->bytecnt > I2C_SMBUS_BLOCK_MAX) 509 return -EINVAL; 510 511 /* Collect the command code byte */ 512 ccode = seq->ccode | CCODE_BLOCK | CCODE_START | CCODE_END; 513 514 /* Read length and block of data from the device */ 515 sts = idt_smb_safe(read_i2c_block, pdev->client, ccode, 516 seq->bytecnt + 1, buf); 517 if (sts != seq->bytecnt + 1) 518 return (sts < 0 ? sts : -ENODATA); 519 if (buf[0] != seq->bytecnt) 520 return -ENODATA; 521 522 /* Copy retrieved data to the output data buffer */ 523 memcpy(seq->data, &buf[1], seq->bytecnt); 524 525 return 0; 526} 527 528/*=========================================================================== 529 * EEPROM IO-operations 530 *=========================================================================== 531 */ 532 533/* 534 * idt_eeprom_read_byte() - read just one byte from EEPROM 535 * @pdev: Pointer to the driver data 536 * @memaddr: Start EEPROM memory address 537 * @data: Data to be written to EEPROM 538 */ 539static int idt_eeprom_read_byte(struct idt_89hpesx_dev *pdev, u16 memaddr, 540 u8 *data) 541{ 542 struct device *dev = &pdev->client->dev; 543 struct idt_eeprom_seq eeseq; 544 struct idt_smb_seq smbseq; 545 int ret, retry; 546 547 /* Initialize SMBus sequence fields */ 548 smbseq.ccode = pdev->iniccode | CCODE_EEPROM; 549 smbseq.data = (u8 *)&eeseq; 550 551 /* 552 * Sometimes EEPROM may respond with NACK if it's busy with previous 553 * operation, so we need to perform a few attempts of read cycle 554 */ 555 retry = RETRY_CNT; 556 do { 557 /* Send EEPROM memory address to read data from */ 558 smbseq.bytecnt = EEPROM_WRRD_CNT; 559 eeseq.cmd = pdev->inieecmd | EEPROM_OP_READ; 560 eeseq.eeaddr = pdev->eeaddr; 561 eeseq.memaddr = cpu_to_le16(memaddr); 562 ret = pdev->smb_write(pdev, &smbseq); 563 if (ret != 0) { 564 dev_err(dev, "Failed to init eeprom addr 0x%02x", 565 memaddr); 566 break; 567 } 568 569 /* Perform read operation */ 570 smbseq.bytecnt = EEPROM_RD_CNT; 571 ret = pdev->smb_read(pdev, &smbseq); 572 if (ret != 0) { 573 dev_err(dev, "Failed to read eeprom data 0x%02x", 574 memaddr); 575 break; 576 } 577 578 /* Restart read operation if the device is busy */ 579 if (retry && (eeseq.cmd & EEPROM_NAERR)) { 580 dev_dbg(dev, "EEPROM busy, retry reading after %d ms", 581 EEPROM_TOUT); 582 msleep(EEPROM_TOUT); 583 continue; 584 } 585 586 /* Check whether IDT successfully read data from EEPROM */ 587 if (eeseq.cmd & (EEPROM_NAERR | EEPROM_LAERR | EEPROM_MSS)) { 588 dev_err(dev, 589 "Communication with eeprom failed, cmd 0x%hhx", 590 eeseq.cmd); 591 ret = -EREMOTEIO; 592 break; 593 } 594 595 /* Save retrieved data and exit the loop */ 596 *data = eeseq.data; 597 break; 598 } while (retry--); 599 600 /* Return the status of operation */ 601 return ret; 602} 603 604/* 605 * idt_eeprom_write() - EEPROM write operation 606 * @pdev: Pointer to the driver data 607 * @memaddr: Start EEPROM memory address 608 * @len: Length of data to be written 609 * @data: Data to be written to EEPROM 610 */ 611static int idt_eeprom_write(struct idt_89hpesx_dev *pdev, u16 memaddr, u16 len, 612 const u8 *data) 613{ 614 struct device *dev = &pdev->client->dev; 615 struct idt_eeprom_seq eeseq; 616 struct idt_smb_seq smbseq; 617 int ret; 618 u16 idx; 619 620 /* Initialize SMBus sequence fields */ 621 smbseq.ccode = pdev->iniccode | CCODE_EEPROM; 622 smbseq.data = (u8 *)&eeseq; 623 624 /* Send data byte-by-byte, checking if it is successfully written */ 625 for (idx = 0; idx < len; idx++, memaddr++) { 626 /* Lock IDT SMBus device */ 627 mutex_lock(&pdev->smb_mtx); 628 629 /* Perform write operation */ 630 smbseq.bytecnt = EEPROM_WR_CNT; 631 eeseq.cmd = pdev->inieecmd | EEPROM_OP_WRITE; 632 eeseq.eeaddr = pdev->eeaddr; 633 eeseq.memaddr = cpu_to_le16(memaddr); 634 eeseq.data = data[idx]; 635 ret = pdev->smb_write(pdev, &smbseq); 636 if (ret != 0) { 637 dev_err(dev, 638 "Failed to write 0x%04hx:0x%02hhx to eeprom", 639 memaddr, data[idx]); 640 goto err_mutex_unlock; 641 } 642 643 /* 644 * Check whether the data is successfully written by reading 645 * from the same EEPROM memory address. 646 */ 647 eeseq.data = ~data[idx]; 648 ret = idt_eeprom_read_byte(pdev, memaddr, &eeseq.data); 649 if (ret != 0) 650 goto err_mutex_unlock; 651 652 /* Check whether the read byte is the same as written one */ 653 if (eeseq.data != data[idx]) { 654 dev_err(dev, "Values don't match 0x%02hhx != 0x%02hhx", 655 eeseq.data, data[idx]); 656 ret = -EREMOTEIO; 657 goto err_mutex_unlock; 658 } 659 660 /* Unlock IDT SMBus device */ 661err_mutex_unlock: 662 mutex_unlock(&pdev->smb_mtx); 663 if (ret != 0) 664 return ret; 665 } 666 667 return 0; 668} 669 670/* 671 * idt_eeprom_read() - EEPROM read operation 672 * @pdev: Pointer to the driver data 673 * @memaddr: Start EEPROM memory address 674 * @len: Length of data to read 675 * @buf: Buffer to read data to 676 */ 677static int idt_eeprom_read(struct idt_89hpesx_dev *pdev, u16 memaddr, u16 len, 678 u8 *buf) 679{ 680 int ret; 681 u16 idx; 682 683 /* Read data byte-by-byte, retrying if it wasn't successful */ 684 for (idx = 0; idx < len; idx++, memaddr++) { 685 /* Lock IDT SMBus device */ 686 mutex_lock(&pdev->smb_mtx); 687 688 /* Just read the byte to the buffer */ 689 ret = idt_eeprom_read_byte(pdev, memaddr, &buf[idx]); 690 691 /* Unlock IDT SMBus device */ 692 mutex_unlock(&pdev->smb_mtx); 693 694 /* Return error if read operation failed */ 695 if (ret != 0) 696 return ret; 697 } 698 699 return 0; 700} 701 702/*=========================================================================== 703 * CSR IO-operations 704 *=========================================================================== 705 */ 706 707/* 708 * idt_csr_write() - CSR write operation 709 * @pdev: Pointer to the driver data 710 * @csraddr: CSR address (with no two LS bits) 711 * @data: Data to be written to CSR 712 */ 713static int idt_csr_write(struct idt_89hpesx_dev *pdev, u16 csraddr, 714 const u32 data) 715{ 716 struct device *dev = &pdev->client->dev; 717 struct idt_csr_seq csrseq; 718 struct idt_smb_seq smbseq; 719 int ret; 720 721 /* Initialize SMBus sequence fields */ 722 smbseq.ccode = pdev->iniccode | CCODE_CSR; 723 smbseq.data = (u8 *)&csrseq; 724 725 /* Lock IDT SMBus device */ 726 mutex_lock(&pdev->smb_mtx); 727 728 /* Perform write operation */ 729 smbseq.bytecnt = CSR_WR_CNT; 730 csrseq.cmd = pdev->inicsrcmd | CSR_OP_WRITE; 731 csrseq.csraddr = cpu_to_le16(csraddr); 732 csrseq.data = cpu_to_le32(data); 733 ret = pdev->smb_write(pdev, &smbseq); 734 if (ret != 0) { 735 dev_err(dev, "Failed to write 0x%04x: 0x%04x to csr", 736 CSR_REAL_ADDR(csraddr), data); 737 goto err_mutex_unlock; 738 } 739 740 /* Send CSR address to read data from */ 741 smbseq.bytecnt = CSR_WRRD_CNT; 742 csrseq.cmd = pdev->inicsrcmd | CSR_OP_READ; 743 ret = pdev->smb_write(pdev, &smbseq); 744 if (ret != 0) { 745 dev_err(dev, "Failed to init csr address 0x%04x", 746 CSR_REAL_ADDR(csraddr)); 747 goto err_mutex_unlock; 748 } 749 750 /* Perform read operation */ 751 smbseq.bytecnt = CSR_RD_CNT; 752 ret = pdev->smb_read(pdev, &smbseq); 753 if (ret != 0) { 754 dev_err(dev, "Failed to read csr 0x%04x", 755 CSR_REAL_ADDR(csraddr)); 756 goto err_mutex_unlock; 757 } 758 759 /* Check whether IDT successfully retrieved CSR data */ 760 if (csrseq.cmd & (CSR_RERR | CSR_WERR)) { 761 dev_err(dev, "IDT failed to perform CSR r/w"); 762 ret = -EREMOTEIO; 763 goto err_mutex_unlock; 764 } 765 766 /* Unlock IDT SMBus device */ 767err_mutex_unlock: 768 mutex_unlock(&pdev->smb_mtx); 769 770 return ret; 771} 772 773/* 774 * idt_csr_read() - CSR read operation 775 * @pdev: Pointer to the driver data 776 * @csraddr: CSR address (with no two LS bits) 777 * @data: Data to be written to CSR 778 */ 779static int idt_csr_read(struct idt_89hpesx_dev *pdev, u16 csraddr, u32 *data) 780{ 781 struct device *dev = &pdev->client->dev; 782 struct idt_csr_seq csrseq; 783 struct idt_smb_seq smbseq; 784 int ret; 785 786 /* Initialize SMBus sequence fields */ 787 smbseq.ccode = pdev->iniccode | CCODE_CSR; 788 smbseq.data = (u8 *)&csrseq; 789 790 /* Lock IDT SMBus device */ 791 mutex_lock(&pdev->smb_mtx); 792 793 /* Send CSR register address before reading it */ 794 smbseq.bytecnt = CSR_WRRD_CNT; 795 csrseq.cmd = pdev->inicsrcmd | CSR_OP_READ; 796 csrseq.csraddr = cpu_to_le16(csraddr); 797 ret = pdev->smb_write(pdev, &smbseq); 798 if (ret != 0) { 799 dev_err(dev, "Failed to init csr address 0x%04x", 800 CSR_REAL_ADDR(csraddr)); 801 goto err_mutex_unlock; 802 } 803 804 /* Perform read operation */ 805 smbseq.bytecnt = CSR_RD_CNT; 806 ret = pdev->smb_read(pdev, &smbseq); 807 if (ret != 0) { 808 dev_err(dev, "Failed to read csr 0x%04x", 809 CSR_REAL_ADDR(csraddr)); 810 goto err_mutex_unlock; 811 } 812 813 /* Check whether IDT successfully retrieved CSR data */ 814 if (csrseq.cmd & (CSR_RERR | CSR_WERR)) { 815 dev_err(dev, "IDT failed to perform CSR r/w"); 816 ret = -EREMOTEIO; 817 goto err_mutex_unlock; 818 } 819 820 /* Save data retrieved from IDT */ 821 *data = le32_to_cpu(csrseq.data); 822 823 /* Unlock IDT SMBus device */ 824err_mutex_unlock: 825 mutex_unlock(&pdev->smb_mtx); 826 827 return ret; 828} 829 830/*=========================================================================== 831 * Sysfs/debugfs-nodes IO-operations 832 *=========================================================================== 833 */ 834 835/* 836 * eeprom_write() - EEPROM sysfs-node write callback 837 * @filep: Pointer to the file system node 838 * @kobj: Pointer to the kernel object related to the sysfs-node 839 * @attr: Attributes of the file 840 * @buf: Buffer to write data to 841 * @off: Offset at which data should be written to 842 * @count: Number of bytes to write 843 */ 844static ssize_t eeprom_write(struct file *filp, struct kobject *kobj, 845 const struct bin_attribute *attr, 846 char *buf, loff_t off, size_t count) 847{ 848 struct idt_89hpesx_dev *pdev; 849 int ret; 850 851 /* Retrieve driver data */ 852 pdev = dev_get_drvdata(kobj_to_dev(kobj)); 853 854 /* Perform EEPROM write operation */ 855 ret = idt_eeprom_write(pdev, (u16)off, (u16)count, (u8 *)buf); 856 return (ret != 0 ? ret : count); 857} 858 859/* 860 * eeprom_read() - EEPROM sysfs-node read callback 861 * @filep: Pointer to the file system node 862 * @kobj: Pointer to the kernel object related to the sysfs-node 863 * @attr: Attributes of the file 864 * @buf: Buffer to write data to 865 * @off: Offset at which data should be written to 866 * @count: Number of bytes to write 867 */ 868static ssize_t eeprom_read(struct file *filp, struct kobject *kobj, 869 const struct bin_attribute *attr, 870 char *buf, loff_t off, size_t count) 871{ 872 struct idt_89hpesx_dev *pdev; 873 int ret; 874 875 /* Retrieve driver data */ 876 pdev = dev_get_drvdata(kobj_to_dev(kobj)); 877 878 /* Perform EEPROM read operation */ 879 ret = idt_eeprom_read(pdev, (u16)off, (u16)count, (u8 *)buf); 880 return (ret != 0 ? ret : count); 881} 882 883/* 884 * idt_dbgfs_csr_write() - CSR debugfs-node write callback 885 * @filep: Pointer to the file system file descriptor 886 * @buf: Buffer to read data from 887 * @count: Size of the buffer 888 * @offp: Offset within the file 889 * 890 * It accepts either "0x<reg addr>:0x<value>" for saving register address 891 * and writing value to specified DWORD register or "0x<reg addr>" for 892 * just saving register address in order to perform next read operation. 893 * 894 * WARNING No spaces are allowed. Incoming string must be strictly formated as: 895 * "<reg addr>:<value>". Register address must be aligned within 4 bytes 896 * (one DWORD). 897 */ 898static ssize_t idt_dbgfs_csr_write(struct file *filep, const char __user *ubuf, 899 size_t count, loff_t *offp) 900{ 901 struct idt_89hpesx_dev *pdev = filep->private_data; 902 char *colon_ch, *csraddr_str, *csrval_str; 903 int ret; 904 u32 csraddr, csrval; 905 char *buf; 906 907 if (*offp) 908 return 0; 909 910 /* Copy data from User-space */ 911 buf = memdup_user_nul(ubuf, count); 912 if (IS_ERR(buf)) 913 return PTR_ERR(buf); 914 915 /* Find position of colon in the buffer */ 916 colon_ch = strnchr(buf, count, ':'); 917 918 /* 919 * If there is colon passed then new CSR value should be parsed as 920 * well, so allocate buffer for CSR address substring. 921 * If no colon is found, then string must have just one number with 922 * no new CSR value 923 */ 924 if (colon_ch != NULL) { 925 /* Copy the register address to the substring buffer */ 926 csraddr_str = kmemdup_nul(buf, colon_ch - buf, GFP_KERNEL); 927 if (csraddr_str == NULL) { 928 ret = -ENOMEM; 929 goto free_buf; 930 } 931 /* Register value must follow the colon */ 932 csrval_str = colon_ch + 1; 933 } else /* if (str_colon == NULL) */ { 934 csraddr_str = (char *)buf; /* Just to shut warning up */ 935 csrval_str = NULL; 936 } 937 938 /* Convert CSR address to u32 value */ 939 ret = kstrtou32(csraddr_str, 0, &csraddr); 940 if (ret != 0) 941 goto free_csraddr_str; 942 943 /* Check whether passed register address is valid */ 944 if (csraddr > CSR_MAX || !IS_ALIGNED(csraddr, SZ_4)) { 945 ret = -EINVAL; 946 goto free_csraddr_str; 947 } 948 949 /* Shift register address to the right so to have u16 address */ 950 pdev->csr = (csraddr >> 2); 951 952 /* Parse new CSR value and send it to IDT, if colon has been found */ 953 if (colon_ch != NULL) { 954 ret = kstrtou32(csrval_str, 0, &csrval); 955 if (ret != 0) 956 goto free_csraddr_str; 957 958 ret = idt_csr_write(pdev, pdev->csr, csrval); 959 if (ret != 0) 960 goto free_csraddr_str; 961 } 962 963 /* Free memory only if colon has been found */ 964free_csraddr_str: 965 if (colon_ch != NULL) 966 kfree(csraddr_str); 967 968 /* Free buffer allocated for data retrieved from User-space */ 969free_buf: 970 kfree(buf); 971 972 return (ret != 0 ? ret : count); 973} 974 975/* 976 * idt_dbgfs_csr_read() - CSR debugfs-node read callback 977 * @filep: Pointer to the file system file descriptor 978 * @buf: Buffer to write data to 979 * @count: Size of the buffer 980 * @offp: Offset within the file 981 * 982 * It just prints the pair "0x<reg addr>:0x<value>" to passed buffer. 983 */ 984#define CSRBUF_SIZE ((size_t)32) 985static ssize_t idt_dbgfs_csr_read(struct file *filep, char __user *ubuf, 986 size_t count, loff_t *offp) 987{ 988 struct idt_89hpesx_dev *pdev = filep->private_data; 989 u32 csraddr, csrval; 990 char buf[CSRBUF_SIZE]; 991 int ret, size; 992 993 /* Perform CSR read operation */ 994 ret = idt_csr_read(pdev, pdev->csr, &csrval); 995 if (ret != 0) 996 return ret; 997 998 /* Shift register address to the left so to have real address */ 999 csraddr = ((u32)pdev->csr << 2); 1000 1001 /* Print the "0x<reg addr>:0x<value>" to buffer */ 1002 size = snprintf(buf, CSRBUF_SIZE, "0x%05x:0x%08x\n", 1003 (unsigned int)csraddr, (unsigned int)csrval); 1004 1005 /* Copy data to User-space */ 1006 return simple_read_from_buffer(ubuf, count, offp, buf, size); 1007} 1008 1009/* 1010 * eeprom_attribute - EEPROM sysfs-node attributes 1011 * 1012 * NOTE Size will be changed in compliance with OF node. EEPROM attribute will 1013 * be read-only as well if the corresponding flag is specified in OF node. 1014 */ 1015static const BIN_ATTR_RW(eeprom, EEPROM_DEF_SIZE); 1016 1017/* 1018 * csr_dbgfs_ops - CSR debugfs-node read/write operations 1019 */ 1020static const struct file_operations csr_dbgfs_ops = { 1021 .owner = THIS_MODULE, 1022 .open = simple_open, 1023 .write = idt_dbgfs_csr_write, 1024 .read = idt_dbgfs_csr_read 1025}; 1026 1027/*=========================================================================== 1028 * Driver init/deinit methods 1029 *=========================================================================== 1030 */ 1031 1032/* 1033 * idt_set_defval() - disable EEPROM access by default 1034 * @pdev: Pointer to the driver data 1035 */ 1036static void idt_set_defval(struct idt_89hpesx_dev *pdev) 1037{ 1038 /* If OF info is missing then use next values */ 1039 pdev->eesize = 0; 1040 pdev->eero = true; 1041 pdev->inieecmd = 0; 1042 pdev->eeaddr = 0; 1043} 1044 1045static const struct i2c_device_id ee_ids[]; 1046 1047/* 1048 * idt_ee_match_id() - check whether the node belongs to compatible EEPROMs 1049 */ 1050static const struct i2c_device_id *idt_ee_match_id(struct fwnode_handle *fwnode) 1051{ 1052 const struct i2c_device_id *id = ee_ids; 1053 const char *compatible, *p; 1054 char devname[I2C_NAME_SIZE]; 1055 int ret; 1056 1057 ret = fwnode_property_read_string(fwnode, "compatible", &compatible); 1058 if (ret) 1059 return NULL; 1060 1061 p = strchr(compatible, ','); 1062 strscpy(devname, p ? p + 1 : compatible, sizeof(devname)); 1063 /* Search through the device name */ 1064 while (id->name[0]) { 1065 if (strcmp(devname, id->name) == 0) 1066 return id; 1067 id++; 1068 } 1069 return NULL; 1070} 1071 1072/* 1073 * idt_get_fw_data() - get IDT i2c-device parameters from device tree 1074 * @pdev: Pointer to the driver data 1075 */ 1076static void idt_get_fw_data(struct idt_89hpesx_dev *pdev) 1077{ 1078 struct device *dev = &pdev->client->dev; 1079 struct fwnode_handle *fwnode; 1080 const struct i2c_device_id *ee_id = NULL; 1081 u32 eeprom_addr; 1082 int ret; 1083 1084 device_for_each_child_node(dev, fwnode) { 1085 ee_id = idt_ee_match_id(fwnode); 1086 if (ee_id) 1087 break; 1088 1089 dev_warn(dev, "Skip unsupported EEPROM device %pfw\n", fwnode); 1090 } 1091 1092 /* If there is no fwnode EEPROM device, then set zero size */ 1093 if (!ee_id) { 1094 dev_warn(dev, "No fwnode, EEPROM access disabled"); 1095 idt_set_defval(pdev); 1096 return; 1097 } 1098 1099 /* Retrieve EEPROM size */ 1100 pdev->eesize = (u32)ee_id->driver_data; 1101 1102 /* Get custom EEPROM address from 'reg' attribute */ 1103 ret = fwnode_property_read_u32(fwnode, "reg", &eeprom_addr); 1104 if (ret || (eeprom_addr == 0)) { 1105 dev_warn(dev, "No EEPROM reg found, use default address 0x%x", 1106 EEPROM_DEF_ADDR); 1107 pdev->inieecmd = 0; 1108 pdev->eeaddr = EEPROM_DEF_ADDR << 1; 1109 } else { 1110 pdev->inieecmd = EEPROM_USA; 1111 pdev->eeaddr = eeprom_addr << 1; 1112 } 1113 1114 /* Check EEPROM 'read-only' flag */ 1115 if (fwnode_property_read_bool(fwnode, "read-only")) 1116 pdev->eero = true; 1117 else /* if (!fwnode_property_read_bool(node, "read-only")) */ 1118 pdev->eero = false; 1119 1120 fwnode_handle_put(fwnode); 1121 dev_info(dev, "EEPROM of %d bytes found by 0x%x", 1122 pdev->eesize, pdev->eeaddr); 1123} 1124 1125/* 1126 * idt_create_pdev() - create and init data structure of the driver 1127 * @client: i2c client of IDT PCIe-switch device 1128 */ 1129static struct idt_89hpesx_dev *idt_create_pdev(struct i2c_client *client) 1130{ 1131 struct idt_89hpesx_dev *pdev; 1132 1133 /* Allocate memory for driver data */ 1134 pdev = devm_kmalloc(&client->dev, sizeof(struct idt_89hpesx_dev), 1135 GFP_KERNEL); 1136 if (pdev == NULL) 1137 return ERR_PTR(-ENOMEM); 1138 1139 /* Initialize basic fields of the data */ 1140 pdev->client = client; 1141 i2c_set_clientdata(client, pdev); 1142 1143 /* Read firmware nodes information */ 1144 idt_get_fw_data(pdev); 1145 1146 /* Initialize basic CSR CMD field - use full DWORD-sized r/w ops */ 1147 pdev->inicsrcmd = CSR_DWE; 1148 pdev->csr = CSR_DEF; 1149 1150 /* Enable Packet Error Checking if it's supported by adapter */ 1151 if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_PEC)) { 1152 pdev->iniccode = CCODE_PEC; 1153 client->flags |= I2C_CLIENT_PEC; 1154 } else /* PEC is unsupported */ { 1155 pdev->iniccode = 0; 1156 } 1157 1158 return pdev; 1159} 1160 1161/* 1162 * idt_free_pdev() - free data structure of the driver 1163 * @pdev: Pointer to the driver data 1164 */ 1165static void idt_free_pdev(struct idt_89hpesx_dev *pdev) 1166{ 1167 /* Clear driver data from device private field */ 1168 i2c_set_clientdata(pdev->client, NULL); 1169} 1170 1171/* 1172 * idt_set_smbus_ops() - set supported SMBus operations 1173 * @pdev: Pointer to the driver data 1174 * Return status of smbus check operations 1175 */ 1176static int idt_set_smbus_ops(struct idt_89hpesx_dev *pdev) 1177{ 1178 struct i2c_adapter *adapter = pdev->client->adapter; 1179 struct device *dev = &pdev->client->dev; 1180 1181 /* Check i2c adapter read functionality */ 1182 if (i2c_check_functionality(adapter, 1183 I2C_FUNC_SMBUS_READ_BLOCK_DATA)) { 1184 pdev->smb_read = idt_smb_read_block; 1185 dev_dbg(dev, "SMBus block-read op chosen"); 1186 } else if (i2c_check_functionality(adapter, 1187 I2C_FUNC_SMBUS_READ_I2C_BLOCK)) { 1188 pdev->smb_read = idt_smb_read_i2c_block; 1189 dev_dbg(dev, "SMBus i2c-block-read op chosen"); 1190 } else if (i2c_check_functionality(adapter, 1191 I2C_FUNC_SMBUS_READ_WORD_DATA) && 1192 i2c_check_functionality(adapter, 1193 I2C_FUNC_SMBUS_READ_BYTE_DATA)) { 1194 pdev->smb_read = idt_smb_read_word; 1195 dev_warn(dev, "Use slow word/byte SMBus read ops"); 1196 } else if (i2c_check_functionality(adapter, 1197 I2C_FUNC_SMBUS_READ_BYTE_DATA)) { 1198 pdev->smb_read = idt_smb_read_byte; 1199 dev_warn(dev, "Use slow byte SMBus read op"); 1200 } else /* no supported smbus read operations */ { 1201 dev_err(dev, "No supported SMBus read op"); 1202 return -EPFNOSUPPORT; 1203 } 1204 1205 /* Check i2c adapter write functionality */ 1206 if (i2c_check_functionality(adapter, 1207 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA)) { 1208 pdev->smb_write = idt_smb_write_block; 1209 dev_dbg(dev, "SMBus block-write op chosen"); 1210 } else if (i2c_check_functionality(adapter, 1211 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) { 1212 pdev->smb_write = idt_smb_write_i2c_block; 1213 dev_dbg(dev, "SMBus i2c-block-write op chosen"); 1214 } else if (i2c_check_functionality(adapter, 1215 I2C_FUNC_SMBUS_WRITE_WORD_DATA) && 1216 i2c_check_functionality(adapter, 1217 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { 1218 pdev->smb_write = idt_smb_write_word; 1219 dev_warn(dev, "Use slow word/byte SMBus write op"); 1220 } else if (i2c_check_functionality(adapter, 1221 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { 1222 pdev->smb_write = idt_smb_write_byte; 1223 dev_warn(dev, "Use slow byte SMBus write op"); 1224 } else /* no supported smbus write operations */ { 1225 dev_err(dev, "No supported SMBus write op"); 1226 return -EPFNOSUPPORT; 1227 } 1228 1229 /* Initialize IDT SMBus slave interface mutex */ 1230 mutex_init(&pdev->smb_mtx); 1231 1232 return 0; 1233} 1234 1235/* 1236 * idt_check_dev() - check whether it's really IDT 89HPESx device 1237 * @pdev: Pointer to the driver data 1238 * Return status of i2c adapter check operation 1239 */ 1240static int idt_check_dev(struct idt_89hpesx_dev *pdev) 1241{ 1242 struct device *dev = &pdev->client->dev; 1243 u32 viddid; 1244 int ret; 1245 1246 /* Read VID and DID directly from IDT memory space */ 1247 ret = idt_csr_read(pdev, IDT_VIDDID_CSR, &viddid); 1248 if (ret != 0) { 1249 dev_err(dev, "Failed to read VID/DID"); 1250 return ret; 1251 } 1252 1253 /* Check whether it's IDT device */ 1254 if ((viddid & IDT_VID_MASK) != PCI_VENDOR_ID_IDT) { 1255 dev_err(dev, "Got unsupported VID/DID: 0x%08x", viddid); 1256 return -ENODEV; 1257 } 1258 1259 dev_info(dev, "Found IDT 89HPES device VID:0x%04x, DID:0x%04x", 1260 (viddid & IDT_VID_MASK), (viddid >> 16)); 1261 1262 return 0; 1263} 1264 1265/* 1266 * idt_create_sysfs_files() - create sysfs attribute files 1267 * @pdev: Pointer to the driver data 1268 * Return status of operation 1269 */ 1270static int idt_create_sysfs_files(struct idt_89hpesx_dev *pdev) 1271{ 1272 struct device *dev = &pdev->client->dev; 1273 int ret; 1274 1275 /* Don't do anything if EEPROM isn't accessible */ 1276 if (pdev->eesize == 0) { 1277 dev_dbg(dev, "Skip creating sysfs-files"); 1278 return 0; 1279 } 1280 1281 /* 1282 * Allocate memory for attribute file and copy the declared EEPROM attr 1283 * structure to change some of fields 1284 */ 1285 pdev->ee_file = devm_kmemdup(dev, &bin_attr_eeprom, 1286 sizeof(*pdev->ee_file), GFP_KERNEL); 1287 if (!pdev->ee_file) 1288 return -ENOMEM; 1289 1290 /* In case of read-only EEPROM get rid of write ability */ 1291 if (pdev->eero) { 1292 pdev->ee_file->attr.mode &= ~0200; 1293 pdev->ee_file->write = NULL; 1294 } 1295 /* Create EEPROM sysfs file */ 1296 pdev->ee_file->size = pdev->eesize; 1297 ret = sysfs_create_bin_file(&dev->kobj, pdev->ee_file); 1298 if (ret != 0) { 1299 dev_err(dev, "Failed to create EEPROM sysfs-node"); 1300 return ret; 1301 } 1302 1303 return 0; 1304} 1305 1306/* 1307 * idt_remove_sysfs_files() - remove sysfs attribute files 1308 * @pdev: Pointer to the driver data 1309 */ 1310static void idt_remove_sysfs_files(struct idt_89hpesx_dev *pdev) 1311{ 1312 struct device *dev = &pdev->client->dev; 1313 1314 /* Don't do anything if EEPROM wasn't accessible */ 1315 if (pdev->eesize == 0) 1316 return; 1317 1318 /* Remove EEPROM sysfs file */ 1319 sysfs_remove_bin_file(&dev->kobj, pdev->ee_file); 1320} 1321 1322/* 1323 * idt_probe() - IDT 89HPESx driver probe() callback method 1324 */ 1325static int idt_probe(struct i2c_client *client) 1326{ 1327 struct idt_89hpesx_dev *pdev; 1328 int ret; 1329 1330 /* Create driver data */ 1331 pdev = idt_create_pdev(client); 1332 if (IS_ERR(pdev)) 1333 return PTR_ERR(pdev); 1334 1335 /* Set SMBus operations */ 1336 ret = idt_set_smbus_ops(pdev); 1337 if (ret != 0) 1338 goto err_free_pdev; 1339 1340 /* Check whether it is truly IDT 89HPESx device */ 1341 ret = idt_check_dev(pdev); 1342 if (ret != 0) 1343 goto err_free_pdev; 1344 1345 /* Create sysfs files */ 1346 ret = idt_create_sysfs_files(pdev); 1347 if (ret != 0) 1348 goto err_free_pdev; 1349 1350 /* Create debugfs files */ 1351 debugfs_create_file(pdev->client->name, 0600, client->debugfs, pdev, &csr_dbgfs_ops); 1352 1353 return 0; 1354 1355err_free_pdev: 1356 idt_free_pdev(pdev); 1357 1358 return ret; 1359} 1360 1361/* 1362 * idt_remove() - IDT 89HPESx driver remove() callback method 1363 */ 1364static void idt_remove(struct i2c_client *client) 1365{ 1366 struct idt_89hpesx_dev *pdev = i2c_get_clientdata(client); 1367 1368 /* Remove sysfs files */ 1369 idt_remove_sysfs_files(pdev); 1370 1371 /* Discard driver data structure */ 1372 idt_free_pdev(pdev); 1373} 1374 1375/* 1376 * ee_ids - array of supported EEPROMs 1377 */ 1378static const struct i2c_device_id ee_ids[] = { 1379 { "24c32", 4096}, 1380 { "24c64", 8192}, 1381 { "24c128", 16384}, 1382 { "24c256", 32768}, 1383 { "24c512", 65536}, 1384 {} 1385}; 1386MODULE_DEVICE_TABLE(i2c, ee_ids); 1387 1388/* 1389 * idt_ids - supported IDT 89HPESx devices 1390 */ 1391static const struct i2c_device_id idt_ids[] = { 1392 { "89hpes8nt2" }, 1393 { "89hpes12nt3" }, 1394 1395 { "89hpes24nt6ag2" }, 1396 { "89hpes32nt8ag2" }, 1397 { "89hpes32nt8bg2" }, 1398 { "89hpes12nt12g2" }, 1399 { "89hpes16nt16g2" }, 1400 { "89hpes24nt24g2" }, 1401 { "89hpes32nt24ag2" }, 1402 { "89hpes32nt24bg2" }, 1403 1404 { "89hpes12n3" }, 1405 { "89hpes12n3a" }, 1406 { "89hpes24n3" }, 1407 { "89hpes24n3a" }, 1408 1409 { "89hpes32h8" }, 1410 { "89hpes32h8g2" }, 1411 { "89hpes48h12" }, 1412 { "89hpes48h12g2" }, 1413 { "89hpes48h12ag2" }, 1414 { "89hpes16h16" }, 1415 { "89hpes22h16" }, 1416 { "89hpes22h16g2" }, 1417 { "89hpes34h16" }, 1418 { "89hpes34h16g2" }, 1419 { "89hpes64h16" }, 1420 { "89hpes64h16g2" }, 1421 { "89hpes64h16ag2" }, 1422 1423 /* { "89hpes3t3" }, // No SMBus-slave iface */ 1424 { "89hpes12t3g2" }, 1425 { "89hpes24t3g2" }, 1426 /* { "89hpes4t4" }, // No SMBus-slave iface */ 1427 { "89hpes16t4" }, 1428 { "89hpes4t4g2" }, 1429 { "89hpes10t4g2" }, 1430 { "89hpes16t4g2" }, 1431 { "89hpes16t4ag2" }, 1432 { "89hpes5t5" }, 1433 { "89hpes6t5" }, 1434 { "89hpes8t5" }, 1435 { "89hpes8t5a" }, 1436 { "89hpes24t6" }, 1437 { "89hpes6t6g2" }, 1438 { "89hpes24t6g2" }, 1439 { "89hpes16t7" }, 1440 { "89hpes32t8" }, 1441 { "89hpes32t8g2" }, 1442 { "89hpes48t12" }, 1443 { "89hpes48t12g2" }, 1444 { /* END OF LIST */ } 1445}; 1446MODULE_DEVICE_TABLE(i2c, idt_ids); 1447 1448static const struct of_device_id idt_of_match[] = { 1449 { .compatible = "idt,89hpes8nt2", }, 1450 { .compatible = "idt,89hpes12nt3", }, 1451 1452 { .compatible = "idt,89hpes24nt6ag2", }, 1453 { .compatible = "idt,89hpes32nt8ag2", }, 1454 { .compatible = "idt,89hpes32nt8bg2", }, 1455 { .compatible = "idt,89hpes12nt12g2", }, 1456 { .compatible = "idt,89hpes16nt16g2", }, 1457 { .compatible = "idt,89hpes24nt24g2", }, 1458 { .compatible = "idt,89hpes32nt24ag2", }, 1459 { .compatible = "idt,89hpes32nt24bg2", }, 1460 1461 { .compatible = "idt,89hpes12n3", }, 1462 { .compatible = "idt,89hpes12n3a", }, 1463 { .compatible = "idt,89hpes24n3", }, 1464 { .compatible = "idt,89hpes24n3a", }, 1465 1466 { .compatible = "idt,89hpes32h8", }, 1467 { .compatible = "idt,89hpes32h8g2", }, 1468 { .compatible = "idt,89hpes48h12", }, 1469 { .compatible = "idt,89hpes48h12g2", }, 1470 { .compatible = "idt,89hpes48h12ag2", }, 1471 { .compatible = "idt,89hpes16h16", }, 1472 { .compatible = "idt,89hpes22h16", }, 1473 { .compatible = "idt,89hpes22h16g2", }, 1474 { .compatible = "idt,89hpes34h16", }, 1475 { .compatible = "idt,89hpes34h16g2", }, 1476 { .compatible = "idt,89hpes64h16", }, 1477 { .compatible = "idt,89hpes64h16g2", }, 1478 { .compatible = "idt,89hpes64h16ag2", }, 1479 1480 { .compatible = "idt,89hpes12t3g2", }, 1481 { .compatible = "idt,89hpes24t3g2", }, 1482 1483 { .compatible = "idt,89hpes16t4", }, 1484 { .compatible = "idt,89hpes4t4g2", }, 1485 { .compatible = "idt,89hpes10t4g2", }, 1486 { .compatible = "idt,89hpes16t4g2", }, 1487 { .compatible = "idt,89hpes16t4ag2", }, 1488 { .compatible = "idt,89hpes5t5", }, 1489 { .compatible = "idt,89hpes6t5", }, 1490 { .compatible = "idt,89hpes8t5", }, 1491 { .compatible = "idt,89hpes8t5a", }, 1492 { .compatible = "idt,89hpes24t6", }, 1493 { .compatible = "idt,89hpes6t6g2", }, 1494 { .compatible = "idt,89hpes24t6g2", }, 1495 { .compatible = "idt,89hpes16t7", }, 1496 { .compatible = "idt,89hpes32t8", }, 1497 { .compatible = "idt,89hpes32t8g2", }, 1498 { .compatible = "idt,89hpes48t12", }, 1499 { .compatible = "idt,89hpes48t12g2", }, 1500 { }, 1501}; 1502MODULE_DEVICE_TABLE(of, idt_of_match); 1503 1504/* 1505 * idt_driver - IDT 89HPESx driver structure 1506 */ 1507static struct i2c_driver idt_driver = { 1508 .driver = { 1509 .name = IDT_NAME, 1510 .of_match_table = idt_of_match, 1511 }, 1512 .probe = idt_probe, 1513 .remove = idt_remove, 1514 .id_table = idt_ids, 1515}; 1516module_i2c_driver(idt_driver);
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