axp20x.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * MFD core driver for the X-Powers' Power Management ICs
   4 *
   5 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC
   6 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature
   7 * as well as configurable GPIOs.
   8 *
   9 * This file contains the interface independent core functions.
  10 *
  11 * Copyright (C) 2014 Carlo Caione
  12 *
  13 * Author: Carlo Caione <carlo@caione.org>
  14 */
  15
  16#include <linux/acpi.h>
  17#include <linux/bitops.h>
  18#include <linux/delay.h>
  19#include <linux/err.h>
  20#include <linux/interrupt.h>
  21#include <linux/kernel.h>
  22#include <linux/mfd/axp20x.h>
  23#include <linux/mfd/core.h>
  24#include <linux/module.h>
  25#include <linux/of.h>
  26#include <linux/property.h>
  27#include <linux/reboot.h>
  28#include <linux/regmap.h>
  29#include <linux/regulator/consumer.h>
  30
  31#define AXP20X_OFF	BIT(7)
  32
  33#define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE	0
  34#define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE	BIT(4)
  35
  36static const char * const axp20x_model_names[] = {
  37	[AXP152_ID] = "AXP152",
  38	[AXP192_ID] = "AXP192",
  39	[AXP202_ID] = "AXP202",
  40	[AXP209_ID] = "AXP209",
  41	[AXP221_ID] = "AXP221",
  42	[AXP223_ID] = "AXP223",
  43	[AXP288_ID] = "AXP288",
  44	[AXP313A_ID] = "AXP313a",
  45	[AXP323_ID] = "AXP323",
  46	[AXP717_ID] = "AXP717",
  47	[AXP803_ID] = "AXP803",
  48	[AXP806_ID] = "AXP806",
  49	[AXP809_ID] = "AXP809",
  50	[AXP813_ID] = "AXP813",
  51	[AXP15060_ID] = "AXP15060",
  52};
  53
  54static const struct regmap_range axp152_writeable_ranges[] = {
  55	regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE),
  56	regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE),
  57};
  58
  59static const struct regmap_range axp152_volatile_ranges[] = {
  60	regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE),
  61	regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE),
  62	regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT),
  63};
  64
  65static const struct regmap_access_table axp152_writeable_table = {
  66	.yes_ranges	= axp152_writeable_ranges,
  67	.n_yes_ranges	= ARRAY_SIZE(axp152_writeable_ranges),
  68};
  69
  70static const struct regmap_access_table axp152_volatile_table = {
  71	.yes_ranges	= axp152_volatile_ranges,
  72	.n_yes_ranges	= ARRAY_SIZE(axp152_volatile_ranges),
  73};
  74
  75static const struct regmap_range axp20x_writeable_ranges[] = {
  76	regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
  77	regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
  78	regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
  79	regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)),
  80};
  81
  82static const struct regmap_range axp20x_volatile_ranges[] = {
  83	regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS),
  84	regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
  85	regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
  86	regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
  87	regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL),
  88	regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L),
  89};
  90
  91static const struct regmap_access_table axp20x_writeable_table = {
  92	.yes_ranges	= axp20x_writeable_ranges,
  93	.n_yes_ranges	= ARRAY_SIZE(axp20x_writeable_ranges),
  94};
  95
  96static const struct regmap_access_table axp20x_volatile_table = {
  97	.yes_ranges	= axp20x_volatile_ranges,
  98	.n_yes_ranges	= ARRAY_SIZE(axp20x_volatile_ranges),
  99};
 100
 101static const struct regmap_range axp192_writeable_ranges[] = {
 102	regmap_reg_range(AXP192_DATACACHE(0), AXP192_DATACACHE(5)),
 103	regmap_reg_range(AXP192_PWR_OUT_CTRL, AXP192_IRQ5_STATE),
 104	regmap_reg_range(AXP20X_DCDC_MODE, AXP192_N_RSTO_CTRL),
 105	regmap_reg_range(AXP20X_CC_CTRL, AXP20X_CC_CTRL),
 106};
 107
 108static const struct regmap_range axp192_volatile_ranges[] = {
 109	regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP192_USB_OTG_STATUS),
 110	regmap_reg_range(AXP192_IRQ1_STATE, AXP192_IRQ4_STATE),
 111	regmap_reg_range(AXP192_IRQ5_STATE, AXP192_IRQ5_STATE),
 112	regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
 113	regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL),
 114	regmap_reg_range(AXP192_GPIO2_0_STATE, AXP192_GPIO2_0_STATE),
 115	regmap_reg_range(AXP192_GPIO4_3_STATE, AXP192_GPIO4_3_STATE),
 116	regmap_reg_range(AXP192_N_RSTO_CTRL, AXP192_N_RSTO_CTRL),
 117	regmap_reg_range(AXP20X_CHRG_CC_31_24, AXP20X_CC_CTRL),
 118};
 119
 120static const struct regmap_access_table axp192_writeable_table = {
 121	.yes_ranges	= axp192_writeable_ranges,
 122	.n_yes_ranges	= ARRAY_SIZE(axp192_writeable_ranges),
 123};
 124
 125static const struct regmap_access_table axp192_volatile_table = {
 126	.yes_ranges	= axp192_volatile_ranges,
 127	.n_yes_ranges	= ARRAY_SIZE(axp192_volatile_ranges),
 128};
 129
 130/* AXP22x ranges are shared with the AXP809, as they cover the same range */
 131static const struct regmap_range axp22x_writeable_ranges[] = {
 132	regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
 133	regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3),
 134	regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1),
 135};
 136
 137static const struct regmap_range axp22x_volatile_ranges[] = {
 138	regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE),
 139	regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
 140	regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE),
 141	regmap_reg_range(AXP22X_PMIC_TEMP_H, AXP20X_IPSOUT_V_HIGH_L),
 142	regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES),
 143};
 144
 145static const struct regmap_access_table axp22x_writeable_table = {
 146	.yes_ranges	= axp22x_writeable_ranges,
 147	.n_yes_ranges	= ARRAY_SIZE(axp22x_writeable_ranges),
 148};
 149
 150static const struct regmap_access_table axp22x_volatile_table = {
 151	.yes_ranges	= axp22x_volatile_ranges,
 152	.n_yes_ranges	= ARRAY_SIZE(axp22x_volatile_ranges),
 153};
 154
 155/* AXP288 ranges are shared with the AXP803, as they cover the same range */
 156static const struct regmap_range axp288_writeable_ranges[] = {
 157	regmap_reg_range(AXP288_POWER_REASON, AXP288_POWER_REASON),
 158	regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
 159	regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
 160};
 161
 162static const struct regmap_range axp288_volatile_ranges[] = {
 163	regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON),
 164	regmap_reg_range(AXP22X_PWR_OUT_CTRL1, AXP22X_ALDO3_V_OUT),
 165	regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL),
 166	regmap_reg_range(AXP288_BC_DET_STAT, AXP20X_VBUS_IPSOUT_MGMT),
 167	regmap_reg_range(AXP20X_CHRG_BAK_CTRL, AXP20X_CHRG_BAK_CTRL),
 168	regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L),
 169	regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL),
 170	regmap_reg_range(AXP20X_GPIO1_CTRL, AXP22X_GPIO_STATE),
 171	regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L),
 172	regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG),
 173};
 174
 175static const struct regmap_access_table axp288_writeable_table = {
 176	.yes_ranges	= axp288_writeable_ranges,
 177	.n_yes_ranges	= ARRAY_SIZE(axp288_writeable_ranges),
 178};
 179
 180static const struct regmap_access_table axp288_volatile_table = {
 181	.yes_ranges	= axp288_volatile_ranges,
 182	.n_yes_ranges	= ARRAY_SIZE(axp288_volatile_ranges),
 183};
 184
 185static const struct regmap_range axp806_writeable_ranges[] = {
 186	regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)),
 187	regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL),
 188	regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN),
 189	regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
 190	regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT),
 191};
 192
 193static const struct regmap_range axp313a_writeable_ranges[] = {
 194	regmap_reg_range(AXP313A_ON_INDICATE, AXP313A_IRQ_STATE),
 195};
 196
 197static const struct regmap_range axp323_writeable_ranges[] = {
 198	regmap_reg_range(AXP313A_ON_INDICATE, AXP323_DCDC_MODE_CTRL2),
 199};
 200
 201static const struct regmap_range axp313a_volatile_ranges[] = {
 202	regmap_reg_range(AXP313A_SHUTDOWN_CTRL, AXP313A_SHUTDOWN_CTRL),
 203	regmap_reg_range(AXP313A_IRQ_STATE, AXP313A_IRQ_STATE),
 204};
 205
 206static const struct regmap_access_table axp313a_writeable_table = {
 207	.yes_ranges = axp313a_writeable_ranges,
 208	.n_yes_ranges = ARRAY_SIZE(axp313a_writeable_ranges),
 209};
 210
 211static const struct regmap_access_table axp323_writeable_table = {
 212	.yes_ranges = axp323_writeable_ranges,
 213	.n_yes_ranges = ARRAY_SIZE(axp323_writeable_ranges),
 214};
 215
 216static const struct regmap_access_table axp313a_volatile_table = {
 217	.yes_ranges = axp313a_volatile_ranges,
 218	.n_yes_ranges = ARRAY_SIZE(axp313a_volatile_ranges),
 219};
 220
 221static const struct regmap_range axp717_writeable_ranges[] = {
 222	regmap_reg_range(AXP717_PMU_FAULT, AXP717_MODULE_EN_CONTROL_1),
 223	regmap_reg_range(AXP717_MIN_SYS_V_CONTROL, AXP717_BOOST_CONTROL),
 224	regmap_reg_range(AXP717_VSYS_V_POWEROFF, AXP717_VSYS_V_POWEROFF),
 225	regmap_reg_range(AXP717_IRQ0_EN, AXP717_IRQ4_EN),
 226	regmap_reg_range(AXP717_IRQ0_STATE, AXP717_IRQ4_STATE),
 227	regmap_reg_range(AXP717_TS_PIN_CFG, AXP717_TS_PIN_CFG),
 228	regmap_reg_range(AXP717_ICC_CHG_SET, AXP717_CV_CHG_SET),
 229	regmap_reg_range(AXP717_DCDC_OUTPUT_CONTROL, AXP717_CPUSLDO_CONTROL),
 230	regmap_reg_range(AXP717_ADC_CH_EN_CONTROL, AXP717_ADC_CH_EN_CONTROL),
 231	regmap_reg_range(AXP717_ADC_DATA_SEL, AXP717_ADC_DATA_SEL),
 232};
 233
 234static const struct regmap_range axp717_volatile_ranges[] = {
 235	regmap_reg_range(AXP717_ON_INDICATE, AXP717_PMU_FAULT),
 236	regmap_reg_range(AXP717_IRQ0_STATE, AXP717_IRQ4_STATE),
 237	regmap_reg_range(AXP717_BATT_PERCENT_DATA, AXP717_BATT_PERCENT_DATA),
 238	regmap_reg_range(AXP717_BATT_V_H, AXP717_BATT_CHRG_I_L),
 239	regmap_reg_range(AXP717_ADC_DATA_H, AXP717_ADC_DATA_L),
 240};
 241
 242static const struct regmap_access_table axp717_writeable_table = {
 243	.yes_ranges = axp717_writeable_ranges,
 244	.n_yes_ranges = ARRAY_SIZE(axp717_writeable_ranges),
 245};
 246
 247static const struct regmap_access_table axp717_volatile_table = {
 248	.yes_ranges = axp717_volatile_ranges,
 249	.n_yes_ranges = ARRAY_SIZE(axp717_volatile_ranges),
 250};
 251
 252static const struct regmap_range axp806_volatile_ranges[] = {
 253	regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
 254};
 255
 256static const struct regmap_access_table axp806_writeable_table = {
 257	.yes_ranges	= axp806_writeable_ranges,
 258	.n_yes_ranges	= ARRAY_SIZE(axp806_writeable_ranges),
 259};
 260
 261static const struct regmap_access_table axp806_volatile_table = {
 262	.yes_ranges	= axp806_volatile_ranges,
 263	.n_yes_ranges	= ARRAY_SIZE(axp806_volatile_ranges),
 264};
 265
 266static const struct regmap_range axp15060_writeable_ranges[] = {
 267	regmap_reg_range(AXP15060_PWR_OUT_CTRL1, AXP15060_DCDC_MODE_CTRL2),
 268	regmap_reg_range(AXP15060_OUTPUT_MONITOR_DISCHARGE, AXP15060_CPUSLDO_V_CTRL),
 269	regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ),
 270	regmap_reg_range(AXP15060_PEK_KEY, AXP15060_PEK_KEY),
 271	regmap_reg_range(AXP15060_IRQ1_EN, AXP15060_IRQ2_EN),
 272	regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE),
 273};
 274
 275static const struct regmap_range axp15060_volatile_ranges[] = {
 276	regmap_reg_range(AXP15060_STARTUP_SRC, AXP15060_STARTUP_SRC),
 277	regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ),
 278	regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE),
 279};
 280
 281static const struct regmap_access_table axp15060_writeable_table = {
 282	.yes_ranges	= axp15060_writeable_ranges,
 283	.n_yes_ranges	= ARRAY_SIZE(axp15060_writeable_ranges),
 284};
 285
 286static const struct regmap_access_table axp15060_volatile_table = {
 287	.yes_ranges	= axp15060_volatile_ranges,
 288	.n_yes_ranges	= ARRAY_SIZE(axp15060_volatile_ranges),
 289};
 290
 291static const struct resource axp152_pek_resources[] = {
 292	DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
 293	DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
 294};
 295
 296static const struct resource axp192_ac_power_supply_resources[] = {
 297	DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
 298	DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
 299	DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_OVER_V, "ACIN_OVER_V"),
 300};
 301
 302static const struct resource axp192_usb_power_supply_resources[] = {
 303	DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
 304	DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
 305	DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_VALID, "VBUS_VALID"),
 306	DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
 307};
 308
 309static const struct resource axp20x_ac_power_supply_resources[] = {
 310	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
 311	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
 312	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"),
 313};
 314
 315static const struct resource axp20x_pek_resources[] = {
 316	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
 317	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
 318};
 319
 320static const struct resource axp20x_usb_power_supply_resources[] = {
 321	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
 322	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
 323	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"),
 324	DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
 325};
 326
 327static const struct resource axp22x_usb_power_supply_resources[] = {
 328	DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
 329	DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
 330};
 331
 332static const struct resource axp717_usb_power_supply_resources[] = {
 333	DEFINE_RES_IRQ_NAMED(AXP717_IRQ_VBUS_OVER_V, "VBUS_OVER_V"),
 334	DEFINE_RES_IRQ_NAMED(AXP717_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
 335	DEFINE_RES_IRQ_NAMED(AXP717_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
 336};
 337
 338/* AXP803 and AXP813/AXP818 share the same interrupts */
 339static const struct resource axp803_usb_power_supply_resources[] = {
 340	DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
 341	DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
 342};
 343
 344static const struct resource axp22x_pek_resources[] = {
 345	DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
 346	DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
 347};
 348
 349static const struct resource axp288_power_button_resources[] = {
 350	DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKP, "PEK_DBR"),
 351	DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKN, "PEK_DBF"),
 352};
 353
 354static const struct resource axp288_fuel_gauge_resources[] = {
 355	DEFINE_RES_IRQ(AXP288_IRQ_QWBTU),
 356	DEFINE_RES_IRQ(AXP288_IRQ_WBTU),
 357	DEFINE_RES_IRQ(AXP288_IRQ_QWBTO),
 358	DEFINE_RES_IRQ(AXP288_IRQ_WBTO),
 359	DEFINE_RES_IRQ(AXP288_IRQ_WL2),
 360	DEFINE_RES_IRQ(AXP288_IRQ_WL1),
 361};
 362
 363static const struct resource axp313a_pek_resources[] = {
 364	DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
 365	DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
 366};
 367
 368static const struct resource axp717_pek_resources[] = {
 369	DEFINE_RES_IRQ_NAMED(AXP717_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
 370	DEFINE_RES_IRQ_NAMED(AXP717_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
 371};
 372
 373static const struct resource axp803_pek_resources[] = {
 374	DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
 375	DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
 376};
 377
 378static const struct resource axp806_pek_resources[] = {
 379	DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_RISE, "PEK_DBR"),
 380	DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_FALL, "PEK_DBF"),
 381};
 382
 383static const struct resource axp809_pek_resources[] = {
 384	DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
 385	DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
 386};
 387
 388static const struct resource axp15060_pek_resources[] = {
 389	DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
 390	DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
 391};
 392
 393static const struct regmap_config axp152_regmap_config = {
 394	.reg_bits	= 8,
 395	.val_bits	= 8,
 396	.wr_table	= &axp152_writeable_table,
 397	.volatile_table	= &axp152_volatile_table,
 398	.max_register	= AXP152_PWM1_DUTY_CYCLE,
 399	.cache_type	= REGCACHE_MAPLE,
 400};
 401
 402static const struct regmap_config axp192_regmap_config = {
 403	.reg_bits	= 8,
 404	.val_bits	= 8,
 405	.wr_table	= &axp192_writeable_table,
 406	.volatile_table	= &axp192_volatile_table,
 407	.max_register	= AXP20X_CC_CTRL,
 408	.cache_type	= REGCACHE_MAPLE,
 409};
 410
 411static const struct regmap_config axp20x_regmap_config = {
 412	.reg_bits	= 8,
 413	.val_bits	= 8,
 414	.wr_table	= &axp20x_writeable_table,
 415	.volatile_table	= &axp20x_volatile_table,
 416	.max_register	= AXP20X_OCV(AXP20X_OCV_MAX),
 417	.cache_type	= REGCACHE_MAPLE,
 418};
 419
 420static const struct regmap_config axp22x_regmap_config = {
 421	.reg_bits	= 8,
 422	.val_bits	= 8,
 423	.wr_table	= &axp22x_writeable_table,
 424	.volatile_table	= &axp22x_volatile_table,
 425	.max_register	= AXP22X_BATLOW_THRES1,
 426	.cache_type	= REGCACHE_MAPLE,
 427};
 428
 429static const struct regmap_config axp288_regmap_config = {
 430	.reg_bits	= 8,
 431	.val_bits	= 8,
 432	.wr_table	= &axp288_writeable_table,
 433	.volatile_table	= &axp288_volatile_table,
 434	.max_register	= AXP288_FG_TUNE5,
 435	.cache_type	= REGCACHE_MAPLE,
 436};
 437
 438static const struct regmap_config axp313a_regmap_config = {
 439	.reg_bits = 8,
 440	.val_bits = 8,
 441	.wr_table = &axp313a_writeable_table,
 442	.volatile_table = &axp313a_volatile_table,
 443	.max_register = AXP313A_IRQ_STATE,
 444	.cache_type = REGCACHE_MAPLE,
 445};
 446
 447static const struct regmap_config axp323_regmap_config = {
 448	.reg_bits = 8,
 449	.val_bits = 8,
 450	.wr_table = &axp323_writeable_table,
 451	.volatile_table = &axp313a_volatile_table,
 452	.max_register = AXP323_DCDC_MODE_CTRL2,
 453	.cache_type = REGCACHE_MAPLE,
 454};
 455
 456static const struct regmap_config axp717_regmap_config = {
 457	.reg_bits = 8,
 458	.val_bits = 8,
 459	.wr_table = &axp717_writeable_table,
 460	.volatile_table = &axp717_volatile_table,
 461	.max_register = AXP717_ADC_DATA_L,
 462	.cache_type = REGCACHE_MAPLE,
 463};
 464
 465static const struct regmap_config axp806_regmap_config = {
 466	.reg_bits	= 8,
 467	.val_bits	= 8,
 468	.wr_table	= &axp806_writeable_table,
 469	.volatile_table	= &axp806_volatile_table,
 470	.max_register	= AXP806_REG_ADDR_EXT,
 471	.cache_type	= REGCACHE_MAPLE,
 472};
 473
 474static const struct regmap_config axp15060_regmap_config = {
 475	.reg_bits	= 8,
 476	.val_bits	= 8,
 477	.wr_table	= &axp15060_writeable_table,
 478	.volatile_table	= &axp15060_volatile_table,
 479	.max_register	= AXP15060_IRQ2_STATE,
 480	.cache_type	= REGCACHE_MAPLE,
 481};
 482
 483#define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask)			\
 484	[_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
 485
 486static const struct regmap_irq axp152_regmap_irqs[] = {
 487	INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT,		0, 6),
 488	INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL,		0, 5),
 489	INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT,	0, 3),
 490	INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL,	0, 2),
 491	INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW,		1, 5),
 492	INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW,		1, 4),
 493	INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW,		1, 3),
 494	INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW,		1, 2),
 495	INIT_REGMAP_IRQ(AXP152, PEK_SHORT,		1, 1),
 496	INIT_REGMAP_IRQ(AXP152, PEK_LONG,		1, 0),
 497	INIT_REGMAP_IRQ(AXP152, TIMER,			2, 7),
 498	INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE,		2, 6),
 499	INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE,		2, 5),
 500	INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT,		2, 3),
 501	INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT,		2, 2),
 502	INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT,		2, 1),
 503	INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT,		2, 0),
 504};
 505
 506static const struct regmap_irq axp192_regmap_irqs[] = {
 507	INIT_REGMAP_IRQ(AXP192, ACIN_OVER_V,		0, 7),
 508	INIT_REGMAP_IRQ(AXP192, ACIN_PLUGIN,		0, 6),
 509	INIT_REGMAP_IRQ(AXP192, ACIN_REMOVAL,		0, 5),
 510	INIT_REGMAP_IRQ(AXP192, VBUS_OVER_V,		0, 4),
 511	INIT_REGMAP_IRQ(AXP192, VBUS_PLUGIN,		0, 3),
 512	INIT_REGMAP_IRQ(AXP192, VBUS_REMOVAL,		0, 2),
 513	INIT_REGMAP_IRQ(AXP192, VBUS_V_LOW,		0, 1),
 514	INIT_REGMAP_IRQ(AXP192, BATT_PLUGIN,		1, 7),
 515	INIT_REGMAP_IRQ(AXP192, BATT_REMOVAL,	        1, 6),
 516	INIT_REGMAP_IRQ(AXP192, BATT_ENT_ACT_MODE,	1, 5),
 517	INIT_REGMAP_IRQ(AXP192, BATT_EXIT_ACT_MODE,	1, 4),
 518	INIT_REGMAP_IRQ(AXP192, CHARG,		        1, 3),
 519	INIT_REGMAP_IRQ(AXP192, CHARG_DONE,		1, 2),
 520	INIT_REGMAP_IRQ(AXP192, BATT_TEMP_HIGH,	        1, 1),
 521	INIT_REGMAP_IRQ(AXP192, BATT_TEMP_LOW,	        1, 0),
 522	INIT_REGMAP_IRQ(AXP192, DIE_TEMP_HIGH,	        2, 7),
 523	INIT_REGMAP_IRQ(AXP192, CHARG_I_LOW,		2, 6),
 524	INIT_REGMAP_IRQ(AXP192, DCDC1_V_LONG,	        2, 5),
 525	INIT_REGMAP_IRQ(AXP192, DCDC2_V_LONG,	        2, 4),
 526	INIT_REGMAP_IRQ(AXP192, DCDC3_V_LONG,	        2, 3),
 527	INIT_REGMAP_IRQ(AXP192, PEK_SHORT,		2, 1),
 528	INIT_REGMAP_IRQ(AXP192, PEK_LONG,		2, 0),
 529	INIT_REGMAP_IRQ(AXP192, N_OE_PWR_ON,		3, 7),
 530	INIT_REGMAP_IRQ(AXP192, N_OE_PWR_OFF,	        3, 6),
 531	INIT_REGMAP_IRQ(AXP192, VBUS_VALID,		3, 5),
 532	INIT_REGMAP_IRQ(AXP192, VBUS_NOT_VALID,	        3, 4),
 533	INIT_REGMAP_IRQ(AXP192, VBUS_SESS_VALID,	3, 3),
 534	INIT_REGMAP_IRQ(AXP192, VBUS_SESS_END,	        3, 2),
 535	INIT_REGMAP_IRQ(AXP192, LOW_PWR_LVL,	        3, 0),
 536	INIT_REGMAP_IRQ(AXP192, TIMER,			4, 7),
 537	INIT_REGMAP_IRQ(AXP192, GPIO2_INPUT,		4, 2),
 538	INIT_REGMAP_IRQ(AXP192, GPIO1_INPUT,		4, 1),
 539	INIT_REGMAP_IRQ(AXP192, GPIO0_INPUT,		4, 0),
 540};
 541
 542static const struct regmap_irq axp20x_regmap_irqs[] = {
 543	INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V,		0, 7),
 544	INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN,		0, 6),
 545	INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL,	        0, 5),
 546	INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V,		0, 4),
 547	INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN,		0, 3),
 548	INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL,	        0, 2),
 549	INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW,		0, 1),
 550	INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN,		1, 7),
 551	INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL,	        1, 6),
 552	INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE,	1, 5),
 553	INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE,	1, 4),
 554	INIT_REGMAP_IRQ(AXP20X, CHARG,		        1, 3),
 555	INIT_REGMAP_IRQ(AXP20X, CHARG_DONE,		1, 2),
 556	INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH,	        1, 1),
 557	INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW,	        1, 0),
 558	INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH,	        2, 7),
 559	INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW,		2, 6),
 560	INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG,	        2, 5),
 561	INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG,	        2, 4),
 562	INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG,	        2, 3),
 563	INIT_REGMAP_IRQ(AXP20X, PEK_SHORT,		2, 1),
 564	INIT_REGMAP_IRQ(AXP20X, PEK_LONG,		2, 0),
 565	INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON,		3, 7),
 566	INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF,	        3, 6),
 567	INIT_REGMAP_IRQ(AXP20X, VBUS_VALID,		3, 5),
 568	INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID,	        3, 4),
 569	INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID,	3, 3),
 570	INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END,	        3, 2),
 571	INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1,	        3, 1),
 572	INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2,	        3, 0),
 573	INIT_REGMAP_IRQ(AXP20X, TIMER,		        4, 7),
 574	INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE,	        4, 6),
 575	INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE,	        4, 5),
 576	INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT,		4, 3),
 577	INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT,		4, 2),
 578	INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT,		4, 1),
 579	INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT,		4, 0),
 580};
 581
 582static const struct regmap_irq axp22x_regmap_irqs[] = {
 583	INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V,		0, 7),
 584	INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN,		0, 6),
 585	INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL,	        0, 5),
 586	INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V,		0, 4),
 587	INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN,		0, 3),
 588	INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL,	        0, 2),
 589	INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW,		0, 1),
 590	INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN,		1, 7),
 591	INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL,	        1, 6),
 592	INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE,	1, 5),
 593	INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE,	1, 4),
 594	INIT_REGMAP_IRQ(AXP22X, CHARG,		        1, 3),
 595	INIT_REGMAP_IRQ(AXP22X, CHARG_DONE,		1, 2),
 596	INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH,	        1, 1),
 597	INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW,	        1, 0),
 598	INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH,	        2, 7),
 599	INIT_REGMAP_IRQ(AXP22X, PEK_SHORT,		2, 1),
 600	INIT_REGMAP_IRQ(AXP22X, PEK_LONG,		2, 0),
 601	INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1,	        3, 1),
 602	INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2,	        3, 0),
 603	INIT_REGMAP_IRQ(AXP22X, TIMER,		        4, 7),
 604	INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE,	        4, 6),
 605	INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE,	        4, 5),
 606	INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT,		4, 1),
 607	INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT,		4, 0),
 608};
 609
 610/* some IRQs are compatible with axp20x models */
 611static const struct regmap_irq axp288_regmap_irqs[] = {
 612	INIT_REGMAP_IRQ(AXP288, VBUS_FALL,              0, 2),
 613	INIT_REGMAP_IRQ(AXP288, VBUS_RISE,              0, 3),
 614	INIT_REGMAP_IRQ(AXP288, OV,                     0, 4),
 615	INIT_REGMAP_IRQ(AXP288, FALLING_ALT,            0, 5),
 616	INIT_REGMAP_IRQ(AXP288, RISING_ALT,             0, 6),
 617	INIT_REGMAP_IRQ(AXP288, OV_ALT,                 0, 7),
 618
 619	INIT_REGMAP_IRQ(AXP288, DONE,                   1, 2),
 620	INIT_REGMAP_IRQ(AXP288, CHARGING,               1, 3),
 621	INIT_REGMAP_IRQ(AXP288, SAFE_QUIT,              1, 4),
 622	INIT_REGMAP_IRQ(AXP288, SAFE_ENTER,             1, 5),
 623	INIT_REGMAP_IRQ(AXP288, ABSENT,                 1, 6),
 624	INIT_REGMAP_IRQ(AXP288, APPEND,                 1, 7),
 625
 626	INIT_REGMAP_IRQ(AXP288, QWBTU,                  2, 0),
 627	INIT_REGMAP_IRQ(AXP288, WBTU,                   2, 1),
 628	INIT_REGMAP_IRQ(AXP288, QWBTO,                  2, 2),
 629	INIT_REGMAP_IRQ(AXP288, WBTO,                   2, 3),
 630	INIT_REGMAP_IRQ(AXP288, QCBTU,                  2, 4),
 631	INIT_REGMAP_IRQ(AXP288, CBTU,                   2, 5),
 632	INIT_REGMAP_IRQ(AXP288, QCBTO,                  2, 6),
 633	INIT_REGMAP_IRQ(AXP288, CBTO,                   2, 7),
 634
 635	INIT_REGMAP_IRQ(AXP288, WL2,                    3, 0),
 636	INIT_REGMAP_IRQ(AXP288, WL1,                    3, 1),
 637	INIT_REGMAP_IRQ(AXP288, GPADC,                  3, 2),
 638	INIT_REGMAP_IRQ(AXP288, OT,                     3, 7),
 639
 640	INIT_REGMAP_IRQ(AXP288, GPIO0,                  4, 0),
 641	INIT_REGMAP_IRQ(AXP288, GPIO1,                  4, 1),
 642	INIT_REGMAP_IRQ(AXP288, POKO,                   4, 2),
 643	INIT_REGMAP_IRQ(AXP288, POKL,                   4, 3),
 644	INIT_REGMAP_IRQ(AXP288, POKS,                   4, 4),
 645	INIT_REGMAP_IRQ(AXP288, POKN,                   4, 5),
 646	INIT_REGMAP_IRQ(AXP288, POKP,                   4, 6),
 647	INIT_REGMAP_IRQ(AXP288, TIMER,                  4, 7),
 648
 649	INIT_REGMAP_IRQ(AXP288, MV_CHNG,                5, 0),
 650	INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG,            5, 1),
 651};
 652
 653static const struct regmap_irq axp313a_regmap_irqs[] = {
 654	INIT_REGMAP_IRQ(AXP313A, PEK_RIS_EDGE,		0, 7),
 655	INIT_REGMAP_IRQ(AXP313A, PEK_FAL_EDGE,		0, 6),
 656	INIT_REGMAP_IRQ(AXP313A, PEK_SHORT,		0, 5),
 657	INIT_REGMAP_IRQ(AXP313A, PEK_LONG,		0, 4),
 658	INIT_REGMAP_IRQ(AXP313A, DCDC3_V_LOW,		0, 3),
 659	INIT_REGMAP_IRQ(AXP313A, DCDC2_V_LOW,		0, 2),
 660	INIT_REGMAP_IRQ(AXP313A, DIE_TEMP_HIGH,		0, 0),
 661};
 662
 663static const struct regmap_irq axp717_regmap_irqs[] = {
 664	INIT_REGMAP_IRQ(AXP717, SOC_DROP_LVL2,		0, 7),
 665	INIT_REGMAP_IRQ(AXP717, SOC_DROP_LVL1,		0, 6),
 666	INIT_REGMAP_IRQ(AXP717, GAUGE_NEW_SOC,		0, 4),
 667	INIT_REGMAP_IRQ(AXP717, BOOST_OVER_V,		0, 2),
 668	INIT_REGMAP_IRQ(AXP717, VBUS_OVER_V,		0, 1),
 669	INIT_REGMAP_IRQ(AXP717, VBUS_FAULT,		0, 0),
 670	INIT_REGMAP_IRQ(AXP717, VBUS_PLUGIN,		1, 7),
 671	INIT_REGMAP_IRQ(AXP717, VBUS_REMOVAL,		1, 6),
 672	INIT_REGMAP_IRQ(AXP717, BATT_PLUGIN,		1, 5),
 673	INIT_REGMAP_IRQ(AXP717, BATT_REMOVAL,		1, 4),
 674	INIT_REGMAP_IRQ(AXP717, PEK_SHORT,		1, 3),
 675	INIT_REGMAP_IRQ(AXP717, PEK_LONG,		1, 2),
 676	INIT_REGMAP_IRQ(AXP717, PEK_FAL_EDGE,		1, 1),
 677	INIT_REGMAP_IRQ(AXP717, PEK_RIS_EDGE,		1, 0),
 678	INIT_REGMAP_IRQ(AXP717, WDOG_EXPIRE,		2, 7),
 679	INIT_REGMAP_IRQ(AXP717, LDO_OVER_CURR,		2, 6),
 680	INIT_REGMAP_IRQ(AXP717, BATT_OVER_CURR,		2, 5),
 681	INIT_REGMAP_IRQ(AXP717, CHARG_DONE,		2, 4),
 682	INIT_REGMAP_IRQ(AXP717, CHARG,			2, 3),
 683	INIT_REGMAP_IRQ(AXP717, DIE_TEMP_HIGH,		2, 2),
 684	INIT_REGMAP_IRQ(AXP717, CHARG_TIMER,		2, 1),
 685	INIT_REGMAP_IRQ(AXP717, BATT_OVER_V,		2, 0),
 686	INIT_REGMAP_IRQ(AXP717, BC_USB_DONE,		3, 7),
 687	INIT_REGMAP_IRQ(AXP717, BC_USB_CHNG,		3, 6),
 688	INIT_REGMAP_IRQ(AXP717, BATT_QUIT_TEMP_HIGH,	3, 4),
 689	INIT_REGMAP_IRQ(AXP717, BATT_CHG_TEMP_HIGH,	3, 3),
 690	INIT_REGMAP_IRQ(AXP717, BATT_CHG_TEMP_LOW,	3, 2),
 691	INIT_REGMAP_IRQ(AXP717, BATT_ACT_TEMP_HIGH,	3, 1),
 692	INIT_REGMAP_IRQ(AXP717, BATT_ACT_TEMP_LOW,	3, 0),
 693	INIT_REGMAP_IRQ(AXP717, TYPEC_REMOVE,		4, 6),
 694	INIT_REGMAP_IRQ(AXP717, TYPEC_PLUGIN,		4, 5),
 695};
 696
 697static const struct regmap_irq axp803_regmap_irqs[] = {
 698	INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V,		0, 7),
 699	INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN,		0, 6),
 700	INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL,	        0, 5),
 701	INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V,		0, 4),
 702	INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN,		0, 3),
 703	INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL,	        0, 2),
 704	INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN,		1, 7),
 705	INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL,	        1, 6),
 706	INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE,	1, 5),
 707	INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE,	1, 4),
 708	INIT_REGMAP_IRQ(AXP803, CHARG,		        1, 3),
 709	INIT_REGMAP_IRQ(AXP803, CHARG_DONE,		1, 2),
 710	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH,	2, 7),
 711	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END,	2, 6),
 712	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW,	2, 5),
 713	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END,	2, 4),
 714	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH,	2, 3),
 715	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END,	2, 2),
 716	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW,	2, 1),
 717	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END,	2, 0),
 718	INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH,	        3, 7),
 719	INIT_REGMAP_IRQ(AXP803, GPADC,		        3, 2),
 720	INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1,	        3, 1),
 721	INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2,	        3, 0),
 722	INIT_REGMAP_IRQ(AXP803, TIMER,		        4, 7),
 723	INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE,	        4, 6),
 724	INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE,	        4, 5),
 725	INIT_REGMAP_IRQ(AXP803, PEK_SHORT,		4, 4),
 726	INIT_REGMAP_IRQ(AXP803, PEK_LONG,		4, 3),
 727	INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF,		4, 2),
 728	INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT,		4, 1),
 729	INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT,		4, 0),
 730	INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG,            5, 1),
 731	INIT_REGMAP_IRQ(AXP803, MV_CHNG,                5, 0),
 732};
 733
 734static const struct regmap_irq axp806_regmap_irqs[] = {
 735	INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1,	0, 0),
 736	INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2,	0, 1),
 737	INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW,		0, 3),
 738	INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW,		0, 4),
 739	INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW,		0, 5),
 740	INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW,		0, 6),
 741	INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW,		0, 7),
 742	INIT_REGMAP_IRQ(AXP806, POK_LONG,		1, 0),
 743	INIT_REGMAP_IRQ(AXP806, POK_SHORT,		1, 1),
 744	INIT_REGMAP_IRQ(AXP806, WAKEUP,			1, 4),
 745	INIT_REGMAP_IRQ(AXP806, POK_FALL,		1, 5),
 746	INIT_REGMAP_IRQ(AXP806, POK_RISE,		1, 6),
 747};
 748
 749static const struct regmap_irq axp809_regmap_irqs[] = {
 750	INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V,		0, 7),
 751	INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN,		0, 6),
 752	INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL,	        0, 5),
 753	INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V,		0, 4),
 754	INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN,		0, 3),
 755	INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL,	        0, 2),
 756	INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW,		0, 1),
 757	INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN,		1, 7),
 758	INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL,	        1, 6),
 759	INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE,	1, 5),
 760	INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE,	1, 4),
 761	INIT_REGMAP_IRQ(AXP809, CHARG,		        1, 3),
 762	INIT_REGMAP_IRQ(AXP809, CHARG_DONE,		1, 2),
 763	INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH,	2, 7),
 764	INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END,	2, 6),
 765	INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW,	2, 5),
 766	INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END,	2, 4),
 767	INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH,	2, 3),
 768	INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END,	2, 2),
 769	INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW,	2, 1),
 770	INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END,	2, 0),
 771	INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH,	        3, 7),
 772	INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1,	        3, 1),
 773	INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2,	        3, 0),
 774	INIT_REGMAP_IRQ(AXP809, TIMER,		        4, 7),
 775	INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE,	        4, 6),
 776	INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE,	        4, 5),
 777	INIT_REGMAP_IRQ(AXP809, PEK_SHORT,		4, 4),
 778	INIT_REGMAP_IRQ(AXP809, PEK_LONG,		4, 3),
 779	INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF,		4, 2),
 780	INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT,		4, 1),
 781	INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT,		4, 0),
 782};
 783
 784static const struct regmap_irq axp15060_regmap_irqs[] = {
 785	INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV1,	0, 0),
 786	INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV2,	0, 1),
 787	INIT_REGMAP_IRQ(AXP15060, DCDC1_V_LOW,		0, 2),
 788	INIT_REGMAP_IRQ(AXP15060, DCDC2_V_LOW,		0, 3),
 789	INIT_REGMAP_IRQ(AXP15060, DCDC3_V_LOW,		0, 4),
 790	INIT_REGMAP_IRQ(AXP15060, DCDC4_V_LOW,		0, 5),
 791	INIT_REGMAP_IRQ(AXP15060, DCDC5_V_LOW,		0, 6),
 792	INIT_REGMAP_IRQ(AXP15060, DCDC6_V_LOW,		0, 7),
 793	INIT_REGMAP_IRQ(AXP15060, PEK_LONG,			1, 0),
 794	INIT_REGMAP_IRQ(AXP15060, PEK_SHORT,			1, 1),
 795	INIT_REGMAP_IRQ(AXP15060, GPIO1_INPUT,		1, 2),
 796	INIT_REGMAP_IRQ(AXP15060, PEK_FAL_EDGE,			1, 3),
 797	INIT_REGMAP_IRQ(AXP15060, PEK_RIS_EDGE,			1, 4),
 798	INIT_REGMAP_IRQ(AXP15060, GPIO2_INPUT,		1, 5),
 799};
 800
 801static const struct regmap_irq_chip axp152_regmap_irq_chip = {
 802	.name			= "axp152_irq_chip",
 803	.status_base		= AXP152_IRQ1_STATE,
 804	.ack_base		= AXP152_IRQ1_STATE,
 805	.unmask_base		= AXP152_IRQ1_EN,
 806	.init_ack_masked	= true,
 807	.irqs			= axp152_regmap_irqs,
 808	.num_irqs		= ARRAY_SIZE(axp152_regmap_irqs),
 809	.num_regs		= 3,
 810};
 811
 812static unsigned int axp192_get_irq_reg(struct regmap_irq_chip_data *data,
 813				       unsigned int base, int index)
 814{
 815	/* linear mapping for IRQ1 to IRQ4 */
 816	if (index < 4)
 817		return base + index;
 818
 819	/* handle IRQ5 separately */
 820	if (base == AXP192_IRQ1_EN)
 821		return AXP192_IRQ5_EN;
 822
 823	return AXP192_IRQ5_STATE;
 824}
 825
 826static const struct regmap_irq_chip axp192_regmap_irq_chip = {
 827	.name			= "axp192_irq_chip",
 828	.status_base		= AXP192_IRQ1_STATE,
 829	.ack_base		= AXP192_IRQ1_STATE,
 830	.unmask_base		= AXP192_IRQ1_EN,
 831	.init_ack_masked	= true,
 832	.irqs			= axp192_regmap_irqs,
 833	.num_irqs		= ARRAY_SIZE(axp192_regmap_irqs),
 834	.num_regs		= 5,
 835	.get_irq_reg		= axp192_get_irq_reg,
 836};
 837
 838static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
 839	.name			= "axp20x_irq_chip",
 840	.status_base		= AXP20X_IRQ1_STATE,
 841	.ack_base		= AXP20X_IRQ1_STATE,
 842	.unmask_base		= AXP20X_IRQ1_EN,
 843	.init_ack_masked	= true,
 844	.irqs			= axp20x_regmap_irqs,
 845	.num_irqs		= ARRAY_SIZE(axp20x_regmap_irqs),
 846	.num_regs		= 5,
 847
 848};
 849
 850static const struct regmap_irq_chip axp22x_regmap_irq_chip = {
 851	.name			= "axp22x_irq_chip",
 852	.status_base		= AXP20X_IRQ1_STATE,
 853	.ack_base		= AXP20X_IRQ1_STATE,
 854	.unmask_base		= AXP20X_IRQ1_EN,
 855	.init_ack_masked	= true,
 856	.irqs			= axp22x_regmap_irqs,
 857	.num_irqs		= ARRAY_SIZE(axp22x_regmap_irqs),
 858	.num_regs		= 5,
 859};
 860
 861static const struct regmap_irq_chip axp288_regmap_irq_chip = {
 862	.name			= "axp288_irq_chip",
 863	.status_base		= AXP20X_IRQ1_STATE,
 864	.ack_base		= AXP20X_IRQ1_STATE,
 865	.unmask_base		= AXP20X_IRQ1_EN,
 866	.init_ack_masked	= true,
 867	.irqs			= axp288_regmap_irqs,
 868	.num_irqs		= ARRAY_SIZE(axp288_regmap_irqs),
 869	.num_regs		= 6,
 870
 871};
 872
 873static const struct regmap_irq_chip axp313a_regmap_irq_chip = {
 874	.name			= "axp313a_irq_chip",
 875	.status_base		= AXP313A_IRQ_STATE,
 876	.ack_base		= AXP313A_IRQ_STATE,
 877	.unmask_base		= AXP313A_IRQ_EN,
 878	.init_ack_masked	= true,
 879	.irqs			= axp313a_regmap_irqs,
 880	.num_irqs		= ARRAY_SIZE(axp313a_regmap_irqs),
 881	.num_regs		= 1,
 882};
 883
 884static const struct regmap_irq_chip axp717_regmap_irq_chip = {
 885	.name			= "axp717_irq_chip",
 886	.status_base		= AXP717_IRQ0_STATE,
 887	.ack_base		= AXP717_IRQ0_STATE,
 888	.unmask_base		= AXP717_IRQ0_EN,
 889	.init_ack_masked	= true,
 890	.irqs			= axp717_regmap_irqs,
 891	.num_irqs		= ARRAY_SIZE(axp717_regmap_irqs),
 892	.num_regs		= 5,
 893};
 894
 895static const struct regmap_irq_chip axp803_regmap_irq_chip = {
 896	.name			= "axp803",
 897	.status_base		= AXP20X_IRQ1_STATE,
 898	.ack_base		= AXP20X_IRQ1_STATE,
 899	.unmask_base		= AXP20X_IRQ1_EN,
 900	.init_ack_masked	= true,
 901	.irqs			= axp803_regmap_irqs,
 902	.num_irqs		= ARRAY_SIZE(axp803_regmap_irqs),
 903	.num_regs		= 6,
 904};
 905
 906static const struct regmap_irq_chip axp806_regmap_irq_chip = {
 907	.name			= "axp806",
 908	.status_base		= AXP20X_IRQ1_STATE,
 909	.ack_base		= AXP20X_IRQ1_STATE,
 910	.unmask_base		= AXP20X_IRQ1_EN,
 911	.init_ack_masked	= true,
 912	.irqs			= axp806_regmap_irqs,
 913	.num_irqs		= ARRAY_SIZE(axp806_regmap_irqs),
 914	.num_regs		= 2,
 915};
 916
 917static const struct regmap_irq_chip axp809_regmap_irq_chip = {
 918	.name			= "axp809",
 919	.status_base		= AXP20X_IRQ1_STATE,
 920	.ack_base		= AXP20X_IRQ1_STATE,
 921	.unmask_base		= AXP20X_IRQ1_EN,
 922	.init_ack_masked	= true,
 923	.irqs			= axp809_regmap_irqs,
 924	.num_irqs		= ARRAY_SIZE(axp809_regmap_irqs),
 925	.num_regs		= 5,
 926};
 927
 928static const struct regmap_irq_chip axp15060_regmap_irq_chip = {
 929	.name			= "axp15060",
 930	.status_base		= AXP15060_IRQ1_STATE,
 931	.ack_base		= AXP15060_IRQ1_STATE,
 932	.unmask_base		= AXP15060_IRQ1_EN,
 933	.init_ack_masked	= true,
 934	.irqs			= axp15060_regmap_irqs,
 935	.num_irqs		= ARRAY_SIZE(axp15060_regmap_irqs),
 936	.num_regs		= 2,
 937};
 938
 939static const struct mfd_cell axp192_cells[] = {
 940	{
 941		.name		= "axp192-adc",
 942		.of_compatible	= "x-powers,axp192-adc",
 943	}, {
 944		.name		= "axp20x-battery-power-supply",
 945		.of_compatible	= "x-powers,axp192-battery-power-supply",
 946	}, {
 947		.name		= "axp20x-ac-power-supply",
 948		.of_compatible	= "x-powers,axp202-ac-power-supply",
 949		.num_resources	= ARRAY_SIZE(axp192_ac_power_supply_resources),
 950		.resources	= axp192_ac_power_supply_resources,
 951	}, {
 952		.name		= "axp20x-usb-power-supply",
 953		.of_compatible	= "x-powers,axp192-usb-power-supply",
 954		.num_resources	= ARRAY_SIZE(axp192_usb_power_supply_resources),
 955		.resources	= axp192_usb_power_supply_resources,
 956	},
 957	{	.name		= "axp20x-regulator" },
 958};
 959
 960static const struct mfd_cell axp20x_cells[] = {
 961	{
 962		.name		= "axp20x-gpio",
 963		.of_compatible	= "x-powers,axp209-gpio",
 964	}, {
 965		.name		= "axp20x-pek",
 966		.num_resources	= ARRAY_SIZE(axp20x_pek_resources),
 967		.resources	= axp20x_pek_resources,
 968	}, {
 969		.name		= "axp20x-regulator",
 970	}, {
 971		.name		= "axp20x-adc",
 972		.of_compatible	= "x-powers,axp209-adc",
 973	}, {
 974		.name		= "axp20x-battery-power-supply",
 975		.of_compatible	= "x-powers,axp209-battery-power-supply",
 976	}, {
 977		.name		= "axp20x-ac-power-supply",
 978		.of_compatible	= "x-powers,axp202-ac-power-supply",
 979		.num_resources	= ARRAY_SIZE(axp20x_ac_power_supply_resources),
 980		.resources	= axp20x_ac_power_supply_resources,
 981	}, {
 982		.name		= "axp20x-usb-power-supply",
 983		.of_compatible	= "x-powers,axp202-usb-power-supply",
 984		.num_resources	= ARRAY_SIZE(axp20x_usb_power_supply_resources),
 985		.resources	= axp20x_usb_power_supply_resources,
 986	},
 987};
 988
 989static const struct mfd_cell axp221_cells[] = {
 990	{
 991		.name		= "axp20x-gpio",
 992		.of_compatible	= "x-powers,axp221-gpio",
 993	}, {
 994		.name		= "axp221-pek",
 995		.num_resources	= ARRAY_SIZE(axp22x_pek_resources),
 996		.resources	= axp22x_pek_resources,
 997	}, {
 998		.name		= "axp20x-regulator",
 999	}, {
1000		.name		= "axp22x-adc",
1001		.of_compatible	= "x-powers,axp221-adc",
1002	}, {
1003		.name		= "axp20x-ac-power-supply",
1004		.of_compatible	= "x-powers,axp221-ac-power-supply",
1005		.num_resources	= ARRAY_SIZE(axp20x_ac_power_supply_resources),
1006		.resources	= axp20x_ac_power_supply_resources,
1007	}, {
1008		.name		= "axp20x-battery-power-supply",
1009		.of_compatible	= "x-powers,axp221-battery-power-supply",
1010	}, {
1011		.name		= "axp20x-usb-power-supply",
1012		.of_compatible	= "x-powers,axp221-usb-power-supply",
1013		.num_resources	= ARRAY_SIZE(axp22x_usb_power_supply_resources),
1014		.resources	= axp22x_usb_power_supply_resources,
1015	},
1016};
1017
1018static const struct mfd_cell axp223_cells[] = {
1019	{
1020		.name		= "axp20x-gpio",
1021		.of_compatible	= "x-powers,axp221-gpio",
1022	}, {
1023		.name		= "axp221-pek",
1024		.num_resources	= ARRAY_SIZE(axp22x_pek_resources),
1025		.resources	= axp22x_pek_resources,
1026	}, {
1027		.name		= "axp22x-adc",
1028		.of_compatible	= "x-powers,axp221-adc",
1029	}, {
1030		.name		= "axp20x-battery-power-supply",
1031		.of_compatible	= "x-powers,axp221-battery-power-supply",
1032	}, {
1033		.name		= "axp20x-regulator",
1034	}, {
1035		.name		= "axp20x-ac-power-supply",
1036		.of_compatible	= "x-powers,axp221-ac-power-supply",
1037		.num_resources	= ARRAY_SIZE(axp20x_ac_power_supply_resources),
1038		.resources	= axp20x_ac_power_supply_resources,
1039	}, {
1040		.name		= "axp20x-usb-power-supply",
1041		.of_compatible	= "x-powers,axp223-usb-power-supply",
1042		.num_resources	= ARRAY_SIZE(axp22x_usb_power_supply_resources),
1043		.resources	= axp22x_usb_power_supply_resources,
1044	},
1045};
1046
1047static const struct mfd_cell axp152_cells[] = {
1048	{
1049		.name		= "axp20x-pek",
1050		.num_resources	= ARRAY_SIZE(axp152_pek_resources),
1051		.resources	= axp152_pek_resources,
1052	},
1053};
1054
1055static struct mfd_cell axp313a_cells[] = {
1056	/* AXP323 is sometimes paired with AXP717 as sub-PMIC */
1057	MFD_CELL_BASIC("axp20x-regulator", NULL, NULL, 0, 1),
1058	MFD_CELL_RES("axp313a-pek", axp313a_pek_resources),
1059};
1060
1061static struct mfd_cell axp717_cells[] = {
1062	MFD_CELL_NAME("axp20x-regulator"),
1063	MFD_CELL_RES("axp20x-pek", axp717_pek_resources),
1064	MFD_CELL_OF("axp717-adc",
1065		    NULL, NULL, 0, 0, "x-powers,axp717-adc"),
1066	MFD_CELL_OF("axp20x-usb-power-supply",
1067		    axp717_usb_power_supply_resources, NULL, 0, 0,
1068		    "x-powers,axp717-usb-power-supply"),
1069	MFD_CELL_OF("axp20x-battery-power-supply",
1070		    NULL, NULL, 0, 0, "x-powers,axp717-battery-power-supply"),
1071};
1072
1073static const struct resource axp288_adc_resources[] = {
1074	DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"),
1075};
1076
1077static const struct resource axp288_extcon_resources[] = {
1078	DEFINE_RES_IRQ(AXP288_IRQ_VBUS_FALL),
1079	DEFINE_RES_IRQ(AXP288_IRQ_VBUS_RISE),
1080	DEFINE_RES_IRQ(AXP288_IRQ_MV_CHNG),
1081	DEFINE_RES_IRQ(AXP288_IRQ_BC_USB_CHNG),
1082};
1083
1084static const struct resource axp288_charger_resources[] = {
1085	DEFINE_RES_IRQ(AXP288_IRQ_OV),
1086	DEFINE_RES_IRQ(AXP288_IRQ_DONE),
1087	DEFINE_RES_IRQ(AXP288_IRQ_CHARGING),
1088	DEFINE_RES_IRQ(AXP288_IRQ_SAFE_QUIT),
1089	DEFINE_RES_IRQ(AXP288_IRQ_SAFE_ENTER),
1090	DEFINE_RES_IRQ(AXP288_IRQ_QCBTU),
1091	DEFINE_RES_IRQ(AXP288_IRQ_CBTU),
1092	DEFINE_RES_IRQ(AXP288_IRQ_QCBTO),
1093	DEFINE_RES_IRQ(AXP288_IRQ_CBTO),
1094};
1095
1096static const char * const axp288_fuel_gauge_suppliers[] = { "axp288_charger" };
1097
1098static const struct property_entry axp288_fuel_gauge_properties[] = {
1099	PROPERTY_ENTRY_STRING_ARRAY("supplied-from", axp288_fuel_gauge_suppliers),
1100	{ }
1101};
1102
1103static const struct software_node axp288_fuel_gauge_sw_node = {
1104	.name = "axp288_fuel_gauge",
1105	.properties = axp288_fuel_gauge_properties,
1106};
1107
1108static const struct mfd_cell axp288_cells[] = {
1109	{
1110		.name		= "axp288_adc",
1111		.num_resources	= ARRAY_SIZE(axp288_adc_resources),
1112		.resources	= axp288_adc_resources,
1113	}, {
1114		.name		= "axp288_extcon",
1115		.num_resources	= ARRAY_SIZE(axp288_extcon_resources),
1116		.resources	= axp288_extcon_resources,
1117	}, {
1118		.name		= "axp288_charger",
1119		.num_resources	= ARRAY_SIZE(axp288_charger_resources),
1120		.resources	= axp288_charger_resources,
1121	}, {
1122		.name		= "axp288_fuel_gauge",
1123		.num_resources	= ARRAY_SIZE(axp288_fuel_gauge_resources),
1124		.resources	= axp288_fuel_gauge_resources,
1125		.swnode		= &axp288_fuel_gauge_sw_node,
1126	}, {
1127		.name		= "axp221-pek",
1128		.num_resources	= ARRAY_SIZE(axp288_power_button_resources),
1129		.resources	= axp288_power_button_resources,
1130	}, {
1131		.name		= "axp288_pmic_acpi",
1132	},
1133};
1134
1135static const struct mfd_cell axp803_cells[] = {
1136	{
1137		.name		= "axp221-pek",
1138		.num_resources	= ARRAY_SIZE(axp803_pek_resources),
1139		.resources	= axp803_pek_resources,
1140	}, {
1141		.name		= "axp20x-gpio",
1142		.of_compatible	= "x-powers,axp813-gpio",
1143	}, {
1144		.name		= "axp813-adc",
1145		.of_compatible	= "x-powers,axp813-adc",
1146	}, {
1147		.name		= "axp20x-battery-power-supply",
1148		.of_compatible	= "x-powers,axp813-battery-power-supply",
1149	}, {
1150		.name		= "axp20x-ac-power-supply",
1151		.of_compatible	= "x-powers,axp813-ac-power-supply",
1152		.num_resources	= ARRAY_SIZE(axp20x_ac_power_supply_resources),
1153		.resources	= axp20x_ac_power_supply_resources,
1154	}, {
1155		.name		= "axp20x-usb-power-supply",
1156		.num_resources	= ARRAY_SIZE(axp803_usb_power_supply_resources),
1157		.resources	= axp803_usb_power_supply_resources,
1158		.of_compatible	= "x-powers,axp813-usb-power-supply",
1159	},
1160	{	.name		= "axp20x-regulator" },
1161};
1162
1163static const struct mfd_cell axp806_self_working_cells[] = {
1164	{
1165		.name		= "axp221-pek",
1166		.num_resources	= ARRAY_SIZE(axp806_pek_resources),
1167		.resources	= axp806_pek_resources,
1168	},
1169	{	.name		= "axp20x-regulator" },
1170};
1171
1172static const struct mfd_cell axp806_cells[] = {
1173	{
1174		.id		= 2,
1175		.name		= "axp20x-regulator",
1176	},
1177};
1178
1179static const struct mfd_cell axp809_cells[] = {
1180	{
1181		.name		= "axp20x-gpio",
1182		.of_compatible	= "x-powers,axp221-gpio",
1183	}, {
1184		.name		= "axp221-pek",
1185		.num_resources	= ARRAY_SIZE(axp809_pek_resources),
1186		.resources	= axp809_pek_resources,
1187	}, {
1188		.id		= 1,
1189		.name		= "axp20x-regulator",
1190	},
1191};
1192
1193static const struct mfd_cell axp813_cells[] = {
1194	{
1195		.name		= "axp221-pek",
1196		.num_resources	= ARRAY_SIZE(axp803_pek_resources),
1197		.resources	= axp803_pek_resources,
1198	}, {
1199		.name		= "axp20x-regulator",
1200	}, {
1201		.name		= "axp20x-gpio",
1202		.of_compatible	= "x-powers,axp813-gpio",
1203	}, {
1204		.name		= "axp813-adc",
1205		.of_compatible	= "x-powers,axp813-adc",
1206	}, {
1207		.name		= "axp20x-battery-power-supply",
1208		.of_compatible	= "x-powers,axp813-battery-power-supply",
1209	}, {
1210		.name		= "axp20x-ac-power-supply",
1211		.of_compatible	= "x-powers,axp813-ac-power-supply",
1212		.num_resources	= ARRAY_SIZE(axp20x_ac_power_supply_resources),
1213		.resources	= axp20x_ac_power_supply_resources,
1214	}, {
1215		.name		= "axp20x-usb-power-supply",
1216		.num_resources	= ARRAY_SIZE(axp803_usb_power_supply_resources),
1217		.resources	= axp803_usb_power_supply_resources,
1218		.of_compatible	= "x-powers,axp813-usb-power-supply",
1219	},
1220};
1221
1222static const struct mfd_cell axp15060_cells[] = {
1223	{
1224		.name		= "axp221-pek",
1225		.num_resources	= ARRAY_SIZE(axp15060_pek_resources),
1226		.resources	= axp15060_pek_resources,
1227	}, {
1228		.name		= "axp20x-regulator",
1229	},
1230};
1231
1232/* For boards that don't have IRQ line connected to SOC. */
1233static const struct mfd_cell axp_regulator_only_cells[] = {
1234	/* PMIC without IRQ line may be secondary PMIC */
1235	MFD_CELL_BASIC("axp20x-regulator", NULL, NULL, 0, 1),
1236};
1237
1238static int axp20x_power_off(struct sys_off_data *data)
1239{
1240	struct axp20x_dev *axp20x = data->cb_data;
1241	unsigned int shutdown_reg;
1242
1243	switch (axp20x->variant) {
1244	case AXP323_ID:
1245	case AXP313A_ID:
1246		shutdown_reg = AXP313A_SHUTDOWN_CTRL;
1247		break;
1248	default:
1249		shutdown_reg = AXP20X_OFF_CTRL;
1250		break;
1251	}
1252
1253	regmap_write(axp20x->regmap, shutdown_reg, AXP20X_OFF);
1254
1255	/* Give capacitors etc. time to drain to avoid kernel panic msg. */
1256	mdelay(500);
1257
1258	return NOTIFY_DONE;
1259}
1260
1261int axp20x_match_device(struct axp20x_dev *axp20x)
1262{
1263	struct device *dev = axp20x->dev;
1264	const struct mfd_cell *cells_no_irq = NULL;
1265	int nr_cells_no_irq = 0;
1266
1267	axp20x->variant = (long)device_get_match_data(dev);
1268	switch (axp20x->variant) {
1269	case AXP152_ID:
1270		axp20x->nr_cells = ARRAY_SIZE(axp152_cells);
1271		axp20x->cells = axp152_cells;
1272		axp20x->regmap_cfg = &axp152_regmap_config;
1273		axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
1274		break;
1275	case AXP192_ID:
1276		axp20x->nr_cells = ARRAY_SIZE(axp192_cells);
1277		axp20x->cells = axp192_cells;
1278		axp20x->regmap_cfg = &axp192_regmap_config;
1279		axp20x->regmap_irq_chip = &axp192_regmap_irq_chip;
1280		break;
1281	case AXP202_ID:
1282	case AXP209_ID:
1283		axp20x->nr_cells = ARRAY_SIZE(axp20x_cells);
1284		axp20x->cells = axp20x_cells;
1285		axp20x->regmap_cfg = &axp20x_regmap_config;
1286		axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip;
1287		break;
1288	case AXP221_ID:
1289		axp20x->nr_cells = ARRAY_SIZE(axp221_cells);
1290		axp20x->cells = axp221_cells;
1291		axp20x->regmap_cfg = &axp22x_regmap_config;
1292		axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
1293		break;
1294	case AXP223_ID:
1295		axp20x->nr_cells = ARRAY_SIZE(axp223_cells);
1296		axp20x->cells = axp223_cells;
1297		axp20x->regmap_cfg = &axp22x_regmap_config;
1298		axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
1299		break;
1300	case AXP288_ID:
1301		axp20x->cells = axp288_cells;
1302		axp20x->nr_cells = ARRAY_SIZE(axp288_cells);
1303		axp20x->regmap_cfg = &axp288_regmap_config;
1304		axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
1305		axp20x->irq_flags = IRQF_TRIGGER_LOW;
1306		break;
1307	case AXP313A_ID:
1308		axp20x->nr_cells = ARRAY_SIZE(axp313a_cells);
1309		axp20x->cells = axp313a_cells;
1310		axp20x->regmap_cfg = &axp313a_regmap_config;
1311		axp20x->regmap_irq_chip = &axp313a_regmap_irq_chip;
1312		break;
1313	case AXP323_ID:
1314		axp20x->nr_cells = ARRAY_SIZE(axp313a_cells);
1315		axp20x->cells = axp313a_cells;
1316		axp20x->regmap_cfg = &axp323_regmap_config;
1317		axp20x->regmap_irq_chip = &axp313a_regmap_irq_chip;
1318		break;
1319	case AXP717_ID:
1320		axp20x->nr_cells = ARRAY_SIZE(axp717_cells);
1321		axp20x->cells = axp717_cells;
1322		axp20x->regmap_cfg = &axp717_regmap_config;
1323		axp20x->regmap_irq_chip = &axp717_regmap_irq_chip;
1324		break;
1325	case AXP803_ID:
1326		axp20x->nr_cells = ARRAY_SIZE(axp803_cells);
1327		axp20x->cells = axp803_cells;
1328		axp20x->regmap_cfg = &axp288_regmap_config;
1329		axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
1330		break;
1331	case AXP806_ID:
1332		/*
1333		 * Don't register the power key part if in slave mode or
1334		 * if there is no interrupt line.
1335		 */
1336		if (of_property_read_bool(axp20x->dev->of_node,
1337					  "x-powers,self-working-mode")) {
1338			axp20x->nr_cells = ARRAY_SIZE(axp806_self_working_cells);
1339			axp20x->cells = axp806_self_working_cells;
1340		} else {
1341			axp20x->nr_cells = ARRAY_SIZE(axp806_cells);
1342			axp20x->cells = axp806_cells;
1343		}
1344		nr_cells_no_irq = ARRAY_SIZE(axp806_cells);
1345		cells_no_irq = axp806_cells;
1346		axp20x->regmap_cfg = &axp806_regmap_config;
1347		axp20x->regmap_irq_chip = &axp806_regmap_irq_chip;
1348		break;
1349	case AXP809_ID:
1350		axp20x->nr_cells = ARRAY_SIZE(axp809_cells);
1351		axp20x->cells = axp809_cells;
1352		axp20x->regmap_cfg = &axp22x_regmap_config;
1353		axp20x->regmap_irq_chip = &axp809_regmap_irq_chip;
1354		break;
1355	case AXP813_ID:
1356		axp20x->nr_cells = ARRAY_SIZE(axp813_cells);
1357		axp20x->cells = axp813_cells;
1358		axp20x->regmap_cfg = &axp288_regmap_config;
1359		/*
1360		 * The IRQ table given in the datasheet is incorrect.
1361		 * In IRQ enable/status registers 1, there are separate
1362		 * IRQs for ACIN and VBUS, instead of bits [7:5] being
1363		 * the same as bits [4:2]. So it shares the same IRQs
1364		 * as the AXP803, rather than the AXP288.
1365		 */
1366		axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
1367		break;
1368	case AXP15060_ID:
1369		axp20x->nr_cells = ARRAY_SIZE(axp15060_cells);
1370		axp20x->cells = axp15060_cells;
1371		axp20x->regmap_cfg = &axp15060_regmap_config;
1372		axp20x->regmap_irq_chip = &axp15060_regmap_irq_chip;
1373		break;
1374	default:
1375		dev_err(dev, "unsupported AXP20X ID %u\n", axp20x->variant);
1376		return -EINVAL;
1377	}
1378
1379	/*
1380	 * Use an alternative cell array when no interrupt line is connected,
1381	 * since IRQs are required by some drivers.
1382	 * The default is the safe "regulator-only", as this works fine without
1383	 * an interrupt specified.
1384	 */
1385	if (axp20x->irq <= 0) {
1386		if (cells_no_irq) {
1387			axp20x->nr_cells = nr_cells_no_irq;
1388			axp20x->cells = cells_no_irq;
1389		} else {
1390			axp20x->nr_cells = ARRAY_SIZE(axp_regulator_only_cells);
1391			axp20x->cells = axp_regulator_only_cells;
1392		}
1393	}
1394
1395	dev_info(dev, "AXP20x variant %s found\n",
1396		 axp20x_model_names[axp20x->variant]);
1397
1398	return 0;
1399}
1400EXPORT_SYMBOL(axp20x_match_device);
1401
1402int axp20x_device_probe(struct axp20x_dev *axp20x)
1403{
1404	int ret;
1405
1406	/*
1407	 * The AXP806 supports either master/standalone or slave mode.
1408	 * Slave mode allows sharing the serial bus, even with multiple
1409	 * AXP806 which all have the same hardware address.
1410	 *
1411	 * This is done with extra "serial interface address extension",
1412	 * or AXP806_BUS_ADDR_EXT, and "register address extension", or
1413	 * AXP806_REG_ADDR_EXT, registers. The former is read-only, with
1414	 * 1 bit customizable at the factory, and 1 bit depending on the
1415	 * state of an external pin. The latter is writable. The device
1416	 * will only respond to operations to its other registers when
1417	 * the these device addressing bits (in the upper 4 bits of the
1418	 * registers) match.
1419	 *
1420	 * By default we support an AXP806 chained to an AXP809 in slave
1421	 * mode. Boards which use an AXP806 in master mode can set the
1422	 * property "x-powers,master-mode" to override the default.
1423	 */
1424	if (axp20x->variant == AXP806_ID) {
1425		if (of_property_read_bool(axp20x->dev->of_node,
1426					  "x-powers,master-mode") ||
1427		    of_property_read_bool(axp20x->dev->of_node,
1428					  "x-powers,self-working-mode"))
1429			regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
1430				     AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE);
1431		else
1432			regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
1433				     AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE);
1434	}
1435
1436	/* Only if there is an interrupt line connected towards the CPU. */
1437	if (axp20x->irq > 0) {
1438		ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq,
1439				IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags,
1440				-1, axp20x->regmap_irq_chip,
1441				&axp20x->regmap_irqc);
1442		if (ret) {
1443			dev_err(axp20x->dev, "failed to add irq chip: %d\n",
1444				ret);
1445			return ret;
1446		}
1447	}
1448
1449	ret = mfd_add_devices(axp20x->dev, PLATFORM_DEVID_NONE, axp20x->cells,
1450			      axp20x->nr_cells, NULL, 0, NULL);
1451
1452	if (ret) {
1453		dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret);
1454		regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
1455		return ret;
1456	}
1457
1458	if (axp20x->variant != AXP288_ID)
1459		devm_register_power_off_handler(axp20x->dev, axp20x_power_off, axp20x);
1460
1461	dev_info(axp20x->dev, "AXP20X driver loaded\n");
1462
1463	return 0;
1464}
1465EXPORT_SYMBOL(axp20x_device_probe);
1466
1467void axp20x_device_remove(struct axp20x_dev *axp20x)
1468{
1469	mfd_remove_devices(axp20x->dev);
1470	regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
1471}
1472EXPORT_SYMBOL(axp20x_device_remove);
1473
1474MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X");
1475MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
1476MODULE_LICENSE("GPL");