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v4l2-dv-timings.c
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linux-6.19.14/drivers/media/v4l2-core/v4l2-dv-timings.c
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * v4l2-dv-timings - dv-timings helper functions 4 * 5 * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved. 6 */ 7 8#include <linux/module.h> 9#include <linux/types.h> 10#include <linux/kernel.h> 11#include <linux/errno.h> 12#include <linux/rational.h> 13#include <linux/videodev2.h> 14#include <linux/v4l2-dv-timings.h> 15#include <media/v4l2-dv-timings.h> 16#include <linux/math64.h> 17#include <linux/hdmi.h> 18#include <media/cec.h> 19 20MODULE_AUTHOR("Hans Verkuil"); 21MODULE_DESCRIPTION("V4L2 DV Timings Helper Functions"); 22MODULE_LICENSE("GPL"); 23 24const struct v4l2_dv_timings v4l2_dv_timings_presets[] = { 25 V4L2_DV_BT_CEA_640X480P59_94, 26 V4L2_DV_BT_CEA_720X480I59_94, 27 V4L2_DV_BT_CEA_720X480P59_94, 28 V4L2_DV_BT_CEA_720X576I50, 29 V4L2_DV_BT_CEA_720X576P50, 30 V4L2_DV_BT_CEA_1280X720P24, 31 V4L2_DV_BT_CEA_1280X720P25, 32 V4L2_DV_BT_CEA_1280X720P30, 33 V4L2_DV_BT_CEA_1280X720P50, 34 V4L2_DV_BT_CEA_1280X720P60, 35 V4L2_DV_BT_CEA_1920X1080P24, 36 V4L2_DV_BT_CEA_1920X1080P25, 37 V4L2_DV_BT_CEA_1920X1080P30, 38 V4L2_DV_BT_CEA_1920X1080I50, 39 V4L2_DV_BT_CEA_1920X1080P50, 40 V4L2_DV_BT_CEA_1920X1080I60, 41 V4L2_DV_BT_CEA_1920X1080P60, 42 V4L2_DV_BT_DMT_640X350P85, 43 V4L2_DV_BT_DMT_640X400P85, 44 V4L2_DV_BT_DMT_720X400P85, 45 V4L2_DV_BT_DMT_640X480P72, 46 V4L2_DV_BT_DMT_640X480P75, 47 V4L2_DV_BT_DMT_640X480P85, 48 V4L2_DV_BT_DMT_800X600P56, 49 V4L2_DV_BT_DMT_800X600P60, 50 V4L2_DV_BT_DMT_800X600P72, 51 V4L2_DV_BT_DMT_800X600P75, 52 V4L2_DV_BT_DMT_800X600P85, 53 V4L2_DV_BT_DMT_800X600P120_RB, 54 V4L2_DV_BT_DMT_848X480P60, 55 V4L2_DV_BT_DMT_1024X768I43, 56 V4L2_DV_BT_DMT_1024X768P60, 57 V4L2_DV_BT_DMT_1024X768P70, 58 V4L2_DV_BT_DMT_1024X768P75, 59 V4L2_DV_BT_DMT_1024X768P85, 60 V4L2_DV_BT_DMT_1024X768P120_RB, 61 V4L2_DV_BT_DMT_1152X864P75, 62 V4L2_DV_BT_DMT_1280X768P60_RB, 63 V4L2_DV_BT_DMT_1280X768P60, 64 V4L2_DV_BT_DMT_1280X768P75, 65 V4L2_DV_BT_DMT_1280X768P85, 66 V4L2_DV_BT_DMT_1280X768P120_RB, 67 V4L2_DV_BT_DMT_1280X800P60_RB, 68 V4L2_DV_BT_DMT_1280X800P60, 69 V4L2_DV_BT_DMT_1280X800P75, 70 V4L2_DV_BT_DMT_1280X800P85, 71 V4L2_DV_BT_DMT_1280X800P120_RB, 72 V4L2_DV_BT_DMT_1280X960P60, 73 V4L2_DV_BT_DMT_1280X960P85, 74 V4L2_DV_BT_DMT_1280X960P120_RB, 75 V4L2_DV_BT_DMT_1280X1024P60, 76 V4L2_DV_BT_DMT_1280X1024P75, 77 V4L2_DV_BT_DMT_1280X1024P85, 78 V4L2_DV_BT_DMT_1280X1024P120_RB, 79 V4L2_DV_BT_DMT_1360X768P60, 80 V4L2_DV_BT_DMT_1360X768P120_RB, 81 V4L2_DV_BT_DMT_1366X768P60, 82 V4L2_DV_BT_DMT_1366X768P60_RB, 83 V4L2_DV_BT_DMT_1400X1050P60_RB, 84 V4L2_DV_BT_DMT_1400X1050P60, 85 V4L2_DV_BT_DMT_1400X1050P75, 86 V4L2_DV_BT_DMT_1400X1050P85, 87 V4L2_DV_BT_DMT_1400X1050P120_RB, 88 V4L2_DV_BT_DMT_1440X900P60_RB, 89 V4L2_DV_BT_DMT_1440X900P60, 90 V4L2_DV_BT_DMT_1440X900P75, 91 V4L2_DV_BT_DMT_1440X900P85, 92 V4L2_DV_BT_DMT_1440X900P120_RB, 93 V4L2_DV_BT_DMT_1600X900P60_RB, 94 V4L2_DV_BT_DMT_1600X1200P60, 95 V4L2_DV_BT_DMT_1600X1200P65, 96 V4L2_DV_BT_DMT_1600X1200P70, 97 V4L2_DV_BT_DMT_1600X1200P75, 98 V4L2_DV_BT_DMT_1600X1200P85, 99 V4L2_DV_BT_DMT_1600X1200P120_RB, 100 V4L2_DV_BT_DMT_1680X1050P60_RB, 101 V4L2_DV_BT_DMT_1680X1050P60, 102 V4L2_DV_BT_DMT_1680X1050P75, 103 V4L2_DV_BT_DMT_1680X1050P85, 104 V4L2_DV_BT_DMT_1680X1050P120_RB, 105 V4L2_DV_BT_DMT_1792X1344P60, 106 V4L2_DV_BT_DMT_1792X1344P75, 107 V4L2_DV_BT_DMT_1792X1344P120_RB, 108 V4L2_DV_BT_DMT_1856X1392P60, 109 V4L2_DV_BT_DMT_1856X1392P75, 110 V4L2_DV_BT_DMT_1856X1392P120_RB, 111 V4L2_DV_BT_DMT_1920X1200P60_RB, 112 V4L2_DV_BT_DMT_1920X1200P60, 113 V4L2_DV_BT_DMT_1920X1200P75, 114 V4L2_DV_BT_DMT_1920X1200P85, 115 V4L2_DV_BT_DMT_1920X1200P120_RB, 116 V4L2_DV_BT_DMT_1920X1440P60, 117 V4L2_DV_BT_DMT_1920X1440P75, 118 V4L2_DV_BT_DMT_1920X1440P120_RB, 119 V4L2_DV_BT_DMT_2048X1152P60_RB, 120 V4L2_DV_BT_DMT_2560X1600P60_RB, 121 V4L2_DV_BT_DMT_2560X1600P60, 122 V4L2_DV_BT_DMT_2560X1600P75, 123 V4L2_DV_BT_DMT_2560X1600P85, 124 V4L2_DV_BT_DMT_2560X1600P120_RB, 125 V4L2_DV_BT_CEA_3840X2160P24, 126 V4L2_DV_BT_CEA_3840X2160P25, 127 V4L2_DV_BT_CEA_3840X2160P30, 128 V4L2_DV_BT_CEA_3840X2160P50, 129 V4L2_DV_BT_CEA_3840X2160P60, 130 V4L2_DV_BT_CEA_4096X2160P24, 131 V4L2_DV_BT_CEA_4096X2160P25, 132 V4L2_DV_BT_CEA_4096X2160P30, 133 V4L2_DV_BT_CEA_4096X2160P50, 134 V4L2_DV_BT_DMT_4096X2160P59_94_RB, 135 V4L2_DV_BT_CEA_4096X2160P60, 136 { } 137}; 138EXPORT_SYMBOL_GPL(v4l2_dv_timings_presets); 139 140bool v4l2_valid_dv_timings(const struct v4l2_dv_timings *t, 141 const struct v4l2_dv_timings_cap *dvcap, 142 v4l2_check_dv_timings_fnc fnc, 143 void *fnc_handle) 144{ 145 const struct v4l2_bt_timings *bt = &t->bt; 146 const struct v4l2_bt_timings_cap *cap = &dvcap->bt; 147 u32 caps = cap->capabilities; 148 const u32 max_vert = 10240; 149 u32 max_hor = 3 * bt->width; 150 151 if (t->type != V4L2_DV_BT_656_1120) 152 return false; 153 if (t->type != dvcap->type || 154 bt->height < cap->min_height || 155 bt->height > cap->max_height || 156 bt->width < cap->min_width || 157 bt->width > cap->max_width || 158 bt->pixelclock < cap->min_pixelclock || 159 bt->pixelclock > cap->max_pixelclock || 160 (!(caps & V4L2_DV_BT_CAP_CUSTOM) && 161 cap->standards && bt->standards && 162 !(bt->standards & cap->standards)) || 163 (bt->interlaced && !(caps & V4L2_DV_BT_CAP_INTERLACED)) || 164 (!bt->interlaced && !(caps & V4L2_DV_BT_CAP_PROGRESSIVE))) 165 return false; 166 167 /* sanity checks for the blanking timings */ 168 if (!bt->interlaced && 169 (bt->il_vbackporch || bt->il_vsync || bt->il_vfrontporch)) 170 return false; 171 /* 172 * Some video receivers cannot properly separate the frontporch, 173 * backporch and sync values, and instead they only have the total 174 * blanking. That can be assigned to any of these three fields. 175 * So just check that none of these are way out of range. 176 */ 177 if (bt->hfrontporch > max_hor || 178 bt->hsync > max_hor || bt->hbackporch > max_hor) 179 return false; 180 if (bt->vfrontporch > max_vert || 181 bt->vsync > max_vert || bt->vbackporch > max_vert) 182 return false; 183 if (bt->interlaced && (bt->il_vfrontporch > max_vert || 184 bt->il_vsync > max_vert || bt->il_vbackporch > max_vert)) 185 return false; 186 return fnc == NULL || fnc(t, fnc_handle); 187} 188EXPORT_SYMBOL_GPL(v4l2_valid_dv_timings); 189 190int v4l2_enum_dv_timings_cap(struct v4l2_enum_dv_timings *t, 191 const struct v4l2_dv_timings_cap *cap, 192 v4l2_check_dv_timings_fnc fnc, 193 void *fnc_handle) 194{ 195 u32 i, idx; 196 197 memset(t->reserved, 0, sizeof(t->reserved)); 198 for (i = idx = 0; v4l2_dv_timings_presets[i].bt.width; i++) { 199 if (v4l2_valid_dv_timings(v4l2_dv_timings_presets + i, cap, 200 fnc, fnc_handle) && 201 idx++ == t->index) { 202 t->timings = v4l2_dv_timings_presets[i]; 203 return 0; 204 } 205 } 206 return -EINVAL; 207} 208EXPORT_SYMBOL_GPL(v4l2_enum_dv_timings_cap); 209 210bool v4l2_find_dv_timings_cap(struct v4l2_dv_timings *t, 211 const struct v4l2_dv_timings_cap *cap, 212 unsigned pclock_delta, 213 v4l2_check_dv_timings_fnc fnc, 214 void *fnc_handle) 215{ 216 int i; 217 218 if (!v4l2_valid_dv_timings(t, cap, fnc, fnc_handle)) 219 return false; 220 221 for (i = 0; v4l2_dv_timings_presets[i].bt.width; i++) { 222 if (v4l2_valid_dv_timings(v4l2_dv_timings_presets + i, cap, 223 fnc, fnc_handle) && 224 v4l2_match_dv_timings(t, v4l2_dv_timings_presets + i, 225 pclock_delta, false)) { 226 u32 flags = t->bt.flags & V4L2_DV_FL_REDUCED_FPS; 227 228 *t = v4l2_dv_timings_presets[i]; 229 if (can_reduce_fps(&t->bt)) 230 t->bt.flags |= flags; 231 232 return true; 233 } 234 } 235 return false; 236} 237EXPORT_SYMBOL_GPL(v4l2_find_dv_timings_cap); 238 239bool v4l2_find_dv_timings_cea861_vic(struct v4l2_dv_timings *t, u8 vic) 240{ 241 unsigned int i; 242 243 for (i = 0; v4l2_dv_timings_presets[i].bt.width; i++) { 244 const struct v4l2_bt_timings *bt = 245 &v4l2_dv_timings_presets[i].bt; 246 247 if ((bt->flags & V4L2_DV_FL_HAS_CEA861_VIC) && 248 bt->cea861_vic == vic) { 249 *t = v4l2_dv_timings_presets[i]; 250 return true; 251 } 252 } 253 return false; 254} 255EXPORT_SYMBOL_GPL(v4l2_find_dv_timings_cea861_vic); 256 257/** 258 * v4l2_match_dv_timings - check if two timings match 259 * @t1: compare this v4l2_dv_timings struct... 260 * @t2: with this struct. 261 * @pclock_delta: the allowed pixelclock deviation. 262 * @match_reduced_fps: if true, then fail if V4L2_DV_FL_REDUCED_FPS does not 263 * match. 264 * 265 * Compare t1 with t2 with a given margin of error for the pixelclock. 266 */ 267bool v4l2_match_dv_timings(const struct v4l2_dv_timings *t1, 268 const struct v4l2_dv_timings *t2, 269 unsigned pclock_delta, bool match_reduced_fps) 270{ 271 if (t1->type != t2->type || t1->type != V4L2_DV_BT_656_1120) 272 return false; 273 if (t1->bt.width == t2->bt.width && 274 t1->bt.height == t2->bt.height && 275 t1->bt.interlaced == t2->bt.interlaced && 276 t1->bt.polarities == t2->bt.polarities && 277 t1->bt.pixelclock >= t2->bt.pixelclock - pclock_delta && 278 t1->bt.pixelclock <= t2->bt.pixelclock + pclock_delta && 279 t1->bt.hfrontporch == t2->bt.hfrontporch && 280 t1->bt.hsync == t2->bt.hsync && 281 t1->bt.hbackporch == t2->bt.hbackporch && 282 t1->bt.vfrontporch == t2->bt.vfrontporch && 283 t1->bt.vsync == t2->bt.vsync && 284 t1->bt.vbackporch == t2->bt.vbackporch && 285 (!match_reduced_fps || 286 (t1->bt.flags & V4L2_DV_FL_REDUCED_FPS) == 287 (t2->bt.flags & V4L2_DV_FL_REDUCED_FPS)) && 288 (!t1->bt.interlaced || 289 (t1->bt.il_vfrontporch == t2->bt.il_vfrontporch && 290 t1->bt.il_vsync == t2->bt.il_vsync && 291 t1->bt.il_vbackporch == t2->bt.il_vbackporch))) 292 return true; 293 return false; 294} 295EXPORT_SYMBOL_GPL(v4l2_match_dv_timings); 296 297void v4l2_print_dv_timings(const char *dev_prefix, const char *prefix, 298 const struct v4l2_dv_timings *t, bool detailed) 299{ 300 const struct v4l2_bt_timings *bt = &t->bt; 301 u32 htot, vtot; 302 u32 fps; 303 304 if (t->type != V4L2_DV_BT_656_1120) 305 return; 306 307 htot = V4L2_DV_BT_FRAME_WIDTH(bt); 308 vtot = V4L2_DV_BT_FRAME_HEIGHT(bt); 309 if (bt->interlaced) 310 vtot /= 2; 311 312 fps = (htot * vtot) > 0 ? div_u64((100 * (u64)bt->pixelclock), 313 (htot * vtot)) : 0; 314 315 if (prefix == NULL) 316 prefix = ""; 317 318 pr_info("%s: %s%ux%u%s%u.%02u (%ux%u)\n", dev_prefix, prefix, 319 bt->width, bt->height, bt->interlaced ? "i" : "p", 320 fps / 100, fps % 100, htot, vtot); 321 322 if (!detailed) 323 return; 324 325 pr_info("%s: horizontal: fp = %u, %ssync = %u, bp = %u\n", 326 dev_prefix, bt->hfrontporch, 327 (bt->polarities & V4L2_DV_HSYNC_POS_POL) ? "+" : "-", 328 bt->hsync, bt->hbackporch); 329 pr_info("%s: vertical: fp = %u, %ssync = %u, bp = %u\n", 330 dev_prefix, bt->vfrontporch, 331 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-", 332 bt->vsync, bt->vbackporch); 333 if (bt->interlaced) 334 pr_info("%s: vertical bottom field: fp = %u, %ssync = %u, bp = %u\n", 335 dev_prefix, bt->il_vfrontporch, 336 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-", 337 bt->il_vsync, bt->il_vbackporch); 338 pr_info("%s: pixelclock: %llu\n", dev_prefix, bt->pixelclock); 339 pr_info("%s: flags (0x%x):%s%s%s%s%s%s%s%s%s%s\n", 340 dev_prefix, bt->flags, 341 (bt->flags & V4L2_DV_FL_REDUCED_BLANKING) ? 342 " REDUCED_BLANKING" : "", 343 ((bt->flags & V4L2_DV_FL_REDUCED_BLANKING) && 344 bt->vsync == 8) ? " (V2)" : "", 345 (bt->flags & V4L2_DV_FL_CAN_REDUCE_FPS) ? 346 " CAN_REDUCE_FPS" : "", 347 (bt->flags & V4L2_DV_FL_REDUCED_FPS) ? 348 " REDUCED_FPS" : "", 349 (bt->flags & V4L2_DV_FL_HALF_LINE) ? 350 " HALF_LINE" : "", 351 (bt->flags & V4L2_DV_FL_IS_CE_VIDEO) ? 352 " CE_VIDEO" : "", 353 (bt->flags & V4L2_DV_FL_FIRST_FIELD_EXTRA_LINE) ? 354 " FIRST_FIELD_EXTRA_LINE" : "", 355 (bt->flags & V4L2_DV_FL_HAS_PICTURE_ASPECT) ? 356 " HAS_PICTURE_ASPECT" : "", 357 (bt->flags & V4L2_DV_FL_HAS_CEA861_VIC) ? 358 " HAS_CEA861_VIC" : "", 359 (bt->flags & V4L2_DV_FL_HAS_HDMI_VIC) ? 360 " HAS_HDMI_VIC" : ""); 361 pr_info("%s: standards (0x%x):%s%s%s%s%s\n", dev_prefix, bt->standards, 362 (bt->standards & V4L2_DV_BT_STD_CEA861) ? " CEA" : "", 363 (bt->standards & V4L2_DV_BT_STD_DMT) ? " DMT" : "", 364 (bt->standards & V4L2_DV_BT_STD_CVT) ? " CVT" : "", 365 (bt->standards & V4L2_DV_BT_STD_GTF) ? " GTF" : "", 366 (bt->standards & V4L2_DV_BT_STD_SDI) ? " SDI" : ""); 367 if (bt->flags & V4L2_DV_FL_HAS_PICTURE_ASPECT) 368 pr_info("%s: picture aspect (hor:vert): %u:%u\n", dev_prefix, 369 bt->picture_aspect.numerator, 370 bt->picture_aspect.denominator); 371 if (bt->flags & V4L2_DV_FL_HAS_CEA861_VIC) 372 pr_info("%s: CEA-861 VIC: %u\n", dev_prefix, bt->cea861_vic); 373 if (bt->flags & V4L2_DV_FL_HAS_HDMI_VIC) 374 pr_info("%s: HDMI VIC: %u\n", dev_prefix, bt->hdmi_vic); 375} 376EXPORT_SYMBOL_GPL(v4l2_print_dv_timings); 377 378struct v4l2_fract v4l2_dv_timings_aspect_ratio(const struct v4l2_dv_timings *t) 379{ 380 struct v4l2_fract ratio = { 1, 1 }; 381 unsigned long n, d; 382 383 if (t->type != V4L2_DV_BT_656_1120) 384 return ratio; 385 if (!(t->bt.flags & V4L2_DV_FL_HAS_PICTURE_ASPECT)) 386 return ratio; 387 388 ratio.numerator = t->bt.width * t->bt.picture_aspect.denominator; 389 ratio.denominator = t->bt.height * t->bt.picture_aspect.numerator; 390 391 rational_best_approximation(ratio.numerator, ratio.denominator, 392 ratio.numerator, ratio.denominator, &n, &d); 393 ratio.numerator = n; 394 ratio.denominator = d; 395 return ratio; 396} 397EXPORT_SYMBOL_GPL(v4l2_dv_timings_aspect_ratio); 398 399/** v4l2_calc_timeperframe - helper function to calculate timeperframe based 400 * v4l2_dv_timings fields. 401 * @t - Timings for the video mode. 402 * 403 * Calculates the expected timeperframe using the pixel clock value and 404 * horizontal/vertical measures. This means that v4l2_dv_timings structure 405 * must be correctly and fully filled. 406 */ 407struct v4l2_fract v4l2_calc_timeperframe(const struct v4l2_dv_timings *t) 408{ 409 const struct v4l2_bt_timings *bt = &t->bt; 410 struct v4l2_fract fps_fract = { 1, 1 }; 411 unsigned long n, d; 412 u32 htot, vtot, fps; 413 u64 pclk; 414 415 if (t->type != V4L2_DV_BT_656_1120) 416 return fps_fract; 417 418 htot = V4L2_DV_BT_FRAME_WIDTH(bt); 419 vtot = V4L2_DV_BT_FRAME_HEIGHT(bt); 420 pclk = bt->pixelclock; 421 422 if ((bt->flags & V4L2_DV_FL_CAN_DETECT_REDUCED_FPS) && 423 (bt->flags & V4L2_DV_FL_REDUCED_FPS)) 424 pclk = div_u64(pclk * 1000ULL, 1001); 425 426 fps = (htot * vtot) > 0 ? div_u64((100 * pclk), (htot * vtot)) : 0; 427 if (!fps) 428 return fps_fract; 429 430 rational_best_approximation(fps, 100, fps, 100, &n, &d); 431 432 fps_fract.numerator = d; 433 fps_fract.denominator = n; 434 return fps_fract; 435} 436EXPORT_SYMBOL_GPL(v4l2_calc_timeperframe); 437 438/* 439 * CVT defines 440 * Based on Coordinated Video Timings Standard 441 * version 1.1 September 10, 2003 442 */ 443 444#define CVT_PXL_CLK_GRAN 250000 /* pixel clock granularity */ 445#define CVT_PXL_CLK_GRAN_RB_V2 1000 /* granularity for reduced blanking v2*/ 446 447/* Normal blanking */ 448#define CVT_MIN_V_BPORCH 7 /* lines */ 449#define CVT_MIN_V_PORCH_RND 3 /* lines */ 450#define CVT_MIN_VSYNC_BP 550 /* min time of vsync + back porch (us) */ 451#define CVT_HSYNC_PERCENT 8 /* nominal hsync as percentage of line */ 452 453/* Normal blanking for CVT uses GTF to calculate horizontal blanking */ 454#define CVT_CELL_GRAN 8 /* character cell granularity */ 455#define CVT_M 600 /* blanking formula gradient */ 456#define CVT_C 40 /* blanking formula offset */ 457#define CVT_K 128 /* blanking formula scaling factor */ 458#define CVT_J 20 /* blanking formula scaling factor */ 459#define CVT_C_PRIME (((CVT_C - CVT_J) * CVT_K / 256) + CVT_J) 460#define CVT_M_PRIME (CVT_K * CVT_M / 256) 461 462/* Reduced Blanking */ 463#define CVT_RB_MIN_V_BPORCH 7 /* lines */ 464#define CVT_RB_V_FPORCH 3 /* lines */ 465#define CVT_RB_MIN_V_BLANK 460 /* us */ 466#define CVT_RB_H_SYNC 32 /* pixels */ 467#define CVT_RB_H_BLANK 160 /* pixels */ 468/* Reduce blanking Version 2 */ 469#define CVT_RB_V2_H_BLANK 80 /* pixels */ 470#define CVT_RB_MIN_V_FPORCH 3 /* lines */ 471#define CVT_RB_V2_MIN_V_FPORCH 1 /* lines */ 472#define CVT_RB_V_BPORCH 6 /* lines */ 473 474/** v4l2_detect_cvt - detect if the given timings follow the CVT standard 475 * @frame_height - the total height of the frame (including blanking) in lines. 476 * @hfreq - the horizontal frequency in Hz. 477 * @vsync - the height of the vertical sync in lines. 478 * @active_width - active width of image (does not include blanking). This 479 * information is needed only in case of version 2 of reduced blanking. 480 * In other cases, this parameter does not have any effect on timings. 481 * @polarities - the horizontal and vertical polarities (same as struct 482 * v4l2_bt_timings polarities). 483 * @interlaced - if this flag is true, it indicates interlaced format 484 * @cap - the v4l2_dv_timings_cap capabilities. 485 * @timings - the resulting timings. 486 * 487 * This function will attempt to detect if the given values correspond to a 488 * valid CVT format. If so, then it will return true, and fmt will be filled 489 * in with the found CVT timings. 490 */ 491bool v4l2_detect_cvt(unsigned int frame_height, 492 unsigned int hfreq, 493 unsigned int vsync, 494 unsigned int active_width, 495 u32 polarities, 496 bool interlaced, 497 const struct v4l2_dv_timings_cap *cap, 498 struct v4l2_dv_timings *timings) 499{ 500 struct v4l2_dv_timings t = {}; 501 int v_fp, v_bp, h_fp, h_bp, hsync; 502 int frame_width, image_height, image_width; 503 bool reduced_blanking; 504 bool rb_v2 = false; 505 unsigned int pix_clk; 506 507 if (vsync < 4 || vsync > 8) 508 return false; 509 510 if (polarities == V4L2_DV_VSYNC_POS_POL) 511 reduced_blanking = false; 512 else if (polarities == V4L2_DV_HSYNC_POS_POL) 513 reduced_blanking = true; 514 else 515 return false; 516 517 if (reduced_blanking && vsync == 8) 518 rb_v2 = true; 519 520 if (rb_v2 && active_width == 0) 521 return false; 522 523 if (!rb_v2 && vsync > 7) 524 return false; 525 526 if (hfreq == 0) 527 return false; 528 529 /* Vertical */ 530 if (reduced_blanking) { 531 if (rb_v2) { 532 v_bp = CVT_RB_V_BPORCH; 533 v_fp = (CVT_RB_MIN_V_BLANK * hfreq) / 1000000 + 1; 534 v_fp -= vsync + v_bp; 535 536 if (v_fp < CVT_RB_V2_MIN_V_FPORCH) 537 v_fp = CVT_RB_V2_MIN_V_FPORCH; 538 } else { 539 v_fp = CVT_RB_V_FPORCH; 540 v_bp = (CVT_RB_MIN_V_BLANK * hfreq) / 1000000 + 1; 541 v_bp -= vsync + v_fp; 542 543 if (v_bp < CVT_RB_MIN_V_BPORCH) 544 v_bp = CVT_RB_MIN_V_BPORCH; 545 } 546 } else { 547 v_fp = CVT_MIN_V_PORCH_RND; 548 v_bp = (CVT_MIN_VSYNC_BP * hfreq) / 1000000 + 1 - vsync; 549 550 if (v_bp < CVT_MIN_V_BPORCH) 551 v_bp = CVT_MIN_V_BPORCH; 552 } 553 554 if (interlaced) 555 image_height = (frame_height - 2 * v_fp - 2 * vsync - 2 * v_bp) & ~0x1; 556 else 557 image_height = (frame_height - v_fp - vsync - v_bp + 1) & ~0x1; 558 559 if (image_height < 0) 560 return false; 561 562 /* Aspect ratio based on vsync */ 563 switch (vsync) { 564 case 4: 565 image_width = (image_height * 4) / 3; 566 break; 567 case 5: 568 image_width = (image_height * 16) / 9; 569 break; 570 case 6: 571 image_width = (image_height * 16) / 10; 572 break; 573 case 7: 574 /* special case */ 575 if (image_height == 1024) 576 image_width = (image_height * 5) / 4; 577 else if (image_height == 768) 578 image_width = (image_height * 15) / 9; 579 else 580 return false; 581 break; 582 case 8: 583 image_width = active_width; 584 break; 585 default: 586 return false; 587 } 588 589 if (!rb_v2) 590 image_width = image_width & ~7; 591 592 /* Horizontal */ 593 if (reduced_blanking) { 594 int h_blank; 595 int clk_gran; 596 597 h_blank = rb_v2 ? CVT_RB_V2_H_BLANK : CVT_RB_H_BLANK; 598 clk_gran = rb_v2 ? CVT_PXL_CLK_GRAN_RB_V2 : CVT_PXL_CLK_GRAN; 599 600 pix_clk = (image_width + h_blank) * hfreq; 601 pix_clk = (pix_clk / clk_gran) * clk_gran; 602 603 h_bp = h_blank / 2; 604 hsync = CVT_RB_H_SYNC; 605 h_fp = h_blank - h_bp - hsync; 606 607 frame_width = image_width + h_blank; 608 } else { 609 unsigned ideal_duty_cycle_per_myriad = 610 100 * CVT_C_PRIME - (CVT_M_PRIME * 100000) / hfreq; 611 int h_blank; 612 613 if (ideal_duty_cycle_per_myriad < 2000) 614 ideal_duty_cycle_per_myriad = 2000; 615 616 h_blank = image_width * ideal_duty_cycle_per_myriad / 617 (10000 - ideal_duty_cycle_per_myriad); 618 h_blank = (h_blank / (2 * CVT_CELL_GRAN)) * 2 * CVT_CELL_GRAN; 619 620 pix_clk = (image_width + h_blank) * hfreq; 621 pix_clk = (pix_clk / CVT_PXL_CLK_GRAN) * CVT_PXL_CLK_GRAN; 622 623 h_bp = h_blank / 2; 624 frame_width = image_width + h_blank; 625 626 hsync = frame_width * CVT_HSYNC_PERCENT / 100; 627 hsync = (hsync / CVT_CELL_GRAN) * CVT_CELL_GRAN; 628 h_fp = h_blank - hsync - h_bp; 629 } 630 631 t.type = V4L2_DV_BT_656_1120; 632 t.bt.polarities = polarities; 633 t.bt.width = image_width; 634 t.bt.height = image_height; 635 t.bt.hfrontporch = h_fp; 636 t.bt.vfrontporch = v_fp; 637 t.bt.hsync = hsync; 638 t.bt.vsync = vsync; 639 t.bt.hbackporch = frame_width - image_width - h_fp - hsync; 640 641 if (!interlaced) { 642 t.bt.vbackporch = frame_height - image_height - v_fp - vsync; 643 t.bt.interlaced = V4L2_DV_PROGRESSIVE; 644 } else { 645 t.bt.vbackporch = (frame_height - image_height - 2 * v_fp - 646 2 * vsync) / 2; 647 t.bt.il_vbackporch = frame_height - image_height - 2 * v_fp - 648 2 * vsync - t.bt.vbackporch; 649 t.bt.il_vfrontporch = v_fp; 650 t.bt.il_vsync = vsync; 651 t.bt.flags |= V4L2_DV_FL_HALF_LINE; 652 t.bt.interlaced = V4L2_DV_INTERLACED; 653 } 654 655 t.bt.pixelclock = pix_clk; 656 t.bt.standards = V4L2_DV_BT_STD_CVT; 657 658 if (reduced_blanking) 659 t.bt.flags |= V4L2_DV_FL_REDUCED_BLANKING; 660 661 if (!v4l2_valid_dv_timings(&t, cap, NULL, NULL)) 662 return false; 663 *timings = t; 664 return true; 665} 666EXPORT_SYMBOL_GPL(v4l2_detect_cvt); 667 668/* 669 * GTF defines 670 * Based on Generalized Timing Formula Standard 671 * Version 1.1 September 2, 1999 672 */ 673 674#define GTF_PXL_CLK_GRAN 250000 /* pixel clock granularity */ 675 676#define GTF_MIN_VSYNC_BP 550 /* min time of vsync + back porch (us) */ 677#define GTF_V_FP 1 /* vertical front porch (lines) */ 678#define GTF_CELL_GRAN 8 /* character cell granularity */ 679 680/* Default */ 681#define GTF_D_M 600 /* blanking formula gradient */ 682#define GTF_D_C 40 /* blanking formula offset */ 683#define GTF_D_K 128 /* blanking formula scaling factor */ 684#define GTF_D_J 20 /* blanking formula scaling factor */ 685#define GTF_D_C_PRIME ((((GTF_D_C - GTF_D_J) * GTF_D_K) / 256) + GTF_D_J) 686#define GTF_D_M_PRIME ((GTF_D_K * GTF_D_M) / 256) 687 688/* Secondary */ 689#define GTF_S_M 3600 /* blanking formula gradient */ 690#define GTF_S_C 40 /* blanking formula offset */ 691#define GTF_S_K 128 /* blanking formula scaling factor */ 692#define GTF_S_J 35 /* blanking formula scaling factor */ 693#define GTF_S_C_PRIME ((((GTF_S_C - GTF_S_J) * GTF_S_K) / 256) + GTF_S_J) 694#define GTF_S_M_PRIME ((GTF_S_K * GTF_S_M) / 256) 695 696/** v4l2_detect_gtf - detect if the given timings follow the GTF standard 697 * @frame_height - the total height of the frame (including blanking) in lines. 698 * @hfreq - the horizontal frequency in Hz. 699 * @vsync - the height of the vertical sync in lines. 700 * @polarities - the horizontal and vertical polarities (same as struct 701 * v4l2_bt_timings polarities). 702 * @interlaced - if this flag is true, it indicates interlaced format 703 * @aspect - preferred aspect ratio. GTF has no method of determining the 704 * aspect ratio in order to derive the image width from the 705 * image height, so it has to be passed explicitly. Usually 706 * the native screen aspect ratio is used for this. If it 707 * is not filled in correctly, then 16:9 will be assumed. 708 * @cap - the v4l2_dv_timings_cap capabilities. 709 * @timings - the resulting timings. 710 * 711 * This function will attempt to detect if the given values correspond to a 712 * valid GTF format. If so, then it will return true, and fmt will be filled 713 * in with the found GTF timings. 714 */ 715bool v4l2_detect_gtf(unsigned int frame_height, 716 unsigned int hfreq, 717 unsigned int vsync, 718 u32 polarities, 719 bool interlaced, 720 struct v4l2_fract aspect, 721 const struct v4l2_dv_timings_cap *cap, 722 struct v4l2_dv_timings *timings) 723{ 724 struct v4l2_dv_timings t = {}; 725 int pix_clk; 726 int v_fp, v_bp, h_fp, hsync; 727 int frame_width, image_height, image_width; 728 bool default_gtf; 729 int h_blank; 730 731 if (vsync != 3) 732 return false; 733 734 if (polarities == V4L2_DV_VSYNC_POS_POL) 735 default_gtf = true; 736 else if (polarities == V4L2_DV_HSYNC_POS_POL) 737 default_gtf = false; 738 else 739 return false; 740 741 if (hfreq == 0) 742 return false; 743 744 /* Vertical */ 745 v_fp = GTF_V_FP; 746 v_bp = (GTF_MIN_VSYNC_BP * hfreq + 500000) / 1000000 - vsync; 747 if (interlaced) 748 image_height = (frame_height - 2 * v_fp - 2 * vsync - 2 * v_bp) & ~0x1; 749 else 750 image_height = (frame_height - v_fp - vsync - v_bp + 1) & ~0x1; 751 752 if (image_height < 0) 753 return false; 754 755 if (aspect.numerator == 0 || aspect.denominator == 0) { 756 aspect.numerator = 16; 757 aspect.denominator = 9; 758 } 759 image_width = ((image_height * aspect.numerator) / aspect.denominator); 760 image_width = (image_width + GTF_CELL_GRAN/2) & ~(GTF_CELL_GRAN - 1); 761 762 /* Horizontal */ 763 if (default_gtf) { 764 u64 num; 765 u32 den; 766 767 num = (((u64)image_width * GTF_D_C_PRIME * hfreq) - 768 ((u64)image_width * GTF_D_M_PRIME * 1000)); 769 den = (hfreq * (100 - GTF_D_C_PRIME) + GTF_D_M_PRIME * 1000) * 770 (2 * GTF_CELL_GRAN); 771 h_blank = div_u64((num + (den >> 1)), den); 772 h_blank *= (2 * GTF_CELL_GRAN); 773 } else { 774 u64 num; 775 u32 den; 776 777 num = (((u64)image_width * GTF_S_C_PRIME * hfreq) - 778 ((u64)image_width * GTF_S_M_PRIME * 1000)); 779 den = (hfreq * (100 - GTF_S_C_PRIME) + GTF_S_M_PRIME * 1000) * 780 (2 * GTF_CELL_GRAN); 781 h_blank = div_u64((num + (den >> 1)), den); 782 h_blank *= (2 * GTF_CELL_GRAN); 783 } 784 785 frame_width = image_width + h_blank; 786 787 pix_clk = (image_width + h_blank) * hfreq; 788 pix_clk = pix_clk / GTF_PXL_CLK_GRAN * GTF_PXL_CLK_GRAN; 789 790 hsync = (frame_width * 8 + 50) / 100; 791 hsync = DIV_ROUND_CLOSEST(hsync, GTF_CELL_GRAN) * GTF_CELL_GRAN; 792 793 h_fp = h_blank / 2 - hsync; 794 795 t.type = V4L2_DV_BT_656_1120; 796 t.bt.polarities = polarities; 797 t.bt.width = image_width; 798 t.bt.height = image_height; 799 t.bt.hfrontporch = h_fp; 800 t.bt.vfrontporch = v_fp; 801 t.bt.hsync = hsync; 802 t.bt.vsync = vsync; 803 t.bt.hbackporch = frame_width - image_width - h_fp - hsync; 804 805 if (!interlaced) { 806 t.bt.vbackporch = frame_height - image_height - v_fp - vsync; 807 t.bt.interlaced = V4L2_DV_PROGRESSIVE; 808 } else { 809 t.bt.vbackporch = (frame_height - image_height - 2 * v_fp - 810 2 * vsync) / 2; 811 t.bt.il_vbackporch = frame_height - image_height - 2 * v_fp - 812 2 * vsync - t.bt.vbackporch; 813 t.bt.il_vfrontporch = v_fp; 814 t.bt.il_vsync = vsync; 815 t.bt.flags |= V4L2_DV_FL_HALF_LINE; 816 t.bt.interlaced = V4L2_DV_INTERLACED; 817 } 818 819 t.bt.pixelclock = pix_clk; 820 t.bt.standards = V4L2_DV_BT_STD_GTF; 821 822 if (!default_gtf) 823 t.bt.flags |= V4L2_DV_FL_REDUCED_BLANKING; 824 825 if (!v4l2_valid_dv_timings(&t, cap, NULL, NULL)) 826 return false; 827 *timings = t; 828 return true; 829} 830EXPORT_SYMBOL_GPL(v4l2_detect_gtf); 831 832/** v4l2_calc_aspect_ratio - calculate the aspect ratio based on bytes 833 * 0x15 and 0x16 from the EDID. 834 * @hor_landscape - byte 0x15 from the EDID. 835 * @vert_portrait - byte 0x16 from the EDID. 836 * 837 * Determines the aspect ratio from the EDID. 838 * See VESA Enhanced EDID standard, release A, rev 2, section 3.6.2: 839 * "Horizontal and Vertical Screen Size or Aspect Ratio" 840 */ 841struct v4l2_fract v4l2_calc_aspect_ratio(u8 hor_landscape, u8 vert_portrait) 842{ 843 struct v4l2_fract aspect = { 16, 9 }; 844 u8 ratio; 845 846 /* Nothing filled in, fallback to 16:9 */ 847 if (!hor_landscape && !vert_portrait) 848 return aspect; 849 /* Both filled in, so they are interpreted as the screen size in cm */ 850 if (hor_landscape && vert_portrait) { 851 aspect.numerator = hor_landscape; 852 aspect.denominator = vert_portrait; 853 return aspect; 854 } 855 /* Only one is filled in, so interpret them as a ratio: 856 (val + 99) / 100 */ 857 ratio = hor_landscape | vert_portrait; 858 /* Change some rounded values into the exact aspect ratio */ 859 if (ratio == 79) { 860 aspect.numerator = 16; 861 aspect.denominator = 9; 862 } else if (ratio == 34) { 863 aspect.numerator = 4; 864 aspect.denominator = 3; 865 } else if (ratio == 68) { 866 aspect.numerator = 15; 867 aspect.denominator = 9; 868 } else { 869 aspect.numerator = hor_landscape + 99; 870 aspect.denominator = 100; 871 } 872 if (hor_landscape) 873 return aspect; 874 /* The aspect ratio is for portrait, so swap numerator and denominator */ 875 swap(aspect.denominator, aspect.numerator); 876 return aspect; 877} 878EXPORT_SYMBOL_GPL(v4l2_calc_aspect_ratio); 879 880/** v4l2_hdmi_rx_colorimetry - determine HDMI colorimetry information 881 * based on various InfoFrames. 882 * @avi: the AVI InfoFrame 883 * @hdmi: the HDMI Vendor InfoFrame, may be NULL 884 * @height: the frame height 885 * 886 * Determines the HDMI colorimetry information, i.e. how the HDMI 887 * pixel color data should be interpreted. 888 * 889 * Note that some of the newer features (DCI-P3, HDR) are not yet 890 * implemented: the hdmi.h header needs to be updated to the HDMI 2.0 891 * and CTA-861-G standards. 892 */ 893struct v4l2_hdmi_colorimetry 894v4l2_hdmi_rx_colorimetry(const struct hdmi_avi_infoframe *avi, 895 const struct hdmi_vendor_infoframe *hdmi, 896 unsigned int height) 897{ 898 struct v4l2_hdmi_colorimetry c = { 899 V4L2_COLORSPACE_SRGB, 900 V4L2_YCBCR_ENC_DEFAULT, 901 V4L2_QUANTIZATION_FULL_RANGE, 902 V4L2_XFER_FUNC_SRGB 903 }; 904 bool is_ce = avi->video_code || (hdmi && hdmi->vic); 905 bool is_sdtv = height <= 576; 906 bool default_is_lim_range_rgb = avi->video_code > 1; 907 908 switch (avi->colorspace) { 909 case HDMI_COLORSPACE_RGB: 910 /* RGB pixel encoding */ 911 switch (avi->colorimetry) { 912 case HDMI_COLORIMETRY_EXTENDED: 913 switch (avi->extended_colorimetry) { 914 case HDMI_EXTENDED_COLORIMETRY_OPRGB: 915 c.colorspace = V4L2_COLORSPACE_OPRGB; 916 c.xfer_func = V4L2_XFER_FUNC_OPRGB; 917 break; 918 case HDMI_EXTENDED_COLORIMETRY_BT2020: 919 c.colorspace = V4L2_COLORSPACE_BT2020; 920 c.xfer_func = V4L2_XFER_FUNC_709; 921 break; 922 default: 923 break; 924 } 925 break; 926 default: 927 break; 928 } 929 switch (avi->quantization_range) { 930 case HDMI_QUANTIZATION_RANGE_LIMITED: 931 c.quantization = V4L2_QUANTIZATION_LIM_RANGE; 932 break; 933 case HDMI_QUANTIZATION_RANGE_FULL: 934 break; 935 default: 936 if (default_is_lim_range_rgb) 937 c.quantization = V4L2_QUANTIZATION_LIM_RANGE; 938 break; 939 } 940 break; 941 942 default: 943 /* YCbCr pixel encoding */ 944 c.quantization = V4L2_QUANTIZATION_LIM_RANGE; 945 switch (avi->colorimetry) { 946 case HDMI_COLORIMETRY_NONE: 947 if (!is_ce) 948 break; 949 if (is_sdtv) { 950 c.colorspace = V4L2_COLORSPACE_SMPTE170M; 951 c.ycbcr_enc = V4L2_YCBCR_ENC_601; 952 } else { 953 c.colorspace = V4L2_COLORSPACE_REC709; 954 c.ycbcr_enc = V4L2_YCBCR_ENC_709; 955 } 956 c.xfer_func = V4L2_XFER_FUNC_709; 957 break; 958 case HDMI_COLORIMETRY_ITU_601: 959 c.colorspace = V4L2_COLORSPACE_SMPTE170M; 960 c.ycbcr_enc = V4L2_YCBCR_ENC_601; 961 c.xfer_func = V4L2_XFER_FUNC_709; 962 break; 963 case HDMI_COLORIMETRY_ITU_709: 964 c.colorspace = V4L2_COLORSPACE_REC709; 965 c.ycbcr_enc = V4L2_YCBCR_ENC_709; 966 c.xfer_func = V4L2_XFER_FUNC_709; 967 break; 968 case HDMI_COLORIMETRY_EXTENDED: 969 switch (avi->extended_colorimetry) { 970 case HDMI_EXTENDED_COLORIMETRY_XV_YCC_601: 971 c.colorspace = V4L2_COLORSPACE_REC709; 972 c.ycbcr_enc = V4L2_YCBCR_ENC_XV709; 973 c.xfer_func = V4L2_XFER_FUNC_709; 974 break; 975 case HDMI_EXTENDED_COLORIMETRY_XV_YCC_709: 976 c.colorspace = V4L2_COLORSPACE_REC709; 977 c.ycbcr_enc = V4L2_YCBCR_ENC_XV601; 978 c.xfer_func = V4L2_XFER_FUNC_709; 979 break; 980 case HDMI_EXTENDED_COLORIMETRY_S_YCC_601: 981 c.colorspace = V4L2_COLORSPACE_SRGB; 982 c.ycbcr_enc = V4L2_YCBCR_ENC_601; 983 c.xfer_func = V4L2_XFER_FUNC_SRGB; 984 break; 985 case HDMI_EXTENDED_COLORIMETRY_OPYCC_601: 986 c.colorspace = V4L2_COLORSPACE_OPRGB; 987 c.ycbcr_enc = V4L2_YCBCR_ENC_601; 988 c.xfer_func = V4L2_XFER_FUNC_OPRGB; 989 break; 990 case HDMI_EXTENDED_COLORIMETRY_BT2020: 991 c.colorspace = V4L2_COLORSPACE_BT2020; 992 c.ycbcr_enc = V4L2_YCBCR_ENC_BT2020; 993 c.xfer_func = V4L2_XFER_FUNC_709; 994 break; 995 case HDMI_EXTENDED_COLORIMETRY_BT2020_CONST_LUM: 996 c.colorspace = V4L2_COLORSPACE_BT2020; 997 c.ycbcr_enc = V4L2_YCBCR_ENC_BT2020_CONST_LUM; 998 c.xfer_func = V4L2_XFER_FUNC_709; 999 break; 1000 default: /* fall back to ITU_709 */ 1001 c.colorspace = V4L2_COLORSPACE_REC709; 1002 c.ycbcr_enc = V4L2_YCBCR_ENC_709; 1003 c.xfer_func = V4L2_XFER_FUNC_709; 1004 break; 1005 } 1006 break; 1007 default: 1008 break; 1009 } 1010 /* 1011 * YCC Quantization Range signaling is more-or-less broken, 1012 * let's just ignore this. 1013 */ 1014 break; 1015 } 1016 return c; 1017} 1018EXPORT_SYMBOL_GPL(v4l2_hdmi_rx_colorimetry); 1019 1020/** 1021 * v4l2_num_edid_blocks() - return the number of EDID blocks 1022 * 1023 * @edid: pointer to the EDID data 1024 * @max_blocks: maximum number of supported EDID blocks 1025 * 1026 * Return: the number of EDID blocks based on the contents of the EDID. 1027 * This supports the HDMI Forum EDID Extension Override Data Block. 1028 */ 1029unsigned int v4l2_num_edid_blocks(const u8 *edid, unsigned int max_blocks) 1030{ 1031 unsigned int blocks; 1032 1033 if (!edid || !max_blocks) 1034 return 0; 1035 1036 // The number of extension blocks is recorded at byte 126 of the 1037 // first 128-byte block in the EDID. 1038 // 1039 // If there is an HDMI Forum EDID Extension Override Data Block 1040 // present, then it is in bytes 4-6 of the first CTA-861 extension 1041 // block of the EDID. 1042 blocks = edid[126] + 1; 1043 // Check for HDMI Forum EDID Extension Override Data Block 1044 if (blocks >= 2 && // The EDID must be at least 2 blocks 1045 max_blocks >= 3 && // The caller supports at least 3 blocks 1046 edid[128] == 2 && // The first extension block is type CTA-861 1047 edid[133] == 0x78 && // Identifier for the EEODB 1048 (edid[132] & 0xe0) == 0xe0 && // Tag Code == 7 1049 (edid[132] & 0x1f) >= 2 && // Length >= 2 1050 edid[134] > 1) // Number of extension blocks is sane 1051 blocks = edid[134] + 1; 1052 return blocks > max_blocks ? max_blocks : blocks; 1053} 1054EXPORT_SYMBOL_GPL(v4l2_num_edid_blocks); 1055 1056/** 1057 * v4l2_get_edid_phys_addr() - find and return the physical address 1058 * 1059 * @edid: pointer to the EDID data 1060 * @size: size in bytes of the EDID data 1061 * @offset: If not %NULL then the location of the physical address 1062 * bytes in the EDID will be returned here. This is set to 0 1063 * if there is no physical address found. 1064 * 1065 * Return: the physical address or CEC_PHYS_ADDR_INVALID if there is none. 1066 */ 1067u16 v4l2_get_edid_phys_addr(const u8 *edid, unsigned int size, 1068 unsigned int *offset) 1069{ 1070 unsigned int loc = cec_get_edid_spa_location(edid, size); 1071 1072 if (offset) 1073 *offset = loc; 1074 if (loc == 0) 1075 return CEC_PHYS_ADDR_INVALID; 1076 return (edid[loc] << 8) | edid[loc + 1]; 1077} 1078EXPORT_SYMBOL_GPL(v4l2_get_edid_phys_addr); 1079 1080/** 1081 * v4l2_set_edid_phys_addr() - find and set the physical address 1082 * 1083 * @edid: pointer to the EDID data 1084 * @size: size in bytes of the EDID data 1085 * @phys_addr: the new physical address 1086 * 1087 * This function finds the location of the physical address in the EDID 1088 * and fills in the given physical address and updates the checksum 1089 * at the end of the EDID block. It does nothing if the EDID doesn't 1090 * contain a physical address. 1091 */ 1092void v4l2_set_edid_phys_addr(u8 *edid, unsigned int size, u16 phys_addr) 1093{ 1094 unsigned int loc = cec_get_edid_spa_location(edid, size); 1095 u8 sum = 0; 1096 unsigned int i; 1097 1098 if (loc == 0) 1099 return; 1100 edid[loc] = phys_addr >> 8; 1101 edid[loc + 1] = phys_addr & 0xff; 1102 loc &= ~0x7f; 1103 1104 /* update the checksum */ 1105 for (i = loc; i < loc + 127; i++) 1106 sum += edid[i]; 1107 edid[i] = 256 - sum; 1108} 1109EXPORT_SYMBOL_GPL(v4l2_set_edid_phys_addr); 1110 1111/** 1112 * v4l2_phys_addr_for_input() - calculate the PA for an input 1113 * 1114 * @phys_addr: the physical address of the parent 1115 * @input: the number of the input port, must be between 1 and 15 1116 * 1117 * This function calculates a new physical address based on the input 1118 * port number. For example: 1119 * 1120 * PA = 0.0.0.0 and input = 2 becomes 2.0.0.0 1121 * 1122 * PA = 3.0.0.0 and input = 1 becomes 3.1.0.0 1123 * 1124 * PA = 3.2.1.0 and input = 5 becomes 3.2.1.5 1125 * 1126 * PA = 3.2.1.3 and input = 5 becomes f.f.f.f since it maxed out the depth. 1127 * 1128 * Return: the new physical address or CEC_PHYS_ADDR_INVALID. 1129 */ 1130u16 v4l2_phys_addr_for_input(u16 phys_addr, u8 input) 1131{ 1132 /* Check if input is sane */ 1133 if (WARN_ON(input == 0 || input > 0xf)) 1134 return CEC_PHYS_ADDR_INVALID; 1135 1136 if (phys_addr == 0) 1137 return input << 12; 1138 1139 if ((phys_addr & 0x0fff) == 0) 1140 return phys_addr | (input << 8); 1141 1142 if ((phys_addr & 0x00ff) == 0) 1143 return phys_addr | (input << 4); 1144 1145 if ((phys_addr & 0x000f) == 0) 1146 return phys_addr | input; 1147 1148 /* 1149 * All nibbles are used so no valid physical addresses can be assigned 1150 * to the input. 1151 */ 1152 return CEC_PHYS_ADDR_INVALID; 1153} 1154EXPORT_SYMBOL_GPL(v4l2_phys_addr_for_input); 1155 1156/** 1157 * v4l2_phys_addr_validate() - validate a physical address from an EDID 1158 * 1159 * @phys_addr: the physical address to validate 1160 * @parent: if not %NULL, then this is filled with the parents PA. 1161 * @port: if not %NULL, then this is filled with the input port. 1162 * 1163 * This validates a physical address as read from an EDID. If the 1164 * PA is invalid (such as 1.0.1.0 since '0' is only allowed at the end), 1165 * then it will return -EINVAL. 1166 * 1167 * The parent PA is passed into %parent and the input port is passed into 1168 * %port. For example: 1169 * 1170 * PA = 0.0.0.0: has parent 0.0.0.0 and input port 0. 1171 * 1172 * PA = 1.0.0.0: has parent 0.0.0.0 and input port 1. 1173 * 1174 * PA = 3.2.0.0: has parent 3.0.0.0 and input port 2. 1175 * 1176 * PA = f.f.f.f: has parent f.f.f.f and input port 0. 1177 * 1178 * Return: 0 if the PA is valid, -EINVAL if not. 1179 */ 1180int v4l2_phys_addr_validate(u16 phys_addr, u16 *parent, u16 *port) 1181{ 1182 int i; 1183 1184 if (parent) 1185 *parent = phys_addr; 1186 if (port) 1187 *port = 0; 1188 if (phys_addr == CEC_PHYS_ADDR_INVALID) 1189 return 0; 1190 for (i = 0; i < 16; i += 4) 1191 if (phys_addr & (0xf << i)) 1192 break; 1193 if (i == 16) 1194 return 0; 1195 if (parent) 1196 *parent = phys_addr & (0xfff0 << i); 1197 if (port) 1198 *port = (phys_addr >> i) & 0xf; 1199 for (i += 4; i < 16; i += 4) 1200 if ((phys_addr & (0xf << i)) == 0) 1201 return -EINVAL; 1202 return 0; 1203} 1204EXPORT_SYMBOL_GPL(v4l2_phys_addr_validate); 1205 1206#ifdef CONFIG_DEBUG_FS 1207 1208#define DEBUGFS_FOPS(type, flag) \ 1209static ssize_t \ 1210infoframe_read_##type(struct file *filp, \ 1211 char __user *ubuf, size_t count, loff_t *ppos) \ 1212{ \ 1213 struct v4l2_debugfs_if *infoframes = filp->private_data; \ 1214 \ 1215 return infoframes->if_read((flag), infoframes->priv, filp, \ 1216 ubuf, count, ppos); \ 1217} \ 1218 \ 1219static const struct file_operations infoframe_##type##_fops = { \ 1220 .owner = THIS_MODULE, \ 1221 .open = simple_open, \ 1222 .read = infoframe_read_##type, \ 1223} 1224 1225DEBUGFS_FOPS(avi, V4L2_DEBUGFS_IF_AVI); 1226DEBUGFS_FOPS(audio, V4L2_DEBUGFS_IF_AUDIO); 1227DEBUGFS_FOPS(spd, V4L2_DEBUGFS_IF_SPD); 1228DEBUGFS_FOPS(hdmi, V4L2_DEBUGFS_IF_HDMI); 1229DEBUGFS_FOPS(drm, V4L2_DEBUGFS_IF_DRM); 1230 1231struct v4l2_debugfs_if *v4l2_debugfs_if_alloc(struct dentry *root, u32 if_types, 1232 void *priv, 1233 v4l2_debugfs_if_read_t if_read) 1234{ 1235 struct v4l2_debugfs_if *infoframes; 1236 1237 if (IS_ERR_OR_NULL(root) || !if_types || !if_read) 1238 return NULL; 1239 1240 infoframes = kzalloc(sizeof(*infoframes), GFP_KERNEL); 1241 if (!infoframes) 1242 return NULL; 1243 1244 infoframes->if_dir = debugfs_create_dir("infoframes", root); 1245 infoframes->priv = priv; 1246 infoframes->if_read = if_read; 1247 if (if_types & V4L2_DEBUGFS_IF_AVI) 1248 debugfs_create_file("avi", 0400, infoframes->if_dir, 1249 infoframes, &infoframe_avi_fops); 1250 if (if_types & V4L2_DEBUGFS_IF_AUDIO) 1251 debugfs_create_file("audio", 0400, infoframes->if_dir, 1252 infoframes, &infoframe_audio_fops); 1253 if (if_types & V4L2_DEBUGFS_IF_SPD) 1254 debugfs_create_file("spd", 0400, infoframes->if_dir, 1255 infoframes, &infoframe_spd_fops); 1256 if (if_types & V4L2_DEBUGFS_IF_HDMI) 1257 debugfs_create_file("hdmi", 0400, infoframes->if_dir, 1258 infoframes, &infoframe_hdmi_fops); 1259 if (if_types & V4L2_DEBUGFS_IF_DRM) 1260 debugfs_create_file("hdr_drm", 0400, infoframes->if_dir, 1261 infoframes, &infoframe_drm_fops); 1262 return infoframes; 1263} 1264EXPORT_SYMBOL_GPL(v4l2_debugfs_if_alloc); 1265 1266void v4l2_debugfs_if_free(struct v4l2_debugfs_if *infoframes) 1267{ 1268 if (infoframes) { 1269 debugfs_remove_recursive(infoframes->if_dir); 1270 kfree(infoframes); 1271 } 1272} 1273EXPORT_SYMBOL_GPL(v4l2_debugfs_if_free); 1274 1275#endif
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