stk1160-reg.h

  1/* SPDX-License-Identifier: GPL-2.0-or-later */
  2/*
  3 * STK1160 driver
  4 *
  5 * Copyright (C) 2012 Ezequiel Garcia
  6 * <elezegarcia--a.t--gmail.com>
  7 *
  8 * Based on Easycap driver by R.M. Thomas
  9 *	Copyright (C) 2010 R.M. Thomas
 10 *	<rmthomas--a.t--sciolus.org>
 11 */
 12
 13/* GPIO Control */
 14#define STK1160_GCTRL			0x000
 15
 16/* Remote Wakeup Control */
 17#define STK1160_RMCTL			0x00c
 18
 19/* Power-on Strapping Data */
 20#define STK1160_POSVA			0x010
 21#define STK1160_POSV_L			0x010
 22#define STK1160_POSV_M			0x011
 23#define STK1160_POSV_H			0x012
 24#define  STK1160_POSV_L_ACDOUT		BIT(3)
 25#define  STK1160_POSV_L_ACSYNC		BIT(2)
 26
 27/*
 28 * Decoder Control Register:
 29 * This byte controls capture start/stop
 30 * with bit #7 (0x?? OR 0x80 to activate).
 31 */
 32#define STK1160_DCTRL			0x100
 33
 34/*
 35 * Decimation Control Register:
 36 * Byte 104: Horizontal Decimation Line Unit Count
 37 * Byte 105: Vertical Decimation Line Unit Count
 38 * Byte 106: Decimation Control
 39 * Bit 0 - Horizontal Decimation Control
 40 *   0 Horizontal decimation is disabled.
 41 *   1 Horizontal decimation is enabled.
 42 * Bit 1 - Decimates Half or More Column
 43 *   0 Decimates less than half from original column,
 44 *     send count unit (0x105) before each unit skipped.
 45 *   1 Decimates half or more from original column,
 46 *     skip count unit (0x105) before each unit sent.
 47 * Bit 2 - Vertical Decimation Control
 48 *   0 Vertical decimation is disabled.
 49 *   1 Vertical decimation is enabled.
 50 * Bit 3 - Vertical Greater or Equal to Half
 51 *   0 Decimates less than half from original row,
 52 *     send count unit (0x105) before each unit skipped.
 53 *   1 Decimates half or more from original row,
 54 *     skip count unit (0x105) before each unit sent.
 55 * Bit 4 - Decimation Unit
 56 *  0 Decimation will work with 2 rows or columns per unit.
 57 *  1 Decimation will work with 4 rows or columns per unit.
 58 */
 59#define STK1160_DMCTRL_H_UNITS		0x104
 60#define STK1160_DMCTRL_V_UNITS		0x105
 61#define STK1160_DMCTRL			0x106
 62#define  STK1160_H_DEC_EN		BIT(0)
 63#define  STK1160_H_DEC_MODE		BIT(1)
 64#define  STK1160_V_DEC_EN		BIT(2)
 65#define  STK1160_V_DEC_MODE		BIT(3)
 66#define  STK1160_DEC_UNIT_SIZE		BIT(4)
 67
 68/* Capture Frame Start Position */
 69#define STK116_CFSPO			0x110
 70#define STK116_CFSPO_STX_L		0x110
 71#define STK116_CFSPO_STX_H		0x111
 72#define STK116_CFSPO_STY_L		0x112
 73#define STK116_CFSPO_STY_H		0x113
 74
 75/* Capture Frame End Position */
 76#define STK116_CFEPO			0x114
 77#define STK116_CFEPO_ENX_L		0x114
 78#define STK116_CFEPO_ENX_H		0x115
 79#define STK116_CFEPO_ENY_L		0x116
 80#define STK116_CFEPO_ENY_H		0x117
 81
 82/* Serial Interface Control  */
 83#define STK1160_SICTL			0x200
 84#define STK1160_SICTL_CD		0x202
 85#define STK1160_SICTL_SDA		0x203
 86
 87/* Serial Bus Write */
 88#define STK1160_SBUSW			0x204
 89#define STK1160_SBUSW_WA		0x204
 90#define STK1160_SBUSW_WD		0x205
 91
 92/* Serial Bus Read */
 93#define STK1160_SBUSR			0x208
 94#define STK1160_SBUSR_RA		0x208
 95#define STK1160_SBUSR_RD		0x209
 96
 97/* Alternate Serial Interface Control */
 98#define STK1160_ASIC			0x2fc
 99
100/* PLL Select Options */
101#define STK1160_PLLSO			0x018
102
103/* PLL Frequency Divider */
104#define STK1160_PLLFD			0x01c
105
106/* Timing Generator */
107#define STK1160_TIGEN			0x300
108
109/* Timing Control Parameter */
110#define STK1160_TICTL			0x350
111
112/* AC97 Audio Control */
113#define STK1160_AC97CTL_0		0x500
114#define STK1160_AC97CTL_1		0x504
115#define  STK1160_AC97CTL_0_CR		BIT(1)
116#define  STK1160_AC97CTL_0_CW		BIT(2)
117
118/* Use [0:6] bits of register 0x504 to set codec command address */
119#define STK1160_AC97_ADDR		0x504
120/* Use [16:31] bits of register 0x500 to set codec command data */
121#define STK1160_AC97_CMD		0x502
122
123/* Audio I2S Interface */
124#define STK1160_I2SCTL			0x50c
125
126/* EEPROM Interface */
127#define STK1160_EEPROM_SZ		0x5f0