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ite-cir.c
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linux-6.19.14/drivers/media/rc/ite-cir.c
1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Driver for ITE Tech Inc. IT8712F/IT8512 CIR 4 * 5 * Copyright (C) 2010 Juan Jesús García de Soria <skandalfo@gmail.com> 6 * 7 * Inspired by the original lirc_it87 and lirc_ite8709 drivers, on top of the 8 * skeleton provided by the nuvoton-cir driver. 9 * 10 * The lirc_it87 driver was originally written by Hans-Gunter Lutke Uphues 11 * <hg_lu@web.de> in 2001, with enhancements by Christoph Bartelmus 12 * <lirc@bartelmus.de>, Andrew Calkin <r_tay@hotmail.com> and James Edwards 13 * <jimbo-lirc@edwardsclan.net>. 14 * 15 * The lirc_ite8709 driver was written by Grégory Lardière 16 * <spmf2004-lirc@yahoo.fr> in 2008. 17 */ 18 19#include <linux/kernel.h> 20#include <linux/module.h> 21#include <linux/pnp.h> 22#include <linux/io.h> 23#include <linux/interrupt.h> 24#include <linux/sched.h> 25#include <linux/delay.h> 26#include <linux/slab.h> 27#include <linux/input.h> 28#include <linux/bitops.h> 29#include <media/rc-core.h> 30#include <linux/pci_ids.h> 31 32#include "ite-cir.h" 33 34/* module parameters */ 35 36/* default sample period */ 37static long sample_period = NSEC_PER_SEC / 115200; 38module_param(sample_period, long, S_IRUGO | S_IWUSR); 39MODULE_PARM_DESC(sample_period, "sample period"); 40 41/* override detected model id */ 42static int model_number = -1; 43module_param(model_number, int, S_IRUGO | S_IWUSR); 44MODULE_PARM_DESC(model_number, "Use this model number, don't autodetect"); 45 46 47/* HW-independent code functions */ 48 49/* check whether carrier frequency is high frequency */ 50static inline bool ite_is_high_carrier_freq(unsigned int freq) 51{ 52 return freq >= ITE_HCF_MIN_CARRIER_FREQ; 53} 54 55/* get the bits required to program the carrier frequency in CFQ bits, 56 * unshifted */ 57static u8 ite_get_carrier_freq_bits(unsigned int freq) 58{ 59 if (ite_is_high_carrier_freq(freq)) { 60 if (freq < 425000) 61 return ITE_CFQ_400; 62 63 else if (freq < 465000) 64 return ITE_CFQ_450; 65 66 else if (freq < 490000) 67 return ITE_CFQ_480; 68 69 else 70 return ITE_CFQ_500; 71 } else { 72 /* trim to limits */ 73 if (freq < ITE_LCF_MIN_CARRIER_FREQ) 74 freq = ITE_LCF_MIN_CARRIER_FREQ; 75 if (freq > ITE_LCF_MAX_CARRIER_FREQ) 76 freq = ITE_LCF_MAX_CARRIER_FREQ; 77 78 /* convert to kHz and subtract the base freq */ 79 freq = DIV_ROUND_CLOSEST(freq - ITE_LCF_MIN_CARRIER_FREQ, 1000); 80 81 return (u8) freq; 82 } 83} 84 85/* get the bits required to program the pulse with in TXMPW */ 86static u8 ite_get_pulse_width_bits(unsigned int freq, int duty_cycle) 87{ 88 unsigned long period_ns, on_ns; 89 90 /* sanitize freq into range */ 91 if (freq < ITE_LCF_MIN_CARRIER_FREQ) 92 freq = ITE_LCF_MIN_CARRIER_FREQ; 93 if (freq > ITE_HCF_MAX_CARRIER_FREQ) 94 freq = ITE_HCF_MAX_CARRIER_FREQ; 95 96 period_ns = 1000000000UL / freq; 97 on_ns = period_ns * duty_cycle / 100; 98 99 if (ite_is_high_carrier_freq(freq)) { 100 if (on_ns < 750) 101 return ITE_TXMPW_A; 102 103 else if (on_ns < 850) 104 return ITE_TXMPW_B; 105 106 else if (on_ns < 950) 107 return ITE_TXMPW_C; 108 109 else if (on_ns < 1080) 110 return ITE_TXMPW_D; 111 112 else 113 return ITE_TXMPW_E; 114 } else { 115 if (on_ns < 6500) 116 return ITE_TXMPW_A; 117 118 else if (on_ns < 7850) 119 return ITE_TXMPW_B; 120 121 else if (on_ns < 9650) 122 return ITE_TXMPW_C; 123 124 else if (on_ns < 11950) 125 return ITE_TXMPW_D; 126 127 else 128 return ITE_TXMPW_E; 129 } 130} 131 132/* decode raw bytes as received by the hardware, and push them to the ir-core 133 * layer */ 134static void ite_decode_bytes(struct ite_dev *dev, const u8 * data, int 135 length) 136{ 137 unsigned long *ldata; 138 unsigned int next_one, next_zero, size; 139 struct ir_raw_event ev = {}; 140 141 if (length == 0) 142 return; 143 144 ldata = (unsigned long *)data; 145 size = length << 3; 146 next_one = find_next_bit_le(ldata, size, 0); 147 if (next_one > 0) { 148 ev.pulse = true; 149 ev.duration = ITE_BITS_TO_US(next_one, sample_period); 150 ir_raw_event_store_with_filter(dev->rdev, &ev); 151 } 152 153 while (next_one < size) { 154 next_zero = find_next_zero_bit_le(ldata, size, next_one + 1); 155 ev.pulse = false; 156 ev.duration = ITE_BITS_TO_US(next_zero - next_one, sample_period); 157 ir_raw_event_store_with_filter(dev->rdev, &ev); 158 159 if (next_zero < size) { 160 next_one = find_next_bit_le(ldata, size, next_zero + 1); 161 ev.pulse = true; 162 ev.duration = ITE_BITS_TO_US(next_one - next_zero, 163 sample_period); 164 ir_raw_event_store_with_filter(dev->rdev, &ev); 165 } else 166 next_one = size; 167 } 168 169 ir_raw_event_handle(dev->rdev); 170 171 dev_dbg(&dev->rdev->dev, "decoded %d bytes\n", length); 172} 173 174/* set all the rx/tx carrier parameters; this must be called with the device 175 * spinlock held */ 176static void ite_set_carrier_params(struct ite_dev *dev) 177{ 178 unsigned int freq, low_freq, high_freq; 179 int allowance; 180 bool use_demodulator; 181 bool for_tx = dev->transmitting; 182 183 if (for_tx) { 184 /* we don't need no stinking calculations */ 185 freq = dev->tx_carrier_freq; 186 allowance = ITE_RXDCR_DEFAULT; 187 use_demodulator = false; 188 } else { 189 low_freq = dev->rx_low_carrier_freq; 190 high_freq = dev->rx_high_carrier_freq; 191 192 if (low_freq == 0) { 193 /* don't demodulate */ 194 freq = ITE_DEFAULT_CARRIER_FREQ; 195 allowance = ITE_RXDCR_DEFAULT; 196 use_demodulator = false; 197 } else { 198 /* calculate the middle freq */ 199 freq = (low_freq + high_freq) / 2; 200 201 /* calculate the allowance */ 202 allowance = 203 DIV_ROUND_CLOSEST(10000 * (high_freq - low_freq), 204 ITE_RXDCR_PER_10000_STEP 205 * (high_freq + low_freq)); 206 207 if (allowance < 1) 208 allowance = 1; 209 210 if (allowance > ITE_RXDCR_MAX) 211 allowance = ITE_RXDCR_MAX; 212 213 use_demodulator = true; 214 } 215 } 216 217 /* set the carrier parameters in a device-dependent way */ 218 dev->params->set_carrier_params(dev, ite_is_high_carrier_freq(freq), 219 use_demodulator, ite_get_carrier_freq_bits(freq), allowance, 220 ite_get_pulse_width_bits(freq, dev->tx_duty_cycle)); 221} 222 223/* interrupt service routine for incoming and outgoing CIR data */ 224static irqreturn_t ite_cir_isr(int irq, void *data) 225{ 226 struct ite_dev *dev = data; 227 irqreturn_t ret = IRQ_RETVAL(IRQ_NONE); 228 u8 rx_buf[ITE_RX_FIFO_LEN]; 229 int rx_bytes; 230 int iflags; 231 232 /* grab the spinlock */ 233 spin_lock(&dev->lock); 234 235 /* read the interrupt flags */ 236 iflags = dev->params->get_irq_causes(dev); 237 238 /* Check for RX overflow */ 239 if (iflags & ITE_IRQ_RX_FIFO_OVERRUN) { 240 dev_warn(&dev->rdev->dev, "receive overflow\n"); 241 ir_raw_event_overflow(dev->rdev); 242 } 243 244 /* check for the receive interrupt */ 245 if (iflags & (ITE_IRQ_RX_FIFO | ITE_IRQ_RX_FIFO_OVERRUN)) { 246 /* read the FIFO bytes */ 247 rx_bytes = dev->params->get_rx_bytes(dev, rx_buf, 248 ITE_RX_FIFO_LEN); 249 250 dev_dbg(&dev->rdev->dev, "interrupt %d RX bytes\n", rx_bytes); 251 252 if (rx_bytes > 0) { 253 /* drop the spinlock, since the ir-core layer 254 * may call us back again through 255 * ite_s_idle() */ 256 spin_unlock(&dev->lock); 257 258 /* decode the data we've just received */ 259 ite_decode_bytes(dev, rx_buf, rx_bytes); 260 261 /* reacquire the spinlock */ 262 spin_lock(&dev->lock); 263 264 /* mark the interrupt as serviced */ 265 ret = IRQ_RETVAL(IRQ_HANDLED); 266 } 267 } else if (iflags & ITE_IRQ_TX_FIFO) { 268 /* FIFO space available interrupt */ 269 dev_dbg(&dev->rdev->dev, "interrupt TX FIFO\n"); 270 271 /* wake any sleeping transmitter */ 272 wake_up_interruptible(&dev->tx_queue); 273 274 /* mark the interrupt as serviced */ 275 ret = IRQ_RETVAL(IRQ_HANDLED); 276 } 277 278 /* drop the spinlock */ 279 spin_unlock(&dev->lock); 280 281 return ret; 282} 283 284/* set the rx carrier freq range, guess it's in Hz... */ 285static int ite_set_rx_carrier_range(struct rc_dev *rcdev, u32 carrier_low, u32 286 carrier_high) 287{ 288 unsigned long flags; 289 struct ite_dev *dev = rcdev->priv; 290 291 spin_lock_irqsave(&dev->lock, flags); 292 dev->rx_low_carrier_freq = carrier_low; 293 dev->rx_high_carrier_freq = carrier_high; 294 ite_set_carrier_params(dev); 295 spin_unlock_irqrestore(&dev->lock, flags); 296 297 return 0; 298} 299 300/* set the tx carrier freq, guess it's in Hz... */ 301static int ite_set_tx_carrier(struct rc_dev *rcdev, u32 carrier) 302{ 303 unsigned long flags; 304 struct ite_dev *dev = rcdev->priv; 305 306 spin_lock_irqsave(&dev->lock, flags); 307 dev->tx_carrier_freq = carrier; 308 ite_set_carrier_params(dev); 309 spin_unlock_irqrestore(&dev->lock, flags); 310 311 return 0; 312} 313 314/* set the tx duty cycle by controlling the pulse width */ 315static int ite_set_tx_duty_cycle(struct rc_dev *rcdev, u32 duty_cycle) 316{ 317 unsigned long flags; 318 struct ite_dev *dev = rcdev->priv; 319 320 spin_lock_irqsave(&dev->lock, flags); 321 dev->tx_duty_cycle = duty_cycle; 322 ite_set_carrier_params(dev); 323 spin_unlock_irqrestore(&dev->lock, flags); 324 325 return 0; 326} 327 328/* transmit out IR pulses; what you get here is a batch of alternating 329 * pulse/space/pulse/space lengths that we should write out completely through 330 * the FIFO, blocking on a full FIFO */ 331static int ite_tx_ir(struct rc_dev *rcdev, unsigned *txbuf, unsigned n) 332{ 333 unsigned long flags; 334 struct ite_dev *dev = rcdev->priv; 335 bool is_pulse = false; 336 int remaining_us, fifo_avail, fifo_remaining, last_idx = 0; 337 int max_rle_us, next_rle_us; 338 int ret = n; 339 u8 last_sent[ITE_TX_FIFO_LEN]; 340 u8 val; 341 342 /* clear the array just in case */ 343 memset(last_sent, 0, sizeof(last_sent)); 344 345 spin_lock_irqsave(&dev->lock, flags); 346 347 /* let everybody know we're now transmitting */ 348 dev->transmitting = true; 349 350 /* and set the carrier values for transmission */ 351 ite_set_carrier_params(dev); 352 353 /* calculate how much time we can send in one byte */ 354 max_rle_us = 355 (ITE_BAUDRATE_DIVISOR * sample_period * 356 ITE_TX_MAX_RLE) / 1000; 357 358 /* disable the receiver */ 359 dev->params->disable_rx(dev); 360 361 /* this is where we'll begin filling in the FIFO, until it's full. 362 * then we'll just activate the interrupt, wait for it to wake us up 363 * again, disable it, continue filling the FIFO... until everything 364 * has been pushed out */ 365 fifo_avail = ITE_TX_FIFO_LEN - dev->params->get_tx_used_slots(dev); 366 367 while (n > 0) { 368 /* transmit the next sample */ 369 is_pulse = !is_pulse; 370 remaining_us = *(txbuf++); 371 n--; 372 373 dev_dbg(&dev->rdev->dev, "%s: %d\n", 374 is_pulse ? "pulse" : "space", remaining_us); 375 376 /* repeat while the pulse is non-zero length */ 377 while (remaining_us > 0) { 378 if (remaining_us > max_rle_us) 379 next_rle_us = max_rle_us; 380 381 else 382 next_rle_us = remaining_us; 383 384 remaining_us -= next_rle_us; 385 386 /* check what's the length we have to pump out */ 387 val = (ITE_TX_MAX_RLE * next_rle_us) / max_rle_us; 388 389 /* put it into the sent buffer */ 390 last_sent[last_idx++] = val; 391 last_idx &= (ITE_TX_FIFO_LEN); 392 393 /* encode it for 7 bits */ 394 val = (val - 1) & ITE_TX_RLE_MASK; 395 396 /* take into account pulse/space prefix */ 397 if (is_pulse) 398 val |= ITE_TX_PULSE; 399 400 else 401 val |= ITE_TX_SPACE; 402 403 /* 404 * if we get to 0 available, read again, just in case 405 * some other slot got freed 406 */ 407 if (fifo_avail <= 0) 408 fifo_avail = ITE_TX_FIFO_LEN - dev->params->get_tx_used_slots(dev); 409 410 /* if it's still full */ 411 if (fifo_avail <= 0) { 412 /* enable the tx interrupt */ 413 dev->params->enable_tx_interrupt(dev); 414 415 /* drop the spinlock */ 416 spin_unlock_irqrestore(&dev->lock, flags); 417 418 /* wait for the FIFO to empty enough */ 419 wait_event_interruptible(dev->tx_queue, 420 (fifo_avail = ITE_TX_FIFO_LEN - dev->params->get_tx_used_slots(dev)) >= 8); 421 422 /* get the spinlock again */ 423 spin_lock_irqsave(&dev->lock, flags); 424 425 /* disable the tx interrupt again. */ 426 dev->params->disable_tx_interrupt(dev); 427 } 428 429 /* now send the byte through the FIFO */ 430 dev->params->put_tx_byte(dev, val); 431 fifo_avail--; 432 } 433 } 434 435 /* wait and don't return until the whole FIFO has been sent out; 436 * otherwise we could configure the RX carrier params instead of the 437 * TX ones while the transmission is still being performed! */ 438 fifo_remaining = dev->params->get_tx_used_slots(dev); 439 remaining_us = 0; 440 while (fifo_remaining > 0) { 441 fifo_remaining--; 442 last_idx--; 443 last_idx &= (ITE_TX_FIFO_LEN - 1); 444 remaining_us += last_sent[last_idx]; 445 } 446 remaining_us = (remaining_us * max_rle_us) / (ITE_TX_MAX_RLE); 447 448 /* drop the spinlock while we sleep */ 449 spin_unlock_irqrestore(&dev->lock, flags); 450 451 /* sleep remaining_us microseconds */ 452 mdelay(DIV_ROUND_UP(remaining_us, 1000)); 453 454 /* reacquire the spinlock */ 455 spin_lock_irqsave(&dev->lock, flags); 456 457 /* now we're not transmitting anymore */ 458 dev->transmitting = false; 459 460 /* and set the carrier values for reception */ 461 ite_set_carrier_params(dev); 462 463 /* re-enable the receiver */ 464 dev->params->enable_rx(dev); 465 466 /* notify transmission end */ 467 wake_up_interruptible(&dev->tx_ended); 468 469 spin_unlock_irqrestore(&dev->lock, flags); 470 471 return ret; 472} 473 474/* idle the receiver if needed */ 475static void ite_s_idle(struct rc_dev *rcdev, bool enable) 476{ 477 unsigned long flags; 478 struct ite_dev *dev = rcdev->priv; 479 480 if (enable) { 481 spin_lock_irqsave(&dev->lock, flags); 482 dev->params->idle_rx(dev); 483 spin_unlock_irqrestore(&dev->lock, flags); 484 } 485} 486 487 488/* IT8712F HW-specific functions */ 489 490/* retrieve a bitmask of the current causes for a pending interrupt; this may 491 * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN 492 * */ 493static int it87_get_irq_causes(struct ite_dev *dev) 494{ 495 u8 iflags; 496 int ret = 0; 497 498 /* read the interrupt flags */ 499 iflags = inb(dev->cir_addr + IT87_IIR) & IT87_II; 500 501 switch (iflags) { 502 case IT87_II_RXDS: 503 ret = ITE_IRQ_RX_FIFO; 504 break; 505 case IT87_II_RXFO: 506 ret = ITE_IRQ_RX_FIFO_OVERRUN; 507 break; 508 case IT87_II_TXLDL: 509 ret = ITE_IRQ_TX_FIFO; 510 break; 511 } 512 513 return ret; 514} 515 516/* set the carrier parameters; to be called with the spinlock held */ 517static void it87_set_carrier_params(struct ite_dev *dev, bool high_freq, 518 bool use_demodulator, 519 u8 carrier_freq_bits, u8 allowance_bits, 520 u8 pulse_width_bits) 521{ 522 u8 val; 523 524 /* program the RCR register */ 525 val = inb(dev->cir_addr + IT87_RCR) 526 & ~(IT87_HCFS | IT87_RXEND | IT87_RXDCR); 527 528 if (high_freq) 529 val |= IT87_HCFS; 530 531 if (use_demodulator) 532 val |= IT87_RXEND; 533 534 val |= allowance_bits; 535 536 outb(val, dev->cir_addr + IT87_RCR); 537 538 /* program the TCR2 register */ 539 outb((carrier_freq_bits << IT87_CFQ_SHIFT) | pulse_width_bits, 540 dev->cir_addr + IT87_TCR2); 541} 542 543/* read up to buf_size bytes from the RX FIFO; to be called with the spinlock 544 * held */ 545static int it87_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size) 546{ 547 int fifo, read = 0; 548 549 /* read how many bytes are still in the FIFO */ 550 fifo = inb(dev->cir_addr + IT87_RSR) & IT87_RXFBC; 551 552 while (fifo > 0 && buf_size > 0) { 553 *(buf++) = inb(dev->cir_addr + IT87_DR); 554 fifo--; 555 read++; 556 buf_size--; 557 } 558 559 return read; 560} 561 562/* return how many bytes are still in the FIFO; this will be called 563 * with the device spinlock NOT HELD while waiting for the TX FIFO to get 564 * empty; let's expect this won't be a problem */ 565static int it87_get_tx_used_slots(struct ite_dev *dev) 566{ 567 return inb(dev->cir_addr + IT87_TSR) & IT87_TXFBC; 568} 569 570/* put a byte to the TX fifo; this should be called with the spinlock held */ 571static void it87_put_tx_byte(struct ite_dev *dev, u8 value) 572{ 573 outb(value, dev->cir_addr + IT87_DR); 574} 575 576/* idle the receiver so that we won't receive samples until another 577 pulse is detected; this must be called with the device spinlock held */ 578static void it87_idle_rx(struct ite_dev *dev) 579{ 580 /* disable streaming by clearing RXACT writing it as 1 */ 581 outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXACT, 582 dev->cir_addr + IT87_RCR); 583 584 /* clear the FIFO */ 585 outb(inb(dev->cir_addr + IT87_TCR1) | IT87_FIFOCLR, 586 dev->cir_addr + IT87_TCR1); 587} 588 589/* disable the receiver; this must be called with the device spinlock held */ 590static void it87_disable_rx(struct ite_dev *dev) 591{ 592 /* disable the receiver interrupts */ 593 outb(inb(dev->cir_addr + IT87_IER) & ~(IT87_RDAIE | IT87_RFOIE), 594 dev->cir_addr + IT87_IER); 595 596 /* disable the receiver */ 597 outb(inb(dev->cir_addr + IT87_RCR) & ~IT87_RXEN, 598 dev->cir_addr + IT87_RCR); 599 600 /* clear the FIFO and RXACT (actually RXACT should have been cleared 601 * in the previous outb() call) */ 602 it87_idle_rx(dev); 603} 604 605/* enable the receiver; this must be called with the device spinlock held */ 606static void it87_enable_rx(struct ite_dev *dev) 607{ 608 /* enable the receiver by setting RXEN */ 609 outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXEN, 610 dev->cir_addr + IT87_RCR); 611 612 /* just prepare it to idle for the next reception */ 613 it87_idle_rx(dev); 614 615 /* enable the receiver interrupts and master enable flag */ 616 outb(inb(dev->cir_addr + IT87_IER) | IT87_RDAIE | IT87_RFOIE | IT87_IEC, 617 dev->cir_addr + IT87_IER); 618} 619 620/* disable the transmitter interrupt; this must be called with the device 621 * spinlock held */ 622static void it87_disable_tx_interrupt(struct ite_dev *dev) 623{ 624 /* disable the transmitter interrupts */ 625 outb(inb(dev->cir_addr + IT87_IER) & ~IT87_TLDLIE, 626 dev->cir_addr + IT87_IER); 627} 628 629/* enable the transmitter interrupt; this must be called with the device 630 * spinlock held */ 631static void it87_enable_tx_interrupt(struct ite_dev *dev) 632{ 633 /* enable the transmitter interrupts and master enable flag */ 634 outb(inb(dev->cir_addr + IT87_IER) | IT87_TLDLIE | IT87_IEC, 635 dev->cir_addr + IT87_IER); 636} 637 638/* disable the device; this must be called with the device spinlock held */ 639static void it87_disable(struct ite_dev *dev) 640{ 641 /* clear out all interrupt enable flags */ 642 outb(inb(dev->cir_addr + IT87_IER) & 643 ~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE), 644 dev->cir_addr + IT87_IER); 645 646 /* disable the receiver */ 647 it87_disable_rx(dev); 648 649 /* erase the FIFO */ 650 outb(IT87_FIFOCLR | inb(dev->cir_addr + IT87_TCR1), 651 dev->cir_addr + IT87_TCR1); 652} 653 654/* initialize the hardware */ 655static void it87_init_hardware(struct ite_dev *dev) 656{ 657 /* enable just the baud rate divisor register, 658 disabling all the interrupts at the same time */ 659 outb((inb(dev->cir_addr + IT87_IER) & 660 ~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE)) | IT87_BR, 661 dev->cir_addr + IT87_IER); 662 663 /* write out the baud rate divisor */ 664 outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT87_BDLR); 665 outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff, dev->cir_addr + IT87_BDHR); 666 667 /* disable the baud rate divisor register again */ 668 outb(inb(dev->cir_addr + IT87_IER) & ~IT87_BR, 669 dev->cir_addr + IT87_IER); 670 671 /* program the RCR register defaults */ 672 outb(ITE_RXDCR_DEFAULT, dev->cir_addr + IT87_RCR); 673 674 /* program the TCR1 register */ 675 outb(IT87_TXMPM_DEFAULT | IT87_TXENDF | IT87_TXRLE 676 | IT87_FIFOTL_DEFAULT | IT87_FIFOCLR, 677 dev->cir_addr + IT87_TCR1); 678 679 /* program the carrier parameters */ 680 ite_set_carrier_params(dev); 681} 682 683/* IT8512F on ITE8708 HW-specific functions */ 684 685/* retrieve a bitmask of the current causes for a pending interrupt; this may 686 * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN 687 * */ 688static int it8708_get_irq_causes(struct ite_dev *dev) 689{ 690 u8 iflags; 691 int ret = 0; 692 693 /* read the interrupt flags */ 694 iflags = inb(dev->cir_addr + IT8708_C0IIR); 695 696 if (iflags & IT85_TLDLI) 697 ret |= ITE_IRQ_TX_FIFO; 698 if (iflags & IT85_RDAI) 699 ret |= ITE_IRQ_RX_FIFO; 700 if (iflags & IT85_RFOI) 701 ret |= ITE_IRQ_RX_FIFO_OVERRUN; 702 703 return ret; 704} 705 706/* set the carrier parameters; to be called with the spinlock held */ 707static void it8708_set_carrier_params(struct ite_dev *dev, bool high_freq, 708 bool use_demodulator, 709 u8 carrier_freq_bits, u8 allowance_bits, 710 u8 pulse_width_bits) 711{ 712 u8 val; 713 714 /* program the C0CFR register, with HRAE=1 */ 715 outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE, 716 dev->cir_addr + IT8708_BANKSEL); 717 718 val = (inb(dev->cir_addr + IT8708_C0CFR) 719 & ~(IT85_HCFS | IT85_CFQ)) | carrier_freq_bits; 720 721 if (high_freq) 722 val |= IT85_HCFS; 723 724 outb(val, dev->cir_addr + IT8708_C0CFR); 725 726 outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE, 727 dev->cir_addr + IT8708_BANKSEL); 728 729 /* program the C0RCR register */ 730 val = inb(dev->cir_addr + IT8708_C0RCR) 731 & ~(IT85_RXEND | IT85_RXDCR); 732 733 if (use_demodulator) 734 val |= IT85_RXEND; 735 736 val |= allowance_bits; 737 738 outb(val, dev->cir_addr + IT8708_C0RCR); 739 740 /* program the C0TCR register */ 741 val = inb(dev->cir_addr + IT8708_C0TCR) & ~IT85_TXMPW; 742 val |= pulse_width_bits; 743 outb(val, dev->cir_addr + IT8708_C0TCR); 744} 745 746/* read up to buf_size bytes from the RX FIFO; to be called with the spinlock 747 * held */ 748static int it8708_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size) 749{ 750 int fifo, read = 0; 751 752 /* read how many bytes are still in the FIFO */ 753 fifo = inb(dev->cir_addr + IT8708_C0RFSR) & IT85_RXFBC; 754 755 while (fifo > 0 && buf_size > 0) { 756 *(buf++) = inb(dev->cir_addr + IT8708_C0DR); 757 fifo--; 758 read++; 759 buf_size--; 760 } 761 762 return read; 763} 764 765/* return how many bytes are still in the FIFO; this will be called 766 * with the device spinlock NOT HELD while waiting for the TX FIFO to get 767 * empty; let's expect this won't be a problem */ 768static int it8708_get_tx_used_slots(struct ite_dev *dev) 769{ 770 return inb(dev->cir_addr + IT8708_C0TFSR) & IT85_TXFBC; 771} 772 773/* put a byte to the TX fifo; this should be called with the spinlock held */ 774static void it8708_put_tx_byte(struct ite_dev *dev, u8 value) 775{ 776 outb(value, dev->cir_addr + IT8708_C0DR); 777} 778 779/* idle the receiver so that we won't receive samples until another 780 pulse is detected; this must be called with the device spinlock held */ 781static void it8708_idle_rx(struct ite_dev *dev) 782{ 783 /* disable streaming by clearing RXACT writing it as 1 */ 784 outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXACT, 785 dev->cir_addr + IT8708_C0RCR); 786 787 /* clear the FIFO */ 788 outb(inb(dev->cir_addr + IT8708_C0MSTCR) | IT85_FIFOCLR, 789 dev->cir_addr + IT8708_C0MSTCR); 790} 791 792/* disable the receiver; this must be called with the device spinlock held */ 793static void it8708_disable_rx(struct ite_dev *dev) 794{ 795 /* disable the receiver interrupts */ 796 outb(inb(dev->cir_addr + IT8708_C0IER) & 797 ~(IT85_RDAIE | IT85_RFOIE), 798 dev->cir_addr + IT8708_C0IER); 799 800 /* disable the receiver */ 801 outb(inb(dev->cir_addr + IT8708_C0RCR) & ~IT85_RXEN, 802 dev->cir_addr + IT8708_C0RCR); 803 804 /* clear the FIFO and RXACT (actually RXACT should have been cleared 805 * in the previous outb() call) */ 806 it8708_idle_rx(dev); 807} 808 809/* enable the receiver; this must be called with the device spinlock held */ 810static void it8708_enable_rx(struct ite_dev *dev) 811{ 812 /* enable the receiver by setting RXEN */ 813 outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXEN, 814 dev->cir_addr + IT8708_C0RCR); 815 816 /* just prepare it to idle for the next reception */ 817 it8708_idle_rx(dev); 818 819 /* enable the receiver interrupts and master enable flag */ 820 outb(inb(dev->cir_addr + IT8708_C0IER) 821 |IT85_RDAIE | IT85_RFOIE | IT85_IEC, 822 dev->cir_addr + IT8708_C0IER); 823} 824 825/* disable the transmitter interrupt; this must be called with the device 826 * spinlock held */ 827static void it8708_disable_tx_interrupt(struct ite_dev *dev) 828{ 829 /* disable the transmitter interrupts */ 830 outb(inb(dev->cir_addr + IT8708_C0IER) & ~IT85_TLDLIE, 831 dev->cir_addr + IT8708_C0IER); 832} 833 834/* enable the transmitter interrupt; this must be called with the device 835 * spinlock held */ 836static void it8708_enable_tx_interrupt(struct ite_dev *dev) 837{ 838 /* enable the transmitter interrupts and master enable flag */ 839 outb(inb(dev->cir_addr + IT8708_C0IER) 840 |IT85_TLDLIE | IT85_IEC, 841 dev->cir_addr + IT8708_C0IER); 842} 843 844/* disable the device; this must be called with the device spinlock held */ 845static void it8708_disable(struct ite_dev *dev) 846{ 847 /* clear out all interrupt enable flags */ 848 outb(inb(dev->cir_addr + IT8708_C0IER) & 849 ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE), 850 dev->cir_addr + IT8708_C0IER); 851 852 /* disable the receiver */ 853 it8708_disable_rx(dev); 854 855 /* erase the FIFO */ 856 outb(IT85_FIFOCLR | inb(dev->cir_addr + IT8708_C0MSTCR), 857 dev->cir_addr + IT8708_C0MSTCR); 858} 859 860/* initialize the hardware */ 861static void it8708_init_hardware(struct ite_dev *dev) 862{ 863 /* disable all the interrupts */ 864 outb(inb(dev->cir_addr + IT8708_C0IER) & 865 ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE), 866 dev->cir_addr + IT8708_C0IER); 867 868 /* program the baud rate divisor */ 869 outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE, 870 dev->cir_addr + IT8708_BANKSEL); 871 872 outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT8708_C0BDLR); 873 outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff, 874 dev->cir_addr + IT8708_C0BDHR); 875 876 outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE, 877 dev->cir_addr + IT8708_BANKSEL); 878 879 /* program the C0MSTCR register defaults */ 880 outb((inb(dev->cir_addr + IT8708_C0MSTCR) & 881 ~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL | 882 IT85_FIFOCLR | IT85_RESET)) | 883 IT85_FIFOTL_DEFAULT, 884 dev->cir_addr + IT8708_C0MSTCR); 885 886 /* program the C0RCR register defaults */ 887 outb((inb(dev->cir_addr + IT8708_C0RCR) & 888 ~(IT85_RXEN | IT85_RDWOS | IT85_RXEND | 889 IT85_RXACT | IT85_RXDCR)) | 890 ITE_RXDCR_DEFAULT, 891 dev->cir_addr + IT8708_C0RCR); 892 893 /* program the C0TCR register defaults */ 894 outb((inb(dev->cir_addr + IT8708_C0TCR) & 895 ~(IT85_TXMPM | IT85_TXMPW)) 896 |IT85_TXRLE | IT85_TXENDF | 897 IT85_TXMPM_DEFAULT | IT85_TXMPW_DEFAULT, 898 dev->cir_addr + IT8708_C0TCR); 899 900 /* program the carrier parameters */ 901 ite_set_carrier_params(dev); 902} 903 904/* IT8512F on ITE8709 HW-specific functions */ 905 906/* read a byte from the SRAM module */ 907static inline u8 it8709_rm(struct ite_dev *dev, int index) 908{ 909 outb(index, dev->cir_addr + IT8709_RAM_IDX); 910 return inb(dev->cir_addr + IT8709_RAM_VAL); 911} 912 913/* write a byte to the SRAM module */ 914static inline void it8709_wm(struct ite_dev *dev, u8 val, int index) 915{ 916 outb(index, dev->cir_addr + IT8709_RAM_IDX); 917 outb(val, dev->cir_addr + IT8709_RAM_VAL); 918} 919 920static void it8709_wait(struct ite_dev *dev) 921{ 922 int i = 0; 923 /* 924 * loop until device tells it's ready to continue 925 * iterations count is usually ~750 but can sometimes achieve 13000 926 */ 927 for (i = 0; i < 15000; i++) { 928 udelay(2); 929 if (it8709_rm(dev, IT8709_MODE) == IT8709_IDLE) 930 break; 931 } 932} 933 934/* read the value of a CIR register */ 935static u8 it8709_rr(struct ite_dev *dev, int index) 936{ 937 /* just wait in case the previous access was a write */ 938 it8709_wait(dev); 939 it8709_wm(dev, index, IT8709_REG_IDX); 940 it8709_wm(dev, IT8709_READ, IT8709_MODE); 941 942 /* wait for the read data to be available */ 943 it8709_wait(dev); 944 945 /* return the read value */ 946 return it8709_rm(dev, IT8709_REG_VAL); 947} 948 949/* write the value of a CIR register */ 950static void it8709_wr(struct ite_dev *dev, u8 val, int index) 951{ 952 /* we wait before writing, and not afterwards, since this allows us to 953 * pipeline the host CPU with the microcontroller */ 954 it8709_wait(dev); 955 it8709_wm(dev, val, IT8709_REG_VAL); 956 it8709_wm(dev, index, IT8709_REG_IDX); 957 it8709_wm(dev, IT8709_WRITE, IT8709_MODE); 958} 959 960/* retrieve a bitmask of the current causes for a pending interrupt; this may 961 * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN 962 * */ 963static int it8709_get_irq_causes(struct ite_dev *dev) 964{ 965 u8 iflags; 966 int ret = 0; 967 968 /* read the interrupt flags */ 969 iflags = it8709_rm(dev, IT8709_IIR); 970 971 if (iflags & IT85_TLDLI) 972 ret |= ITE_IRQ_TX_FIFO; 973 if (iflags & IT85_RDAI) 974 ret |= ITE_IRQ_RX_FIFO; 975 if (iflags & IT85_RFOI) 976 ret |= ITE_IRQ_RX_FIFO_OVERRUN; 977 978 return ret; 979} 980 981/* set the carrier parameters; to be called with the spinlock held */ 982static void it8709_set_carrier_params(struct ite_dev *dev, bool high_freq, 983 bool use_demodulator, 984 u8 carrier_freq_bits, u8 allowance_bits, 985 u8 pulse_width_bits) 986{ 987 u8 val; 988 989 val = (it8709_rr(dev, IT85_C0CFR) 990 &~(IT85_HCFS | IT85_CFQ)) | 991 carrier_freq_bits; 992 993 if (high_freq) 994 val |= IT85_HCFS; 995 996 it8709_wr(dev, val, IT85_C0CFR); 997 998 /* program the C0RCR register */ 999 val = it8709_rr(dev, IT85_C0RCR) 1000 & ~(IT85_RXEND | IT85_RXDCR); 1001 1002 if (use_demodulator) 1003 val |= IT85_RXEND; 1004 1005 val |= allowance_bits; 1006 1007 it8709_wr(dev, val, IT85_C0RCR); 1008 1009 /* program the C0TCR register */ 1010 val = it8709_rr(dev, IT85_C0TCR) & ~IT85_TXMPW; 1011 val |= pulse_width_bits; 1012 it8709_wr(dev, val, IT85_C0TCR); 1013} 1014 1015/* read up to buf_size bytes from the RX FIFO; to be called with the spinlock 1016 * held */ 1017static int it8709_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size) 1018{ 1019 int fifo, read = 0; 1020 1021 /* read how many bytes are still in the FIFO */ 1022 fifo = it8709_rm(dev, IT8709_RFSR) & IT85_RXFBC; 1023 1024 while (fifo > 0 && buf_size > 0) { 1025 *(buf++) = it8709_rm(dev, IT8709_FIFO + read); 1026 fifo--; 1027 read++; 1028 buf_size--; 1029 } 1030 1031 /* 'clear' the FIFO by setting the writing index to 0; this is 1032 * completely bound to be racy, but we can't help it, since it's a 1033 * limitation of the protocol */ 1034 it8709_wm(dev, 0, IT8709_RFSR); 1035 1036 return read; 1037} 1038 1039/* return how many bytes are still in the FIFO; this will be called 1040 * with the device spinlock NOT HELD while waiting for the TX FIFO to get 1041 * empty; let's expect this won't be a problem */ 1042static int it8709_get_tx_used_slots(struct ite_dev *dev) 1043{ 1044 return it8709_rr(dev, IT85_C0TFSR) & IT85_TXFBC; 1045} 1046 1047/* put a byte to the TX fifo; this should be called with the spinlock held */ 1048static void it8709_put_tx_byte(struct ite_dev *dev, u8 value) 1049{ 1050 it8709_wr(dev, value, IT85_C0DR); 1051} 1052 1053/* idle the receiver so that we won't receive samples until another 1054 pulse is detected; this must be called with the device spinlock held */ 1055static void it8709_idle_rx(struct ite_dev *dev) 1056{ 1057 /* disable streaming by clearing RXACT writing it as 1 */ 1058 it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXACT, 1059 IT85_C0RCR); 1060 1061 /* clear the FIFO */ 1062 it8709_wr(dev, it8709_rr(dev, IT85_C0MSTCR) | IT85_FIFOCLR, 1063 IT85_C0MSTCR); 1064} 1065 1066/* disable the receiver; this must be called with the device spinlock held */ 1067static void it8709_disable_rx(struct ite_dev *dev) 1068{ 1069 /* disable the receiver interrupts */ 1070 it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & 1071 ~(IT85_RDAIE | IT85_RFOIE), 1072 IT85_C0IER); 1073 1074 /* disable the receiver */ 1075 it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) & ~IT85_RXEN, 1076 IT85_C0RCR); 1077 1078 /* clear the FIFO and RXACT (actually RXACT should have been cleared 1079 * in the previous it8709_wr(dev, ) call) */ 1080 it8709_idle_rx(dev); 1081} 1082 1083/* enable the receiver; this must be called with the device spinlock held */ 1084static void it8709_enable_rx(struct ite_dev *dev) 1085{ 1086 /* enable the receiver by setting RXEN */ 1087 it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXEN, 1088 IT85_C0RCR); 1089 1090 /* just prepare it to idle for the next reception */ 1091 it8709_idle_rx(dev); 1092 1093 /* enable the receiver interrupts and master enable flag */ 1094 it8709_wr(dev, it8709_rr(dev, IT85_C0IER) 1095 |IT85_RDAIE | IT85_RFOIE | IT85_IEC, 1096 IT85_C0IER); 1097} 1098 1099/* disable the transmitter interrupt; this must be called with the device 1100 * spinlock held */ 1101static void it8709_disable_tx_interrupt(struct ite_dev *dev) 1102{ 1103 /* disable the transmitter interrupts */ 1104 it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & ~IT85_TLDLIE, 1105 IT85_C0IER); 1106} 1107 1108/* enable the transmitter interrupt; this must be called with the device 1109 * spinlock held */ 1110static void it8709_enable_tx_interrupt(struct ite_dev *dev) 1111{ 1112 /* enable the transmitter interrupts and master enable flag */ 1113 it8709_wr(dev, it8709_rr(dev, IT85_C0IER) 1114 |IT85_TLDLIE | IT85_IEC, 1115 IT85_C0IER); 1116} 1117 1118/* disable the device; this must be called with the device spinlock held */ 1119static void it8709_disable(struct ite_dev *dev) 1120{ 1121 /* clear out all interrupt enable flags */ 1122 it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & 1123 ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE), 1124 IT85_C0IER); 1125 1126 /* disable the receiver */ 1127 it8709_disable_rx(dev); 1128 1129 /* erase the FIFO */ 1130 it8709_wr(dev, IT85_FIFOCLR | it8709_rr(dev, IT85_C0MSTCR), 1131 IT85_C0MSTCR); 1132} 1133 1134/* initialize the hardware */ 1135static void it8709_init_hardware(struct ite_dev *dev) 1136{ 1137 /* disable all the interrupts */ 1138 it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & 1139 ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE), 1140 IT85_C0IER); 1141 1142 /* program the baud rate divisor */ 1143 it8709_wr(dev, ITE_BAUDRATE_DIVISOR & 0xff, IT85_C0BDLR); 1144 it8709_wr(dev, (ITE_BAUDRATE_DIVISOR >> 8) & 0xff, 1145 IT85_C0BDHR); 1146 1147 /* program the C0MSTCR register defaults */ 1148 it8709_wr(dev, (it8709_rr(dev, IT85_C0MSTCR) & 1149 ~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL 1150 | IT85_FIFOCLR | IT85_RESET)) | IT85_FIFOTL_DEFAULT, 1151 IT85_C0MSTCR); 1152 1153 /* program the C0RCR register defaults */ 1154 it8709_wr(dev, (it8709_rr(dev, IT85_C0RCR) & 1155 ~(IT85_RXEN | IT85_RDWOS | IT85_RXEND | IT85_RXACT 1156 | IT85_RXDCR)) | ITE_RXDCR_DEFAULT, 1157 IT85_C0RCR); 1158 1159 /* program the C0TCR register defaults */ 1160 it8709_wr(dev, (it8709_rr(dev, IT85_C0TCR) & ~(IT85_TXMPM | IT85_TXMPW)) 1161 | IT85_TXRLE | IT85_TXENDF | IT85_TXMPM_DEFAULT 1162 | IT85_TXMPW_DEFAULT, 1163 IT85_C0TCR); 1164 1165 /* program the carrier parameters */ 1166 ite_set_carrier_params(dev); 1167} 1168 1169 1170/* generic hardware setup/teardown code */ 1171 1172/* activate the device for use */ 1173static int ite_open(struct rc_dev *rcdev) 1174{ 1175 struct ite_dev *dev = rcdev->priv; 1176 unsigned long flags; 1177 1178 spin_lock_irqsave(&dev->lock, flags); 1179 1180 /* enable the receiver */ 1181 dev->params->enable_rx(dev); 1182 1183 spin_unlock_irqrestore(&dev->lock, flags); 1184 1185 return 0; 1186} 1187 1188/* deactivate the device for use */ 1189static void ite_close(struct rc_dev *rcdev) 1190{ 1191 struct ite_dev *dev = rcdev->priv; 1192 unsigned long flags; 1193 1194 spin_lock_irqsave(&dev->lock, flags); 1195 1196 /* wait for any transmission to end */ 1197 spin_unlock_irqrestore(&dev->lock, flags); 1198 wait_event_interruptible(dev->tx_ended, !dev->transmitting); 1199 spin_lock_irqsave(&dev->lock, flags); 1200 1201 dev->params->disable(dev); 1202 1203 spin_unlock_irqrestore(&dev->lock, flags); 1204} 1205 1206/* supported models and their parameters */ 1207static const struct ite_dev_params ite_dev_descs[] = { 1208 { /* 0: ITE8704 */ 1209 .model = "ITE8704 CIR transceiver", 1210 .io_region_size = IT87_IOREG_LENGTH, 1211 .io_rsrc_no = 0, 1212 1213 /* operations */ 1214 .get_irq_causes = it87_get_irq_causes, 1215 .enable_rx = it87_enable_rx, 1216 .idle_rx = it87_idle_rx, 1217 .disable_rx = it87_idle_rx, 1218 .get_rx_bytes = it87_get_rx_bytes, 1219 .enable_tx_interrupt = it87_enable_tx_interrupt, 1220 .disable_tx_interrupt = it87_disable_tx_interrupt, 1221 .get_tx_used_slots = it87_get_tx_used_slots, 1222 .put_tx_byte = it87_put_tx_byte, 1223 .disable = it87_disable, 1224 .init_hardware = it87_init_hardware, 1225 .set_carrier_params = it87_set_carrier_params, 1226 }, 1227 { /* 1: ITE8713 */ 1228 .model = "ITE8713 CIR transceiver", 1229 .io_region_size = IT87_IOREG_LENGTH, 1230 .io_rsrc_no = 0, 1231 1232 /* operations */ 1233 .get_irq_causes = it87_get_irq_causes, 1234 .enable_rx = it87_enable_rx, 1235 .idle_rx = it87_idle_rx, 1236 .disable_rx = it87_idle_rx, 1237 .get_rx_bytes = it87_get_rx_bytes, 1238 .enable_tx_interrupt = it87_enable_tx_interrupt, 1239 .disable_tx_interrupt = it87_disable_tx_interrupt, 1240 .get_tx_used_slots = it87_get_tx_used_slots, 1241 .put_tx_byte = it87_put_tx_byte, 1242 .disable = it87_disable, 1243 .init_hardware = it87_init_hardware, 1244 .set_carrier_params = it87_set_carrier_params, 1245 }, 1246 { /* 2: ITE8708 */ 1247 .model = "ITE8708 CIR transceiver", 1248 .io_region_size = IT8708_IOREG_LENGTH, 1249 .io_rsrc_no = 0, 1250 1251 /* operations */ 1252 .get_irq_causes = it8708_get_irq_causes, 1253 .enable_rx = it8708_enable_rx, 1254 .idle_rx = it8708_idle_rx, 1255 .disable_rx = it8708_idle_rx, 1256 .get_rx_bytes = it8708_get_rx_bytes, 1257 .enable_tx_interrupt = it8708_enable_tx_interrupt, 1258 .disable_tx_interrupt = 1259 it8708_disable_tx_interrupt, 1260 .get_tx_used_slots = it8708_get_tx_used_slots, 1261 .put_tx_byte = it8708_put_tx_byte, 1262 .disable = it8708_disable, 1263 .init_hardware = it8708_init_hardware, 1264 .set_carrier_params = it8708_set_carrier_params, 1265 }, 1266 { /* 3: ITE8709 */ 1267 .model = "ITE8709 CIR transceiver", 1268 .io_region_size = IT8709_IOREG_LENGTH, 1269 .io_rsrc_no = 2, 1270 1271 /* operations */ 1272 .get_irq_causes = it8709_get_irq_causes, 1273 .enable_rx = it8709_enable_rx, 1274 .idle_rx = it8709_idle_rx, 1275 .disable_rx = it8709_idle_rx, 1276 .get_rx_bytes = it8709_get_rx_bytes, 1277 .enable_tx_interrupt = it8709_enable_tx_interrupt, 1278 .disable_tx_interrupt = 1279 it8709_disable_tx_interrupt, 1280 .get_tx_used_slots = it8709_get_tx_used_slots, 1281 .put_tx_byte = it8709_put_tx_byte, 1282 .disable = it8709_disable, 1283 .init_hardware = it8709_init_hardware, 1284 .set_carrier_params = it8709_set_carrier_params, 1285 }, 1286}; 1287 1288static const struct pnp_device_id ite_ids[] = { 1289 {"ITE8704", 0}, /* Default model */ 1290 {"ITE8713", 1}, /* CIR found in EEEBox 1501U */ 1291 {"ITE8708", 2}, /* Bridged IT8512 */ 1292 {"ITE8709", 3}, /* SRAM-Bridged IT8512 */ 1293 {"", 0}, 1294}; 1295 1296/* allocate memory, probe hardware, and initialize everything */ 1297static int ite_probe(struct pnp_dev *pdev, const struct pnp_device_id 1298 *dev_id) 1299{ 1300 const struct ite_dev_params *dev_desc = NULL; 1301 struct ite_dev *itdev = NULL; 1302 struct rc_dev *rdev = NULL; 1303 int ret = -ENOMEM; 1304 int model_no; 1305 int io_rsrc_no; 1306 1307 itdev = kzalloc(sizeof(struct ite_dev), GFP_KERNEL); 1308 if (!itdev) 1309 return ret; 1310 1311 /* input device for IR remote (and tx) */ 1312 rdev = rc_allocate_device(RC_DRIVER_IR_RAW); 1313 if (!rdev) 1314 goto exit_free_dev_rdev; 1315 itdev->rdev = rdev; 1316 1317 ret = -ENODEV; 1318 1319 /* get the model number */ 1320 model_no = (int)dev_id->driver_data; 1321 dev_dbg(&pdev->dev, "Auto-detected model: %s\n", 1322 ite_dev_descs[model_no].model); 1323 1324 if (model_number >= 0 && model_number < ARRAY_SIZE(ite_dev_descs)) { 1325 model_no = model_number; 1326 dev_info(&pdev->dev, "model has been forced to: %s", 1327 ite_dev_descs[model_no].model); 1328 } 1329 1330 /* get the description for the device */ 1331 dev_desc = &ite_dev_descs[model_no]; 1332 io_rsrc_no = dev_desc->io_rsrc_no; 1333 1334 /* validate pnp resources */ 1335 if (!pnp_port_valid(pdev, io_rsrc_no) || 1336 pnp_port_len(pdev, io_rsrc_no) < dev_desc->io_region_size) { 1337 dev_err(&pdev->dev, "IR PNP Port not valid!\n"); 1338 goto exit_free_dev_rdev; 1339 } 1340 1341 if (!pnp_irq_valid(pdev, 0)) { 1342 dev_err(&pdev->dev, "PNP IRQ not valid!\n"); 1343 goto exit_free_dev_rdev; 1344 } 1345 1346 /* store resource values */ 1347 itdev->cir_addr = pnp_port_start(pdev, io_rsrc_no); 1348 itdev->cir_irq = pnp_irq(pdev, 0); 1349 1350 /* initialize spinlocks */ 1351 spin_lock_init(&itdev->lock); 1352 1353 /* set driver data into the pnp device */ 1354 pnp_set_drvdata(pdev, itdev); 1355 itdev->pdev = pdev; 1356 1357 /* initialize waitqueues for transmission */ 1358 init_waitqueue_head(&itdev->tx_queue); 1359 init_waitqueue_head(&itdev->tx_ended); 1360 1361 /* Set model-specific parameters */ 1362 itdev->params = dev_desc; 1363 1364 /* set up hardware initial state */ 1365 itdev->tx_duty_cycle = 33; 1366 itdev->tx_carrier_freq = ITE_DEFAULT_CARRIER_FREQ; 1367 itdev->params->init_hardware(itdev); 1368 1369 /* set up ir-core props */ 1370 rdev->priv = itdev; 1371 rdev->dev.parent = &pdev->dev; 1372 rdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; 1373 rdev->open = ite_open; 1374 rdev->close = ite_close; 1375 rdev->s_idle = ite_s_idle; 1376 rdev->s_rx_carrier_range = ite_set_rx_carrier_range; 1377 /* FIFO threshold is 17 bytes, so 17 * 8 samples minimum */ 1378 rdev->min_timeout = 17 * 8 * ITE_BAUDRATE_DIVISOR * 1379 sample_period / 1000; 1380 rdev->timeout = IR_DEFAULT_TIMEOUT; 1381 rdev->max_timeout = 10 * IR_DEFAULT_TIMEOUT; 1382 rdev->rx_resolution = ITE_BAUDRATE_DIVISOR * sample_period / 1000; 1383 1384 /* set up transmitter related values */ 1385 rdev->tx_ir = ite_tx_ir; 1386 rdev->s_tx_carrier = ite_set_tx_carrier; 1387 rdev->s_tx_duty_cycle = ite_set_tx_duty_cycle; 1388 1389 rdev->device_name = dev_desc->model; 1390 rdev->input_id.bustype = BUS_HOST; 1391 rdev->input_id.vendor = PCI_VENDOR_ID_ITE; 1392 rdev->input_id.product = 0; 1393 rdev->input_id.version = 0; 1394 rdev->driver_name = ITE_DRIVER_NAME; 1395 rdev->map_name = RC_MAP_RC6_MCE; 1396 1397 ret = rc_register_device(rdev); 1398 if (ret) 1399 goto exit_free_dev_rdev; 1400 1401 ret = -EBUSY; 1402 /* now claim resources */ 1403 if (!request_region(itdev->cir_addr, 1404 dev_desc->io_region_size, ITE_DRIVER_NAME)) 1405 goto exit_unregister_device; 1406 1407 if (request_irq(itdev->cir_irq, ite_cir_isr, IRQF_SHARED, 1408 ITE_DRIVER_NAME, (void *)itdev)) 1409 goto exit_release_cir_addr; 1410 1411 return 0; 1412 1413exit_release_cir_addr: 1414 release_region(itdev->cir_addr, itdev->params->io_region_size); 1415exit_unregister_device: 1416 rc_unregister_device(rdev); 1417 rdev = NULL; 1418exit_free_dev_rdev: 1419 rc_free_device(rdev); 1420 kfree(itdev); 1421 1422 return ret; 1423} 1424 1425static void ite_remove(struct pnp_dev *pdev) 1426{ 1427 struct ite_dev *dev = pnp_get_drvdata(pdev); 1428 unsigned long flags; 1429 1430 spin_lock_irqsave(&dev->lock, flags); 1431 1432 /* disable hardware */ 1433 dev->params->disable(dev); 1434 1435 spin_unlock_irqrestore(&dev->lock, flags); 1436 1437 /* free resources */ 1438 free_irq(dev->cir_irq, dev); 1439 release_region(dev->cir_addr, dev->params->io_region_size); 1440 1441 rc_unregister_device(dev->rdev); 1442 1443 kfree(dev); 1444} 1445 1446static int ite_suspend(struct pnp_dev *pdev, pm_message_t state) 1447{ 1448 struct ite_dev *dev = pnp_get_drvdata(pdev); 1449 unsigned long flags; 1450 1451 /* wait for any transmission to end */ 1452 wait_event_interruptible(dev->tx_ended, !dev->transmitting); 1453 1454 spin_lock_irqsave(&dev->lock, flags); 1455 1456 /* disable all interrupts */ 1457 dev->params->disable(dev); 1458 1459 spin_unlock_irqrestore(&dev->lock, flags); 1460 1461 return 0; 1462} 1463 1464static int ite_resume(struct pnp_dev *pdev) 1465{ 1466 struct ite_dev *dev = pnp_get_drvdata(pdev); 1467 unsigned long flags; 1468 1469 spin_lock_irqsave(&dev->lock, flags); 1470 1471 /* reinitialize hardware config registers */ 1472 dev->params->init_hardware(dev); 1473 /* enable the receiver */ 1474 dev->params->enable_rx(dev); 1475 1476 spin_unlock_irqrestore(&dev->lock, flags); 1477 1478 return 0; 1479} 1480 1481static void ite_shutdown(struct pnp_dev *pdev) 1482{ 1483 struct ite_dev *dev = pnp_get_drvdata(pdev); 1484 unsigned long flags; 1485 1486 spin_lock_irqsave(&dev->lock, flags); 1487 1488 /* disable all interrupts */ 1489 dev->params->disable(dev); 1490 1491 spin_unlock_irqrestore(&dev->lock, flags); 1492} 1493 1494static struct pnp_driver ite_driver = { 1495 .name = ITE_DRIVER_NAME, 1496 .id_table = ite_ids, 1497 .probe = ite_probe, 1498 .remove = ite_remove, 1499 .suspend = ite_suspend, 1500 .resume = ite_resume, 1501 .shutdown = ite_shutdown, 1502}; 1503 1504MODULE_DEVICE_TABLE(pnp, ite_ids); 1505MODULE_DESCRIPTION("ITE Tech Inc. IT8712F/ITE8512F CIR driver"); 1506 1507MODULE_AUTHOR("Juan J. Garcia de Soria <skandalfo@gmail.com>"); 1508MODULE_LICENSE("GPL"); 1509 1510module_pnp_driver(ite_driver);
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