xilinx-dma.h

  1/* SPDX-License-Identifier: GPL-2.0 */
  2/*
  3 * Xilinx Video DMA
  4 *
  5 * Copyright (C) 2013-2015 Ideas on Board
  6 * Copyright (C) 2013-2015 Xilinx, Inc.
  7 *
  8 * Contacts: Hyun Kwon <hyun.kwon@xilinx.com>
  9 *           Laurent Pinchart <laurent.pinchart@ideasonboard.com>
 10 */
 11
 12#ifndef __XILINX_VIP_DMA_H__
 13#define __XILINX_VIP_DMA_H__
 14
 15#include <linux/dmaengine.h>
 16#include <linux/mutex.h>
 17#include <linux/spinlock.h>
 18#include <linux/videodev2.h>
 19
 20#include <media/media-entity.h>
 21#include <media/v4l2-dev.h>
 22#include <media/videobuf2-v4l2.h>
 23
 24struct dma_chan;
 25struct xvip_composite_device;
 26struct xvip_video_format;
 27
 28/**
 29 * struct xvip_pipeline - Xilinx Video IP pipeline structure
 30 * @pipe: media pipeline
 31 * @lock: protects the pipeline @stream_count
 32 * @use_count: number of DMA engines using the pipeline
 33 * @stream_count: number of DMA engines currently streaming
 34 * @num_dmas: number of DMA engines in the pipeline
 35 * @output: DMA engine at the output of the pipeline
 36 */
 37struct xvip_pipeline {
 38	struct media_pipeline pipe;
 39
 40	struct mutex lock;
 41	unsigned int use_count;
 42	unsigned int stream_count;
 43
 44	unsigned int num_dmas;
 45	struct xvip_dma *output;
 46};
 47
 48static inline struct xvip_pipeline *to_xvip_pipeline(struct video_device *vdev)
 49{
 50	struct media_pipeline *pipe = video_device_pipeline(vdev);
 51
 52	if (!pipe)
 53		return NULL;
 54
 55	return container_of(pipe, struct xvip_pipeline, pipe);
 56}
 57
 58/**
 59 * struct xvip_dma - Video DMA channel
 60 * @list: list entry in a composite device dmas list
 61 * @video: V4L2 video device associated with the DMA channel
 62 * @pad: media pad for the video device entity
 63 * @xdev: composite device the DMA channel belongs to
 64 * @pipe: pipeline belonging to the DMA channel
 65 * @port: composite device DT node port number for the DMA channel
 66 * @lock: protects the @format, @fmtinfo and @queue fields
 67 * @format: active V4L2 pixel format
 68 * @fmtinfo: format information corresponding to the active @format
 69 * @queue: vb2 buffers queue
 70 * @sequence: V4L2 buffers sequence number
 71 * @queued_bufs: list of queued buffers
 72 * @queued_lock: protects the buf_queued list
 73 * @dma: DMA engine channel
 74 * @align: transfer alignment required by the DMA channel (in bytes)
 75 * @xt: dma interleaved template for dma configuration
 76 * @sgl: data chunk structure for dma_interleaved_template
 77 */
 78struct xvip_dma {
 79	struct list_head list;
 80	struct video_device video;
 81	struct media_pad pad;
 82
 83	struct xvip_composite_device *xdev;
 84	struct xvip_pipeline pipe;
 85	unsigned int port;
 86
 87	struct mutex lock;
 88	struct v4l2_pix_format format;
 89	const struct xvip_video_format *fmtinfo;
 90
 91	struct vb2_queue queue;
 92	unsigned int sequence;
 93
 94	struct list_head queued_bufs;
 95	spinlock_t queued_lock;
 96
 97	struct dma_chan *dma;
 98	unsigned int align;
 99	struct dma_interleaved_template xt;
100	struct data_chunk sgl;
101};
102
103#define to_xvip_dma(vdev)	container_of(vdev, struct xvip_dma, video)
104
105int xvip_dma_init(struct xvip_composite_device *xdev, struct xvip_dma *dma,
106		  enum v4l2_buf_type type, unsigned int port);
107void xvip_dma_cleanup(struct xvip_dma *dma);
108
109#endif /* __XILINX_VIP_DMA_H__ */