stm32-dcmi.c

   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Driver for STM32 Digital Camera Memory Interface
   4 *
   5 * Copyright (C) STMicroelectronics SA 2017
   6 * Authors: Yannick Fertre <yannick.fertre@st.com>
   7 *          Hugues Fruchet <hugues.fruchet@st.com>
   8 *          for STMicroelectronics.
   9 *
  10 * This driver is based on atmel_isi.c
  11 *
  12 */
  13
  14#include <linux/clk.h>
  15#include <linux/completion.h>
  16#include <linux/delay.h>
  17#include <linux/dmaengine.h>
  18#include <linux/init.h>
  19#include <linux/interrupt.h>
  20#include <linux/kernel.h>
  21#include <linux/module.h>
  22#include <linux/of.h>
  23#include <linux/of_graph.h>
  24#include <linux/pinctrl/consumer.h>
  25#include <linux/platform_device.h>
  26#include <linux/pm_runtime.h>
  27#include <linux/reset.h>
  28#include <linux/videodev2.h>
  29
  30#include <media/v4l2-ctrls.h>
  31#include <media/v4l2-dev.h>
  32#include <media/v4l2-device.h>
  33#include <media/v4l2-event.h>
  34#include <media/v4l2-fwnode.h>
  35#include <media/v4l2-image-sizes.h>
  36#include <media/v4l2-ioctl.h>
  37#include <media/v4l2-rect.h>
  38#include <media/videobuf2-dma-contig.h>
  39
  40#define DRV_NAME "stm32-dcmi"
  41
  42/* Registers offset for DCMI */
  43#define DCMI_CR		0x00 /* Control Register */
  44#define DCMI_SR		0x04 /* Status Register */
  45#define DCMI_RIS	0x08 /* Raw Interrupt Status register */
  46#define DCMI_IER	0x0C /* Interrupt Enable Register */
  47#define DCMI_MIS	0x10 /* Masked Interrupt Status register */
  48#define DCMI_ICR	0x14 /* Interrupt Clear Register */
  49#define DCMI_ESCR	0x18 /* Embedded Synchronization Code Register */
  50#define DCMI_ESUR	0x1C /* Embedded Synchronization Unmask Register */
  51#define DCMI_CWSTRT	0x20 /* Crop Window STaRT */
  52#define DCMI_CWSIZE	0x24 /* Crop Window SIZE */
  53#define DCMI_DR		0x28 /* Data Register */
  54#define DCMI_IDR	0x2C /* IDentifier Register */
  55
  56/* Bits definition for control register (DCMI_CR) */
  57#define CR_CAPTURE	BIT(0)
  58#define CR_CM		BIT(1)
  59#define CR_CROP		BIT(2)
  60#define CR_JPEG		BIT(3)
  61#define CR_ESS		BIT(4)
  62#define CR_PCKPOL	BIT(5)
  63#define CR_HSPOL	BIT(6)
  64#define CR_VSPOL	BIT(7)
  65#define CR_FCRC_0	BIT(8)
  66#define CR_FCRC_1	BIT(9)
  67#define CR_EDM_0	BIT(10)
  68#define CR_EDM_1	BIT(11)
  69#define CR_ENABLE	BIT(14)
  70
  71/* Bits definition for status register (DCMI_SR) */
  72#define SR_HSYNC	BIT(0)
  73#define SR_VSYNC	BIT(1)
  74#define SR_FNE		BIT(2)
  75
  76/*
  77 * Bits definition for interrupt registers
  78 * (DCMI_RIS, DCMI_IER, DCMI_MIS, DCMI_ICR)
  79 */
  80#define IT_FRAME	BIT(0)
  81#define IT_OVR		BIT(1)
  82#define IT_ERR		BIT(2)
  83#define IT_VSYNC	BIT(3)
  84#define IT_LINE		BIT(4)
  85
  86enum state {
  87	STOPPED = 0,
  88	WAIT_FOR_BUFFER,
  89	RUNNING,
  90};
  91
  92#define MIN_WIDTH	16U
  93#define MAX_WIDTH	2592U
  94#define MIN_HEIGHT	16U
  95#define MAX_HEIGHT	2592U
  96
  97#define TIMEOUT_MS	1000
  98
  99#define OVERRUN_ERROR_THRESHOLD	3
 100
 101struct dcmi_format {
 102	u32	fourcc;
 103	u32	mbus_code;
 104	u8	bpp;
 105};
 106
 107struct dcmi_framesize {
 108	u32	width;
 109	u32	height;
 110};
 111
 112struct dcmi_buf {
 113	struct vb2_v4l2_buffer	vb;
 114	bool			prepared;
 115	struct sg_table		sgt;
 116	size_t			size;
 117	struct list_head	list;
 118};
 119
 120struct stm32_dcmi {
 121	/* Protects the access of variables shared within the interrupt */
 122	spinlock_t			irqlock;
 123	struct device			*dev;
 124	void __iomem			*regs;
 125	struct resource			*res;
 126	struct reset_control		*rstc;
 127	int				sequence;
 128	struct list_head		buffers;
 129	struct dcmi_buf			*active;
 130	int			irq;
 131
 132	struct v4l2_device		v4l2_dev;
 133	struct video_device		*vdev;
 134	struct v4l2_async_notifier	notifier;
 135	struct v4l2_subdev		*source;
 136	struct v4l2_subdev		*s_subdev;
 137	struct v4l2_format		fmt;
 138	struct v4l2_rect		crop;
 139	bool				do_crop;
 140
 141	const struct dcmi_format	**sd_formats;
 142	unsigned int			num_of_sd_formats;
 143	const struct dcmi_format	*sd_format;
 144	struct dcmi_framesize		*sd_framesizes;
 145	unsigned int			num_of_sd_framesizes;
 146	struct dcmi_framesize		sd_framesize;
 147	struct v4l2_rect		sd_bounds;
 148
 149	/* Protect this data structure */
 150	struct mutex			lock;
 151	struct vb2_queue		queue;
 152
 153	struct v4l2_mbus_config_parallel	bus;
 154	enum v4l2_mbus_type		bus_type;
 155	struct completion		complete;
 156	struct clk			*mclk;
 157	enum state			state;
 158	struct dma_chan			*dma_chan;
 159	dma_cookie_t			dma_cookie;
 160	u32				dma_max_burst;
 161	u32				misr;
 162	int				errors_count;
 163	int				overrun_count;
 164	int				buffers_count;
 165
 166	/* Ensure DMA operations atomicity */
 167	struct mutex			dma_lock;
 168
 169	struct media_device		mdev;
 170	struct media_pad		vid_cap_pad;
 171	struct media_pipeline		pipeline;
 172};
 173
 174static inline struct stm32_dcmi *notifier_to_dcmi(struct v4l2_async_notifier *n)
 175{
 176	return container_of(n, struct stm32_dcmi, notifier);
 177}
 178
 179static inline u32 reg_read(void __iomem *base, u32 reg)
 180{
 181	return readl_relaxed(base + reg);
 182}
 183
 184static inline void reg_write(void __iomem *base, u32 reg, u32 val)
 185{
 186	writel_relaxed(val, base + reg);
 187}
 188
 189static inline void reg_set(void __iomem *base, u32 reg, u32 mask)
 190{
 191	reg_write(base, reg, reg_read(base, reg) | mask);
 192}
 193
 194static inline void reg_clear(void __iomem *base, u32 reg, u32 mask)
 195{
 196	reg_write(base, reg, reg_read(base, reg) & ~mask);
 197}
 198
 199static int dcmi_start_capture(struct stm32_dcmi *dcmi, struct dcmi_buf *buf);
 200
 201static void dcmi_buffer_done(struct stm32_dcmi *dcmi,
 202			     struct dcmi_buf *buf,
 203			     size_t bytesused,
 204			     int err)
 205{
 206	struct vb2_v4l2_buffer *vbuf;
 207
 208	if (!buf)
 209		return;
 210
 211	list_del_init(&buf->list);
 212
 213	vbuf = &buf->vb;
 214
 215	vbuf->sequence = dcmi->sequence++;
 216	vbuf->field = V4L2_FIELD_NONE;
 217	vbuf->vb2_buf.timestamp = ktime_get_ns();
 218	vb2_set_plane_payload(&vbuf->vb2_buf, 0, bytesused);
 219	vb2_buffer_done(&vbuf->vb2_buf,
 220			err ? VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
 221	dev_dbg(dcmi->dev, "buffer[%d] done seq=%d, bytesused=%zu\n",
 222		vbuf->vb2_buf.index, vbuf->sequence, bytesused);
 223
 224	dcmi->buffers_count++;
 225	dcmi->active = NULL;
 226}
 227
 228static int dcmi_restart_capture(struct stm32_dcmi *dcmi)
 229{
 230	struct dcmi_buf *buf;
 231
 232	spin_lock_irq(&dcmi->irqlock);
 233
 234	if (dcmi->state != RUNNING) {
 235		spin_unlock_irq(&dcmi->irqlock);
 236		return -EINVAL;
 237	}
 238
 239	/* Restart a new DMA transfer with next buffer */
 240	if (list_empty(&dcmi->buffers)) {
 241		dev_dbg(dcmi->dev, "Capture restart is deferred to next buffer queueing\n");
 242		dcmi->state = WAIT_FOR_BUFFER;
 243		spin_unlock_irq(&dcmi->irqlock);
 244		return 0;
 245	}
 246	buf = list_entry(dcmi->buffers.next, struct dcmi_buf, list);
 247	dcmi->active = buf;
 248
 249	spin_unlock_irq(&dcmi->irqlock);
 250
 251	return dcmi_start_capture(dcmi, buf);
 252}
 253
 254static void dcmi_dma_callback(void *param)
 255{
 256	struct stm32_dcmi *dcmi = (struct stm32_dcmi *)param;
 257	struct dma_tx_state state;
 258	enum dma_status status;
 259	struct dcmi_buf *buf = dcmi->active;
 260
 261	spin_lock_irq(&dcmi->irqlock);
 262
 263	/* Check DMA status */
 264	status = dmaengine_tx_status(dcmi->dma_chan, dcmi->dma_cookie, &state);
 265
 266	switch (status) {
 267	case DMA_IN_PROGRESS:
 268		dev_dbg(dcmi->dev, "%s: Received DMA_IN_PROGRESS\n", __func__);
 269		break;
 270	case DMA_PAUSED:
 271		dev_err(dcmi->dev, "%s: Received DMA_PAUSED\n", __func__);
 272		break;
 273	case DMA_ERROR:
 274		dev_err(dcmi->dev, "%s: Received DMA_ERROR\n", __func__);
 275
 276		/* Return buffer to V4L2 in error state */
 277		dcmi_buffer_done(dcmi, buf, 0, -EIO);
 278		break;
 279	case DMA_COMPLETE:
 280		dev_dbg(dcmi->dev, "%s: Received DMA_COMPLETE\n", __func__);
 281
 282		/* Return buffer to V4L2 */
 283		dcmi_buffer_done(dcmi, buf, buf->size, 0);
 284
 285		spin_unlock_irq(&dcmi->irqlock);
 286
 287		/* Restart capture */
 288		if (dcmi_restart_capture(dcmi))
 289			dev_err(dcmi->dev, "%s: Cannot restart capture on DMA complete\n",
 290				__func__);
 291		return;
 292	default:
 293		dev_err(dcmi->dev, "%s: Received unknown status\n", __func__);
 294		break;
 295	}
 296
 297	spin_unlock_irq(&dcmi->irqlock);
 298}
 299
 300static int dcmi_start_dma(struct stm32_dcmi *dcmi,
 301			  struct dcmi_buf *buf)
 302{
 303	struct dma_async_tx_descriptor *desc = NULL;
 304	struct dma_slave_config config;
 305	int ret;
 306
 307	memset(&config, 0, sizeof(config));
 308
 309	config.src_addr = (dma_addr_t)dcmi->res->start + DCMI_DR;
 310	config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
 311	config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
 312	config.dst_maxburst = 4;
 313
 314	/* Configure DMA channel */
 315	ret = dmaengine_slave_config(dcmi->dma_chan, &config);
 316	if (ret < 0) {
 317		dev_err(dcmi->dev, "%s: DMA channel config failed (%d)\n",
 318			__func__, ret);
 319		return ret;
 320	}
 321
 322	/*
 323	 * Avoid call of dmaengine_terminate_sync() between
 324	 * dmaengine_prep_slave_single() and dmaengine_submit()
 325	 * by locking the whole DMA submission sequence
 326	 */
 327	mutex_lock(&dcmi->dma_lock);
 328
 329	/* Prepare a DMA transaction */
 330	desc = dmaengine_prep_slave_sg(dcmi->dma_chan, buf->sgt.sgl, buf->sgt.nents,
 331				       DMA_DEV_TO_MEM,
 332				       DMA_PREP_INTERRUPT);
 333	if (!desc) {
 334		dev_err(dcmi->dev, "%s: DMA dmaengine_prep_slave_sg failed\n", __func__);
 335		mutex_unlock(&dcmi->dma_lock);
 336		return -EINVAL;
 337	}
 338
 339	/* Set completion callback routine for notification */
 340	desc->callback = dcmi_dma_callback;
 341	desc->callback_param = dcmi;
 342
 343	/* Push current DMA transaction in the pending queue */
 344	dcmi->dma_cookie = dmaengine_submit(desc);
 345	if (dma_submit_error(dcmi->dma_cookie)) {
 346		dev_err(dcmi->dev, "%s: DMA submission failed\n", __func__);
 347		mutex_unlock(&dcmi->dma_lock);
 348		return -ENXIO;
 349	}
 350
 351	mutex_unlock(&dcmi->dma_lock);
 352
 353	dma_async_issue_pending(dcmi->dma_chan);
 354
 355	return 0;
 356}
 357
 358static int dcmi_start_capture(struct stm32_dcmi *dcmi, struct dcmi_buf *buf)
 359{
 360	int ret;
 361
 362	if (!buf)
 363		return -EINVAL;
 364
 365	ret = dcmi_start_dma(dcmi, buf);
 366	if (ret) {
 367		dcmi->errors_count++;
 368		return ret;
 369	}
 370
 371	/* Enable capture */
 372	reg_set(dcmi->regs, DCMI_CR, CR_CAPTURE);
 373
 374	return 0;
 375}
 376
 377static void dcmi_set_crop(struct stm32_dcmi *dcmi)
 378{
 379	u32 size, start;
 380
 381	/* Crop resolution */
 382	size = ((dcmi->crop.height - 1) << 16) |
 383		((dcmi->crop.width << 1) - 1);
 384	reg_write(dcmi->regs, DCMI_CWSIZE, size);
 385
 386	/* Crop start point */
 387	start = ((dcmi->crop.top) << 16) |
 388		 ((dcmi->crop.left << 1));
 389	reg_write(dcmi->regs, DCMI_CWSTRT, start);
 390
 391	dev_dbg(dcmi->dev, "Cropping to (%d,%d)/%ux%u\n",
 392		dcmi->crop.left, dcmi->crop.top,
 393		dcmi->crop.width, dcmi->crop.height);
 394
 395	/* Enable crop */
 396	reg_set(dcmi->regs, DCMI_CR, CR_CROP);
 397}
 398
 399static void dcmi_process_jpeg(struct stm32_dcmi *dcmi)
 400{
 401	struct dma_tx_state state;
 402	enum dma_status status;
 403	struct dcmi_buf *buf = dcmi->active;
 404
 405	if (!buf)
 406		return;
 407
 408	/*
 409	 * Because of variable JPEG buffer size sent by sensor,
 410	 * DMA transfer never completes due to transfer size never reached.
 411	 * In order to ensure that all the JPEG data are transferred
 412	 * in active buffer memory, DMA is drained.
 413	 * Then DMA tx status gives the amount of data transferred
 414	 * to memory, which is then returned to V4L2 through the active
 415	 * buffer payload.
 416	 */
 417
 418	/* Drain DMA */
 419	dmaengine_synchronize(dcmi->dma_chan);
 420
 421	/* Get DMA residue to get JPEG size */
 422	status = dmaengine_tx_status(dcmi->dma_chan, dcmi->dma_cookie, &state);
 423	if (status != DMA_ERROR && state.residue < buf->size) {
 424		/* Return JPEG buffer to V4L2 with received JPEG buffer size */
 425		dcmi_buffer_done(dcmi, buf, buf->size - state.residue, 0);
 426	} else {
 427		dcmi->errors_count++;
 428		dev_err(dcmi->dev, "%s: Cannot get JPEG size from DMA\n",
 429			__func__);
 430		/* Return JPEG buffer to V4L2 in ERROR state */
 431		dcmi_buffer_done(dcmi, buf, 0, -EIO);
 432	}
 433
 434	/* Abort DMA operation */
 435	dmaengine_terminate_sync(dcmi->dma_chan);
 436
 437	/* Restart capture */
 438	if (dcmi_restart_capture(dcmi))
 439		dev_err(dcmi->dev, "%s: Cannot restart capture on JPEG received\n",
 440			__func__);
 441}
 442
 443static irqreturn_t dcmi_irq_thread(int irq, void *arg)
 444{
 445	struct stm32_dcmi *dcmi = arg;
 446
 447	spin_lock_irq(&dcmi->irqlock);
 448
 449	if (dcmi->misr & IT_OVR) {
 450		dcmi->overrun_count++;
 451		if (dcmi->overrun_count > OVERRUN_ERROR_THRESHOLD)
 452			dcmi->errors_count++;
 453	}
 454	if (dcmi->misr & IT_ERR)
 455		dcmi->errors_count++;
 456
 457	if (dcmi->sd_format->fourcc == V4L2_PIX_FMT_JPEG &&
 458	    dcmi->misr & IT_FRAME) {
 459		/* JPEG received */
 460		spin_unlock_irq(&dcmi->irqlock);
 461		dcmi_process_jpeg(dcmi);
 462		return IRQ_HANDLED;
 463	}
 464
 465	spin_unlock_irq(&dcmi->irqlock);
 466	return IRQ_HANDLED;
 467}
 468
 469static irqreturn_t dcmi_irq_callback(int irq, void *arg)
 470{
 471	struct stm32_dcmi *dcmi = arg;
 472	unsigned long flags;
 473
 474	spin_lock_irqsave(&dcmi->irqlock, flags);
 475
 476	dcmi->misr = reg_read(dcmi->regs, DCMI_MIS);
 477
 478	/* Clear interrupt */
 479	reg_set(dcmi->regs, DCMI_ICR, IT_FRAME | IT_OVR | IT_ERR);
 480
 481	spin_unlock_irqrestore(&dcmi->irqlock, flags);
 482
 483	return IRQ_WAKE_THREAD;
 484}
 485
 486static int dcmi_queue_setup(struct vb2_queue *vq,
 487			    unsigned int *nbuffers,
 488			    unsigned int *nplanes,
 489			    unsigned int sizes[],
 490			    struct device *alloc_devs[])
 491{
 492	struct stm32_dcmi *dcmi = vb2_get_drv_priv(vq);
 493	unsigned int size;
 494
 495	size = dcmi->fmt.fmt.pix.sizeimage;
 496
 497	/* Make sure the image size is large enough */
 498	if (*nplanes)
 499		return sizes[0] < size ? -EINVAL : 0;
 500
 501	*nplanes = 1;
 502	sizes[0] = size;
 503
 504	dev_dbg(dcmi->dev, "Setup queue, count=%d, size=%d\n",
 505		*nbuffers, size);
 506
 507	return 0;
 508}
 509
 510static int dcmi_buf_init(struct vb2_buffer *vb)
 511{
 512	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
 513	struct dcmi_buf *buf = container_of(vbuf, struct dcmi_buf, vb);
 514
 515	INIT_LIST_HEAD(&buf->list);
 516
 517	return 0;
 518}
 519
 520static int dcmi_buf_prepare(struct vb2_buffer *vb)
 521{
 522	struct stm32_dcmi *dcmi =  vb2_get_drv_priv(vb->vb2_queue);
 523	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
 524	struct dcmi_buf *buf = container_of(vbuf, struct dcmi_buf, vb);
 525	unsigned long size;
 526	unsigned int num_sgs = 1;
 527	dma_addr_t dma_buf;
 528	struct scatterlist *sg;
 529	int i, ret;
 530
 531	size = dcmi->fmt.fmt.pix.sizeimage;
 532
 533	if (vb2_plane_size(vb, 0) < size) {
 534		dev_err(dcmi->dev, "%s data will not fit into plane (%lu < %lu)\n",
 535			__func__, vb2_plane_size(vb, 0), size);
 536		return -EINVAL;
 537	}
 538
 539	vb2_set_plane_payload(vb, 0, size);
 540
 541	if (!buf->prepared) {
 542		/* Get memory addresses */
 543		buf->size = vb2_plane_size(&buf->vb.vb2_buf, 0);
 544		if (buf->size > dcmi->dma_max_burst)
 545			num_sgs = DIV_ROUND_UP(buf->size, dcmi->dma_max_burst);
 546
 547		ret = sg_alloc_table(&buf->sgt, num_sgs, GFP_ATOMIC);
 548		if (ret) {
 549			dev_err(dcmi->dev, "sg table alloc failed\n");
 550			return ret;
 551		}
 552
 553		dma_buf = vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf, 0);
 554
 555		dev_dbg(dcmi->dev, "buffer[%d] phy=%pad size=%zu\n",
 556			vb->index, &dma_buf, buf->size);
 557
 558		for_each_sg(buf->sgt.sgl, sg, num_sgs, i) {
 559			size_t bytes = min_t(size_t, size, dcmi->dma_max_burst);
 560
 561			sg_dma_address(sg) = dma_buf;
 562			sg_dma_len(sg) = bytes;
 563			dma_buf += bytes;
 564			size -= bytes;
 565		}
 566
 567		buf->prepared = true;
 568
 569		vb2_set_plane_payload(&buf->vb.vb2_buf, 0, buf->size);
 570	}
 571
 572	return 0;
 573}
 574
 575static void dcmi_buf_queue(struct vb2_buffer *vb)
 576{
 577	struct stm32_dcmi *dcmi =  vb2_get_drv_priv(vb->vb2_queue);
 578	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
 579	struct dcmi_buf *buf = container_of(vbuf, struct dcmi_buf, vb);
 580
 581	spin_lock_irq(&dcmi->irqlock);
 582
 583	/* Enqueue to video buffers list */
 584	list_add_tail(&buf->list, &dcmi->buffers);
 585
 586	if (dcmi->state == WAIT_FOR_BUFFER) {
 587		dcmi->state = RUNNING;
 588		dcmi->active = buf;
 589
 590		dev_dbg(dcmi->dev, "Starting capture on buffer[%d] queued\n",
 591			buf->vb.vb2_buf.index);
 592
 593		spin_unlock_irq(&dcmi->irqlock);
 594		if (dcmi_start_capture(dcmi, buf))
 595			dev_err(dcmi->dev, "%s: Cannot restart capture on overflow or error\n",
 596				__func__);
 597		return;
 598	}
 599
 600	spin_unlock_irq(&dcmi->irqlock);
 601}
 602
 603static struct media_entity *dcmi_find_source(struct stm32_dcmi *dcmi)
 604{
 605	struct media_entity *entity = &dcmi->vdev->entity;
 606	struct media_pad *pad;
 607
 608	/* Walk searching for entity having no sink */
 609	while (1) {
 610		pad = &entity->pads[0];
 611		if (!(pad->flags & MEDIA_PAD_FL_SINK))
 612			break;
 613
 614		pad = media_pad_remote_pad_first(pad);
 615		if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
 616			break;
 617
 618		entity = pad->entity;
 619	}
 620
 621	return entity;
 622}
 623
 624static int dcmi_pipeline_s_fmt(struct stm32_dcmi *dcmi,
 625			       struct v4l2_subdev_format *format)
 626{
 627	struct media_entity *entity = &dcmi->source->entity;
 628	struct v4l2_subdev *subdev;
 629	struct media_pad *sink_pad = NULL;
 630	struct media_pad *src_pad = NULL;
 631	struct media_pad *pad = NULL;
 632	struct v4l2_subdev_format fmt = *format;
 633	bool found = false;
 634	int ret;
 635
 636	/*
 637	 * Starting from sensor subdevice, walk within
 638	 * pipeline and set format on each subdevice
 639	 */
 640	while (1) {
 641		unsigned int i;
 642
 643		/* Search if current entity has a source pad */
 644		for (i = 0; i < entity->num_pads; i++) {
 645			pad = &entity->pads[i];
 646			if (pad->flags & MEDIA_PAD_FL_SOURCE) {
 647				src_pad = pad;
 648				found = true;
 649				break;
 650			}
 651		}
 652		if (!found)
 653			break;
 654
 655		subdev = media_entity_to_v4l2_subdev(entity);
 656
 657		/* Propagate format on sink pad if any, otherwise source pad */
 658		if (sink_pad)
 659			pad = sink_pad;
 660
 661		dev_dbg(dcmi->dev, "\"%s\":%d pad format set to 0x%x %ux%u\n",
 662			subdev->name, pad->index, format->format.code,
 663			format->format.width, format->format.height);
 664
 665		fmt.pad = pad->index;
 666		ret = v4l2_subdev_call(subdev, pad, set_fmt, NULL, &fmt);
 667		if (ret < 0) {
 668			dev_err(dcmi->dev, "%s: Failed to set format 0x%x %ux%u on \"%s\":%d pad (%d)\n",
 669				__func__, format->format.code,
 670				format->format.width, format->format.height,
 671				subdev->name, pad->index, ret);
 672			return ret;
 673		}
 674
 675		if (fmt.format.code != format->format.code ||
 676		    fmt.format.width != format->format.width ||
 677		    fmt.format.height != format->format.height) {
 678			dev_dbg(dcmi->dev, "\"%s\":%d pad format has been changed to 0x%x %ux%u\n",
 679				subdev->name, pad->index, fmt.format.code,
 680				fmt.format.width, fmt.format.height);
 681		}
 682
 683		/* Walk to next entity */
 684		sink_pad = media_pad_remote_pad_first(src_pad);
 685		if (!sink_pad || !is_media_entity_v4l2_subdev(sink_pad->entity))
 686			break;
 687
 688		entity = sink_pad->entity;
 689	}
 690	*format = fmt;
 691
 692	return 0;
 693}
 694
 695static int dcmi_start_streaming(struct vb2_queue *vq, unsigned int count)
 696{
 697	struct stm32_dcmi *dcmi = vb2_get_drv_priv(vq);
 698	struct dcmi_buf *buf, *node;
 699	u32 val = 0;
 700	int ret;
 701
 702	ret = pm_runtime_resume_and_get(dcmi->dev);
 703	if (ret < 0) {
 704		dev_err(dcmi->dev, "%s: Failed to start streaming, cannot get sync (%d)\n",
 705			__func__, ret);
 706		goto err_unlocked;
 707	}
 708
 709	ret = video_device_pipeline_start(dcmi->vdev, &dcmi->pipeline);
 710	if (ret < 0) {
 711		dev_err(dcmi->dev, "%s: Failed to start streaming, media pipeline start error (%d)\n",
 712			__func__, ret);
 713		goto err_pm_put;
 714	}
 715
 716	ret = v4l2_subdev_call(dcmi->s_subdev, video, s_stream, 1);
 717	if (ret < 0) {
 718		dev_err(dcmi->dev, "%s: Failed to start source subdev, error (%d)\n",
 719			__func__, ret);
 720		goto err_media_pipeline_stop;
 721	}
 722
 723	spin_lock_irq(&dcmi->irqlock);
 724
 725	/* Set bus width */
 726	switch (dcmi->bus.bus_width) {
 727	case 14:
 728		val |= CR_EDM_0 | CR_EDM_1;
 729		break;
 730	case 12:
 731		val |= CR_EDM_1;
 732		break;
 733	case 10:
 734		val |= CR_EDM_0;
 735		break;
 736	default:
 737		/* Set bus width to 8 bits by default */
 738		break;
 739	}
 740
 741	/* Set vertical synchronization polarity */
 742	if (dcmi->bus.flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
 743		val |= CR_VSPOL;
 744
 745	/* Set horizontal synchronization polarity */
 746	if (dcmi->bus.flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
 747		val |= CR_HSPOL;
 748
 749	/* Set pixel clock polarity */
 750	if (dcmi->bus.flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
 751		val |= CR_PCKPOL;
 752
 753	/*
 754	 * BT656 embedded synchronisation bus mode.
 755	 *
 756	 * Default SAV/EAV mode is supported here with default codes
 757	 * SAV=0xff000080 & EAV=0xff00009d.
 758	 * With DCMI this means LSC=SAV=0x80 & LEC=EAV=0x9d.
 759	 */
 760	if (dcmi->bus_type == V4L2_MBUS_BT656) {
 761		val |= CR_ESS;
 762
 763		/* Unmask all codes */
 764		reg_write(dcmi->regs, DCMI_ESUR, 0xffffffff);/* FEC:LEC:LSC:FSC */
 765
 766		/* Trig on LSC=0x80 & LEC=0x9d codes, ignore FSC and FEC */
 767		reg_write(dcmi->regs, DCMI_ESCR, 0xff9d80ff);/* FEC:LEC:LSC:FSC */
 768	}
 769
 770	reg_write(dcmi->regs, DCMI_CR, val);
 771
 772	/* Set crop */
 773	if (dcmi->do_crop)
 774		dcmi_set_crop(dcmi);
 775
 776	/* Enable jpeg capture */
 777	if (dcmi->sd_format->fourcc == V4L2_PIX_FMT_JPEG)
 778		reg_set(dcmi->regs, DCMI_CR, CR_CM);/* Snapshot mode */
 779
 780	/* Enable dcmi */
 781	reg_set(dcmi->regs, DCMI_CR, CR_ENABLE);
 782
 783	dcmi->sequence = 0;
 784	dcmi->errors_count = 0;
 785	dcmi->overrun_count = 0;
 786	dcmi->buffers_count = 0;
 787
 788	/*
 789	 * Start transfer if at least one buffer has been queued,
 790	 * otherwise transfer is deferred at buffer queueing
 791	 */
 792	if (list_empty(&dcmi->buffers)) {
 793		dev_dbg(dcmi->dev, "Start streaming is deferred to next buffer queueing\n");
 794		dcmi->state = WAIT_FOR_BUFFER;
 795		spin_unlock_irq(&dcmi->irqlock);
 796		return 0;
 797	}
 798
 799	buf = list_entry(dcmi->buffers.next, struct dcmi_buf, list);
 800	dcmi->active = buf;
 801
 802	dcmi->state = RUNNING;
 803
 804	dev_dbg(dcmi->dev, "Start streaming, starting capture\n");
 805
 806	spin_unlock_irq(&dcmi->irqlock);
 807	ret = dcmi_start_capture(dcmi, buf);
 808	if (ret) {
 809		dev_err(dcmi->dev, "%s: Start streaming failed, cannot start capture\n",
 810			__func__);
 811		goto err_pipeline_stop;
 812	}
 813
 814	/* Enable interruptions */
 815	if (dcmi->sd_format->fourcc == V4L2_PIX_FMT_JPEG)
 816		reg_set(dcmi->regs, DCMI_IER, IT_FRAME | IT_OVR | IT_ERR);
 817	else
 818		reg_set(dcmi->regs, DCMI_IER, IT_OVR | IT_ERR);
 819
 820	return 0;
 821
 822err_pipeline_stop:
 823	v4l2_subdev_call(dcmi->s_subdev, video, s_stream, 0);
 824
 825err_media_pipeline_stop:
 826	video_device_pipeline_stop(dcmi->vdev);
 827
 828err_pm_put:
 829	pm_runtime_put(dcmi->dev);
 830err_unlocked:
 831	spin_lock_irq(&dcmi->irqlock);
 832	/*
 833	 * Return all buffers to vb2 in QUEUED state.
 834	 * This will give ownership back to userspace
 835	 */
 836	list_for_each_entry_safe(buf, node, &dcmi->buffers, list) {
 837		list_del_init(&buf->list);
 838		vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_QUEUED);
 839	}
 840	dcmi->active = NULL;
 841	spin_unlock_irq(&dcmi->irqlock);
 842
 843	return ret;
 844}
 845
 846static void dcmi_stop_streaming(struct vb2_queue *vq)
 847{
 848	struct stm32_dcmi *dcmi = vb2_get_drv_priv(vq);
 849	struct dcmi_buf *buf, *node;
 850	int ret;
 851
 852	ret = v4l2_subdev_call(dcmi->s_subdev, video, s_stream, 0);
 853	if (ret < 0)
 854		dev_err(dcmi->dev, "%s: Failed to stop source subdev, error (%d)\n",
 855			__func__, ret);
 856
 857	video_device_pipeline_stop(dcmi->vdev);
 858
 859	spin_lock_irq(&dcmi->irqlock);
 860
 861	/* Disable interruptions */
 862	reg_clear(dcmi->regs, DCMI_IER, IT_FRAME | IT_OVR | IT_ERR);
 863
 864	/* Disable DCMI */
 865	reg_clear(dcmi->regs, DCMI_CR, CR_ENABLE);
 866
 867	/* Return all queued buffers to vb2 in ERROR state */
 868	list_for_each_entry_safe(buf, node, &dcmi->buffers, list) {
 869		list_del_init(&buf->list);
 870		vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
 871	}
 872
 873	dcmi->active = NULL;
 874	dcmi->state = STOPPED;
 875
 876	spin_unlock_irq(&dcmi->irqlock);
 877
 878	/* Stop all pending DMA operations */
 879	mutex_lock(&dcmi->dma_lock);
 880	dmaengine_terminate_sync(dcmi->dma_chan);
 881	mutex_unlock(&dcmi->dma_lock);
 882
 883	pm_runtime_put(dcmi->dev);
 884
 885	if (dcmi->errors_count)
 886		dev_warn(dcmi->dev, "Some errors found while streaming: errors=%d (overrun=%d), buffers=%d\n",
 887			 dcmi->errors_count, dcmi->overrun_count,
 888			 dcmi->buffers_count);
 889	dev_dbg(dcmi->dev, "Stop streaming, errors=%d (overrun=%d), buffers=%d\n",
 890		dcmi->errors_count, dcmi->overrun_count,
 891		dcmi->buffers_count);
 892}
 893
 894static const struct vb2_ops dcmi_video_qops = {
 895	.queue_setup		= dcmi_queue_setup,
 896	.buf_init		= dcmi_buf_init,
 897	.buf_prepare		= dcmi_buf_prepare,
 898	.buf_queue		= dcmi_buf_queue,
 899	.start_streaming	= dcmi_start_streaming,
 900	.stop_streaming		= dcmi_stop_streaming,
 901};
 902
 903static int dcmi_g_fmt_vid_cap(struct file *file, void *priv,
 904			      struct v4l2_format *fmt)
 905{
 906	struct stm32_dcmi *dcmi = video_drvdata(file);
 907
 908	*fmt = dcmi->fmt;
 909
 910	return 0;
 911}
 912
 913static const struct dcmi_format *find_format_by_fourcc(struct stm32_dcmi *dcmi,
 914						       unsigned int fourcc)
 915{
 916	unsigned int num_formats = dcmi->num_of_sd_formats;
 917	const struct dcmi_format *fmt;
 918	unsigned int i;
 919
 920	for (i = 0; i < num_formats; i++) {
 921		fmt = dcmi->sd_formats[i];
 922		if (fmt->fourcc == fourcc)
 923			return fmt;
 924	}
 925
 926	return NULL;
 927}
 928
 929static void __find_outer_frame_size(struct stm32_dcmi *dcmi,
 930				    struct v4l2_pix_format *pix,
 931				    struct dcmi_framesize *framesize)
 932{
 933	struct dcmi_framesize *match = NULL;
 934	unsigned int i;
 935	unsigned int min_err = UINT_MAX;
 936
 937	for (i = 0; i < dcmi->num_of_sd_framesizes; i++) {
 938		struct dcmi_framesize *fsize = &dcmi->sd_framesizes[i];
 939		int w_err = (fsize->width - pix->width);
 940		int h_err = (fsize->height - pix->height);
 941		int err = w_err + h_err;
 942
 943		if (w_err >= 0 && h_err >= 0 && err < min_err) {
 944			min_err = err;
 945			match = fsize;
 946		}
 947	}
 948	if (!match)
 949		match = &dcmi->sd_framesizes[0];
 950
 951	*framesize = *match;
 952}
 953
 954static int dcmi_try_fmt(struct stm32_dcmi *dcmi, struct v4l2_format *f,
 955			const struct dcmi_format **sd_format,
 956			struct dcmi_framesize *sd_framesize)
 957{
 958	const struct dcmi_format *sd_fmt;
 959	struct dcmi_framesize sd_fsize;
 960	struct v4l2_pix_format *pix = &f->fmt.pix;
 961	struct v4l2_subdev_format format = {
 962		.which = V4L2_SUBDEV_FORMAT_TRY,
 963	};
 964	bool do_crop;
 965	int ret;
 966
 967	sd_fmt = find_format_by_fourcc(dcmi, pix->pixelformat);
 968	if (!sd_fmt) {
 969		if (!dcmi->num_of_sd_formats)
 970			return -ENODATA;
 971
 972		sd_fmt = dcmi->sd_formats[dcmi->num_of_sd_formats - 1];
 973		pix->pixelformat = sd_fmt->fourcc;
 974	}
 975
 976	/* Limit to hardware capabilities */
 977	pix->width = clamp(pix->width, MIN_WIDTH, MAX_WIDTH);
 978	pix->height = clamp(pix->height, MIN_HEIGHT, MAX_HEIGHT);
 979
 980	/* No crop if JPEG is requested */
 981	do_crop = dcmi->do_crop && (pix->pixelformat != V4L2_PIX_FMT_JPEG);
 982
 983	if (do_crop && dcmi->num_of_sd_framesizes) {
 984		struct dcmi_framesize outer_sd_fsize;
 985		/*
 986		 * If crop is requested and sensor have discrete frame sizes,
 987		 * select the frame size that is just larger than request
 988		 */
 989		__find_outer_frame_size(dcmi, pix, &outer_sd_fsize);
 990		pix->width = outer_sd_fsize.width;
 991		pix->height = outer_sd_fsize.height;
 992	}
 993
 994	v4l2_fill_mbus_format(&format.format, pix, sd_fmt->mbus_code);
 995	ret = v4l2_subdev_call_state_try(dcmi->source, pad, set_fmt, &format);
 996	if (ret < 0)
 997		return ret;
 998
 999	/* Update pix regarding to what sensor can do */
1000	v4l2_fill_pix_format(pix, &format.format);
1001
1002	/* Save resolution that sensor can actually do */
1003	sd_fsize.width = pix->width;
1004	sd_fsize.height = pix->height;
1005
1006	if (do_crop) {
1007		struct v4l2_rect c = dcmi->crop;
1008		struct v4l2_rect max_rect;
1009
1010		/*
1011		 * Adjust crop by making the intersection between
1012		 * format resolution request and crop request
1013		 */
1014		max_rect.top = 0;
1015		max_rect.left = 0;
1016		max_rect.width = pix->width;
1017		max_rect.height = pix->height;
1018		v4l2_rect_map_inside(&c, &max_rect);
1019		c.top  = clamp_t(s32, c.top, 0, pix->height - c.height);
1020		c.left = clamp_t(s32, c.left, 0, pix->width - c.width);
1021		dcmi->crop = c;
1022
1023		/* Adjust format resolution request to crop */
1024		pix->width = dcmi->crop.width;
1025		pix->height = dcmi->crop.height;
1026	}
1027
1028	pix->field = V4L2_FIELD_NONE;
1029	pix->bytesperline = pix->width * sd_fmt->bpp;
1030	pix->sizeimage = pix->bytesperline * pix->height;
1031
1032	if (sd_format)
1033		*sd_format = sd_fmt;
1034	if (sd_framesize)
1035		*sd_framesize = sd_fsize;
1036
1037	return 0;
1038}
1039
1040static int dcmi_set_fmt(struct stm32_dcmi *dcmi, struct v4l2_format *f)
1041{
1042	struct v4l2_subdev_format format = {
1043		.which = V4L2_SUBDEV_FORMAT_ACTIVE,
1044	};
1045	const struct dcmi_format *sd_format;
1046	struct dcmi_framesize sd_framesize;
1047	struct v4l2_mbus_framefmt *mf = &format.format;
1048	struct v4l2_pix_format *pix = &f->fmt.pix;
1049	int ret;
1050
1051	/*
1052	 * Try format, fmt.width/height could have been changed
1053	 * to match sensor capability or crop request
1054	 * sd_format & sd_framesize will contain what subdev
1055	 * can do for this request.
1056	 */
1057	ret = dcmi_try_fmt(dcmi, f, &sd_format, &sd_framesize);
1058	if (ret)
1059		return ret;
1060
1061	/* Disable crop if JPEG is requested or BT656 bus is selected */
1062	if (pix->pixelformat == V4L2_PIX_FMT_JPEG &&
1063	    dcmi->bus_type != V4L2_MBUS_BT656)
1064		dcmi->do_crop = false;
1065
1066	/* pix to mbus format */
1067	v4l2_fill_mbus_format(mf, pix,
1068			      sd_format->mbus_code);
1069	mf->width = sd_framesize.width;
1070	mf->height = sd_framesize.height;
1071
1072	ret = dcmi_pipeline_s_fmt(dcmi, &format);
1073	if (ret < 0)
1074		return ret;
1075
1076	dev_dbg(dcmi->dev, "Sensor format set to 0x%x %ux%u\n",
1077		mf->code, mf->width, mf->height);
1078	dev_dbg(dcmi->dev, "Buffer format set to %4.4s %ux%u\n",
1079		(char *)&pix->pixelformat,
1080		pix->width, pix->height);
1081
1082	dcmi->fmt = *f;
1083	dcmi->sd_format = sd_format;
1084	dcmi->sd_framesize = sd_framesize;
1085
1086	return 0;
1087}
1088
1089static int dcmi_s_fmt_vid_cap(struct file *file, void *priv,
1090			      struct v4l2_format *f)
1091{
1092	struct stm32_dcmi *dcmi = video_drvdata(file);
1093
1094	if (vb2_is_streaming(&dcmi->queue))
1095		return -EBUSY;
1096
1097	return dcmi_set_fmt(dcmi, f);
1098}
1099
1100static int dcmi_try_fmt_vid_cap(struct file *file, void *priv,
1101				struct v4l2_format *f)
1102{
1103	struct stm32_dcmi *dcmi = video_drvdata(file);
1104
1105	return dcmi_try_fmt(dcmi, f, NULL, NULL);
1106}
1107
1108static int dcmi_enum_fmt_vid_cap(struct file *file, void  *priv,
1109				 struct v4l2_fmtdesc *f)
1110{
1111	struct stm32_dcmi *dcmi = video_drvdata(file);
1112
1113	if (f->index >= dcmi->num_of_sd_formats)
1114		return -EINVAL;
1115
1116	f->pixelformat = dcmi->sd_formats[f->index]->fourcc;
1117	return 0;
1118}
1119
1120static int dcmi_get_sensor_format(struct stm32_dcmi *dcmi,
1121				  struct v4l2_pix_format *pix)
1122{
1123	struct v4l2_subdev_format fmt = {
1124		.which = V4L2_SUBDEV_FORMAT_ACTIVE,
1125	};
1126	int ret;
1127
1128	ret = v4l2_subdev_call(dcmi->source, pad, get_fmt, NULL, &fmt);
1129	if (ret)
1130		return ret;
1131
1132	v4l2_fill_pix_format(pix, &fmt.format);
1133
1134	return 0;
1135}
1136
1137static int dcmi_set_sensor_format(struct stm32_dcmi *dcmi,
1138				  struct v4l2_pix_format *pix)
1139{
1140	const struct dcmi_format *sd_fmt;
1141	struct v4l2_subdev_format format = {
1142		.which = V4L2_SUBDEV_FORMAT_TRY,
1143	};
1144	int ret;
1145
1146	sd_fmt = find_format_by_fourcc(dcmi, pix->pixelformat);
1147	if (!sd_fmt) {
1148		if (!dcmi->num_of_sd_formats)
1149			return -ENODATA;
1150
1151		sd_fmt = dcmi->sd_formats[dcmi->num_of_sd_formats - 1];
1152		pix->pixelformat = sd_fmt->fourcc;
1153	}
1154
1155	v4l2_fill_mbus_format(&format.format, pix, sd_fmt->mbus_code);
1156	ret = v4l2_subdev_call_state_try(dcmi->source, pad, set_fmt, &format);
1157	if (ret < 0)
1158		return ret;
1159
1160	return 0;
1161}
1162
1163static int dcmi_get_sensor_bounds(struct stm32_dcmi *dcmi,
1164				  struct v4l2_rect *r)
1165{
1166	struct v4l2_subdev_selection bounds = {
1167		.which = V4L2_SUBDEV_FORMAT_ACTIVE,
1168		.target = V4L2_SEL_TGT_CROP_BOUNDS,
1169	};
1170	unsigned int max_width, max_height, max_pixsize;
1171	struct v4l2_pix_format pix;
1172	unsigned int i;
1173	int ret;
1174
1175	/*
1176	 * Get sensor bounds first
1177	 */
1178	ret = v4l2_subdev_call(dcmi->source, pad, get_selection,
1179			       NULL, &bounds);
1180	if (!ret)
1181		*r = bounds.r;
1182	if (ret != -ENOIOCTLCMD)
1183		return ret;
1184
1185	/*
1186	 * If selection is not implemented,
1187	 * fallback by enumerating sensor frame sizes
1188	 * and take the largest one
1189	 */
1190	max_width = 0;
1191	max_height = 0;
1192	max_pixsize = 0;
1193	for (i = 0; i < dcmi->num_of_sd_framesizes; i++) {
1194		struct dcmi_framesize *fsize = &dcmi->sd_framesizes[i];
1195		unsigned int pixsize = fsize->width * fsize->height;
1196
1197		if (pixsize > max_pixsize) {
1198			max_pixsize = pixsize;
1199			max_width = fsize->width;
1200			max_height = fsize->height;
1201		}
1202	}
1203	if (max_pixsize > 0) {
1204		r->top = 0;
1205		r->left = 0;
1206		r->width = max_width;
1207		r->height = max_height;
1208		return 0;
1209	}
1210
1211	/*
1212	 * If frame sizes enumeration is not implemented,
1213	 * fallback by getting current sensor frame size
1214	 */
1215	ret = dcmi_get_sensor_format(dcmi, &pix);
1216	if (ret)
1217		return ret;
1218
1219	r->top = 0;
1220	r->left = 0;
1221	r->width = pix.width;
1222	r->height = pix.height;
1223
1224	return 0;
1225}
1226
1227static int dcmi_g_selection(struct file *file, void *fh,
1228			    struct v4l2_selection *s)
1229{
1230	struct stm32_dcmi *dcmi = video_drvdata(file);
1231
1232	if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1233		return -EINVAL;
1234
1235	switch (s->target) {
1236	case V4L2_SEL_TGT_CROP_DEFAULT:
1237	case V4L2_SEL_TGT_CROP_BOUNDS:
1238		s->r = dcmi->sd_bounds;
1239		return 0;
1240	case V4L2_SEL_TGT_CROP:
1241		if (dcmi->do_crop) {
1242			s->r = dcmi->crop;
1243		} else {
1244			s->r.top = 0;
1245			s->r.left = 0;
1246			s->r.width = dcmi->fmt.fmt.pix.width;
1247			s->r.height = dcmi->fmt.fmt.pix.height;
1248		}
1249		break;
1250	default:
1251		return -EINVAL;
1252	}
1253
1254	return 0;
1255}
1256
1257static int dcmi_s_selection(struct file *file, void *priv,
1258			    struct v4l2_selection *s)
1259{
1260	struct stm32_dcmi *dcmi = video_drvdata(file);
1261	struct v4l2_rect r = s->r;
1262	struct v4l2_rect max_rect;
1263	struct v4l2_pix_format pix;
1264
1265	if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||
1266	    s->target != V4L2_SEL_TGT_CROP)
1267		return -EINVAL;
1268
1269	/* Reset sensor resolution to max resolution */
1270	pix.pixelformat = dcmi->fmt.fmt.pix.pixelformat;
1271	pix.width = dcmi->sd_bounds.width;
1272	pix.height = dcmi->sd_bounds.height;
1273	dcmi_set_sensor_format(dcmi, &pix);
1274
1275	/*
1276	 * Make the intersection between
1277	 * sensor resolution
1278	 * and crop request
1279	 */
1280	max_rect.top = 0;
1281	max_rect.left = 0;
1282	max_rect.width = pix.width;
1283	max_rect.height = pix.height;
1284	v4l2_rect_map_inside(&r, &max_rect);
1285	r.top  = clamp_t(s32, r.top, 0, pix.height - r.height);
1286	r.left = clamp_t(s32, r.left, 0, pix.width - r.width);
1287
1288	if (!(r.top == dcmi->sd_bounds.top &&
1289	      r.left == dcmi->sd_bounds.left &&
1290	      r.width == dcmi->sd_bounds.width &&
1291	      r.height == dcmi->sd_bounds.height)) {
1292		/* Crop if request is different than sensor resolution */
1293		dcmi->do_crop = true;
1294		dcmi->crop = r;
1295		dev_dbg(dcmi->dev, "s_selection: crop (%d,%d)/%ux%u from %ux%u\n",
1296			r.left, r.top, r.width, r.height,
1297			pix.width, pix.height);
1298	} else {
1299		/* Disable crop */
1300		dcmi->do_crop = false;
1301		dev_dbg(dcmi->dev, "s_selection: crop is disabled\n");
1302	}
1303
1304	s->r = r;
1305	return 0;
1306}
1307
1308static int dcmi_querycap(struct file *file, void *priv,
1309			 struct v4l2_capability *cap)
1310{
1311	strscpy(cap->driver, DRV_NAME, sizeof(cap->driver));
1312	strscpy(cap->card, "STM32 Camera Memory Interface",
1313		sizeof(cap->card));
1314	strscpy(cap->bus_info, "platform:dcmi", sizeof(cap->bus_info));
1315	return 0;
1316}
1317
1318static int dcmi_enum_input(struct file *file, void *priv,
1319			   struct v4l2_input *i)
1320{
1321	if (i->index != 0)
1322		return -EINVAL;
1323
1324	i->type = V4L2_INPUT_TYPE_CAMERA;
1325	strscpy(i->name, "Camera", sizeof(i->name));
1326	return 0;
1327}
1328
1329static int dcmi_g_input(struct file *file, void *priv, unsigned int *i)
1330{
1331	*i = 0;
1332	return 0;
1333}
1334
1335static int dcmi_s_input(struct file *file, void *priv, unsigned int i)
1336{
1337	if (i > 0)
1338		return -EINVAL;
1339	return 0;
1340}
1341
1342static int dcmi_enum_framesizes(struct file *file, void *fh,
1343				struct v4l2_frmsizeenum *fsize)
1344{
1345	struct stm32_dcmi *dcmi = video_drvdata(file);
1346	const struct dcmi_format *sd_fmt;
1347	struct v4l2_subdev_frame_size_enum fse = {
1348		.index = fsize->index,
1349		.which = V4L2_SUBDEV_FORMAT_ACTIVE,
1350	};
1351	int ret;
1352
1353	sd_fmt = find_format_by_fourcc(dcmi, fsize->pixel_format);
1354	if (!sd_fmt)
1355		return -EINVAL;
1356
1357	fse.code = sd_fmt->mbus_code;
1358
1359	ret = v4l2_subdev_call(dcmi->source, pad, enum_frame_size,
1360			       NULL, &fse);
1361	if (ret)
1362		return ret;
1363
1364	fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
1365	fsize->discrete.width = fse.max_width;
1366	fsize->discrete.height = fse.max_height;
1367
1368	return 0;
1369}
1370
1371static int dcmi_g_parm(struct file *file, void *priv,
1372		       struct v4l2_streamparm *p)
1373{
1374	struct stm32_dcmi *dcmi = video_drvdata(file);
1375
1376	return v4l2_g_parm_cap(video_devdata(file), dcmi->source, p);
1377}
1378
1379static int dcmi_s_parm(struct file *file, void *priv,
1380		       struct v4l2_streamparm *p)
1381{
1382	struct stm32_dcmi *dcmi = video_drvdata(file);
1383
1384	return v4l2_s_parm_cap(video_devdata(file), dcmi->source, p);
1385}
1386
1387static int dcmi_enum_frameintervals(struct file *file, void *fh,
1388				    struct v4l2_frmivalenum *fival)
1389{
1390	struct stm32_dcmi *dcmi = video_drvdata(file);
1391	const struct dcmi_format *sd_fmt;
1392	struct v4l2_subdev_frame_interval_enum fie = {
1393		.index = fival->index,
1394		.width = fival->width,
1395		.height = fival->height,
1396		.which = V4L2_SUBDEV_FORMAT_ACTIVE,
1397	};
1398	int ret;
1399
1400	sd_fmt = find_format_by_fourcc(dcmi, fival->pixel_format);
1401	if (!sd_fmt)
1402		return -EINVAL;
1403
1404	fie.code = sd_fmt->mbus_code;
1405
1406	ret = v4l2_subdev_call(dcmi->source, pad,
1407			       enum_frame_interval, NULL, &fie);
1408	if (ret)
1409		return ret;
1410
1411	fival->type = V4L2_FRMIVAL_TYPE_DISCRETE;
1412	fival->discrete = fie.interval;
1413
1414	return 0;
1415}
1416
1417static const struct of_device_id stm32_dcmi_of_match[] = {
1418	{ .compatible = "st,stm32-dcmi"},
1419	{ /* end node */ },
1420};
1421MODULE_DEVICE_TABLE(of, stm32_dcmi_of_match);
1422
1423static int dcmi_open(struct file *file)
1424{
1425	struct stm32_dcmi *dcmi = video_drvdata(file);
1426	struct v4l2_subdev *sd = dcmi->source;
1427	int ret;
1428
1429	if (mutex_lock_interruptible(&dcmi->lock))
1430		return -ERESTARTSYS;
1431
1432	ret = v4l2_fh_open(file);
1433	if (ret < 0)
1434		goto unlock;
1435
1436	if (!v4l2_fh_is_singular_file(file))
1437		goto fh_rel;
1438
1439	ret = v4l2_subdev_call(sd, core, s_power, 1);
1440	if (ret < 0 && ret != -ENOIOCTLCMD)
1441		goto fh_rel;
1442
1443	ret = dcmi_set_fmt(dcmi, &dcmi->fmt);
1444	if (ret)
1445		v4l2_subdev_call(sd, core, s_power, 0);
1446fh_rel:
1447	if (ret)
1448		v4l2_fh_release(file);
1449unlock:
1450	mutex_unlock(&dcmi->lock);
1451	return ret;
1452}
1453
1454static int dcmi_release(struct file *file)
1455{
1456	struct stm32_dcmi *dcmi = video_drvdata(file);
1457	struct v4l2_subdev *sd = dcmi->source;
1458	bool fh_singular;
1459	int ret;
1460
1461	mutex_lock(&dcmi->lock);
1462
1463	fh_singular = v4l2_fh_is_singular_file(file);
1464
1465	ret = _vb2_fop_release(file, NULL);
1466
1467	if (fh_singular)
1468		v4l2_subdev_call(sd, core, s_power, 0);
1469
1470	mutex_unlock(&dcmi->lock);
1471
1472	return ret;
1473}
1474
1475static const struct v4l2_ioctl_ops dcmi_ioctl_ops = {
1476	.vidioc_querycap		= dcmi_querycap,
1477
1478	.vidioc_try_fmt_vid_cap		= dcmi_try_fmt_vid_cap,
1479	.vidioc_g_fmt_vid_cap		= dcmi_g_fmt_vid_cap,
1480	.vidioc_s_fmt_vid_cap		= dcmi_s_fmt_vid_cap,
1481	.vidioc_enum_fmt_vid_cap	= dcmi_enum_fmt_vid_cap,
1482	.vidioc_g_selection		= dcmi_g_selection,
1483	.vidioc_s_selection		= dcmi_s_selection,
1484
1485	.vidioc_enum_input		= dcmi_enum_input,
1486	.vidioc_g_input			= dcmi_g_input,
1487	.vidioc_s_input			= dcmi_s_input,
1488
1489	.vidioc_g_parm			= dcmi_g_parm,
1490	.vidioc_s_parm			= dcmi_s_parm,
1491
1492	.vidioc_enum_framesizes		= dcmi_enum_framesizes,
1493	.vidioc_enum_frameintervals	= dcmi_enum_frameintervals,
1494
1495	.vidioc_reqbufs			= vb2_ioctl_reqbufs,
1496	.vidioc_create_bufs		= vb2_ioctl_create_bufs,
1497	.vidioc_querybuf		= vb2_ioctl_querybuf,
1498	.vidioc_qbuf			= vb2_ioctl_qbuf,
1499	.vidioc_dqbuf			= vb2_ioctl_dqbuf,
1500	.vidioc_expbuf			= vb2_ioctl_expbuf,
1501	.vidioc_prepare_buf		= vb2_ioctl_prepare_buf,
1502	.vidioc_streamon		= vb2_ioctl_streamon,
1503	.vidioc_streamoff		= vb2_ioctl_streamoff,
1504
1505	.vidioc_log_status		= v4l2_ctrl_log_status,
1506	.vidioc_subscribe_event		= v4l2_ctrl_subscribe_event,
1507	.vidioc_unsubscribe_event	= v4l2_event_unsubscribe,
1508};
1509
1510static const struct v4l2_file_operations dcmi_fops = {
1511	.owner		= THIS_MODULE,
1512	.unlocked_ioctl	= video_ioctl2,
1513	.open		= dcmi_open,
1514	.release	= dcmi_release,
1515	.poll		= vb2_fop_poll,
1516	.mmap		= vb2_fop_mmap,
1517#ifndef CONFIG_MMU
1518	.get_unmapped_area = vb2_fop_get_unmapped_area,
1519#endif
1520	.read		= vb2_fop_read,
1521};
1522
1523static int dcmi_set_default_fmt(struct stm32_dcmi *dcmi)
1524{
1525	struct v4l2_format f = {
1526		.type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
1527		.fmt.pix = {
1528			.width		= CIF_WIDTH,
1529			.height		= CIF_HEIGHT,
1530			.field		= V4L2_FIELD_NONE,
1531			.pixelformat	= dcmi->sd_formats[0]->fourcc,
1532		},
1533	};
1534	int ret;
1535
1536	ret = dcmi_try_fmt(dcmi, &f, NULL, NULL);
1537	if (ret)
1538		return ret;
1539	dcmi->sd_format = dcmi->sd_formats[0];
1540	dcmi->fmt = f;
1541	return 0;
1542}
1543
1544static const struct dcmi_format dcmi_formats[] = {
1545	{
1546		.fourcc = V4L2_PIX_FMT_RGB565,
1547		.mbus_code = MEDIA_BUS_FMT_RGB565_2X8_LE,
1548		.bpp = 2,
1549	}, {
1550		.fourcc = V4L2_PIX_FMT_RGB565,
1551		.mbus_code = MEDIA_BUS_FMT_RGB565_1X16,
1552		.bpp = 2,
1553	}, {
1554		.fourcc = V4L2_PIX_FMT_YUYV,
1555		.mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
1556		.bpp = 2,
1557	}, {
1558		.fourcc = V4L2_PIX_FMT_YUYV,
1559		.mbus_code = MEDIA_BUS_FMT_YUYV8_1X16,
1560		.bpp = 2,
1561	}, {
1562		.fourcc = V4L2_PIX_FMT_UYVY,
1563		.mbus_code = MEDIA_BUS_FMT_UYVY8_2X8,
1564		.bpp = 2,
1565	}, {
1566		.fourcc = V4L2_PIX_FMT_UYVY,
1567		.mbus_code = MEDIA_BUS_FMT_UYVY8_1X16,
1568		.bpp = 2,
1569	}, {
1570		.fourcc = V4L2_PIX_FMT_JPEG,
1571		.mbus_code = MEDIA_BUS_FMT_JPEG_1X8,
1572		.bpp = 1,
1573	}, {
1574		.fourcc = V4L2_PIX_FMT_SBGGR8,
1575		.mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8,
1576		.bpp = 1,
1577	}, {
1578		.fourcc = V4L2_PIX_FMT_SGBRG8,
1579		.mbus_code = MEDIA_BUS_FMT_SGBRG8_1X8,
1580		.bpp = 1,
1581	}, {
1582		.fourcc = V4L2_PIX_FMT_SGRBG8,
1583		.mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8,
1584		.bpp = 1,
1585	}, {
1586		.fourcc = V4L2_PIX_FMT_SRGGB8,
1587		.mbus_code = MEDIA_BUS_FMT_SRGGB8_1X8,
1588		.bpp = 1,
1589	}, {
1590		.fourcc = V4L2_PIX_FMT_SBGGR10,
1591		.mbus_code = MEDIA_BUS_FMT_SBGGR10_1X10,
1592		.bpp = 2,
1593	}, {
1594		.fourcc = V4L2_PIX_FMT_SGBRG10,
1595		.mbus_code = MEDIA_BUS_FMT_SGBRG10_1X10,
1596		.bpp = 2,
1597	}, {
1598		.fourcc = V4L2_PIX_FMT_SGRBG10,
1599		.mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10,
1600		.bpp = 2,
1601	}, {
1602		.fourcc = V4L2_PIX_FMT_SRGGB10,
1603		.mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10,
1604		.bpp = 2,
1605	}, {
1606		.fourcc = V4L2_PIX_FMT_SBGGR12,
1607		.mbus_code = MEDIA_BUS_FMT_SBGGR12_1X12,
1608		.bpp = 2,
1609	}, {
1610		.fourcc = V4L2_PIX_FMT_SGBRG12,
1611		.mbus_code = MEDIA_BUS_FMT_SGBRG12_1X12,
1612		.bpp = 2,
1613	}, {
1614		.fourcc = V4L2_PIX_FMT_SGRBG12,
1615		.mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12,
1616		.bpp = 2,
1617	}, {
1618		.fourcc = V4L2_PIX_FMT_SRGGB12,
1619		.mbus_code = MEDIA_BUS_FMT_SRGGB12_1X12,
1620		.bpp = 2,
1621	}, {
1622		.fourcc = V4L2_PIX_FMT_SBGGR14,
1623		.mbus_code = MEDIA_BUS_FMT_SBGGR14_1X14,
1624		.bpp = 2,
1625	}, {
1626		.fourcc = V4L2_PIX_FMT_SGBRG14,
1627		.mbus_code = MEDIA_BUS_FMT_SGBRG14_1X14,
1628		.bpp = 2,
1629	}, {
1630		.fourcc = V4L2_PIX_FMT_SGRBG14,
1631		.mbus_code = MEDIA_BUS_FMT_SGRBG14_1X14,
1632		.bpp = 2,
1633	}, {
1634		.fourcc = V4L2_PIX_FMT_SRGGB14,
1635		.mbus_code = MEDIA_BUS_FMT_SRGGB14_1X14,
1636		.bpp = 2,
1637	},
1638};
1639
1640static int dcmi_formats_init(struct stm32_dcmi *dcmi)
1641{
1642	const struct dcmi_format *sd_fmts[ARRAY_SIZE(dcmi_formats)];
1643	unsigned int num_fmts = 0, i, j;
1644	struct v4l2_subdev *subdev = dcmi->source;
1645	struct v4l2_subdev_mbus_code_enum mbus_code = {
1646		.which = V4L2_SUBDEV_FORMAT_ACTIVE,
1647	};
1648
1649	while (!v4l2_subdev_call(subdev, pad, enum_mbus_code,
1650				 NULL, &mbus_code)) {
1651		for (i = 0; i < ARRAY_SIZE(dcmi_formats); i++) {
1652			if (dcmi_formats[i].mbus_code != mbus_code.code)
1653				continue;
1654
1655			/* Exclude JPEG if BT656 bus is selected */
1656			if (dcmi_formats[i].fourcc == V4L2_PIX_FMT_JPEG &&
1657			    dcmi->bus_type == V4L2_MBUS_BT656)
1658				continue;
1659
1660			/* Code supported, have we got this fourcc yet? */
1661			for (j = 0; j < num_fmts; j++)
1662				if (sd_fmts[j]->fourcc ==
1663						dcmi_formats[i].fourcc) {
1664					/* Already available */
1665					dev_dbg(dcmi->dev, "Skipping fourcc/code: %4.4s/0x%x\n",
1666						(char *)&sd_fmts[j]->fourcc,
1667						mbus_code.code);
1668					break;
1669				}
1670			if (j == num_fmts) {
1671				/* New */
1672				sd_fmts[num_fmts++] = dcmi_formats + i;
1673				dev_dbg(dcmi->dev, "Supported fourcc/code: %4.4s/0x%x\n",
1674					(char *)&sd_fmts[num_fmts - 1]->fourcc,
1675					sd_fmts[num_fmts - 1]->mbus_code);
1676			}
1677		}
1678		mbus_code.index++;
1679	}
1680
1681	if (!num_fmts)
1682		return -ENXIO;
1683
1684	dcmi->num_of_sd_formats = num_fmts;
1685	dcmi->sd_formats = devm_kmemdup_array(dcmi->dev, sd_fmts, num_fmts,
1686					      sizeof(*sd_fmts), GFP_KERNEL);
1687	if (!dcmi->sd_formats) {
1688		dev_err(dcmi->dev, "Could not allocate memory\n");
1689		return -ENOMEM;
1690	}
1691
1692	dcmi->sd_format = dcmi->sd_formats[0];
1693	return 0;
1694}
1695
1696static int dcmi_framesizes_init(struct stm32_dcmi *dcmi)
1697{
1698	unsigned int num_fsize = 0;
1699	struct v4l2_subdev *subdev = dcmi->source;
1700	struct v4l2_subdev_frame_size_enum fse = {
1701		.which = V4L2_SUBDEV_FORMAT_ACTIVE,
1702		.code = dcmi->sd_format->mbus_code,
1703	};
1704	unsigned int i;
1705	int ret;
1706
1707	/* Allocate discrete framesizes array */
1708	while (!v4l2_subdev_call(subdev, pad, enum_frame_size,
1709				 NULL, &fse))
1710		fse.index++;
1711
1712	num_fsize = fse.index;
1713	if (!num_fsize)
1714		return 0;
1715
1716	dcmi->num_of_sd_framesizes = num_fsize;
1717	dcmi->sd_framesizes = devm_kcalloc(dcmi->dev, num_fsize,
1718					   sizeof(struct dcmi_framesize),
1719					   GFP_KERNEL);
1720	if (!dcmi->sd_framesizes) {
1721		dev_err(dcmi->dev, "Could not allocate memory\n");
1722		return -ENOMEM;
1723	}
1724
1725	/* Fill array with sensor supported framesizes */
1726	dev_dbg(dcmi->dev, "Sensor supports %u frame sizes:\n", num_fsize);
1727	for (i = 0; i < dcmi->num_of_sd_framesizes; i++) {
1728		fse.index = i;
1729		ret = v4l2_subdev_call(subdev, pad, enum_frame_size,
1730				       NULL, &fse);
1731		if (ret)
1732			return ret;
1733		dcmi->sd_framesizes[fse.index].width = fse.max_width;
1734		dcmi->sd_framesizes[fse.index].height = fse.max_height;
1735		dev_dbg(dcmi->dev, "%ux%u\n", fse.max_width, fse.max_height);
1736	}
1737
1738	return 0;
1739}
1740
1741static int dcmi_graph_notify_complete(struct v4l2_async_notifier *notifier)
1742{
1743	struct stm32_dcmi *dcmi = notifier_to_dcmi(notifier);
1744	int ret;
1745
1746	/*
1747	 * Now that the graph is complete,
1748	 * we search for the source subdevice
1749	 * in order to expose it through V4L2 interface
1750	 */
1751	dcmi->source = media_entity_to_v4l2_subdev(dcmi_find_source(dcmi));
1752	if (!dcmi->source) {
1753		dev_err(dcmi->dev, "Source subdevice not found\n");
1754		return -ENODEV;
1755	}
1756
1757	dcmi->vdev->ctrl_handler = dcmi->source->ctrl_handler;
1758
1759	ret = dcmi_formats_init(dcmi);
1760	if (ret) {
1761		dev_err(dcmi->dev, "No supported mediabus format found\n");
1762		return ret;
1763	}
1764
1765	ret = dcmi_framesizes_init(dcmi);
1766	if (ret) {
1767		dev_err(dcmi->dev, "Could not initialize framesizes\n");
1768		return ret;
1769	}
1770
1771	ret = dcmi_get_sensor_bounds(dcmi, &dcmi->sd_bounds);
1772	if (ret) {
1773		dev_err(dcmi->dev, "Could not get sensor bounds\n");
1774		return ret;
1775	}
1776
1777	ret = dcmi_set_default_fmt(dcmi);
1778	if (ret) {
1779		dev_err(dcmi->dev, "Could not set default format\n");
1780		return ret;
1781	}
1782
1783	ret = devm_request_threaded_irq(dcmi->dev, dcmi->irq, dcmi_irq_callback,
1784					dcmi_irq_thread, IRQF_ONESHOT,
1785					dev_name(dcmi->dev), dcmi);
1786	if (ret) {
1787		dev_err(dcmi->dev, "Unable to request irq %d\n", dcmi->irq);
1788		return ret;
1789	}
1790
1791	return 0;
1792}
1793
1794static void dcmi_graph_notify_unbind(struct v4l2_async_notifier *notifier,
1795				     struct v4l2_subdev *sd,
1796				     struct v4l2_async_connection *asd)
1797{
1798	struct stm32_dcmi *dcmi = notifier_to_dcmi(notifier);
1799
1800	dev_dbg(dcmi->dev, "Removing %s\n", video_device_node_name(dcmi->vdev));
1801
1802	/* Checks internally if vdev has been init or not */
1803	video_unregister_device(dcmi->vdev);
1804}
1805
1806static int dcmi_graph_notify_bound(struct v4l2_async_notifier *notifier,
1807				   struct v4l2_subdev *subdev,
1808				   struct v4l2_async_connection *asd)
1809{
1810	struct stm32_dcmi *dcmi = notifier_to_dcmi(notifier);
1811	int src_pad;
1812	int ret;
1813
1814	dev_dbg(dcmi->dev, "Subdev \"%s\" bound\n", subdev->name);
1815
1816	/*
1817	 * Link this sub-device to DCMI, it could be
1818	 * a parallel camera sensor or a bridge
1819	 */
1820	src_pad = media_entity_get_fwnode_pad(&subdev->entity,
1821					      subdev->fwnode,
1822					      MEDIA_PAD_FL_SOURCE);
1823
1824	ret = media_create_pad_link(&subdev->entity, src_pad,
1825				    &dcmi->vdev->entity, 0,
1826				    MEDIA_LNK_FL_IMMUTABLE |
1827				    MEDIA_LNK_FL_ENABLED);
1828	if (ret)
1829		dev_err(dcmi->dev, "Failed to create media pad link with subdev \"%s\"\n",
1830			subdev->name);
1831	else
1832		dev_dbg(dcmi->dev, "DCMI is now linked to \"%s\"\n",
1833			subdev->name);
1834
1835	dcmi->s_subdev = subdev;
1836
1837	return ret;
1838}
1839
1840static const struct v4l2_async_notifier_operations dcmi_graph_notify_ops = {
1841	.bound = dcmi_graph_notify_bound,
1842	.unbind = dcmi_graph_notify_unbind,
1843	.complete = dcmi_graph_notify_complete,
1844};
1845
1846static int dcmi_graph_init(struct stm32_dcmi *dcmi)
1847{
1848	struct v4l2_async_connection *asd;
1849	struct device_node *ep;
1850	int ret;
1851
1852	ep = of_graph_get_endpoint_by_regs(dcmi->dev->of_node, 0, -1);
1853	if (!ep) {
1854		dev_err(dcmi->dev, "Failed to get next endpoint\n");
1855		return -EINVAL;
1856	}
1857
1858	v4l2_async_nf_init(&dcmi->notifier, &dcmi->v4l2_dev);
1859
1860	asd = v4l2_async_nf_add_fwnode_remote(&dcmi->notifier,
1861					      of_fwnode_handle(ep),
1862					      struct v4l2_async_connection);
1863
1864	of_node_put(ep);
1865
1866	if (IS_ERR(asd)) {
1867		dev_err(dcmi->dev, "Failed to add subdev notifier\n");
1868		return PTR_ERR(asd);
1869	}
1870
1871	dcmi->notifier.ops = &dcmi_graph_notify_ops;
1872
1873	ret = v4l2_async_nf_register(&dcmi->notifier);
1874	if (ret < 0) {
1875		dev_err(dcmi->dev, "Failed to register notifier\n");
1876		v4l2_async_nf_cleanup(&dcmi->notifier);
1877		return ret;
1878	}
1879
1880	return 0;
1881}
1882
1883static int dcmi_probe(struct platform_device *pdev)
1884{
1885	struct device_node *np = pdev->dev.of_node;
1886	struct v4l2_fwnode_endpoint ep = { .bus_type = 0 };
1887	struct stm32_dcmi *dcmi;
1888	struct vb2_queue *q;
1889	struct dma_chan *chan;
1890	struct dma_slave_caps caps;
1891	struct clk *mclk;
1892	int ret = 0;
1893
1894	dcmi = devm_kzalloc(&pdev->dev, sizeof(struct stm32_dcmi), GFP_KERNEL);
1895	if (!dcmi)
1896		return -ENOMEM;
1897
1898	dcmi->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
1899	if (IS_ERR(dcmi->rstc))
1900		return dev_err_probe(&pdev->dev, PTR_ERR(dcmi->rstc),
1901				     "Could not get reset control\n");
1902
1903	/* Get bus characteristics from devicetree */
1904	np = of_graph_get_endpoint_by_regs(np, 0, -1);
1905	if (!np) {
1906		dev_err(&pdev->dev, "Could not find the endpoint\n");
1907		return -ENODEV;
1908	}
1909
1910	ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(np), &ep);
1911	of_node_put(np);
1912	if (ret) {
1913		dev_err(&pdev->dev, "Could not parse the endpoint\n");
1914		return ret;
1915	}
1916
1917	if (ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
1918		dev_err(&pdev->dev, "CSI bus not supported\n");
1919		return -ENODEV;
1920	}
1921
1922	if (ep.bus_type == V4L2_MBUS_BT656 &&
1923	    ep.bus.parallel.bus_width != 8) {
1924		dev_err(&pdev->dev, "BT656 bus conflicts with %u bits bus width (8 bits required)\n",
1925			ep.bus.parallel.bus_width);
1926		return -ENODEV;
1927	}
1928
1929	dcmi->bus.flags = ep.bus.parallel.flags;
1930	dcmi->bus.bus_width = ep.bus.parallel.bus_width;
1931	dcmi->bus.data_shift = ep.bus.parallel.data_shift;
1932	dcmi->bus_type = ep.bus_type;
1933
1934	dcmi->irq = platform_get_irq(pdev, 0);
1935	if (dcmi->irq < 0)
1936		return dcmi->irq;
1937
1938	dcmi->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &dcmi->res);
1939	if (IS_ERR(dcmi->regs))
1940		return PTR_ERR(dcmi->regs);
1941
1942	mclk = devm_clk_get(&pdev->dev, "mclk");
1943	if (IS_ERR(mclk))
1944		return dev_err_probe(&pdev->dev, PTR_ERR(mclk),
1945				     "Unable to get mclk\n");
1946
1947	chan = dma_request_chan(&pdev->dev, "tx");
1948	if (IS_ERR(chan))
1949		return dev_err_probe(&pdev->dev, PTR_ERR(chan),
1950				     "Failed to request DMA channel\n");
1951
1952	dcmi->dma_max_burst = UINT_MAX;
1953	ret = dma_get_slave_caps(chan, &caps);
1954	if (!ret && caps.max_sg_burst)
1955		dcmi->dma_max_burst = caps.max_sg_burst	* DMA_SLAVE_BUSWIDTH_4_BYTES;
1956
1957	spin_lock_init(&dcmi->irqlock);
1958	mutex_init(&dcmi->lock);
1959	mutex_init(&dcmi->dma_lock);
1960	init_completion(&dcmi->complete);
1961	INIT_LIST_HEAD(&dcmi->buffers);
1962
1963	dcmi->dev = &pdev->dev;
1964	dcmi->mclk = mclk;
1965	dcmi->state = STOPPED;
1966	dcmi->dma_chan = chan;
1967
1968	q = &dcmi->queue;
1969
1970	dcmi->v4l2_dev.mdev = &dcmi->mdev;
1971
1972	/* Initialize media device */
1973	strscpy(dcmi->mdev.model, DRV_NAME, sizeof(dcmi->mdev.model));
1974	dcmi->mdev.dev = &pdev->dev;
1975	media_device_init(&dcmi->mdev);
1976
1977	/* Initialize the top-level structure */
1978	ret = v4l2_device_register(&pdev->dev, &dcmi->v4l2_dev);
1979	if (ret)
1980		goto err_media_device_cleanup;
1981
1982	dcmi->vdev = video_device_alloc();
1983	if (!dcmi->vdev) {
1984		ret = -ENOMEM;
1985		goto err_device_unregister;
1986	}
1987
1988	/* Video node */
1989	dcmi->vdev->fops = &dcmi_fops;
1990	dcmi->vdev->v4l2_dev = &dcmi->v4l2_dev;
1991	dcmi->vdev->queue = &dcmi->queue;
1992	strscpy(dcmi->vdev->name, KBUILD_MODNAME, sizeof(dcmi->vdev->name));
1993	dcmi->vdev->release = video_device_release;
1994	dcmi->vdev->ioctl_ops = &dcmi_ioctl_ops;
1995	dcmi->vdev->lock = &dcmi->lock;
1996	dcmi->vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING |
1997				  V4L2_CAP_READWRITE;
1998	video_set_drvdata(dcmi->vdev, dcmi);
1999
2000	/* Media entity pads */
2001	dcmi->vid_cap_pad.flags = MEDIA_PAD_FL_SINK;
2002	ret = media_entity_pads_init(&dcmi->vdev->entity,
2003				     1, &dcmi->vid_cap_pad);
2004	if (ret) {
2005		dev_err(dcmi->dev, "Failed to init media entity pad\n");
2006		goto err_device_release;
2007	}
2008	dcmi->vdev->entity.flags |= MEDIA_ENT_FL_DEFAULT;
2009
2010	ret = video_register_device(dcmi->vdev, VFL_TYPE_VIDEO, -1);
2011	if (ret) {
2012		dev_err(dcmi->dev, "Failed to register video device\n");
2013		goto err_media_entity_cleanup;
2014	}
2015
2016	dev_dbg(dcmi->dev, "Device registered as %s\n",
2017		video_device_node_name(dcmi->vdev));
2018
2019	/* Buffer queue */
2020	q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2021	q->io_modes = VB2_MMAP | VB2_READ | VB2_DMABUF;
2022	q->lock = &dcmi->lock;
2023	q->drv_priv = dcmi;
2024	q->buf_struct_size = sizeof(struct dcmi_buf);
2025	q->ops = &dcmi_video_qops;
2026	q->mem_ops = &vb2_dma_contig_memops;
2027	q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
2028	q->min_queued_buffers = 2;
2029	q->allow_cache_hints = 1;
2030	q->dev = &pdev->dev;
2031
2032	ret = vb2_queue_init(q);
2033	if (ret < 0) {
2034		dev_err(&pdev->dev, "Failed to initialize vb2 queue\n");
2035		goto err_media_entity_cleanup;
2036	}
2037
2038	ret = dcmi_graph_init(dcmi);
2039	if (ret < 0)
2040		goto err_media_entity_cleanup;
2041
2042	/* Reset device */
2043	ret = reset_control_assert(dcmi->rstc);
2044	if (ret) {
2045		dev_err(&pdev->dev, "Failed to assert the reset line\n");
2046		goto err_cleanup;
2047	}
2048
2049	usleep_range(3000, 5000);
2050
2051	ret = reset_control_deassert(dcmi->rstc);
2052	if (ret) {
2053		dev_err(&pdev->dev, "Failed to deassert the reset line\n");
2054		goto err_cleanup;
2055	}
2056
2057	dev_info(&pdev->dev, "Probe done\n");
2058
2059	platform_set_drvdata(pdev, dcmi);
2060
2061	pm_runtime_enable(&pdev->dev);
2062
2063	return 0;
2064
2065err_cleanup:
2066	v4l2_async_nf_cleanup(&dcmi->notifier);
2067err_media_entity_cleanup:
2068	media_entity_cleanup(&dcmi->vdev->entity);
2069err_device_release:
2070	video_device_release(dcmi->vdev);
2071err_device_unregister:
2072	v4l2_device_unregister(&dcmi->v4l2_dev);
2073err_media_device_cleanup:
2074	media_device_cleanup(&dcmi->mdev);
2075	dma_release_channel(dcmi->dma_chan);
2076
2077	return ret;
2078}
2079
2080static void dcmi_remove(struct platform_device *pdev)
2081{
2082	struct stm32_dcmi *dcmi = platform_get_drvdata(pdev);
2083
2084	pm_runtime_disable(&pdev->dev);
2085
2086	v4l2_async_nf_unregister(&dcmi->notifier);
2087	v4l2_async_nf_cleanup(&dcmi->notifier);
2088	media_entity_cleanup(&dcmi->vdev->entity);
2089	v4l2_device_unregister(&dcmi->v4l2_dev);
2090	media_device_cleanup(&dcmi->mdev);
2091
2092	dma_release_channel(dcmi->dma_chan);
2093}
2094
2095static __maybe_unused int dcmi_runtime_suspend(struct device *dev)
2096{
2097	struct stm32_dcmi *dcmi = dev_get_drvdata(dev);
2098
2099	clk_disable_unprepare(dcmi->mclk);
2100
2101	return 0;
2102}
2103
2104static __maybe_unused int dcmi_runtime_resume(struct device *dev)
2105{
2106	struct stm32_dcmi *dcmi = dev_get_drvdata(dev);
2107	int ret;
2108
2109	ret = clk_prepare_enable(dcmi->mclk);
2110	if (ret)
2111		dev_err(dev, "%s: Failed to prepare_enable clock\n", __func__);
2112
2113	return ret;
2114}
2115
2116static __maybe_unused int dcmi_suspend(struct device *dev)
2117{
2118	/* disable clock */
2119	pm_runtime_force_suspend(dev);
2120
2121	/* change pinctrl state */
2122	pinctrl_pm_select_sleep_state(dev);
2123
2124	return 0;
2125}
2126
2127static __maybe_unused int dcmi_resume(struct device *dev)
2128{
2129	/* restore pinctl default state */
2130	pinctrl_pm_select_default_state(dev);
2131
2132	/* clock enable */
2133	pm_runtime_force_resume(dev);
2134
2135	return 0;
2136}
2137
2138static const struct dev_pm_ops dcmi_pm_ops = {
2139	SET_SYSTEM_SLEEP_PM_OPS(dcmi_suspend, dcmi_resume)
2140	SET_RUNTIME_PM_OPS(dcmi_runtime_suspend,
2141			   dcmi_runtime_resume, NULL)
2142};
2143
2144static struct platform_driver stm32_dcmi_driver = {
2145	.probe		= dcmi_probe,
2146	.remove		= dcmi_remove,
2147	.driver		= {
2148		.name = DRV_NAME,
2149		.of_match_table = of_match_ptr(stm32_dcmi_of_match),
2150		.pm = &dcmi_pm_ops,
2151	},
2152};
2153
2154module_platform_driver(stm32_dcmi_driver);
2155
2156MODULE_AUTHOR("Yannick Fertre <yannick.fertre@st.com>");
2157MODULE_AUTHOR("Hugues Fruchet <hugues.fruchet@st.com>");
2158MODULE_DESCRIPTION("STMicroelectronics STM32 Digital Camera Memory Interface driver");
2159MODULE_LICENSE("GPL");