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s5p_mfc_opr.h
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linux-6.19.14/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h
1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h 4 * 5 * Header file for Samsung MFC (Multi Function Codec - FIMV) driver 6 * Contains declarations of hw related functions. 7 * 8 * Kamil Debski, Copyright (C) 2012 Samsung Electronics Co., Ltd. 9 * http://www.samsung.com/ 10 */ 11 12#ifndef S5P_MFC_OPR_H_ 13#define S5P_MFC_OPR_H_ 14 15#include "s5p_mfc_common.h" 16 17struct s5p_mfc_regs { 18 19 /* codec common registers */ 20 void __iomem *risc_on; 21 void __iomem *risc2host_int; 22 void __iomem *host2risc_int; 23 void __iomem *risc_base_address; 24 void __iomem *mfc_reset; 25 void __iomem *host2risc_command; 26 void __iomem *risc2host_command; 27 void __iomem *mfc_bus_reset_ctrl; 28 void __iomem *firmware_version; 29 void __iomem *instance_id; 30 void __iomem *codec_type; 31 void __iomem *context_mem_addr; 32 void __iomem *context_mem_size; 33 void __iomem *pixel_format; 34 void __iomem *metadata_enable; 35 void __iomem *mfc_version; 36 void __iomem *dbg_info_enable; 37 void __iomem *dbg_buffer_addr; 38 void __iomem *dbg_buffer_size; 39 void __iomem *hed_control; 40 void __iomem *mfc_timeout_value; 41 void __iomem *hed_shared_mem_addr; 42 void __iomem *dis_shared_mem_addr;/* only v7 */ 43 void __iomem *ret_instance_id; 44 void __iomem *error_code; 45 void __iomem *dbg_buffer_output_size; 46 void __iomem *metadata_status; 47 void __iomem *metadata_addr_mb_info; 48 void __iomem *metadata_size_mb_info; 49 void __iomem *dbg_info_stage_counter; 50 51 /* decoder registers */ 52 void __iomem *d_crc_ctrl; 53 void __iomem *d_dec_options; 54 void __iomem *d_display_delay; 55 void __iomem *d_set_frame_width; 56 void __iomem *d_set_frame_height; 57 void __iomem *d_sei_enable; 58 void __iomem *d_min_num_dpb; 59 void __iomem *d_min_first_plane_dpb_size; 60 void __iomem *d_min_second_plane_dpb_size; 61 void __iomem *d_min_third_plane_dpb_size;/* only v8 */ 62 void __iomem *d_min_num_mv; 63 void __iomem *d_mvc_num_views; 64 void __iomem *d_min_num_dis;/* only v7 */ 65 void __iomem *d_min_first_dis_size;/* only v7 */ 66 void __iomem *d_min_second_dis_size;/* only v7 */ 67 void __iomem *d_min_third_dis_size;/* only v7 */ 68 void __iomem *d_post_filter_luma_dpb0;/* v7 and v8 */ 69 void __iomem *d_post_filter_luma_dpb1;/* v7 and v8 */ 70 void __iomem *d_post_filter_luma_dpb2;/* only v7 */ 71 void __iomem *d_post_filter_chroma_dpb0;/* v7 and v8 */ 72 void __iomem *d_post_filter_chroma_dpb1;/* v7 and v8 */ 73 void __iomem *d_post_filter_chroma_dpb2;/* only v7 */ 74 void __iomem *d_num_dpb; 75 void __iomem *d_num_mv; 76 void __iomem *d_init_buffer_options; 77 void __iomem *d_first_plane_dpb_stride_size;/* only v8 */ 78 void __iomem *d_second_plane_dpb_stride_size;/* only v8 */ 79 void __iomem *d_third_plane_dpb_stride_size;/* only v8 */ 80 void __iomem *d_first_plane_dpb_size; 81 void __iomem *d_second_plane_dpb_size; 82 void __iomem *d_third_plane_dpb_size;/* only v8 */ 83 void __iomem *d_mv_buffer_size; 84 void __iomem *d_first_plane_dpb; 85 void __iomem *d_second_plane_dpb; 86 void __iomem *d_third_plane_dpb; 87 void __iomem *d_mv_buffer; 88 void __iomem *d_scratch_buffer_addr; 89 void __iomem *d_scratch_buffer_size; 90 void __iomem *d_metadata_buffer_addr; 91 void __iomem *d_metadata_buffer_size; 92 void __iomem *d_nal_start_options;/* v7 and v8 */ 93 void __iomem *d_cpb_buffer_addr; 94 void __iomem *d_cpb_buffer_size; 95 void __iomem *d_available_dpb_flag_upper; 96 void __iomem *d_available_dpb_flag_lower; 97 void __iomem *d_cpb_buffer_offset; 98 void __iomem *d_slice_if_enable; 99 void __iomem *d_picture_tag; 100 void __iomem *d_stream_data_size; 101 void __iomem *d_dynamic_dpb_flag_upper;/* v7 and v8 */ 102 void __iomem *d_dynamic_dpb_flag_lower;/* v7 and v8 */ 103 void __iomem *d_display_frame_width; 104 void __iomem *d_display_frame_height; 105 void __iomem *d_display_status; 106 void __iomem *d_display_first_plane_addr; 107 void __iomem *d_display_second_plane_addr; 108 void __iomem *d_display_third_plane_addr;/* only v8 */ 109 void __iomem *d_display_frame_type; 110 void __iomem *d_display_crop_info1; 111 void __iomem *d_display_crop_info2; 112 void __iomem *d_display_picture_profile; 113 void __iomem *d_display_luma_crc;/* v7 and v8 */ 114 void __iomem *d_display_chroma0_crc;/* v7 and v8 */ 115 void __iomem *d_display_chroma1_crc;/* only v8 */ 116 void __iomem *d_display_luma_crc_top;/* only v6 */ 117 void __iomem *d_display_chroma_crc_top;/* only v6 */ 118 void __iomem *d_display_luma_crc_bot;/* only v6 */ 119 void __iomem *d_display_chroma_crc_bot;/* only v6 */ 120 void __iomem *d_display_aspect_ratio; 121 void __iomem *d_display_extended_ar; 122 void __iomem *d_decoded_frame_width; 123 void __iomem *d_decoded_frame_height; 124 void __iomem *d_decoded_status; 125 void __iomem *d_decoded_first_plane_addr; 126 void __iomem *d_decoded_second_plane_addr; 127 void __iomem *d_decoded_third_plane_addr;/* only v8 */ 128 void __iomem *d_decoded_frame_type; 129 void __iomem *d_decoded_crop_info1; 130 void __iomem *d_decoded_crop_info2; 131 void __iomem *d_decoded_picture_profile; 132 void __iomem *d_decoded_nal_size; 133 void __iomem *d_decoded_luma_crc; 134 void __iomem *d_decoded_chroma0_crc; 135 void __iomem *d_decoded_chroma1_crc;/* only v8 */ 136 void __iomem *d_ret_picture_tag_top; 137 void __iomem *d_ret_picture_tag_bot; 138 void __iomem *d_ret_picture_time_top; 139 void __iomem *d_ret_picture_time_bot; 140 void __iomem *d_chroma_format; 141 void __iomem *d_vc1_info;/* v7 and v8 */ 142 void __iomem *d_mpeg4_info; 143 void __iomem *d_h264_info; 144 void __iomem *d_metadata_addr_concealed_mb; 145 void __iomem *d_metadata_size_concealed_mb; 146 void __iomem *d_metadata_addr_vc1_param; 147 void __iomem *d_metadata_size_vc1_param; 148 void __iomem *d_metadata_addr_sei_nal; 149 void __iomem *d_metadata_size_sei_nal; 150 void __iomem *d_metadata_addr_vui; 151 void __iomem *d_metadata_size_vui; 152 void __iomem *d_metadata_addr_mvcvui;/* v7 and v8 */ 153 void __iomem *d_metadata_size_mvcvui;/* v7 and v8 */ 154 void __iomem *d_mvc_view_id; 155 void __iomem *d_frame_pack_sei_avail; 156 void __iomem *d_frame_pack_arrgment_id; 157 void __iomem *d_frame_pack_sei_info; 158 void __iomem *d_frame_pack_grid_pos; 159 void __iomem *d_display_recovery_sei_info;/* v7 and v8 */ 160 void __iomem *d_decoded_recovery_sei_info;/* v7 and v8 */ 161 void __iomem *d_display_first_addr;/* only v7 */ 162 void __iomem *d_display_second_addr;/* only v7 */ 163 void __iomem *d_display_third_addr;/* only v7 */ 164 void __iomem *d_decoded_first_addr;/* only v7 */ 165 void __iomem *d_decoded_second_addr;/* only v7 */ 166 void __iomem *d_decoded_third_addr;/* only v7 */ 167 void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */ 168 void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */ 169 void __iomem *d_min_scratch_buffer_size; /* v10 and v12 */ 170 void __iomem *d_static_buffer_addr; /* v10 and v12 */ 171 void __iomem *d_static_buffer_size; /* v10 and v12 */ 172 173 /* encoder registers */ 174 void __iomem *e_frame_width; 175 void __iomem *e_frame_height; 176 void __iomem *e_cropped_frame_width; 177 void __iomem *e_cropped_frame_height; 178 void __iomem *e_frame_crop_offset; 179 void __iomem *e_enc_options; 180 void __iomem *e_picture_profile; 181 void __iomem *e_vbv_buffer_size; 182 void __iomem *e_vbv_init_delay; 183 void __iomem *e_fixed_picture_qp; 184 void __iomem *e_rc_config; 185 void __iomem *e_rc_qp_bound; 186 void __iomem *e_rc_qp_bound_pb;/* v7 and v8 */ 187 void __iomem *e_rc_mode; 188 void __iomem *e_mb_rc_config; 189 void __iomem *e_padding_ctrl; 190 void __iomem *e_air_threshold; 191 void __iomem *e_mv_hor_range; 192 void __iomem *e_mv_ver_range; 193 void __iomem *e_num_dpb; 194 void __iomem *e_luma_dpb; 195 void __iomem *e_chroma_dpb; 196 void __iomem *e_me_buffer; 197 void __iomem *e_scratch_buffer_addr; 198 void __iomem *e_scratch_buffer_size; 199 void __iomem *e_tmv_buffer0; 200 void __iomem *e_tmv_buffer1; 201 void __iomem *e_ir_buffer_addr;/* v7 and v8 */ 202 void __iomem *e_source_first_plane_addr; 203 void __iomem *e_source_second_plane_addr; 204 void __iomem *e_source_third_plane_addr;/* v7 and v8 */ 205 void __iomem *e_source_first_plane_stride;/* v7 and v8 */ 206 void __iomem *e_source_second_plane_stride;/* v7 and v8 */ 207 void __iomem *e_source_third_plane_stride;/* v7 and v8 */ 208 void __iomem *e_stream_buffer_addr; 209 void __iomem *e_stream_buffer_size; 210 void __iomem *e_roi_buffer_addr; 211 void __iomem *e_param_change; 212 void __iomem *e_ir_size; 213 void __iomem *e_gop_config; 214 void __iomem *e_mslice_mode; 215 void __iomem *e_mslice_size_mb; 216 void __iomem *e_mslice_size_bits; 217 void __iomem *e_frame_insertion; 218 void __iomem *e_rc_frame_rate; 219 void __iomem *e_rc_bit_rate; 220 void __iomem *e_rc_roi_ctrl; 221 void __iomem *e_picture_tag; 222 void __iomem *e_bit_count_enable; 223 void __iomem *e_max_bit_count; 224 void __iomem *e_min_bit_count; 225 void __iomem *e_metadata_buffer_addr; 226 void __iomem *e_metadata_buffer_size; 227 void __iomem *e_encoded_source_first_plane_addr; 228 void __iomem *e_encoded_source_second_plane_addr; 229 void __iomem *e_encoded_source_third_plane_addr;/* v7 and v8 */ 230 void __iomem *e_stream_size; 231 void __iomem *e_slice_type; 232 void __iomem *e_picture_count; 233 void __iomem *e_ret_picture_tag; 234 void __iomem *e_stream_buffer_write_pointer; /* only v6 */ 235 void __iomem *e_recon_luma_dpb_addr; 236 void __iomem *e_recon_chroma_dpb_addr; 237 void __iomem *e_metadata_addr_enc_slice; 238 void __iomem *e_metadata_size_enc_slice; 239 void __iomem *e_mpeg4_options; 240 void __iomem *e_mpeg4_hec_period; 241 void __iomem *e_aspect_ratio; 242 void __iomem *e_extended_sar; 243 void __iomem *e_h264_options; 244 void __iomem *e_h264_options_2;/* v7 and v8 */ 245 void __iomem *e_h264_lf_alpha_offset; 246 void __iomem *e_h264_lf_beta_offset; 247 void __iomem *e_h264_i_period; 248 void __iomem *e_h264_fmo_slice_grp_map_type; 249 void __iomem *e_h264_fmo_num_slice_grp_minus1; 250 void __iomem *e_h264_fmo_slice_grp_change_dir; 251 void __iomem *e_h264_fmo_slice_grp_change_rate_minus1; 252 void __iomem *e_h264_fmo_run_length_minus1_0; 253 void __iomem *e_h264_aso_slice_order_0; 254 void __iomem *e_h264_chroma_qp_offset; 255 void __iomem *e_h264_num_t_layer; 256 void __iomem *e_h264_hierarchical_qp_layer0; 257 void __iomem *e_h264_frame_packing_sei_info; 258 void __iomem *e_h264_nal_control;/* v7 and v8 */ 259 void __iomem *e_mvc_frame_qp_view1; 260 void __iomem *e_mvc_rc_bit_rate_view1; 261 void __iomem *e_mvc_rc_qbound_view1; 262 void __iomem *e_mvc_rc_mode_view1; 263 void __iomem *e_mvc_inter_view_prediction_on; 264 void __iomem *e_vp8_options;/* v7 and v8 */ 265 void __iomem *e_vp8_filter_options;/* v7 and v8 */ 266 void __iomem *e_vp8_golden_frame_option;/* v7 and v8 */ 267 void __iomem *e_vp8_num_t_layer;/* v7 and v8 */ 268 void __iomem *e_vp8_hierarchical_qp_layer0;/* v7 and v8 */ 269 void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */ 270 void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */ 271 void __iomem *e_min_scratch_buffer_size; /* v10 and v12 */ 272 void __iomem *e_num_t_layer; /* v10 */ 273 void __iomem *e_hier_qp_layer0; /* v10 */ 274 void __iomem *e_hier_bit_rate_layer0; /* v10 */ 275 void __iomem *e_hevc_options; /* v10 */ 276 void __iomem *e_hevc_refresh_period; /* v10 */ 277 void __iomem *e_hevc_lf_beta_offset_div2; /* v10 */ 278 void __iomem *e_hevc_lf_tc_offset_div2; /* v10 */ 279 void __iomem *e_hevc_nal_control; /* v10 */ 280}; 281 282struct s5p_mfc_hw_ops { 283 int (*alloc_dec_temp_buffers)(struct s5p_mfc_ctx *ctx); 284 void (*release_dec_desc_buffer)(struct s5p_mfc_ctx *ctx); 285 int (*alloc_codec_buffers)(struct s5p_mfc_ctx *ctx); 286 void (*release_codec_buffers)(struct s5p_mfc_ctx *ctx); 287 int (*alloc_instance_buffer)(struct s5p_mfc_ctx *ctx); 288 void (*release_instance_buffer)(struct s5p_mfc_ctx *ctx); 289 int (*alloc_dev_context_buffer)(struct s5p_mfc_dev *dev); 290 void (*release_dev_context_buffer)(struct s5p_mfc_dev *dev); 291 void (*dec_calc_dpb_size)(struct s5p_mfc_ctx *ctx); 292 void (*enc_calc_src_size)(struct s5p_mfc_ctx *ctx); 293 int (*set_enc_stream_buffer)(struct s5p_mfc_ctx *ctx, 294 unsigned long addr, unsigned int size); 295 void (*set_enc_frame_buffer)(struct s5p_mfc_ctx *ctx, 296 unsigned long y_addr, unsigned long c_addr, 297 unsigned long c_1_addr); 298 void (*get_enc_frame_buffer)(struct s5p_mfc_ctx *ctx, 299 unsigned long *y_addr, unsigned long *c_addr, 300 unsigned long *c_1_addr); 301 void (*try_run)(struct s5p_mfc_dev *dev); 302 void (*clear_int_flags)(struct s5p_mfc_dev *dev); 303 int (*get_dspl_y_adr)(struct s5p_mfc_dev *dev); 304 int (*get_dec_y_adr)(struct s5p_mfc_dev *dev); 305 int (*get_dspl_status)(struct s5p_mfc_dev *dev); 306 int (*get_dec_status)(struct s5p_mfc_dev *dev); 307 int (*get_dec_frame_type)(struct s5p_mfc_dev *dev); 308 int (*get_disp_frame_type)(struct s5p_mfc_ctx *ctx); 309 int (*get_consumed_stream)(struct s5p_mfc_dev *dev); 310 int (*get_int_reason)(struct s5p_mfc_dev *dev); 311 int (*get_int_err)(struct s5p_mfc_dev *dev); 312 int (*err_dec)(unsigned int err); 313 int (*get_img_width)(struct s5p_mfc_dev *dev); 314 int (*get_img_height)(struct s5p_mfc_dev *dev); 315 int (*get_dpb_count)(struct s5p_mfc_dev *dev); 316 int (*get_mv_count)(struct s5p_mfc_dev *dev); 317 int (*get_inst_no)(struct s5p_mfc_dev *dev); 318 int (*get_enc_strm_size)(struct s5p_mfc_dev *dev); 319 int (*get_enc_slice_type)(struct s5p_mfc_dev *dev); 320 int (*get_enc_dpb_count)(struct s5p_mfc_dev *dev); 321 unsigned int (*get_pic_type_top)(struct s5p_mfc_ctx *ctx); 322 unsigned int (*get_pic_type_bot)(struct s5p_mfc_ctx *ctx); 323 unsigned int (*get_crop_info_h)(struct s5p_mfc_ctx *ctx); 324 unsigned int (*get_crop_info_v)(struct s5p_mfc_ctx *ctx); 325 int (*get_min_scratch_buf_size)(struct s5p_mfc_dev *dev); 326 int (*get_e_min_scratch_buf_size)(struct s5p_mfc_dev *dev); 327}; 328 329void s5p_mfc_init_hw_ops(struct s5p_mfc_dev *dev); 330void s5p_mfc_init_regs(struct s5p_mfc_dev *dev); 331int s5p_mfc_alloc_priv_buf(struct s5p_mfc_dev *dev, unsigned int mem_ctx, 332 struct s5p_mfc_priv_buf *b); 333void s5p_mfc_release_priv_buf(struct s5p_mfc_dev *dev, 334 struct s5p_mfc_priv_buf *b); 335int s5p_mfc_alloc_generic_buf(struct s5p_mfc_dev *dev, unsigned int mem_ctx, 336 struct s5p_mfc_priv_buf *b); 337void s5p_mfc_release_generic_buf(struct s5p_mfc_dev *dev, 338 struct s5p_mfc_priv_buf *b); 339 340 341#endif /* S5P_MFC_OPR_H_ */
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