fimc-lite.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Samsung EXYNOS FIMC-LITE (camera host interface) driver
   4*
   5 * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd.
   6 * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
   7 */
   8#define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__
   9
  10#include <linux/bug.h>
  11#include <linux/clk.h>
  12#include <linux/device.h>
  13#include <linux/errno.h>
  14#include <linux/interrupt.h>
  15#include <linux/kernel.h>
  16#include <linux/list.h>
  17#include <linux/module.h>
  18#include <linux/of.h>
  19#include <linux/types.h>
  20#include <linux/platform_device.h>
  21#include <linux/pm_runtime.h>
  22#include <linux/slab.h>
  23#include <linux/videodev2.h>
  24
  25#include <media/v4l2-device.h>
  26#include <media/v4l2-ioctl.h>
  27#include <media/v4l2-mem2mem.h>
  28#include <media/v4l2-rect.h>
  29#include <media/videobuf2-v4l2.h>
  30#include <media/videobuf2-dma-contig.h>
  31#include <media/drv-intf/exynos-fimc.h>
  32
  33#include "common.h"
  34#include "fimc-core.h"
  35#include "fimc-lite.h"
  36#include "fimc-lite-reg.h"
  37
  38static int debug;
  39module_param(debug, int, 0644);
  40
  41static const struct fimc_fmt fimc_lite_formats[] = {
  42	{
  43		.fourcc		= V4L2_PIX_FMT_YUYV,
  44		.colorspace	= V4L2_COLORSPACE_JPEG,
  45		.depth		= { 16 },
  46		.color		= FIMC_FMT_YCBYCR422,
  47		.memplanes	= 1,
  48		.mbus_code	= MEDIA_BUS_FMT_YUYV8_2X8,
  49		.flags		= FMT_FLAGS_YUV,
  50	}, {
  51		.fourcc		= V4L2_PIX_FMT_UYVY,
  52		.colorspace	= V4L2_COLORSPACE_JPEG,
  53		.depth		= { 16 },
  54		.color		= FIMC_FMT_CBYCRY422,
  55		.memplanes	= 1,
  56		.mbus_code	= MEDIA_BUS_FMT_UYVY8_2X8,
  57		.flags		= FMT_FLAGS_YUV,
  58	}, {
  59		.fourcc		= V4L2_PIX_FMT_VYUY,
  60		.colorspace	= V4L2_COLORSPACE_JPEG,
  61		.depth		= { 16 },
  62		.color		= FIMC_FMT_CRYCBY422,
  63		.memplanes	= 1,
  64		.mbus_code	= MEDIA_BUS_FMT_VYUY8_2X8,
  65		.flags		= FMT_FLAGS_YUV,
  66	}, {
  67		.fourcc		= V4L2_PIX_FMT_YVYU,
  68		.colorspace	= V4L2_COLORSPACE_JPEG,
  69		.depth		= { 16 },
  70		.color		= FIMC_FMT_YCRYCB422,
  71		.memplanes	= 1,
  72		.mbus_code	= MEDIA_BUS_FMT_YVYU8_2X8,
  73		.flags		= FMT_FLAGS_YUV,
  74	}, {
  75		.fourcc		= V4L2_PIX_FMT_SGRBG8,
  76		.colorspace	= V4L2_COLORSPACE_SRGB,
  77		.depth		= { 8 },
  78		.color		= FIMC_FMT_RAW8,
  79		.memplanes	= 1,
  80		.mbus_code	= MEDIA_BUS_FMT_SGRBG8_1X8,
  81		.flags		= FMT_FLAGS_RAW_BAYER,
  82	}, {
  83		.fourcc		= V4L2_PIX_FMT_SGRBG10,
  84		.colorspace	= V4L2_COLORSPACE_SRGB,
  85		.depth		= { 16 },
  86		.color		= FIMC_FMT_RAW10,
  87		.memplanes	= 1,
  88		.mbus_code	= MEDIA_BUS_FMT_SGRBG10_1X10,
  89		.flags		= FMT_FLAGS_RAW_BAYER,
  90	}, {
  91		.fourcc		= V4L2_PIX_FMT_SGRBG12,
  92		.colorspace	= V4L2_COLORSPACE_SRGB,
  93		.depth		= { 16 },
  94		.color		= FIMC_FMT_RAW12,
  95		.memplanes	= 1,
  96		.mbus_code	= MEDIA_BUS_FMT_SGRBG12_1X12,
  97		.flags		= FMT_FLAGS_RAW_BAYER,
  98	},
  99};
 100
 101/**
 102 * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code
 103 * @pixelformat: fourcc to match, ignored if null
 104 * @mbus_code: media bus code to match, ignored if null
 105 * @mask: the color format flags to match
 106 * @index: index to the fimc_lite_formats array, ignored if negative
 107 */
 108static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat,
 109			const u32 *mbus_code, unsigned int mask, int index)
 110{
 111	const struct fimc_fmt *fmt, *def_fmt = NULL;
 112	unsigned int i;
 113	int id = 0;
 114
 115	if (index >= (int)ARRAY_SIZE(fimc_lite_formats))
 116		return NULL;
 117
 118	for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) {
 119		fmt = &fimc_lite_formats[i];
 120		if (mask && !(fmt->flags & mask))
 121			continue;
 122		if (pixelformat && fmt->fourcc == *pixelformat)
 123			return fmt;
 124		if (mbus_code && fmt->mbus_code == *mbus_code)
 125			return fmt;
 126		if (index == id)
 127			def_fmt = fmt;
 128		id++;
 129	}
 130	return def_fmt;
 131}
 132
 133static int fimc_lite_hw_init(struct fimc_lite *fimc, bool isp_output)
 134{
 135	struct fimc_source_info *si;
 136	unsigned long flags;
 137
 138	if (fimc->sensor == NULL)
 139		return -ENXIO;
 140
 141	if (fimc->inp_frame.fmt == NULL || fimc->out_frame.fmt == NULL)
 142		return -EINVAL;
 143
 144	/* Get sensor configuration data from the sensor subdev */
 145	si = v4l2_get_subdev_hostdata(fimc->sensor);
 146	if (!si)
 147		return -EINVAL;
 148
 149	spin_lock_irqsave(&fimc->slock, flags);
 150
 151	flite_hw_set_camera_bus(fimc, si);
 152	flite_hw_set_source_format(fimc, &fimc->inp_frame);
 153	flite_hw_set_window_offset(fimc, &fimc->inp_frame);
 154	flite_hw_set_dma_buf_mask(fimc, 0);
 155	flite_hw_set_output_dma(fimc, &fimc->out_frame, !isp_output);
 156	flite_hw_set_interrupt_mask(fimc);
 157	flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
 158
 159	if (debug > 0)
 160		flite_hw_dump_regs(fimc, __func__);
 161
 162	spin_unlock_irqrestore(&fimc->slock, flags);
 163	return 0;
 164}
 165
 166/*
 167 * Reinitialize the driver so it is ready to start the streaming again.
 168 * Set fimc->state to indicate stream off and the hardware shut down state.
 169 * If not suspending (@suspend is false), return any buffers to videobuf2.
 170 * Otherwise put any owned buffers onto the pending buffers queue, so they
 171 * can be re-spun when the device is being resumed. Also perform FIMC
 172 * software reset and disable streaming on the whole pipeline if required.
 173 */
 174static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend)
 175{
 176	struct flite_buffer *buf;
 177	unsigned long flags;
 178	bool streaming;
 179
 180	spin_lock_irqsave(&fimc->slock, flags);
 181	streaming = fimc->state & (1 << ST_SENSOR_STREAM);
 182
 183	fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF |
 184			 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM);
 185	if (suspend)
 186		fimc->state |= (1 << ST_FLITE_SUSPENDED);
 187	else
 188		fimc->state &= ~(1 << ST_FLITE_PENDING |
 189				 1 << ST_FLITE_SUSPENDED);
 190
 191	/* Release unused buffers */
 192	while (!suspend && !list_empty(&fimc->pending_buf_q)) {
 193		buf = fimc_lite_pending_queue_pop(fimc);
 194		vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
 195	}
 196	/* If suspending put unused buffers onto pending queue */
 197	while (!list_empty(&fimc->active_buf_q)) {
 198		buf = fimc_lite_active_queue_pop(fimc);
 199		if (suspend)
 200			fimc_lite_pending_queue_add(fimc, buf);
 201		else
 202			vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
 203	}
 204
 205	spin_unlock_irqrestore(&fimc->slock, flags);
 206
 207	flite_hw_reset(fimc);
 208
 209	if (!streaming)
 210		return 0;
 211
 212	return fimc_pipeline_call(&fimc->ve, set_stream, 0);
 213}
 214
 215static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend)
 216{
 217	unsigned long flags;
 218
 219	if (!fimc_lite_active(fimc))
 220		return 0;
 221
 222	spin_lock_irqsave(&fimc->slock, flags);
 223	set_bit(ST_FLITE_OFF, &fimc->state);
 224	flite_hw_capture_stop(fimc);
 225	spin_unlock_irqrestore(&fimc->slock, flags);
 226
 227	wait_event_timeout(fimc->irq_queue,
 228			   !test_bit(ST_FLITE_OFF, &fimc->state),
 229			   (2*HZ/10)); /* 200 ms */
 230
 231	return fimc_lite_reinit(fimc, suspend);
 232}
 233
 234/* Must be called  with fimc.slock spinlock held. */
 235static void fimc_lite_config_update(struct fimc_lite *fimc)
 236{
 237	flite_hw_set_window_offset(fimc, &fimc->inp_frame);
 238	flite_hw_set_dma_window(fimc, &fimc->out_frame);
 239	flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
 240	clear_bit(ST_FLITE_CONFIG, &fimc->state);
 241}
 242
 243static irqreturn_t flite_irq_handler(int irq, void *priv)
 244{
 245	struct fimc_lite *fimc = priv;
 246	struct flite_buffer *vbuf;
 247	unsigned long flags;
 248	u32 intsrc;
 249
 250	spin_lock_irqsave(&fimc->slock, flags);
 251
 252	intsrc = flite_hw_get_interrupt_source(fimc);
 253	flite_hw_clear_pending_irq(fimc);
 254
 255	if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) {
 256		wake_up(&fimc->irq_queue);
 257		goto done;
 258	}
 259
 260	if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) {
 261		clear_bit(ST_FLITE_RUN, &fimc->state);
 262		fimc->events.data_overflow++;
 263	}
 264
 265	if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) {
 266		flite_hw_clear_last_capture_end(fimc);
 267		clear_bit(ST_FLITE_STREAM, &fimc->state);
 268		wake_up(&fimc->irq_queue);
 269	}
 270
 271	if (atomic_read(&fimc->out_path) != FIMC_IO_DMA)
 272		goto done;
 273
 274	if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) &&
 275	    test_bit(ST_FLITE_RUN, &fimc->state) &&
 276	    !list_empty(&fimc->pending_buf_q)) {
 277		vbuf = fimc_lite_pending_queue_pop(fimc);
 278		flite_hw_set_dma_buffer(fimc, vbuf);
 279		fimc_lite_active_queue_add(fimc, vbuf);
 280	}
 281
 282	if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMEND) &&
 283	    test_bit(ST_FLITE_RUN, &fimc->state) &&
 284	    !list_empty(&fimc->active_buf_q)) {
 285		vbuf = fimc_lite_active_queue_pop(fimc);
 286		vbuf->vb.vb2_buf.timestamp = ktime_get_ns();
 287		vbuf->vb.sequence = fimc->frame_count++;
 288		flite_hw_mask_dma_buffer(fimc, vbuf->index);
 289		vb2_buffer_done(&vbuf->vb.vb2_buf, VB2_BUF_STATE_DONE);
 290	}
 291
 292	if (test_bit(ST_FLITE_CONFIG, &fimc->state))
 293		fimc_lite_config_update(fimc);
 294
 295	if (list_empty(&fimc->pending_buf_q)) {
 296		flite_hw_capture_stop(fimc);
 297		clear_bit(ST_FLITE_STREAM, &fimc->state);
 298	}
 299done:
 300	set_bit(ST_FLITE_RUN, &fimc->state);
 301	spin_unlock_irqrestore(&fimc->slock, flags);
 302	return IRQ_HANDLED;
 303}
 304
 305static int start_streaming(struct vb2_queue *q, unsigned int count)
 306{
 307	struct fimc_lite *fimc = q->drv_priv;
 308	unsigned long flags;
 309	int ret;
 310
 311	spin_lock_irqsave(&fimc->slock, flags);
 312
 313	fimc->buf_index = 0;
 314	fimc->frame_count = 0;
 315
 316	spin_unlock_irqrestore(&fimc->slock, flags);
 317
 318	ret = fimc_lite_hw_init(fimc, false);
 319	if (ret) {
 320		fimc_lite_reinit(fimc, false);
 321		return ret;
 322	}
 323
 324	set_bit(ST_FLITE_PENDING, &fimc->state);
 325
 326	if (!list_empty(&fimc->active_buf_q) &&
 327	    !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
 328		flite_hw_capture_start(fimc);
 329
 330		if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
 331			fimc_pipeline_call(&fimc->ve, set_stream, 1);
 332	}
 333	if (debug > 0)
 334		flite_hw_dump_regs(fimc, __func__);
 335
 336	return 0;
 337}
 338
 339static void stop_streaming(struct vb2_queue *q)
 340{
 341	struct fimc_lite *fimc = q->drv_priv;
 342
 343	if (!fimc_lite_active(fimc))
 344		return;
 345
 346	fimc_lite_stop_capture(fimc, false);
 347}
 348
 349static int queue_setup(struct vb2_queue *vq,
 350		       unsigned int *num_buffers, unsigned int *num_planes,
 351		       unsigned int sizes[], struct device *alloc_devs[])
 352{
 353	struct fimc_lite *fimc = vq->drv_priv;
 354	struct flite_frame *frame = &fimc->out_frame;
 355	const struct fimc_fmt *fmt = frame->fmt;
 356	unsigned long wh = frame->f_width * frame->f_height;
 357	int i;
 358
 359	if (fmt == NULL)
 360		return -EINVAL;
 361
 362	if (*num_planes) {
 363		if (*num_planes != fmt->memplanes)
 364			return -EINVAL;
 365		for (i = 0; i < *num_planes; i++)
 366			if (sizes[i] < (wh * fmt->depth[i]) / 8)
 367				return -EINVAL;
 368		return 0;
 369	}
 370
 371	*num_planes = fmt->memplanes;
 372
 373	for (i = 0; i < fmt->memplanes; i++)
 374		sizes[i] = (wh * fmt->depth[i]) / 8;
 375
 376	return 0;
 377}
 378
 379static int buffer_prepare(struct vb2_buffer *vb)
 380{
 381	struct vb2_queue *vq = vb->vb2_queue;
 382	struct fimc_lite *fimc = vq->drv_priv;
 383	int i;
 384
 385	if (fimc->out_frame.fmt == NULL)
 386		return -EINVAL;
 387
 388	for (i = 0; i < fimc->out_frame.fmt->memplanes; i++) {
 389		unsigned long size = fimc->payload[i];
 390
 391		if (vb2_plane_size(vb, i) < size) {
 392			v4l2_err(&fimc->ve.vdev,
 393				 "User buffer too small (%ld < %ld)\n",
 394				 vb2_plane_size(vb, i), size);
 395			return -EINVAL;
 396		}
 397		vb2_set_plane_payload(vb, i, size);
 398	}
 399
 400	return 0;
 401}
 402
 403static void buffer_queue(struct vb2_buffer *vb)
 404{
 405	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
 406	struct flite_buffer *buf
 407		= container_of(vbuf, struct flite_buffer, vb);
 408	struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue);
 409	unsigned long flags;
 410
 411	spin_lock_irqsave(&fimc->slock, flags);
 412	buf->addr = vb2_dma_contig_plane_dma_addr(vb, 0);
 413
 414	buf->index = fimc->buf_index++;
 415	if (fimc->buf_index >= fimc->reqbufs_count)
 416		fimc->buf_index = 0;
 417
 418	if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) &&
 419	    !test_bit(ST_FLITE_STREAM, &fimc->state) &&
 420	    list_empty(&fimc->active_buf_q)) {
 421		flite_hw_set_dma_buffer(fimc, buf);
 422		fimc_lite_active_queue_add(fimc, buf);
 423	} else {
 424		fimc_lite_pending_queue_add(fimc, buf);
 425	}
 426
 427	if (vb2_is_streaming(&fimc->vb_queue) &&
 428	    !list_empty(&fimc->pending_buf_q) &&
 429	    !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
 430		flite_hw_capture_start(fimc);
 431		spin_unlock_irqrestore(&fimc->slock, flags);
 432
 433		if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
 434			fimc_pipeline_call(&fimc->ve, set_stream, 1);
 435		return;
 436	}
 437	spin_unlock_irqrestore(&fimc->slock, flags);
 438}
 439
 440static const struct vb2_ops fimc_lite_qops = {
 441	.queue_setup	 = queue_setup,
 442	.buf_prepare	 = buffer_prepare,
 443	.buf_queue	 = buffer_queue,
 444	.start_streaming = start_streaming,
 445	.stop_streaming	 = stop_streaming,
 446};
 447
 448static void fimc_lite_clear_event_counters(struct fimc_lite *fimc)
 449{
 450	unsigned long flags;
 451
 452	spin_lock_irqsave(&fimc->slock, flags);
 453	memset(&fimc->events, 0, sizeof(fimc->events));
 454	spin_unlock_irqrestore(&fimc->slock, flags);
 455}
 456
 457static int fimc_lite_open(struct file *file)
 458{
 459	struct fimc_lite *fimc = video_drvdata(file);
 460	struct media_entity *me = &fimc->ve.vdev.entity;
 461	int ret;
 462
 463	mutex_lock(&fimc->lock);
 464	if (atomic_read(&fimc->out_path) != FIMC_IO_DMA) {
 465		ret = -EBUSY;
 466		goto unlock;
 467	}
 468
 469	set_bit(ST_FLITE_IN_USE, &fimc->state);
 470	ret = pm_runtime_resume_and_get(&fimc->pdev->dev);
 471	if (ret < 0)
 472		goto err_in_use;
 473
 474	ret = v4l2_fh_open(file);
 475	if (ret < 0)
 476		goto err_pm;
 477
 478	if (!v4l2_fh_is_singular_file(file) ||
 479	    atomic_read(&fimc->out_path) != FIMC_IO_DMA)
 480		goto unlock;
 481
 482	mutex_lock(&me->graph_obj.mdev->graph_mutex);
 483
 484	ret = fimc_pipeline_call(&fimc->ve, open, me, true);
 485
 486	/* Mark video pipeline ending at this video node as in use. */
 487	if (ret == 0)
 488		me->use_count++;
 489
 490	mutex_unlock(&me->graph_obj.mdev->graph_mutex);
 491
 492	if (!ret) {
 493		fimc_lite_clear_event_counters(fimc);
 494		goto unlock;
 495	}
 496
 497	v4l2_fh_release(file);
 498err_pm:
 499	pm_runtime_put_sync(&fimc->pdev->dev);
 500err_in_use:
 501	clear_bit(ST_FLITE_IN_USE, &fimc->state);
 502unlock:
 503	mutex_unlock(&fimc->lock);
 504	return ret;
 505}
 506
 507static int fimc_lite_release(struct file *file)
 508{
 509	struct fimc_lite *fimc = video_drvdata(file);
 510	struct media_entity *entity = &fimc->ve.vdev.entity;
 511
 512	mutex_lock(&fimc->lock);
 513
 514	if (v4l2_fh_is_singular_file(file) &&
 515	    atomic_read(&fimc->out_path) == FIMC_IO_DMA) {
 516		if (fimc->streaming) {
 517			video_device_pipeline_stop(&fimc->ve.vdev);
 518			fimc->streaming = false;
 519		}
 520		fimc_lite_stop_capture(fimc, false);
 521		fimc_pipeline_call(&fimc->ve, close);
 522		clear_bit(ST_FLITE_IN_USE, &fimc->state);
 523
 524		mutex_lock(&entity->graph_obj.mdev->graph_mutex);
 525		entity->use_count--;
 526		mutex_unlock(&entity->graph_obj.mdev->graph_mutex);
 527	}
 528
 529	_vb2_fop_release(file, NULL);
 530	pm_runtime_put(&fimc->pdev->dev);
 531	clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
 532
 533	mutex_unlock(&fimc->lock);
 534	return 0;
 535}
 536
 537static const struct v4l2_file_operations fimc_lite_fops = {
 538	.owner		= THIS_MODULE,
 539	.open		= fimc_lite_open,
 540	.release	= fimc_lite_release,
 541	.poll		= vb2_fop_poll,
 542	.unlocked_ioctl	= video_ioctl2,
 543	.mmap		= vb2_fop_mmap,
 544};
 545
 546/*
 547 * Format and crop negotiation helpers
 548 */
 549
 550static const struct fimc_fmt *fimc_lite_subdev_try_fmt(struct fimc_lite *fimc,
 551					struct v4l2_subdev_state *sd_state,
 552					struct v4l2_subdev_format *format)
 553{
 554	struct flite_drvdata *dd = fimc->dd;
 555	struct v4l2_mbus_framefmt *mf = &format->format;
 556	const struct fimc_fmt *fmt = NULL;
 557
 558	if (format->pad == FLITE_SD_PAD_SINK) {
 559		v4l_bound_align_image(&mf->width, 8, dd->max_width,
 560				ffs(dd->out_width_align) - 1,
 561				&mf->height, 0, dd->max_height, 0, 0);
 562
 563		fmt = fimc_lite_find_format(NULL, &mf->code, 0, 0);
 564		if (WARN_ON(!fmt))
 565			return NULL;
 566
 567		mf->colorspace = fmt->colorspace;
 568		mf->code = fmt->mbus_code;
 569	} else {
 570		struct flite_frame *sink = &fimc->inp_frame;
 571		struct v4l2_mbus_framefmt *sink_fmt;
 572		struct v4l2_rect *rect;
 573
 574		if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
 575			sink_fmt = v4l2_subdev_state_get_format(sd_state,
 576								FLITE_SD_PAD_SINK);
 577
 578			mf->code = sink_fmt->code;
 579			mf->colorspace = sink_fmt->colorspace;
 580
 581			rect = v4l2_subdev_state_get_crop(sd_state,
 582							  FLITE_SD_PAD_SINK);
 583		} else {
 584			mf->code = sink->fmt->mbus_code;
 585			mf->colorspace = sink->fmt->colorspace;
 586			rect = &sink->rect;
 587		}
 588
 589		/* Allow changing format only on sink pad */
 590		mf->width = rect->width;
 591		mf->height = rect->height;
 592	}
 593
 594	mf->field = V4L2_FIELD_NONE;
 595
 596	v4l2_dbg(1, debug, &fimc->subdev, "code: %#x (%d), %dx%d\n",
 597		 mf->code, mf->colorspace, mf->width, mf->height);
 598
 599	return fmt;
 600}
 601
 602static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r)
 603{
 604	struct flite_frame *frame = &fimc->inp_frame;
 605
 606	v4l_bound_align_image(&r->width, 0, frame->f_width, 0,
 607			      &r->height, 0, frame->f_height, 0, 0);
 608
 609	/* Adjust left/top if cropping rectangle got out of bounds */
 610	r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
 611	r->left = round_down(r->left, fimc->dd->win_hor_offs_align);
 612	r->top  = clamp_t(u32, r->top, 0, frame->f_height - r->height);
 613
 614	v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%ux%u, sink fmt: %dx%d\n",
 615		 r->left, r->top, r->width, r->height,
 616		 frame->f_width, frame->f_height);
 617}
 618
 619static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r)
 620{
 621	struct flite_frame *frame = &fimc->out_frame;
 622	struct v4l2_rect *crop_rect = &fimc->inp_frame.rect;
 623
 624	/* Scaling is not supported so we enforce compose rectangle size
 625	   same as size of the sink crop rectangle. */
 626	r->width = crop_rect->width;
 627	r->height = crop_rect->height;
 628
 629	/* Adjust left/top if the composing rectangle got out of bounds */
 630	r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
 631	r->left = round_down(r->left, fimc->dd->out_hor_offs_align);
 632	r->top  = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height);
 633
 634	v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%ux%u, source fmt: %dx%d\n",
 635		 r->left, r->top, r->width, r->height,
 636		 frame->f_width, frame->f_height);
 637}
 638
 639/*
 640 * Video node ioctl operations
 641 */
 642static int fimc_lite_querycap(struct file *file, void *priv,
 643					struct v4l2_capability *cap)
 644{
 645	strscpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver));
 646	strscpy(cap->card, FIMC_LITE_DRV_NAME, sizeof(cap->card));
 647	return 0;
 648}
 649
 650static int fimc_lite_enum_fmt(struct file *file, void *priv,
 651			      struct v4l2_fmtdesc *f)
 652{
 653	const struct fimc_fmt *fmt;
 654
 655	if (f->index >= ARRAY_SIZE(fimc_lite_formats))
 656		return -EINVAL;
 657
 658	fmt = &fimc_lite_formats[f->index];
 659	f->pixelformat = fmt->fourcc;
 660
 661	return 0;
 662}
 663
 664static int fimc_lite_g_fmt_mplane(struct file *file, void *fh,
 665				  struct v4l2_format *f)
 666{
 667	struct fimc_lite *fimc = video_drvdata(file);
 668	struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
 669	struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
 670	struct flite_frame *frame = &fimc->out_frame;
 671	const struct fimc_fmt *fmt = frame->fmt;
 672
 673	plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8;
 674	plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height;
 675
 676	pixm->num_planes = fmt->memplanes;
 677	pixm->pixelformat = fmt->fourcc;
 678	pixm->width = frame->f_width;
 679	pixm->height = frame->f_height;
 680	pixm->field = V4L2_FIELD_NONE;
 681	pixm->colorspace = fmt->colorspace;
 682	return 0;
 683}
 684
 685static int fimc_lite_try_fmt(struct fimc_lite *fimc,
 686			     struct v4l2_pix_format_mplane *pixm,
 687			     const struct fimc_fmt **ffmt)
 688{
 689	u32 bpl = pixm->plane_fmt[0].bytesperline;
 690	struct flite_drvdata *dd = fimc->dd;
 691	const struct fimc_fmt *inp_fmt = fimc->inp_frame.fmt;
 692	const struct fimc_fmt *fmt;
 693
 694	if (WARN_ON(inp_fmt == NULL))
 695		return -EINVAL;
 696	/*
 697	 * We allow some flexibility only for YUV formats. In case of raw
 698	 * raw Bayer the FIMC-LITE's output format must match its camera
 699	 * interface input format.
 700	 */
 701	if (inp_fmt->flags & FMT_FLAGS_YUV)
 702		fmt = fimc_lite_find_format(&pixm->pixelformat, NULL,
 703						inp_fmt->flags, 0);
 704	else
 705		fmt = inp_fmt;
 706
 707	if (WARN_ON(fmt == NULL))
 708		return -EINVAL;
 709	if (ffmt)
 710		*ffmt = fmt;
 711	v4l_bound_align_image(&pixm->width, 8, dd->max_width,
 712			      ffs(dd->out_width_align) - 1,
 713			      &pixm->height, 0, dd->max_height, 0, 0);
 714
 715	if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width))
 716		pixm->plane_fmt[0].bytesperline = (pixm->width *
 717						   fmt->depth[0]) / 8;
 718
 719	if (pixm->plane_fmt[0].sizeimage == 0)
 720		pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height *
 721						fmt->depth[0]) / 8;
 722	pixm->num_planes = fmt->memplanes;
 723	pixm->pixelformat = fmt->fourcc;
 724	pixm->colorspace = fmt->colorspace;
 725	pixm->field = V4L2_FIELD_NONE;
 726	return 0;
 727}
 728
 729static int fimc_lite_try_fmt_mplane(struct file *file, void *fh,
 730				    struct v4l2_format *f)
 731{
 732	struct fimc_lite *fimc = video_drvdata(file);
 733	return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL);
 734}
 735
 736static int fimc_lite_s_fmt_mplane(struct file *file, void *priv,
 737				  struct v4l2_format *f)
 738{
 739	const struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
 740	struct fimc_lite *fimc = video_drvdata(file);
 741	struct flite_frame *frame = &fimc->out_frame;
 742	const struct fimc_fmt *fmt = NULL;
 743	int ret;
 744
 745	if (vb2_is_busy(&fimc->vb_queue))
 746		return -EBUSY;
 747
 748	ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt);
 749	if (ret < 0)
 750		return ret;
 751
 752	frame->fmt = fmt;
 753	fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8,
 754			       pixm->plane_fmt[0].sizeimage);
 755	frame->f_width = pixm->width;
 756	frame->f_height = pixm->height;
 757
 758	return 0;
 759}
 760
 761static int fimc_pipeline_validate(struct fimc_lite *fimc)
 762{
 763	struct v4l2_subdev *sd = &fimc->subdev;
 764	struct v4l2_subdev_format sink_fmt = {
 765		.which = V4L2_SUBDEV_FORMAT_ACTIVE,
 766	};
 767	struct v4l2_subdev_format src_fmt = {
 768		.which = V4L2_SUBDEV_FORMAT_ACTIVE,
 769	};
 770	struct media_pad *pad;
 771	int ret;
 772
 773	while (1) {
 774		/* Retrieve format at the sink pad */
 775		pad = &sd->entity.pads[0];
 776		if (!(pad->flags & MEDIA_PAD_FL_SINK))
 777			break;
 778		/* Don't call FIMC subdev operation to avoid nested locking */
 779		if (sd == &fimc->subdev) {
 780			struct flite_frame *ff = &fimc->out_frame;
 781			sink_fmt.format.width = ff->f_width;
 782			sink_fmt.format.height = ff->f_height;
 783			sink_fmt.format.code = fimc->inp_frame.fmt->mbus_code;
 784		} else {
 785			sink_fmt.pad = pad->index;
 786			ret = v4l2_subdev_call(sd, pad, get_fmt, NULL,
 787					       &sink_fmt);
 788			if (ret < 0 && ret != -ENOIOCTLCMD)
 789				return -EPIPE;
 790		}
 791		/* Retrieve format at the source pad */
 792		pad = media_pad_remote_pad_first(pad);
 793		if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
 794			break;
 795
 796		sd = media_entity_to_v4l2_subdev(pad->entity);
 797		src_fmt.pad = pad->index;
 798		ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
 799		if (ret < 0 && ret != -ENOIOCTLCMD)
 800			return -EPIPE;
 801
 802		if (src_fmt.format.width != sink_fmt.format.width ||
 803		    src_fmt.format.height != sink_fmt.format.height ||
 804		    src_fmt.format.code != sink_fmt.format.code)
 805			return -EPIPE;
 806	}
 807	return 0;
 808}
 809
 810static int fimc_lite_streamon(struct file *file, void *priv,
 811			      enum v4l2_buf_type type)
 812{
 813	struct fimc_lite *fimc = video_drvdata(file);
 814	int ret;
 815
 816	if (fimc_lite_active(fimc))
 817		return -EBUSY;
 818
 819	ret = video_device_pipeline_start(&fimc->ve.vdev, &fimc->ve.pipe->mp);
 820	if (ret < 0)
 821		return ret;
 822
 823	ret = fimc_pipeline_validate(fimc);
 824	if (ret < 0)
 825		goto err_p_stop;
 826
 827	fimc->sensor = fimc_find_remote_sensor(&fimc->subdev.entity);
 828
 829	ret = vb2_ioctl_streamon(file, priv, type);
 830	if (!ret) {
 831		fimc->streaming = true;
 832		return ret;
 833	}
 834
 835err_p_stop:
 836	video_device_pipeline_stop(&fimc->ve.vdev);
 837	return 0;
 838}
 839
 840static int fimc_lite_streamoff(struct file *file, void *priv,
 841			       enum v4l2_buf_type type)
 842{
 843	struct fimc_lite *fimc = video_drvdata(file);
 844	int ret;
 845
 846	ret = vb2_ioctl_streamoff(file, priv, type);
 847	if (ret < 0)
 848		return ret;
 849
 850	video_device_pipeline_stop(&fimc->ve.vdev);
 851	fimc->streaming = false;
 852	return 0;
 853}
 854
 855static int fimc_lite_reqbufs(struct file *file, void *priv,
 856			     struct v4l2_requestbuffers *reqbufs)
 857{
 858	struct fimc_lite *fimc = video_drvdata(file);
 859	int ret;
 860
 861	reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count);
 862	ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
 863	if (!ret)
 864		fimc->reqbufs_count = reqbufs->count;
 865
 866	return ret;
 867}
 868
 869static int fimc_lite_g_selection(struct file *file, void *fh,
 870				 struct v4l2_selection *sel)
 871{
 872	struct fimc_lite *fimc = video_drvdata(file);
 873	struct flite_frame *f = &fimc->out_frame;
 874
 875	if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
 876		return -EINVAL;
 877
 878	switch (sel->target) {
 879	case V4L2_SEL_TGT_COMPOSE_BOUNDS:
 880	case V4L2_SEL_TGT_COMPOSE_DEFAULT:
 881		sel->r.left = 0;
 882		sel->r.top = 0;
 883		sel->r.width = f->f_width;
 884		sel->r.height = f->f_height;
 885		return 0;
 886
 887	case V4L2_SEL_TGT_COMPOSE:
 888		sel->r = f->rect;
 889		return 0;
 890	}
 891
 892	return -EINVAL;
 893}
 894
 895static int fimc_lite_s_selection(struct file *file, void *fh,
 896				 struct v4l2_selection *sel)
 897{
 898	struct fimc_lite *fimc = video_drvdata(file);
 899	struct flite_frame *f = &fimc->out_frame;
 900	struct v4l2_rect rect = sel->r;
 901	unsigned long flags;
 902
 903	if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||
 904	    sel->target != V4L2_SEL_TGT_COMPOSE)
 905		return -EINVAL;
 906
 907	fimc_lite_try_compose(fimc, &rect);
 908
 909	if ((sel->flags & V4L2_SEL_FLAG_LE) &&
 910	    !v4l2_rect_enclosed(&rect, &sel->r))
 911		return -ERANGE;
 912
 913	if ((sel->flags & V4L2_SEL_FLAG_GE) &&
 914	    !v4l2_rect_enclosed(&sel->r, &rect))
 915		return -ERANGE;
 916
 917	sel->r = rect;
 918	spin_lock_irqsave(&fimc->slock, flags);
 919	f->rect = rect;
 920	set_bit(ST_FLITE_CONFIG, &fimc->state);
 921	spin_unlock_irqrestore(&fimc->slock, flags);
 922
 923	return 0;
 924}
 925
 926static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = {
 927	.vidioc_querycap		= fimc_lite_querycap,
 928	.vidioc_enum_fmt_vid_cap	= fimc_lite_enum_fmt,
 929	.vidioc_try_fmt_vid_cap_mplane	= fimc_lite_try_fmt_mplane,
 930	.vidioc_s_fmt_vid_cap_mplane	= fimc_lite_s_fmt_mplane,
 931	.vidioc_g_fmt_vid_cap_mplane	= fimc_lite_g_fmt_mplane,
 932	.vidioc_g_selection		= fimc_lite_g_selection,
 933	.vidioc_s_selection		= fimc_lite_s_selection,
 934	.vidioc_reqbufs			= fimc_lite_reqbufs,
 935	.vidioc_querybuf		= vb2_ioctl_querybuf,
 936	.vidioc_prepare_buf		= vb2_ioctl_prepare_buf,
 937	.vidioc_create_bufs		= vb2_ioctl_create_bufs,
 938	.vidioc_qbuf			= vb2_ioctl_qbuf,
 939	.vidioc_dqbuf			= vb2_ioctl_dqbuf,
 940	.vidioc_streamon		= fimc_lite_streamon,
 941	.vidioc_streamoff		= fimc_lite_streamoff,
 942};
 943
 944/* Capture subdev media entity operations */
 945static int fimc_lite_link_setup(struct media_entity *entity,
 946				const struct media_pad *local,
 947				const struct media_pad *remote, u32 flags)
 948{
 949	struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
 950	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
 951	int ret = 0;
 952
 953	if (WARN_ON(fimc == NULL))
 954		return 0;
 955
 956	v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x\n",
 957		 __func__, remote->entity->name, local->entity->name,
 958		 flags, fimc->source_subdev_grp_id);
 959
 960	switch (local->index) {
 961	case FLITE_SD_PAD_SINK:
 962		if (flags & MEDIA_LNK_FL_ENABLED) {
 963			if (fimc->source_subdev_grp_id == 0)
 964				fimc->source_subdev_grp_id = sd->grp_id;
 965			else
 966				ret = -EBUSY;
 967		} else {
 968			fimc->source_subdev_grp_id = 0;
 969			fimc->sensor = NULL;
 970		}
 971		break;
 972
 973	case FLITE_SD_PAD_SOURCE_DMA:
 974		if (!(flags & MEDIA_LNK_FL_ENABLED))
 975			atomic_set(&fimc->out_path, FIMC_IO_NONE);
 976		else
 977			atomic_set(&fimc->out_path, FIMC_IO_DMA);
 978		break;
 979
 980	case FLITE_SD_PAD_SOURCE_ISP:
 981		if (!(flags & MEDIA_LNK_FL_ENABLED))
 982			atomic_set(&fimc->out_path, FIMC_IO_NONE);
 983		else
 984			atomic_set(&fimc->out_path, FIMC_IO_ISP);
 985		break;
 986
 987	default:
 988		v4l2_err(sd, "Invalid pad index\n");
 989		ret = -EINVAL;
 990	}
 991	mb();
 992
 993	return ret;
 994}
 995
 996static const struct media_entity_operations fimc_lite_subdev_media_ops = {
 997	.link_setup = fimc_lite_link_setup,
 998};
 999
1000static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd,
1001					   struct v4l2_subdev_state *sd_state,
1002					   struct v4l2_subdev_mbus_code_enum *code)
1003{
1004	const struct fimc_fmt *fmt;
1005
1006	fmt = fimc_lite_find_format(NULL, NULL, 0, code->index);
1007	if (!fmt)
1008		return -EINVAL;
1009	code->code = fmt->mbus_code;
1010	return 0;
1011}
1012
1013static struct v4l2_mbus_framefmt *__fimc_lite_subdev_get_try_fmt(
1014		struct v4l2_subdev *sd,
1015		struct v4l2_subdev_state *sd_state, unsigned int pad)
1016{
1017	if (pad != FLITE_SD_PAD_SINK)
1018		pad = FLITE_SD_PAD_SOURCE_DMA;
1019
1020	return v4l2_subdev_state_get_format(sd_state, pad);
1021}
1022
1023static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd,
1024				    struct v4l2_subdev_state *sd_state,
1025				    struct v4l2_subdev_format *fmt)
1026{
1027	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1028	struct v4l2_mbus_framefmt *mf = &fmt->format;
1029	struct flite_frame *f = &fimc->inp_frame;
1030
1031	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1032		mf = __fimc_lite_subdev_get_try_fmt(sd, sd_state, fmt->pad);
1033		fmt->format = *mf;
1034		return 0;
1035	}
1036
1037	mutex_lock(&fimc->lock);
1038	mf->colorspace = f->fmt->colorspace;
1039	mf->code = f->fmt->mbus_code;
1040
1041	if (fmt->pad == FLITE_SD_PAD_SINK) {
1042		/* full camera input frame size */
1043		mf->width = f->f_width;
1044		mf->height = f->f_height;
1045	} else {
1046		/* crop size */
1047		mf->width = f->rect.width;
1048		mf->height = f->rect.height;
1049	}
1050	mutex_unlock(&fimc->lock);
1051	return 0;
1052}
1053
1054static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd,
1055				    struct v4l2_subdev_state *sd_state,
1056				    struct v4l2_subdev_format *fmt)
1057{
1058	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1059	struct v4l2_mbus_framefmt *mf = &fmt->format;
1060	struct flite_frame *sink = &fimc->inp_frame;
1061	struct flite_frame *source = &fimc->out_frame;
1062	const struct fimc_fmt *ffmt;
1063
1064	v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d\n",
1065		 fmt->pad, mf->code, mf->width, mf->height);
1066
1067	mutex_lock(&fimc->lock);
1068
1069	if ((atomic_read(&fimc->out_path) == FIMC_IO_ISP &&
1070	    media_entity_is_streaming(&sd->entity)) ||
1071	    (atomic_read(&fimc->out_path) == FIMC_IO_DMA &&
1072	    vb2_is_busy(&fimc->vb_queue))) {
1073		mutex_unlock(&fimc->lock);
1074		return -EBUSY;
1075	}
1076
1077	ffmt = fimc_lite_subdev_try_fmt(fimc, sd_state, fmt);
1078
1079	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1080		struct v4l2_mbus_framefmt *src_fmt;
1081
1082		mf = __fimc_lite_subdev_get_try_fmt(sd, sd_state, fmt->pad);
1083		*mf = fmt->format;
1084
1085		if (fmt->pad == FLITE_SD_PAD_SINK) {
1086			unsigned int pad = FLITE_SD_PAD_SOURCE_DMA;
1087			src_fmt = __fimc_lite_subdev_get_try_fmt(sd, sd_state,
1088								 pad);
1089			*src_fmt = *mf;
1090		}
1091
1092		mutex_unlock(&fimc->lock);
1093		return 0;
1094	}
1095
1096	if (fmt->pad == FLITE_SD_PAD_SINK) {
1097		sink->f_width = mf->width;
1098		sink->f_height = mf->height;
1099		sink->fmt = ffmt;
1100		/* Set sink crop rectangle */
1101		sink->rect.width = mf->width;
1102		sink->rect.height = mf->height;
1103		sink->rect.left = 0;
1104		sink->rect.top = 0;
1105		/* Reset source format and crop rectangle */
1106		source->rect = sink->rect;
1107		source->f_width = mf->width;
1108		source->f_height = mf->height;
1109	}
1110
1111	mutex_unlock(&fimc->lock);
1112	return 0;
1113}
1114
1115static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd,
1116					  struct v4l2_subdev_state *sd_state,
1117					  struct v4l2_subdev_selection *sel)
1118{
1119	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1120	struct flite_frame *f = &fimc->inp_frame;
1121
1122	if ((sel->target != V4L2_SEL_TGT_CROP &&
1123	     sel->target != V4L2_SEL_TGT_CROP_BOUNDS) ||
1124	     sel->pad != FLITE_SD_PAD_SINK)
1125		return -EINVAL;
1126
1127	if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1128		sel->r = *v4l2_subdev_state_get_crop(sd_state, sel->pad);
1129		return 0;
1130	}
1131
1132	mutex_lock(&fimc->lock);
1133	if (sel->target == V4L2_SEL_TGT_CROP) {
1134		sel->r = f->rect;
1135	} else {
1136		sel->r.left = 0;
1137		sel->r.top = 0;
1138		sel->r.width = f->f_width;
1139		sel->r.height = f->f_height;
1140	}
1141	mutex_unlock(&fimc->lock);
1142
1143	v4l2_dbg(1, debug, sd, "%s: (%d,%d)/%ux%u, f_w: %d, f_h: %d\n",
1144		 __func__, f->rect.left, f->rect.top, f->rect.width,
1145		 f->rect.height, f->f_width, f->f_height);
1146
1147	return 0;
1148}
1149
1150static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd,
1151					  struct v4l2_subdev_state *sd_state,
1152					  struct v4l2_subdev_selection *sel)
1153{
1154	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1155	struct flite_frame *f = &fimc->inp_frame;
1156	int ret = 0;
1157
1158	if (sel->target != V4L2_SEL_TGT_CROP || sel->pad != FLITE_SD_PAD_SINK)
1159		return -EINVAL;
1160
1161	mutex_lock(&fimc->lock);
1162	fimc_lite_try_crop(fimc, &sel->r);
1163
1164	if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1165		*v4l2_subdev_state_get_crop(sd_state, sel->pad) = sel->r;
1166	} else {
1167		unsigned long flags;
1168		spin_lock_irqsave(&fimc->slock, flags);
1169		f->rect = sel->r;
1170		/* Same crop rectangle on the source pad */
1171		fimc->out_frame.rect = sel->r;
1172		set_bit(ST_FLITE_CONFIG, &fimc->state);
1173		spin_unlock_irqrestore(&fimc->slock, flags);
1174	}
1175	mutex_unlock(&fimc->lock);
1176
1177	v4l2_dbg(1, debug, sd, "%s: (%d,%d)/%ux%u, f_w: %d, f_h: %d\n",
1178		 __func__, f->rect.left, f->rect.top, f->rect.width,
1179		 f->rect.height, f->f_width, f->f_height);
1180
1181	return ret;
1182}
1183
1184static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on)
1185{
1186	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1187	unsigned long flags;
1188	int ret;
1189
1190	/*
1191	 * Find sensor subdev linked to FIMC-LITE directly or through
1192	 * MIPI-CSIS. This is required for configuration where FIMC-LITE
1193	 * is used as a subdev only and feeds data internally to FIMC-IS.
1194	 * The pipeline links are protected through entity.pipe so there is no
1195	 * need to take the media graph mutex here.
1196	 */
1197	fimc->sensor = fimc_find_remote_sensor(&sd->entity);
1198
1199	if (atomic_read(&fimc->out_path) != FIMC_IO_ISP)
1200		return -ENOIOCTLCMD;
1201
1202	mutex_lock(&fimc->lock);
1203	if (on) {
1204		flite_hw_reset(fimc);
1205		ret = fimc_lite_hw_init(fimc, true);
1206		if (!ret) {
1207			spin_lock_irqsave(&fimc->slock, flags);
1208			flite_hw_capture_start(fimc);
1209			spin_unlock_irqrestore(&fimc->slock, flags);
1210		}
1211	} else {
1212		set_bit(ST_FLITE_OFF, &fimc->state);
1213
1214		spin_lock_irqsave(&fimc->slock, flags);
1215		flite_hw_capture_stop(fimc);
1216		spin_unlock_irqrestore(&fimc->slock, flags);
1217
1218		ret = wait_event_timeout(fimc->irq_queue,
1219				!test_bit(ST_FLITE_OFF, &fimc->state),
1220				msecs_to_jiffies(200));
1221		if (ret == 0)
1222			v4l2_err(sd, "s_stream(0) timeout\n");
1223		clear_bit(ST_FLITE_RUN, &fimc->state);
1224	}
1225
1226	mutex_unlock(&fimc->lock);
1227	return ret;
1228}
1229
1230static int fimc_lite_log_status(struct v4l2_subdev *sd)
1231{
1232	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1233
1234	flite_hw_dump_regs(fimc, __func__);
1235	return 0;
1236}
1237
1238static int fimc_lite_subdev_registered(struct v4l2_subdev *sd)
1239{
1240	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1241	struct vb2_queue *q = &fimc->vb_queue;
1242	struct video_device *vfd = &fimc->ve.vdev;
1243	int ret;
1244
1245	memset(vfd, 0, sizeof(*vfd));
1246	atomic_set(&fimc->out_path, FIMC_IO_DMA);
1247
1248	snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture",
1249		 fimc->index);
1250
1251	vfd->fops = &fimc_lite_fops;
1252	vfd->ioctl_ops = &fimc_lite_ioctl_ops;
1253	vfd->v4l2_dev = sd->v4l2_dev;
1254	vfd->minor = -1;
1255	vfd->release = video_device_release_empty;
1256	vfd->queue = q;
1257	vfd->device_caps = V4L2_CAP_VIDEO_CAPTURE_MPLANE | V4L2_CAP_STREAMING;
1258	fimc->reqbufs_count = 0;
1259
1260	INIT_LIST_HEAD(&fimc->pending_buf_q);
1261	INIT_LIST_HEAD(&fimc->active_buf_q);
1262
1263	memset(q, 0, sizeof(*q));
1264	q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
1265	q->io_modes = VB2_MMAP | VB2_USERPTR;
1266	q->ops = &fimc_lite_qops;
1267	q->mem_ops = &vb2_dma_contig_memops;
1268	q->buf_struct_size = sizeof(struct flite_buffer);
1269	q->drv_priv = fimc;
1270	q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1271	q->lock = &fimc->lock;
1272	q->dev = &fimc->pdev->dev;
1273
1274	ret = vb2_queue_init(q);
1275	if (ret < 0)
1276		return ret;
1277
1278	fimc->vd_pad.flags = MEDIA_PAD_FL_SINK;
1279	ret = media_entity_pads_init(&vfd->entity, 1, &fimc->vd_pad);
1280	if (ret < 0)
1281		return ret;
1282
1283	video_set_drvdata(vfd, fimc);
1284	fimc->ve.pipe = v4l2_get_subdev_hostdata(sd);
1285
1286	ret = video_register_device(vfd, VFL_TYPE_VIDEO, -1);
1287	if (ret < 0) {
1288		media_entity_cleanup(&vfd->entity);
1289		fimc->ve.pipe = NULL;
1290		return ret;
1291	}
1292
1293	v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
1294		  vfd->name, video_device_node_name(vfd));
1295	return 0;
1296}
1297
1298static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd)
1299{
1300	struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
1301
1302	if (fimc == NULL)
1303		return;
1304
1305	mutex_lock(&fimc->lock);
1306
1307	if (video_is_registered(&fimc->ve.vdev)) {
1308		video_unregister_device(&fimc->ve.vdev);
1309		media_entity_cleanup(&fimc->ve.vdev.entity);
1310		fimc->ve.pipe = NULL;
1311	}
1312
1313	mutex_unlock(&fimc->lock);
1314}
1315
1316static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = {
1317	.registered = fimc_lite_subdev_registered,
1318	.unregistered = fimc_lite_subdev_unregistered,
1319};
1320
1321static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = {
1322	.enum_mbus_code = fimc_lite_subdev_enum_mbus_code,
1323	.get_selection = fimc_lite_subdev_get_selection,
1324	.set_selection = fimc_lite_subdev_set_selection,
1325	.get_fmt = fimc_lite_subdev_get_fmt,
1326	.set_fmt = fimc_lite_subdev_set_fmt,
1327};
1328
1329static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = {
1330	.s_stream = fimc_lite_subdev_s_stream,
1331};
1332
1333static const struct v4l2_subdev_core_ops fimc_lite_core_ops = {
1334	.log_status = fimc_lite_log_status,
1335};
1336
1337static const struct v4l2_subdev_ops fimc_lite_subdev_ops = {
1338	.core = &fimc_lite_core_ops,
1339	.video = &fimc_lite_subdev_video_ops,
1340	.pad = &fimc_lite_subdev_pad_ops,
1341};
1342
1343static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl)
1344{
1345	struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite,
1346					      ctrl_handler);
1347	set_bit(ST_FLITE_CONFIG, &fimc->state);
1348	return 0;
1349}
1350
1351static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = {
1352	.s_ctrl	= fimc_lite_s_ctrl,
1353};
1354
1355static const struct v4l2_ctrl_config fimc_lite_ctrl = {
1356	.ops	= &fimc_lite_ctrl_ops,
1357	.id	= V4L2_CTRL_CLASS_USER | 0x1001,
1358	.type	= V4L2_CTRL_TYPE_BOOLEAN,
1359	.name	= "Test Pattern 640x480",
1360	.step	= 1,
1361};
1362
1363static void fimc_lite_set_default_config(struct fimc_lite *fimc)
1364{
1365	struct flite_frame *sink = &fimc->inp_frame;
1366	struct flite_frame *source = &fimc->out_frame;
1367
1368	sink->fmt = &fimc_lite_formats[0];
1369	sink->f_width = FLITE_DEFAULT_WIDTH;
1370	sink->f_height = FLITE_DEFAULT_HEIGHT;
1371
1372	sink->rect.width = FLITE_DEFAULT_WIDTH;
1373	sink->rect.height = FLITE_DEFAULT_HEIGHT;
1374	sink->rect.left = 0;
1375	sink->rect.top = 0;
1376
1377	*source = *sink;
1378}
1379
1380static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc)
1381{
1382	struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler;
1383	struct v4l2_subdev *sd = &fimc->subdev;
1384	int ret;
1385
1386	v4l2_subdev_init(sd, &fimc_lite_subdev_ops);
1387	sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1388	snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index);
1389
1390	fimc->subdev_pads[FLITE_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
1391	fimc->subdev_pads[FLITE_SD_PAD_SOURCE_DMA].flags = MEDIA_PAD_FL_SOURCE;
1392	fimc->subdev_pads[FLITE_SD_PAD_SOURCE_ISP].flags = MEDIA_PAD_FL_SOURCE;
1393	ret = media_entity_pads_init(&sd->entity, FLITE_SD_PADS_NUM,
1394				fimc->subdev_pads);
1395	if (ret)
1396		return ret;
1397
1398	v4l2_ctrl_handler_init(handler, 1);
1399	fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl,
1400						  NULL);
1401	if (handler->error) {
1402		media_entity_cleanup(&sd->entity);
1403		return handler->error;
1404	}
1405
1406	sd->ctrl_handler = handler;
1407	sd->internal_ops = &fimc_lite_subdev_internal_ops;
1408	sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_SCALER;
1409	sd->entity.ops = &fimc_lite_subdev_media_ops;
1410	sd->owner = THIS_MODULE;
1411	v4l2_set_subdevdata(sd, fimc);
1412
1413	return 0;
1414}
1415
1416static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc)
1417{
1418	struct v4l2_subdev *sd = &fimc->subdev;
1419
1420	v4l2_device_unregister_subdev(sd);
1421	media_entity_cleanup(&sd->entity);
1422	v4l2_ctrl_handler_free(&fimc->ctrl_handler);
1423	v4l2_set_subdevdata(sd, NULL);
1424}
1425
1426static void fimc_lite_clk_put(struct fimc_lite *fimc)
1427{
1428	if (IS_ERR(fimc->clock))
1429		return;
1430
1431	clk_put(fimc->clock);
1432	fimc->clock = ERR_PTR(-EINVAL);
1433}
1434
1435static int fimc_lite_clk_get(struct fimc_lite *fimc)
1436{
1437	fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME);
1438	return PTR_ERR_OR_ZERO(fimc->clock);
1439}
1440
1441static const struct of_device_id flite_of_match[];
1442
1443static int fimc_lite_probe(struct platform_device *pdev)
1444{
1445	struct flite_drvdata *drv_data = NULL;
1446	struct device *dev = &pdev->dev;
1447	const struct of_device_id *of_id;
1448	struct fimc_lite *fimc;
1449	int ret;
1450	int irq;
1451
1452	if (!dev->of_node)
1453		return -ENODEV;
1454
1455	fimc = devm_kzalloc(dev, sizeof(*fimc), GFP_KERNEL);
1456	if (!fimc)
1457		return -ENOMEM;
1458
1459	of_id = of_match_node(flite_of_match, dev->of_node);
1460	if (of_id)
1461		drv_data = (struct flite_drvdata *)of_id->data;
1462	fimc->index = of_alias_get_id(dev->of_node, "fimc-lite");
1463
1464	if (!drv_data || fimc->index >= drv_data->num_instances ||
1465						fimc->index < 0) {
1466		dev_err(dev, "Wrong %pOF node alias\n", dev->of_node);
1467		return -EINVAL;
1468	}
1469
1470	fimc->dd = drv_data;
1471	fimc->pdev = pdev;
1472
1473	init_waitqueue_head(&fimc->irq_queue);
1474	spin_lock_init(&fimc->slock);
1475	mutex_init(&fimc->lock);
1476
1477	fimc->regs = devm_platform_ioremap_resource(pdev, 0);
1478	if (IS_ERR(fimc->regs))
1479		return PTR_ERR(fimc->regs);
1480
1481	irq = platform_get_irq(pdev, 0);
1482	if (irq < 0)
1483		return irq;
1484
1485	ret = fimc_lite_clk_get(fimc);
1486	if (ret)
1487		return ret;
1488
1489	ret = devm_request_irq(dev, irq, flite_irq_handler,
1490			       0, dev_name(dev), fimc);
1491	if (ret) {
1492		dev_err(dev, "Failed to install irq (%d)\n", ret);
1493		goto err_clk_put;
1494	}
1495
1496	/* The video node will be created within the subdev's registered() op */
1497	ret = fimc_lite_create_capture_subdev(fimc);
1498	if (ret)
1499		goto err_clk_put;
1500
1501	platform_set_drvdata(pdev, fimc);
1502	pm_runtime_enable(dev);
1503
1504	if (!pm_runtime_enabled(dev)) {
1505		ret = clk_prepare_enable(fimc->clock);
1506		if (ret < 0)
1507			goto err_sd;
1508	}
1509
1510	vb2_dma_contig_set_max_seg_size(dev, DMA_BIT_MASK(32));
1511
1512	fimc_lite_set_default_config(fimc);
1513
1514	dev_dbg(dev, "FIMC-LITE.%d registered successfully\n",
1515		fimc->index);
1516	return 0;
1517
1518err_sd:
1519	fimc_lite_unregister_capture_subdev(fimc);
1520err_clk_put:
1521	fimc_lite_clk_put(fimc);
1522	return ret;
1523}
1524
1525#ifdef CONFIG_PM
1526static int fimc_lite_runtime_resume(struct device *dev)
1527{
1528	struct fimc_lite *fimc = dev_get_drvdata(dev);
1529
1530	clk_prepare_enable(fimc->clock);
1531	return 0;
1532}
1533
1534static int fimc_lite_runtime_suspend(struct device *dev)
1535{
1536	struct fimc_lite *fimc = dev_get_drvdata(dev);
1537
1538	clk_disable_unprepare(fimc->clock);
1539	return 0;
1540}
1541#endif
1542
1543#ifdef CONFIG_PM_SLEEP
1544static int fimc_lite_resume(struct device *dev)
1545{
1546	struct fimc_lite *fimc = dev_get_drvdata(dev);
1547	struct flite_buffer *buf;
1548	unsigned long flags;
1549	int i;
1550
1551	spin_lock_irqsave(&fimc->slock, flags);
1552	if (!test_and_clear_bit(ST_LPM, &fimc->state) ||
1553	    !test_bit(ST_FLITE_IN_USE, &fimc->state)) {
1554		spin_unlock_irqrestore(&fimc->slock, flags);
1555		return 0;
1556	}
1557	flite_hw_reset(fimc);
1558	spin_unlock_irqrestore(&fimc->slock, flags);
1559
1560	if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state))
1561		return 0;
1562
1563	INIT_LIST_HEAD(&fimc->active_buf_q);
1564	fimc_pipeline_call(&fimc->ve, open,
1565			   &fimc->ve.vdev.entity, false);
1566	fimc_lite_hw_init(fimc, atomic_read(&fimc->out_path) == FIMC_IO_ISP);
1567	clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
1568
1569	for (i = 0; i < fimc->reqbufs_count; i++) {
1570		if (list_empty(&fimc->pending_buf_q))
1571			break;
1572		buf = fimc_lite_pending_queue_pop(fimc);
1573		buffer_queue(&buf->vb.vb2_buf);
1574	}
1575	return 0;
1576}
1577
1578static int fimc_lite_suspend(struct device *dev)
1579{
1580	struct fimc_lite *fimc = dev_get_drvdata(dev);
1581	bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state);
1582	int ret;
1583
1584	if (test_and_set_bit(ST_LPM, &fimc->state))
1585		return 0;
1586
1587	ret = fimc_lite_stop_capture(fimc, suspend);
1588	if (ret < 0 || !fimc_lite_active(fimc))
1589		return ret;
1590
1591	return fimc_pipeline_call(&fimc->ve, close);
1592}
1593#endif /* CONFIG_PM_SLEEP */
1594
1595static void fimc_lite_remove(struct platform_device *pdev)
1596{
1597	struct fimc_lite *fimc = platform_get_drvdata(pdev);
1598	struct device *dev = &pdev->dev;
1599
1600	if (!pm_runtime_enabled(dev))
1601		clk_disable_unprepare(fimc->clock);
1602
1603	pm_runtime_disable(dev);
1604	pm_runtime_set_suspended(dev);
1605	fimc_lite_unregister_capture_subdev(fimc);
1606	vb2_dma_contig_clear_max_seg_size(dev);
1607	fimc_lite_clk_put(fimc);
1608
1609	dev_info(dev, "Driver unloaded\n");
1610}
1611
1612static const struct dev_pm_ops fimc_lite_pm_ops = {
1613	SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume)
1614	SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume,
1615			   NULL)
1616};
1617
1618/* EXYNOS4212, EXYNOS4412 */
1619static struct flite_drvdata fimc_lite_drvdata_exynos4 = {
1620	.max_width		= 8192,
1621	.max_height		= 8192,
1622	.out_width_align	= 8,
1623	.win_hor_offs_align	= 2,
1624	.out_hor_offs_align	= 8,
1625	.max_dma_bufs		= 1,
1626	.num_instances		= 2,
1627};
1628
1629/* EXYNOS5250 */
1630static struct flite_drvdata fimc_lite_drvdata_exynos5 = {
1631	.max_width		= 8192,
1632	.max_height		= 8192,
1633	.out_width_align	= 8,
1634	.win_hor_offs_align	= 2,
1635	.out_hor_offs_align	= 8,
1636	.max_dma_bufs		= 32,
1637	.num_instances		= 3,
1638};
1639
1640static const struct of_device_id flite_of_match[] = {
1641	{
1642		.compatible = "samsung,exynos4212-fimc-lite",
1643		.data = &fimc_lite_drvdata_exynos4,
1644	},
1645	{
1646		.compatible = "samsung,exynos5250-fimc-lite",
1647		.data = &fimc_lite_drvdata_exynos5,
1648	},
1649	{ /* sentinel */ },
1650};
1651MODULE_DEVICE_TABLE(of, flite_of_match);
1652
1653static struct platform_driver fimc_lite_driver = {
1654	.probe		= fimc_lite_probe,
1655	.remove		= fimc_lite_remove,
1656	.driver = {
1657		.of_match_table = flite_of_match,
1658		.name		= FIMC_LITE_DRV_NAME,
1659		.pm		= &fimc_lite_pm_ops,
1660	}
1661};
1662module_platform_driver(fimc_lite_driver);
1663MODULE_DESCRIPTION("Samsung EXYNOS FIMC-LITE (camera host interface) driver");
1664MODULE_LICENSE("GPL");