core.h

  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
  4 * Copyright (C) 2017 Linaro Ltd.
  5 */
  6
  7#ifndef __VENUS_CORE_H_
  8#define __VENUS_CORE_H_
  9
 10#include <linux/bitops.h>
 11#include <linux/list.h>
 12#include <media/videobuf2-v4l2.h>
 13#include <media/v4l2-ctrls.h>
 14#include <media/v4l2-device.h>
 15
 16#include "dbgfs.h"
 17#include "hfi.h"
 18#include "hfi_platform.h"
 19#include "hfi_helper.h"
 20
 21#define VDBGL	"VenusLow : "
 22#define VDBGM	"VenusMed : "
 23#define VDBGH	"VenusHigh: "
 24#define VDBGFW	"VenusFW  : "
 25
 26#define VIDC_CLKS_NUM_MAX		4
 27#define VIDC_VCODEC_CLKS_NUM_MAX	2
 28#define VIDC_RESETS_NUM_MAX		2
 29#define VIDC_MAX_HIER_CODING_LAYER 6
 30
 31#define VENUS_MAX_FPS			240
 32
 33extern int venus_fw_debug;
 34
 35struct freq_tbl {
 36	unsigned int load;
 37	unsigned long freq;
 38};
 39
 40struct reg_val {
 41	u32 reg;
 42	u32 value;
 43};
 44
 45struct bw_tbl {
 46	u32 mbs_per_sec;
 47	u32 avg;
 48	u32 peak;
 49	u32 avg_10bit;
 50	u32 peak_10bit;
 51};
 52
 53enum vpu_version {
 54	VPU_VERSION_AR50,
 55	VPU_VERSION_AR50_LITE,
 56	VPU_VERSION_IRIS1,
 57	VPU_VERSION_IRIS2,
 58	VPU_VERSION_IRIS2_1,
 59};
 60
 61struct firmware_version {
 62	u32 major;
 63	u32 minor;
 64	u32 rev;
 65};
 66
 67struct venus_resources {
 68	u64 dma_mask;
 69	const struct freq_tbl *freq_tbl;
 70	unsigned int freq_tbl_size;
 71	const struct bw_tbl *bw_tbl_enc;
 72	unsigned int bw_tbl_enc_size;
 73	const struct bw_tbl *bw_tbl_dec;
 74	unsigned int bw_tbl_dec_size;
 75	const struct reg_val *reg_tbl;
 76	unsigned int reg_tbl_size;
 77	const struct hfi_ubwc_config *ubwc_conf;
 78	const char * const clks[VIDC_CLKS_NUM_MAX];
 79	unsigned int clks_num;
 80	const char * const vcodec0_clks[VIDC_VCODEC_CLKS_NUM_MAX];
 81	const char * const vcodec1_clks[VIDC_VCODEC_CLKS_NUM_MAX];
 82	unsigned int vcodec_clks_num;
 83	const char **vcodec_pmdomains;
 84	unsigned int vcodec_pmdomains_num;
 85	const char **opp_pmdomain;
 86	unsigned int vcodec_num;
 87	const char * const resets[VIDC_RESETS_NUM_MAX];
 88	unsigned int resets_num;
 89	enum hfi_version hfi_version;
 90	enum vpu_version vpu_version;
 91	u8 num_vpp_pipes;
 92	u32 max_load;
 93	unsigned int vmem_id;
 94	u32 vmem_size;
 95	u32 vmem_addr;
 96	u32 cp_start;
 97	u32 cp_size;
 98	u32 cp_nonpixel_start;
 99	u32 cp_nonpixel_size;
100	const char *fwname;
101	const char *enc_nodename;
102	const char *dec_nodename;
103	const struct firmware_version *min_fw;
104};
105
106enum venus_fmt {
107	VENUS_FMT_NV12			= 0,
108	VENUS_FMT_QC08C			= 1,
109	VENUS_FMT_QC10C			= 2,
110	VENUS_FMT_P010			= 3,
111	VENUS_FMT_H264			= 4,
112	VENUS_FMT_VP8			= 5,
113	VENUS_FMT_VP9			= 6,
114	VENUS_FMT_HEVC			= 7,
115	VENUS_FMT_VC1_ANNEX_G		= 8,
116	VENUS_FMT_VC1_ANNEX_L		= 9,
117	VENUS_FMT_MPEG4			= 10,
118	VENUS_FMT_MPEG2			= 11,
119	VENUS_FMT_H263			= 12,
120	VENUS_FMT_XVID			= 13,
121};
122
123struct venus_format {
124	u32 pixfmt;
125	unsigned int num_planes;
126	u32 type;
127	u32 flags;
128};
129
130/**
131 * struct venus_core - holds core parameters valid for all instances
132 *
133 * @base:	IO memory base address
134 * @vbif_base:	IO memory vbif base address
135 * @cpu_base:	IO memory cpu base address
136 * @cpu_cs_base:	IO memory cpu_cs base address
137 * @cpu_ic_base:	IO memory cpu_ic base address
138 * @wrapper_base:	IO memory wrapper base address
139 * @wrapper_tz_base:	IO memory wrapper TZ base address
140 * @aon_base:	AON base address
141 * @irq:		Venus irq
142 * @clks:	an array of struct clk pointers
143 * @vcodec0_clks: an array of vcodec0 struct clk pointers
144 * @vcodec1_clks: an array of vcodec1 struct clk pointers
145 * @video_path: an interconnect handle to video to/from memory path
146 * @cpucfg_path: an interconnect handle to cpu configuration path
147 * @pmdomains:	a pointer to a list of pmdomains
148 * @opp_pmdomain: an OPP power-domain
149 * @resets: an array of reset signals
150 * @vdev_dec:	a reference to video device structure for decoder instances
151 * @vdev_enc:	a reference to video device structure for encoder instances
152 * @v4l2_dev:	a holder for v4l2 device structure
153 * @res:		a reference to venus resources structure
154 * @dev:		convenience struct device pointer
155 * @dev_dec:	convenience struct device pointer for decoder device
156 * @dev_enc:	convenience struct device pointer for encoder device
157 * @use_tz:	a flag that suggests presence of trustzone
158 * @fw:		structure of firmware parameters
159 * @lock:	a lock for this strucure
160 * @instances:	a list_head of all instances
161 * @insts_count:	num of instances
162 * @state:	the state of the venus core
163 * @done:	a completion for sync HFI operations
164 * @error:	an error returned during last HFI sync operations
165 * @sys_error:	an error flag that signal system error event
166 * @sys_err_done: a waitqueue to wait for system error recovery end
167 * @core_ops:	the core operations
168 * @pm_ops:	a pointer to pm operations
169 * @pm_lock:	a lock for PM operations
170 * @enc_codecs:	encoders supported by this core
171 * @dec_codecs:	decoders supported by this core
172 * @max_sessions_supported:	holds the maximum number of sessions
173 * @priv:	a private filed for HFI operations
174 * @ops:		the core HFI operations
175 * @work:	a delayed work for handling system fatal error
176 * @caps:	an array of supported HFI capabilities
177 * @codecs_count: platform codecs count
178 * @core0_usage_count: usage counter for core0
179 * @core1_usage_count: usage counter for core1
180 * @root:	debugfs root directory
181 * @venus_ver:	the venus firmware version
182 * @dump_core:	a flag indicating that a core dump is required
183 * @ocs:	OF changeset pointer
184 * @hwmode_dev:	a flag indicating that HW_CTRL_TRIGGER is used in clock driver
185 */
186struct venus_core {
187	void __iomem *base;
188	void __iomem *vbif_base;
189	void __iomem *cpu_base;
190	void __iomem *cpu_cs_base;
191	void __iomem *cpu_ic_base;
192	void __iomem *wrapper_base;
193	void __iomem *wrapper_tz_base;
194	void __iomem *aon_base;
195	int irq;
196	struct clk *clks[VIDC_CLKS_NUM_MAX];
197	struct clk *vcodec0_clks[VIDC_VCODEC_CLKS_NUM_MAX];
198	struct clk *vcodec1_clks[VIDC_VCODEC_CLKS_NUM_MAX];
199	struct icc_path *video_path;
200	struct icc_path *cpucfg_path;
201	struct dev_pm_domain_list *pmdomains;
202	struct dev_pm_domain_list *opp_pmdomain;
203	struct reset_control *resets[VIDC_RESETS_NUM_MAX];
204	struct video_device *vdev_dec;
205	struct video_device *vdev_enc;
206	struct v4l2_device v4l2_dev;
207	const struct venus_resources *res;
208	struct device *dev;
209	struct device *dev_dec;
210	struct device *dev_enc;
211	unsigned int use_tz;
212	struct video_firmware {
213		struct device *dev;
214		struct iommu_domain *iommu_domain;
215		size_t mapped_mem_size;
216		phys_addr_t mem_phys;
217		size_t mem_size;
218	} fw;
219	struct mutex lock;
220	struct list_head instances;
221	atomic_t insts_count;
222	unsigned int state;
223	struct completion done;
224	unsigned int error;
225	unsigned long sys_error;
226	wait_queue_head_t sys_err_done;
227	const struct hfi_core_ops *core_ops;
228	const struct venus_pm_ops *pm_ops;
229	struct mutex pm_lock;
230	unsigned long enc_codecs;
231	unsigned long dec_codecs;
232	unsigned int max_sessions_supported;
233	void *priv;
234	const struct hfi_ops *ops;
235	struct delayed_work work;
236	struct hfi_plat_caps caps[MAX_CODEC_NUM];
237	unsigned int codecs_count;
238	unsigned int core0_usage_count;
239	unsigned int core1_usage_count;
240	struct dentry *root;
241	struct firmware_version venus_ver;
242	unsigned long dump_core;
243	struct of_changeset *ocs;
244	bool hwmode_dev;
245};
246
247struct vdec_controls {
248	u32 post_loop_deb_mode;
249	u32 profile;
250	u32 level;
251	u32 display_delay;
252	u32 display_delay_enable;
253	u64 conceal_color;
254};
255
256struct venc_controls {
257	u16 gop_size;
258	u32 num_p_frames;
259	u32 num_b_frames;
260	u32 bitrate_mode;
261	u32 bitrate;
262	u32 bitrate_peak;
263	u32 rc_enable;
264	u32 const_quality;
265	u32 frame_skip_mode;
266	u32 layer_bitrate;
267
268	u32 h264_i_period;
269	u32 h264_entropy_mode;
270	u32 h264_i_qp;
271	u32 h264_p_qp;
272	u32 h264_b_qp;
273	u32 h264_min_qp;
274	u32 h264_max_qp;
275	u32 h264_i_min_qp;
276	u32 h264_i_max_qp;
277	u32 h264_p_min_qp;
278	u32 h264_p_max_qp;
279	u32 h264_b_min_qp;
280	u32 h264_b_max_qp;
281	u32 h264_loop_filter_mode;
282	s32 h264_loop_filter_alpha;
283	s32 h264_loop_filter_beta;
284	u32 h264_8x8_transform;
285	u32 h264_hier_layers;
286	u32 h264_hier_layer_bitrate[VIDC_MAX_HIER_CODING_LAYER];
287
288	u32 hevc_i_qp;
289	u32 hevc_p_qp;
290	u32 hevc_b_qp;
291	u32 hevc_min_qp;
292	u32 hevc_max_qp;
293	u32 hevc_i_min_qp;
294	u32 hevc_i_max_qp;
295	u32 hevc_p_min_qp;
296	u32 hevc_p_max_qp;
297	u32 hevc_b_min_qp;
298	u32 hevc_b_max_qp;
299
300	u32 vp8_min_qp;
301	u32 vp8_max_qp;
302
303	u32 multi_slice_mode;
304	u32 multi_slice_max_bytes;
305	u32 multi_slice_max_mb;
306
307	u32 header_mode;
308	bool aud_enable;
309	u32 intra_refresh_type;
310	u32 intra_refresh_period;
311
312	struct {
313		u32 h264;
314		u32 mpeg4;
315		u32 hevc;
316		u32 vp8;
317		u32 vp9;
318	} profile;
319	struct {
320		u32 h264;
321		u32 mpeg4;
322		u32 hevc;
323		u32 vp9;
324	} level;
325
326	u32 base_priority_id;
327	u32 ltr_count;
328	struct v4l2_ctrl_hdr10_cll_info cll;
329	struct v4l2_ctrl_hdr10_mastering_display mastering;
330};
331
332struct venus_buffer {
333	struct vb2_v4l2_buffer vb;
334	struct list_head list;
335	dma_addr_t dma_addr;
336	u32 size;
337	struct list_head reg_list;
338	u32 flags;
339	struct list_head ref_list;
340};
341
342struct clock_data {
343	u32 core_id;
344	unsigned long freq;
345	unsigned long vpp_freq;
346	unsigned long vsp_freq;
347	unsigned long low_power_freq;
348};
349
350#define to_venus_buffer(ptr)	container_of(ptr, struct venus_buffer, vb)
351
352enum venus_dec_state {
353	VENUS_DEC_STATE_DEINIT		= 0,
354	VENUS_DEC_STATE_INIT		= 1,
355	VENUS_DEC_STATE_CAPTURE_SETUP	= 2,
356	VENUS_DEC_STATE_STOPPED		= 3,
357	VENUS_DEC_STATE_SEEK		= 4,
358	VENUS_DEC_STATE_DRAIN		= 5,
359	VENUS_DEC_STATE_DECODING	= 6,
360	VENUS_DEC_STATE_DRC		= 7,
361};
362
363enum venus_enc_state {
364	VENUS_ENC_STATE_DEINIT		= 0,
365	VENUS_ENC_STATE_INIT		= 1,
366	VENUS_ENC_STATE_ENCODING	= 2,
367	VENUS_ENC_STATE_STOPPED		= 3,
368	VENUS_ENC_STATE_DRAIN		= 4,
369};
370
371struct venus_ts_metadata {
372	bool used;
373	u64 ts_ns;
374	u64 ts_us;
375	u32 flags;
376	struct v4l2_timecode tc;
377};
378
379enum venus_inst_modes {
380	VENUS_LOW_POWER = BIT(0),
381};
382
383/**
384 * struct venus_inst - holds per instance parameters
385 *
386 * @list:	used for attach an instance to the core
387 * @lock:	instance lock
388 * @core:	a reference to the core struct
389 * @clk_data:	clock data per core ID
390 * @dpbbufs:	a list of decoded picture buffers
391 * @internalbufs:	a list of internal bufferes
392 * @registeredbufs:	a list of registered capture bufferes
393 * @delayed_process:	a list of delayed buffers
394 * @delayed_process_work:	a work_struct for process delayed buffers
395 * @nonblock:		nonblocking flag
396 * @ctrl_handler:	v4l control handler
397 * @controls:	a union of decoder and encoder control parameters
398 * @fh:	 a holder of v4l file handle structure
399 * @streamon_cap: stream on flag for capture queue
400 * @streamon_out: stream on flag for output queue
401 * @width:	current capture width
402 * @height:	current capture height
403 * @crop:	current crop rectangle
404 * @fw_min_cnt:	 firmware minimum buffer count
405 * @out_width:	current output width
406 * @out_height:	current output height
407 * @colorspace:	current color space
408 * @ycbcr_enc:	current YCbCr encoding
409 * @quantization:	current quantization
410 * @xfer_func:	current xfer function
411 * @codec_state:	current decoder API state (see DEC_STATE_)
412 * @enc_state:		current encoder API state (see ENC_STATE_)
413 * @reconf_wait:	wait queue for resolution change event
414 * @subscriptions:	used to hold current events subscriptions
415 * @buf_count:		used to count number of buffers (reqbuf(0))
416 * @tss:		timestamp metadata
417 * @payloads:		cache plane payload to use it for clock/BW scaling
418 * @fps:		holds current FPS
419 * @timeperframe:	holds current time per frame structure
420 * @fmt_out:	a reference to output format structure
421 * @fmt_cap:	a reference to capture format structure
422 * @num_input_bufs:	holds number of input buffers
423 * @num_output_bufs:	holds number of output buffers
424 * @input_buf_size:	holds input buffer size
425 * @output_buf_size:	holds output buffer size
426 * @output2_buf_size:	holds secondary decoder output buffer size
427 * @dpb_buftype:	decoded picture buffer type
428 * @dpb_fmt:		decoded picture buffer raw format
429 * @opb_buftype:	output picture buffer type
430 * @opb_fmt:		output picture buffer raw format
431 * @reconfig:	a flag raised by decoder when the stream resolution changed
432 * @hfi_codec:		current codec for this instance in HFI space
433 * @sequence_cap:	a sequence counter for capture queue
434 * @sequence_out:	a sequence counter for output queue
435 * @m2m_dev:	a reference to m2m device structure
436 * @m2m_ctx:	a reference to m2m context structure
437 * @ctx_q_lock:	a lock to serialize video device ioctl calls
438 * @state:	current state of the instance
439 * @done:	a completion for sync HFI operation
440 * @error:	an error returned during last HFI sync operation
441 * @session_error:	a flag rised by HFI interface in case of session error
442 * @ops:		HFI operations
443 * @session_type:	the type of the session (decoder or encoder)
444 * @hprop:	a union used as a holder by get property
445 * @core_acquired:	the Core has been acquired
446 * @bit_depth:		current bitstream bit-depth
447 * @pic_struct:		bitstream progressive vs interlaced
448 * @next_buf_last: a flag to mark next queued capture buffer as last
449 * @drain_active:	Drain sequence is in progress
450 * @flags:	bitmask flags describing current instance mode
451 * @dpb_ids:	DPB buffer ID's
452 */
453struct venus_inst {
454	struct list_head list;
455	struct mutex lock;
456	struct venus_core *core;
457	struct clock_data clk_data;
458	struct list_head dpbbufs;
459	struct list_head internalbufs;
460	struct list_head registeredbufs;
461	struct list_head delayed_process;
462	struct work_struct delayed_process_work;
463	bool nonblock;
464
465	struct v4l2_ctrl_handler ctrl_handler;
466	union {
467		struct vdec_controls dec;
468		struct venc_controls enc;
469	} controls;
470	struct v4l2_fh fh;
471	unsigned int streamon_cap, streamon_out;
472	u32 width;
473	u32 height;
474	struct v4l2_rect crop;
475	u32 fw_min_cnt;
476	u32 out_width;
477	u32 out_height;
478	u32 colorspace;
479	u8 ycbcr_enc;
480	u8 quantization;
481	u8 xfer_func;
482	enum venus_dec_state codec_state;
483	enum venus_enc_state enc_state;
484	wait_queue_head_t reconf_wait;
485	unsigned int subscriptions;
486	int buf_count;
487	struct venus_ts_metadata tss[VIDEO_MAX_FRAME];
488	unsigned long payloads[VIDEO_MAX_FRAME];
489	u64 fps;
490	struct v4l2_fract timeperframe;
491	const struct venus_format *fmt_out;
492	const struct venus_format *fmt_cap;
493	unsigned int num_input_bufs;
494	unsigned int num_output_bufs;
495	unsigned int input_buf_size;
496	unsigned int output_buf_size;
497	unsigned int output2_buf_size;
498	u32 dpb_buftype;
499	u32 dpb_fmt;
500	u32 opb_buftype;
501	u32 opb_fmt;
502	bool reconfig;
503	u32 hfi_codec;
504	u32 sequence_cap;
505	u32 sequence_out;
506	struct v4l2_m2m_dev *m2m_dev;
507	struct v4l2_m2m_ctx *m2m_ctx;
508	struct mutex ctx_q_lock;
509	unsigned int state;
510	struct completion done;
511	unsigned int error;
512	bool session_error;
513	const struct hfi_inst_ops *ops;
514	u32 session_type;
515	union hfi_get_property hprop;
516	unsigned int core_acquired: 1;
517	unsigned int bit_depth;
518	unsigned int pic_struct;
519	bool next_buf_last;
520	bool drain_active;
521	enum venus_inst_modes flags;
522	struct ida dpb_ids;
523};
524
525#define IS_V1(core)	((core)->res->hfi_version == HFI_VERSION_1XX)
526#define IS_V3(core)	((core)->res->hfi_version == HFI_VERSION_3XX)
527#define IS_V4(core)	((core)->res->hfi_version == HFI_VERSION_4XX)
528#define IS_V6(core)	((core)->res->hfi_version == HFI_VERSION_6XX)
529
530#define IS_AR50(core)		((core)->res->vpu_version == VPU_VERSION_AR50)
531#define IS_AR50_LITE(core)	((core)->res->vpu_version == VPU_VERSION_AR50_LITE)
532#define IS_IRIS1(core)		((core)->res->vpu_version == VPU_VERSION_IRIS1)
533#define IS_IRIS2(core)		((core)->res->vpu_version == VPU_VERSION_IRIS2)
534#define IS_IRIS2_1(core)	((core)->res->vpu_version == VPU_VERSION_IRIS2_1)
535
536static inline bool is_lite(struct venus_core *core)
537{
538	return IS_AR50_LITE(core);
539}
540
541#define ctrl_to_inst(ctrl)	\
542	container_of((ctrl)->handler, struct venus_inst, ctrl_handler)
543
544static inline struct venus_inst *to_inst(struct file *filp)
545{
546	return container_of(file_to_v4l2_fh(filp), struct venus_inst, fh);
547}
548
549static inline void *to_hfi_priv(struct venus_core *core)
550{
551	return core->priv;
552}
553
554static inline struct hfi_plat_caps *
555venus_caps_by_codec(struct venus_core *core, u32 codec, u32 domain)
556{
557	unsigned int c;
558
559	for (c = 0; c < core->codecs_count; c++) {
560		if (core->caps[c].codec == codec &&
561		    core->caps[c].domain == domain)
562			return &core->caps[c];
563	}
564
565	return NULL;
566}
567
568static inline bool
569is_fw_rev_or_newer(struct venus_core *core, u32 vmajor, u32 vminor, u32 vrev)
570{
571	return ((core)->venus_ver.major == vmajor &&
572		(core)->venus_ver.minor == vminor &&
573		(core)->venus_ver.rev >= vrev);
574}
575
576static inline bool
577is_fw_rev_or_older(struct venus_core *core, u32 vmajor, u32 vminor, u32 vrev)
578{
579	return ((core)->venus_ver.major == vmajor &&
580		(core)->venus_ver.minor == vminor &&
581		(core)->venus_ver.rev <= vrev);
582}
583
584void venus_close_common(struct venus_inst *inst, struct file *filp);
585#endif