iris_hfi_common.h

  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  4 */
  5
  6#ifndef __IRIS_HFI_COMMON_H__
  7#define __IRIS_HFI_COMMON_H__
  8
  9#include <linux/types.h>
 10#include <media/v4l2-device.h>
 11
 12#include "iris_buffer.h"
 13
 14struct iris_inst;
 15struct iris_core;
 16
 17enum hfi_packet_port_type {
 18	HFI_PORT_NONE		= 0x00000000,
 19	HFI_PORT_BITSTREAM	= 0x00000001,
 20	HFI_PORT_RAW		= 0x00000002,
 21};
 22
 23enum hfi_packet_payload_info {
 24	HFI_PAYLOAD_NONE	= 0x00000000,
 25	HFI_PAYLOAD_U32		= 0x00000001,
 26	HFI_PAYLOAD_S32		= 0x00000002,
 27	HFI_PAYLOAD_U64		= 0x00000003,
 28	HFI_PAYLOAD_S64		= 0x00000004,
 29	HFI_PAYLOAD_STRUCTURE	= 0x00000005,
 30	HFI_PAYLOAD_BLOB	= 0x00000006,
 31	HFI_PAYLOAD_STRING	= 0x00000007,
 32	HFI_PAYLOAD_Q16		= 0x00000008,
 33	HFI_PAYLOAD_U32_ENUM	= 0x00000009,
 34	HFI_PAYLOAD_32_PACKED	= 0x0000000a,
 35	HFI_PAYLOAD_U32_ARRAY	= 0x0000000b,
 36	HFI_PAYLOAD_S32_ARRAY	= 0x0000000c,
 37	HFI_PAYLOAD_64_PACKED	= 0x0000000d,
 38};
 39
 40enum hfi_packet_host_flags {
 41	HFI_HOST_FLAGS_NONE			= 0x00000000,
 42	HFI_HOST_FLAGS_INTR_REQUIRED		= 0x00000001,
 43	HFI_HOST_FLAGS_RESPONSE_REQUIRED	= 0x00000002,
 44	HFI_HOST_FLAGS_NON_DISCARDABLE		= 0x00000004,
 45	HFI_HOST_FLAGS_GET_PROPERTY		= 0x00000008,
 46};
 47
 48enum hfi_color_primaries {
 49	HFI_PRIMARIES_RESERVED		= 0,
 50	HFI_PRIMARIES_BT709		= 1,
 51	HFI_PRIMARIES_UNSPECIFIED	= 2,
 52	HFI_PRIMARIES_BT470_SYSTEM_M	= 4,
 53	HFI_PRIMARIES_BT470_SYSTEM_BG	= 5,
 54	HFI_PRIMARIES_BT601_525		= 6,
 55	HFI_PRIMARIES_SMPTE_ST240M	= 7,
 56	HFI_PRIMARIES_GENERIC_FILM	= 8,
 57	HFI_PRIMARIES_BT2020		= 9,
 58	HFI_PRIMARIES_SMPTE_ST428_1	= 10,
 59	HFI_PRIMARIES_SMPTE_RP431_2	= 11,
 60	HFI_PRIMARIES_SMPTE_EG431_1	= 12,
 61	HFI_PRIMARIES_SMPTE_EBU_TECH	= 22,
 62};
 63
 64enum hfi_transfer_characteristics {
 65	HFI_TRANSFER_RESERVED		= 0,
 66	HFI_TRANSFER_BT709		= 1,
 67	HFI_TRANSFER_UNSPECIFIED	= 2,
 68	HFI_TRANSFER_BT470_SYSTEM_M	= 4,
 69	HFI_TRANSFER_BT470_SYSTEM_BG	= 5,
 70	HFI_TRANSFER_BT601_525_OR_625	= 6,
 71	HFI_TRANSFER_SMPTE_ST240M	= 7,
 72	HFI_TRANSFER_LINEAR		= 8,
 73	HFI_TRANSFER_LOG_100_1		= 9,
 74	HFI_TRANSFER_LOG_SQRT		= 10,
 75	HFI_TRANSFER_XVYCC		= 11,
 76	HFI_TRANSFER_BT1361_0		= 12,
 77	HFI_TRANSFER_SRGB_SYCC		= 13,
 78	HFI_TRANSFER_BT2020_14		= 14,
 79	HFI_TRANSFER_BT2020_15		= 15,
 80	HFI_TRANSFER_SMPTE_ST2084_PQ	= 16,
 81	HFI_TRANSFER_SMPTE_ST428_1	= 17,
 82	HFI_TRANSFER_BT2100_2_HLG	= 18,
 83};
 84
 85enum hfi_matrix_coefficients {
 86	HFI_MATRIX_COEFF_SRGB_SMPTE_ST428_1		= 0,
 87	HFI_MATRIX_COEFF_BT709				= 1,
 88	HFI_MATRIX_COEFF_UNSPECIFIED			= 2,
 89	HFI_MATRIX_COEFF_RESERVED			= 3,
 90	HFI_MATRIX_COEFF_FCC_TITLE_47			= 4,
 91	HFI_MATRIX_COEFF_BT470_SYS_BG_OR_BT601_625	= 5,
 92	HFI_MATRIX_COEFF_BT601_525_BT1358_525_OR_625	= 6,
 93	HFI_MATRIX_COEFF_SMPTE_ST240			= 7,
 94	HFI_MATRIX_COEFF_YCGCO				= 8,
 95	HFI_MATRIX_COEFF_BT2020_NON_CONSTANT		= 9,
 96	HFI_MATRIX_COEFF_BT2020_CONSTANT		= 10,
 97	HFI_MATRIX_COEFF_SMPTE_ST2085			= 11,
 98	HFI_MATRIX_COEFF_SMPTE_CHROM_DERV_NON_CONSTANT	= 12,
 99	HFI_MATRIX_COEFF_SMPTE_CHROM_DERV_CONSTANT	= 13,
100	HFI_MATRIX_COEFF_BT2100				= 14,
101};
102
103struct iris_hfi_prop_type_handle {
104	u32 type;
105	int (*handle)(struct iris_inst *inst, u32 plane);
106};
107
108struct iris_hfi_command_ops {
109	int (*sys_init)(struct iris_core *core);
110	int (*sys_image_version)(struct iris_core *core);
111	int (*sys_interframe_powercollapse)(struct iris_core *core);
112	int (*sys_pc_prep)(struct iris_core *core);
113	int (*session_set_config_params)(struct iris_inst *inst, u32 plane);
114	int (*session_set_property)(struct iris_inst *inst,
115				    u32 packet_type, u32 flag, u32 plane, u32 payload_type,
116				    void *payload, u32 payload_size);
117	int (*session_open)(struct iris_inst *inst);
118	int (*session_start)(struct iris_inst *inst, u32 plane);
119	int (*session_queue_buf)(struct iris_inst *inst, struct iris_buffer *buffer);
120	int (*session_release_buf)(struct iris_inst *inst, struct iris_buffer *buffer);
121	int (*session_pause)(struct iris_inst *inst, u32 plane);
122	int (*session_resume_drc)(struct iris_inst *inst, u32 plane);
123	int (*session_stop)(struct iris_inst *inst, u32 plane);
124	int (*session_drain)(struct iris_inst *inst, u32 plane);
125	int (*session_resume_drain)(struct iris_inst *inst, u32 plane);
126	int (*session_close)(struct iris_inst *inst);
127};
128
129struct iris_hfi_response_ops {
130	void (*hfi_response_handler)(struct iris_core *core);
131};
132
133struct hfi_subscription_params {
134	u32	bitstream_resolution;
135	u32	crop_offsets[2];
136	u32	bit_depth;
137	u32	coded_frames;
138	u32	fw_min_count;
139	u32	pic_order_cnt;
140	u32	color_info;
141	u32	profile;
142	u32	level;
143	u32	tier;
144};
145
146u32 iris_hfi_get_v4l2_color_primaries(u32 hfi_primaries);
147u32 iris_hfi_get_v4l2_transfer_char(u32 hfi_characterstics);
148u32 iris_hfi_get_v4l2_matrix_coefficients(u32 hfi_coefficients);
149int iris_hfi_core_init(struct iris_core *core);
150int iris_hfi_pm_suspend(struct iris_core *core);
151int iris_hfi_pm_resume(struct iris_core *core);
152
153irqreturn_t iris_hfi_isr(int irq, void *data);
154irqreturn_t iris_hfi_isr_handler(int irq, void *data);
155
156#endif