camss.h

  1/* SPDX-License-Identifier: GPL-2.0 */
  2/*
  3 * camss.h
  4 *
  5 * Qualcomm MSM Camera Subsystem - Core
  6 *
  7 * Copyright (c) 2015, The Linux Foundation. All rights reserved.
  8 * Copyright (C) 2015-2018 Linaro Ltd.
  9 */
 10#ifndef QC_MSM_CAMSS_H
 11#define QC_MSM_CAMSS_H
 12
 13#include <linux/device.h>
 14#include <linux/types.h>
 15#include <media/v4l2-async.h>
 16#include <media/v4l2-device.h>
 17#include <media/v4l2-subdev.h>
 18#include <media/media-device.h>
 19#include <media/media-entity.h>
 20
 21#include "camss-csid.h"
 22#include "camss-csiphy.h"
 23#include "camss-ispif.h"
 24#include "camss-vfe.h"
 25#include "camss-format.h"
 26
 27#define to_camss(ptr_module)	\
 28	container_of(ptr_module, struct camss, ptr_module)
 29
 30#define to_device(ptr_module)	\
 31	(to_camss(ptr_module)->dev)
 32
 33#define module_pointer(ptr_module, index)	\
 34	((const struct ptr_module##_device (*)[]) &(ptr_module[-(index)]))
 35
 36#define to_camss_index(ptr_module, index)	\
 37	container_of(module_pointer(ptr_module, index),	\
 38		     struct camss, ptr_module)
 39
 40#define to_device_index(ptr_module, index)	\
 41	(to_camss_index(ptr_module, index)->dev)
 42
 43#define CAMSS_RES_MAX 17
 44#define CAMSS_INIT_BUF_COUNT 2
 45
 46struct camss_subdev_resources {
 47	char *regulators[CAMSS_RES_MAX];
 48	char *clock[CAMSS_RES_MAX];
 49	char *clock_for_reset[CAMSS_RES_MAX];
 50	u32 clock_rate[CAMSS_RES_MAX][CAMSS_RES_MAX];
 51	char *reg[CAMSS_RES_MAX];
 52	char *interrupt[CAMSS_RES_MAX];
 53	union {
 54		struct csiphy_subdev_resources csiphy;
 55		struct csid_subdev_resources csid;
 56		struct vfe_subdev_resources vfe;
 57	};
 58};
 59
 60struct icc_bw_tbl {
 61	u32 avg;
 62	u32 peak;
 63};
 64
 65struct resources_icc {
 66	char *name;
 67	struct icc_bw_tbl icc_bw_tbl;
 68};
 69
 70struct resources_wrapper {
 71	char *reg;
 72};
 73
 74enum pm_domain {
 75	PM_DOMAIN_VFE0 = 0,
 76	PM_DOMAIN_VFE1 = 1,
 77	PM_DOMAIN_VFELITE = 2,		/* VFELITE / TOP GDSC */
 78};
 79
 80enum camss_version {
 81	CAMSS_660,
 82	CAMSS_2290,
 83	CAMSS_7280,
 84	CAMSS_8x16,
 85	CAMSS_8x39,
 86	CAMSS_8x53,
 87	CAMSS_8x96,
 88	CAMSS_8250,
 89	CAMSS_8280XP,
 90	CAMSS_8300,
 91	CAMSS_845,
 92	CAMSS_8550,
 93	CAMSS_8650,
 94	CAMSS_8775P,
 95	CAMSS_X1E80100,
 96};
 97
 98enum icc_count {
 99	ICC_DEFAULT_COUNT = 0,
100	ICC_SM8250_COUNT = 4,
101};
102
103struct camss_resources {
104	enum camss_version version;
105	const char *pd_name;
106	const struct camss_subdev_resources *csiphy_res;
107	const struct camss_subdev_resources *csid_res;
108	const struct camss_subdev_resources *ispif_res;
109	const struct camss_subdev_resources *vfe_res;
110	const struct resources_wrapper *csid_wrapper_res;
111	const struct resources_icc *icc_res;
112	const unsigned int icc_path_num;
113	const unsigned int csiphy_num;
114	const unsigned int csid_num;
115	const unsigned int vfe_num;
116};
117
118struct camss {
119	struct v4l2_device v4l2_dev;
120	struct v4l2_async_notifier notifier;
121	struct media_device media_dev;
122	struct device *dev;
123	struct csiphy_device *csiphy;
124	struct csid_device *csid;
125	struct ispif_device *ispif;
126	struct vfe_device *vfe;
127	void __iomem *csid_wrapper_base;
128	atomic_t ref_count;
129	int genpd_num;
130	struct device *genpd;
131	struct device_link *genpd_link;
132	struct icc_path *icc_path[ICC_SM8250_COUNT];
133	const struct camss_resources *res;
134};
135
136struct camss_camera_interface {
137	u8 csiphy_id;
138	struct csiphy_csi2_cfg csi2;
139};
140
141struct camss_async_subdev {
142	struct v4l2_async_connection asd; /* must be first */
143	struct camss_camera_interface interface;
144};
145
146struct camss_clock {
147	struct clk *clk;
148	const char *name;
149	u32 *freq;
150	u32 nfreqs;
151};
152
153struct parent_dev_ops {
154	int (*get)(struct camss *camss, int id);
155	int (*put)(struct camss *camss, int id);
156	void __iomem *(*get_base_address)(struct camss *camss, int id);
157};
158
159void camss_add_clock_margin(u64 *rate);
160int camss_enable_clocks(int nclocks, struct camss_clock *clock,
161			struct device *dev);
162void camss_disable_clocks(int nclocks, struct camss_clock *clock);
163struct media_pad *camss_find_sensor_pad(struct media_entity *entity);
164s64 camss_get_link_freq(struct media_entity *entity, unsigned int bpp,
165			unsigned int lanes);
166int camss_get_pixel_clock(struct media_entity *entity, u64 *pixel_clock);
167int camss_pm_domain_on(struct camss *camss, int id);
168void camss_pm_domain_off(struct camss *camss, int id);
169int camss_vfe_get(struct camss *camss, int id);
170void camss_vfe_put(struct camss *camss, int id);
171void camss_delete(struct camss *camss);
172void camss_buf_done(struct camss *camss, int hw_id, int port_id);
173void camss_reg_update(struct camss *camss, int hw_id,
174		      int port_id, bool is_clear);
175
176#endif /* QC_MSM_CAMSS_H */