camss-csiphy.h

  1/* SPDX-License-Identifier: GPL-2.0 */
  2/*
  3 * camss-csiphy.h
  4 *
  5 * Qualcomm MSM Camera Subsystem - CSIPHY Module
  6 *
  7 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
  8 * Copyright (C) 2016-2018 Linaro Ltd.
  9 */
 10#ifndef QC_MSM_CAMSS_CSIPHY_H
 11#define QC_MSM_CAMSS_CSIPHY_H
 12
 13#include <linux/clk.h>
 14#include <linux/interrupt.h>
 15#include <media/media-entity.h>
 16#include <media/v4l2-device.h>
 17#include <media/v4l2-mediabus.h>
 18#include <media/v4l2-subdev.h>
 19
 20#define MSM_CSIPHY_PAD_SINK 0
 21#define MSM_CSIPHY_PAD_SRC 1
 22#define MSM_CSIPHY_PADS_NUM 2
 23
 24struct csiphy_lane {
 25	u8 pos;
 26	u8 pol;
 27};
 28
 29/**
 30 * struct csiphy_lanes_cfg - CSIPHY lanes configuration
 31 * @num_data: number of data lanes
 32 * @data:     data lanes configuration
 33 * @clk:      clock lane configuration (only for D-PHY)
 34 */
 35struct csiphy_lanes_cfg {
 36	int num_data;
 37	struct csiphy_lane *data;
 38	struct csiphy_lane clk;
 39};
 40
 41struct csiphy_csi2_cfg {
 42	struct csiphy_lanes_cfg lane_cfg;
 43};
 44
 45struct csiphy_config {
 46	u8 combo_mode;
 47	u8 csid_id;
 48	struct csiphy_csi2_cfg *csi2;
 49};
 50
 51struct csiphy_format_info {
 52	u32 code;
 53	u8 bpp;
 54};
 55
 56struct csiphy_formats {
 57	unsigned int nformats;
 58	const struct csiphy_format_info *formats;
 59};
 60
 61struct csiphy_device;
 62
 63struct csiphy_hw_ops {
 64	/*
 65	 * csiphy_get_lane_mask - Calculate CSI2 lane mask configuration parameter
 66	 * @lane_cfg - CSI2 lane configuration
 67	 *
 68	 * Return lane mask
 69	 */
 70	u8 (*get_lane_mask)(struct csiphy_lanes_cfg *lane_cfg);
 71	void (*hw_version_read)(struct csiphy_device *csiphy,
 72				struct device *dev);
 73	void (*reset)(struct csiphy_device *csiphy);
 74	void (*lanes_enable)(struct csiphy_device *csiphy,
 75			     struct csiphy_config *cfg,
 76			     s64 link_freq, u8 lane_mask);
 77	void (*lanes_disable)(struct csiphy_device *csiphy,
 78			      struct csiphy_config *cfg);
 79	irqreturn_t (*isr)(int irq, void *dev);
 80	int (*init)(struct csiphy_device *csiphy);
 81};
 82
 83struct csiphy_subdev_resources {
 84	u8 id;
 85	const struct csiphy_hw_ops *hw_ops;
 86	const struct csiphy_formats *formats;
 87};
 88
 89struct csiphy_device_regs {
 90	const struct csiphy_lane_regs *lane_regs;
 91	int lane_array_size;
 92	u32 offset;
 93};
 94
 95struct csiphy_device {
 96	struct camss *camss;
 97	u8 id;
 98	struct v4l2_subdev subdev;
 99	struct media_pad pads[MSM_CSIPHY_PADS_NUM];
100	void __iomem *base;
101	void __iomem *base_clk_mux;
102	u32 irq;
103	char irq_name[30];
104	struct camss_clock *clock;
105	bool *rate_set;
106	int nclocks;
107	u32 timer_clk_rate;
108	struct regulator_bulk_data *supplies;
109	int num_supplies;
110	struct csiphy_config cfg;
111	struct v4l2_mbus_framefmt fmt[MSM_CSIPHY_PADS_NUM];
112	const struct csiphy_subdev_resources *res;
113	struct csiphy_device_regs *regs;
114};
115
116struct camss_subdev_resources;
117
118int msm_csiphy_subdev_init(struct camss *camss,
119			   struct csiphy_device *csiphy,
120			   const struct camss_subdev_resources *res, u8 id);
121
122int msm_csiphy_register_entity(struct csiphy_device *csiphy,
123			       struct v4l2_device *v4l2_dev);
124
125void msm_csiphy_unregister_entity(struct csiphy_device *csiphy);
126
127extern const struct csiphy_formats csiphy_formats_8x16;
128extern const struct csiphy_formats csiphy_formats_8x96;
129extern const struct csiphy_formats csiphy_formats_sdm845;
130
131extern const struct csiphy_hw_ops csiphy_ops_2ph_1_0;
132extern const struct csiphy_hw_ops csiphy_ops_3ph_1_0;
133
134#endif /* QC_MSM_CAMSS_CSIPHY_H */