mx2_emmaprp.c

  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * Support eMMa-PrP through mem2mem framework.
  4 *
  5 * eMMa-PrP is a piece of HW that allows fetching buffers
  6 * from one memory location and do several operations on
  7 * them such as scaling or format conversion giving, as a result
  8 * a new processed buffer in another memory location.
  9 *
 10 * Based on mem2mem_testdev.c by Pawel Osciak.
 11 *
 12 * Copyright (c) 2011 Vista Silicon S.L.
 13 * Javier Martin <javier.martin@vista-silicon.com>
 14 */
 15#include <linux/module.h>
 16#include <linux/clk.h>
 17#include <linux/slab.h>
 18#include <linux/interrupt.h>
 19#include <linux/io.h>
 20
 21#include <linux/platform_device.h>
 22#include <media/v4l2-mem2mem.h>
 23#include <media/v4l2-device.h>
 24#include <media/v4l2-ioctl.h>
 25#include <media/videobuf2-dma-contig.h>
 26#include <linux/sizes.h>
 27
 28#define EMMAPRP_MODULE_NAME "mem2mem-emmaprp"
 29
 30MODULE_DESCRIPTION("Mem-to-mem device which supports eMMa-PrP present in mx2 SoCs");
 31MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com");
 32MODULE_LICENSE("GPL");
 33MODULE_VERSION("0.0.1");
 34
 35static bool debug;
 36module_param(debug, bool, 0644);
 37
 38#define MIN_W 32
 39#define MIN_H 32
 40#define MAX_W 2040
 41#define MAX_H 2046
 42
 43#define S_ALIGN		1 /* multiple of 2 */
 44#define W_ALIGN_YUV420	3 /* multiple of 8 */
 45#define W_ALIGN_OTHERS	2 /* multiple of 4 */
 46#define H_ALIGN		1 /* multiple of 2 */
 47
 48/* Flags that indicate a format can be used for capture/output */
 49#define MEM2MEM_CAPTURE	(1 << 0)
 50#define MEM2MEM_OUTPUT	(1 << 1)
 51
 52#define MEM2MEM_NAME		"m2m-emmaprp"
 53
 54/* In bytes, per queue */
 55#define MEM2MEM_VID_MEM_LIMIT	SZ_16M
 56
 57#define dprintk(dev, fmt, arg...) \
 58	v4l2_dbg(1, debug, &dev->v4l2_dev, "%s: " fmt, __func__, ## arg)
 59
 60/* EMMA PrP */
 61#define PRP_CNTL                        0x00
 62#define PRP_INTR_CNTL                   0x04
 63#define PRP_INTRSTATUS                  0x08
 64#define PRP_SOURCE_Y_PTR                0x0c
 65#define PRP_SOURCE_CB_PTR               0x10
 66#define PRP_SOURCE_CR_PTR               0x14
 67#define PRP_DEST_RGB1_PTR               0x18
 68#define PRP_DEST_RGB2_PTR               0x1c
 69#define PRP_DEST_Y_PTR                  0x20
 70#define PRP_DEST_CB_PTR                 0x24
 71#define PRP_DEST_CR_PTR                 0x28
 72#define PRP_SRC_FRAME_SIZE              0x2c
 73#define PRP_DEST_CH1_LINE_STRIDE        0x30
 74#define PRP_SRC_PIXEL_FORMAT_CNTL       0x34
 75#define PRP_CH1_PIXEL_FORMAT_CNTL       0x38
 76#define PRP_CH1_OUT_IMAGE_SIZE          0x3c
 77#define PRP_CH2_OUT_IMAGE_SIZE          0x40
 78#define PRP_SRC_LINE_STRIDE             0x44
 79#define PRP_CSC_COEF_012                0x48
 80#define PRP_CSC_COEF_345                0x4c
 81#define PRP_CSC_COEF_678                0x50
 82#define PRP_CH1_RZ_HORI_COEF1           0x54
 83#define PRP_CH1_RZ_HORI_COEF2           0x58
 84#define PRP_CH1_RZ_HORI_VALID           0x5c
 85#define PRP_CH1_RZ_VERT_COEF1           0x60
 86#define PRP_CH1_RZ_VERT_COEF2           0x64
 87#define PRP_CH1_RZ_VERT_VALID           0x68
 88#define PRP_CH2_RZ_HORI_COEF1           0x6c
 89#define PRP_CH2_RZ_HORI_COEF2           0x70
 90#define PRP_CH2_RZ_HORI_VALID           0x74
 91#define PRP_CH2_RZ_VERT_COEF1           0x78
 92#define PRP_CH2_RZ_VERT_COEF2           0x7c
 93#define PRP_CH2_RZ_VERT_VALID           0x80
 94
 95#define PRP_CNTL_CH1EN          (1 << 0)
 96#define PRP_CNTL_CH2EN          (1 << 1)
 97#define PRP_CNTL_CSIEN          (1 << 2)
 98#define PRP_CNTL_DATA_IN_YUV420 (0 << 3)
 99#define PRP_CNTL_DATA_IN_YUV422 (1 << 3)
100#define PRP_CNTL_DATA_IN_RGB16  (2 << 3)
101#define PRP_CNTL_DATA_IN_RGB32  (3 << 3)
102#define PRP_CNTL_CH1_OUT_RGB8   (0 << 5)
103#define PRP_CNTL_CH1_OUT_RGB16  (1 << 5)
104#define PRP_CNTL_CH1_OUT_RGB32  (2 << 5)
105#define PRP_CNTL_CH1_OUT_YUV422 (3 << 5)
106#define PRP_CNTL_CH2_OUT_YUV420 (0 << 7)
107#define PRP_CNTL_CH2_OUT_YUV422 (1 << 7)
108#define PRP_CNTL_CH2_OUT_YUV444 (2 << 7)
109#define PRP_CNTL_CH1_LEN        (1 << 9)
110#define PRP_CNTL_CH2_LEN        (1 << 10)
111#define PRP_CNTL_SKIP_FRAME     (1 << 11)
112#define PRP_CNTL_SWRST          (1 << 12)
113#define PRP_CNTL_CLKEN          (1 << 13)
114#define PRP_CNTL_WEN            (1 << 14)
115#define PRP_CNTL_CH1BYP         (1 << 15)
116#define PRP_CNTL_IN_TSKIP(x)    ((x) << 16)
117#define PRP_CNTL_CH1_TSKIP(x)   ((x) << 19)
118#define PRP_CNTL_CH2_TSKIP(x)   ((x) << 22)
119#define PRP_CNTL_INPUT_FIFO_LEVEL(x)    ((x) << 25)
120#define PRP_CNTL_RZ_FIFO_LEVEL(x)       ((x) << 27)
121#define PRP_CNTL_CH2B1EN        (1 << 29)
122#define PRP_CNTL_CH2B2EN        (1 << 30)
123#define PRP_CNTL_CH2FEN         (1UL << 31)
124
125#define PRP_SIZE_HEIGHT(x)	(x)
126#define PRP_SIZE_WIDTH(x)	((x) << 16)
127
128/* IRQ Enable and status register */
129#define PRP_INTR_RDERR          (1 << 0)
130#define PRP_INTR_CH1WERR        (1 << 1)
131#define PRP_INTR_CH2WERR        (1 << 2)
132#define PRP_INTR_CH1FC          (1 << 3)
133#define PRP_INTR_CH2FC          (1 << 5)
134#define PRP_INTR_LBOVF          (1 << 7)
135#define PRP_INTR_CH2OVF         (1 << 8)
136
137#define PRP_INTR_ST_RDERR	(1 << 0)
138#define PRP_INTR_ST_CH1WERR	(1 << 1)
139#define PRP_INTR_ST_CH2WERR	(1 << 2)
140#define PRP_INTR_ST_CH2B2CI	(1 << 3)
141#define PRP_INTR_ST_CH2B1CI	(1 << 4)
142#define PRP_INTR_ST_CH1B2CI	(1 << 5)
143#define PRP_INTR_ST_CH1B1CI	(1 << 6)
144#define PRP_INTR_ST_LBOVF	(1 << 7)
145#define PRP_INTR_ST_CH2OVF	(1 << 8)
146
147struct emmaprp_fmt {
148	u32	fourcc;
149	/* Types the format can be used for */
150	u32	types;
151};
152
153static struct emmaprp_fmt formats[] = {
154	{
155		.fourcc	= V4L2_PIX_FMT_YUV420,
156		.types	= MEM2MEM_CAPTURE,
157	},
158	{
159		.fourcc	= V4L2_PIX_FMT_YUYV,
160		.types	= MEM2MEM_OUTPUT,
161	},
162};
163
164/* Per-queue, driver-specific private data */
165struct emmaprp_q_data {
166	unsigned int		width;
167	unsigned int		height;
168	unsigned int		sizeimage;
169	struct emmaprp_fmt	*fmt;
170};
171
172enum {
173	V4L2_M2M_SRC = 0,
174	V4L2_M2M_DST = 1,
175};
176
177#define NUM_FORMATS ARRAY_SIZE(formats)
178
179static struct emmaprp_fmt *find_format(struct v4l2_format *f)
180{
181	struct emmaprp_fmt *fmt;
182	unsigned int k;
183
184	for (k = 0; k < NUM_FORMATS; k++) {
185		fmt = &formats[k];
186		if (fmt->fourcc == f->fmt.pix.pixelformat)
187			break;
188	}
189
190	if (k == NUM_FORMATS)
191		return NULL;
192
193	return &formats[k];
194}
195
196struct emmaprp_dev {
197	struct v4l2_device	v4l2_dev;
198	struct video_device	*vfd;
199
200	struct mutex		dev_mutex;
201	spinlock_t		irqlock;
202
203	void __iomem		*base_emma;
204	struct clk		*clk_emma_ahb, *clk_emma_ipg;
205
206	struct v4l2_m2m_dev	*m2m_dev;
207};
208
209struct emmaprp_ctx {
210	struct v4l2_fh		fh;
211	struct emmaprp_dev	*dev;
212	/* Abort requested by m2m */
213	int			aborting;
214	struct emmaprp_q_data	q_data[2];
215};
216
217static inline struct emmaprp_ctx *file_to_emmaprp_ctx(struct file *filp)
218{
219	return container_of(file_to_v4l2_fh(filp), struct emmaprp_ctx, fh);
220}
221
222static struct emmaprp_q_data *get_q_data(struct emmaprp_ctx *ctx,
223					 enum v4l2_buf_type type)
224{
225	switch (type) {
226	case V4L2_BUF_TYPE_VIDEO_OUTPUT:
227		return &(ctx->q_data[V4L2_M2M_SRC]);
228	case V4L2_BUF_TYPE_VIDEO_CAPTURE:
229		return &(ctx->q_data[V4L2_M2M_DST]);
230	default:
231		BUG();
232	}
233	return NULL;
234}
235
236/*
237 * mem2mem callbacks
238 */
239static void emmaprp_job_abort(void *priv)
240{
241	struct emmaprp_ctx *ctx = priv;
242	struct emmaprp_dev *pcdev = ctx->dev;
243
244	ctx->aborting = 1;
245
246	dprintk(pcdev, "Aborting task\n");
247
248	v4l2_m2m_job_finish(pcdev->m2m_dev, ctx->fh.m2m_ctx);
249}
250
251static inline void emmaprp_dump_regs(struct emmaprp_dev *pcdev)
252{
253	dprintk(pcdev,
254		"eMMa-PrP Registers:\n"
255		"  SOURCE_Y_PTR = 0x%08X\n"
256		"  SRC_FRAME_SIZE = 0x%08X\n"
257		"  DEST_Y_PTR = 0x%08X\n"
258		"  DEST_CR_PTR = 0x%08X\n"
259		"  DEST_CB_PTR = 0x%08X\n"
260		"  CH2_OUT_IMAGE_SIZE = 0x%08X\n"
261		"  CNTL = 0x%08X\n",
262		readl(pcdev->base_emma + PRP_SOURCE_Y_PTR),
263		readl(pcdev->base_emma + PRP_SRC_FRAME_SIZE),
264		readl(pcdev->base_emma + PRP_DEST_Y_PTR),
265		readl(pcdev->base_emma + PRP_DEST_CR_PTR),
266		readl(pcdev->base_emma + PRP_DEST_CB_PTR),
267		readl(pcdev->base_emma + PRP_CH2_OUT_IMAGE_SIZE),
268		readl(pcdev->base_emma + PRP_CNTL));
269}
270
271static void emmaprp_device_run(void *priv)
272{
273	struct emmaprp_ctx *ctx = priv;
274	struct emmaprp_q_data *s_q_data, *d_q_data;
275	struct vb2_v4l2_buffer *src_buf, *dst_buf;
276	struct emmaprp_dev *pcdev = ctx->dev;
277	unsigned int s_width, s_height;
278	unsigned int d_width, d_height;
279	unsigned int d_size;
280	dma_addr_t p_in, p_out;
281	u32 tmp;
282
283	src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
284	dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
285
286	s_q_data = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
287	s_width	= s_q_data->width;
288	s_height = s_q_data->height;
289
290	d_q_data = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
291	d_width = d_q_data->width;
292	d_height = d_q_data->height;
293	d_size = d_width * d_height;
294
295	p_in = vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0);
296	p_out = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0);
297	if (!p_in || !p_out) {
298		v4l2_err(&pcdev->v4l2_dev,
299			 "Acquiring kernel pointers to buffers failed\n");
300		return;
301	}
302
303	/* Input frame parameters */
304	writel(p_in, pcdev->base_emma + PRP_SOURCE_Y_PTR);
305	writel(PRP_SIZE_WIDTH(s_width) | PRP_SIZE_HEIGHT(s_height),
306	       pcdev->base_emma + PRP_SRC_FRAME_SIZE);
307
308	/* Output frame parameters */
309	writel(p_out, pcdev->base_emma + PRP_DEST_Y_PTR);
310	writel(p_out + d_size, pcdev->base_emma + PRP_DEST_CB_PTR);
311	writel(p_out + d_size + (d_size >> 2),
312	       pcdev->base_emma + PRP_DEST_CR_PTR);
313	writel(PRP_SIZE_WIDTH(d_width) | PRP_SIZE_HEIGHT(d_height),
314	       pcdev->base_emma + PRP_CH2_OUT_IMAGE_SIZE);
315
316	/* IRQ configuration */
317	tmp = readl(pcdev->base_emma + PRP_INTR_CNTL);
318	writel(tmp | PRP_INTR_RDERR |
319		PRP_INTR_CH2WERR |
320		PRP_INTR_CH2FC,
321		pcdev->base_emma + PRP_INTR_CNTL);
322
323	emmaprp_dump_regs(pcdev);
324
325	/* Enable transfer */
326	tmp = readl(pcdev->base_emma + PRP_CNTL);
327	writel(tmp | PRP_CNTL_CH2_OUT_YUV420 |
328		PRP_CNTL_DATA_IN_YUV422 |
329		PRP_CNTL_CH2EN,
330		pcdev->base_emma + PRP_CNTL);
331}
332
333static irqreturn_t emmaprp_irq(int irq_emma, void *data)
334{
335	struct emmaprp_dev *pcdev = data;
336	struct emmaprp_ctx *curr_ctx;
337	struct vb2_v4l2_buffer *src_vb, *dst_vb;
338	unsigned long flags;
339	u32 irqst;
340
341	/* Check irq flags and clear irq */
342	irqst = readl(pcdev->base_emma + PRP_INTRSTATUS);
343	writel(irqst, pcdev->base_emma + PRP_INTRSTATUS);
344	dprintk(pcdev, "irqst = 0x%08x\n", irqst);
345
346	curr_ctx = v4l2_m2m_get_curr_priv(pcdev->m2m_dev);
347	if (curr_ctx == NULL) {
348		pr_err("Instance released before the end of transaction\n");
349		return IRQ_HANDLED;
350	}
351
352	if (!curr_ctx->aborting) {
353		if ((irqst & PRP_INTR_ST_RDERR) ||
354		(irqst & PRP_INTR_ST_CH2WERR)) {
355			pr_err("PrP bus error occurred, this transfer is probably corrupted\n");
356			writel(PRP_CNTL_SWRST, pcdev->base_emma + PRP_CNTL);
357		} else if (irqst & PRP_INTR_ST_CH2B1CI) { /* buffer ready */
358			src_vb = v4l2_m2m_src_buf_remove(curr_ctx->fh.m2m_ctx);
359			dst_vb = v4l2_m2m_dst_buf_remove(curr_ctx->fh.m2m_ctx);
360
361			dst_vb->vb2_buf.timestamp = src_vb->vb2_buf.timestamp;
362			dst_vb->flags &=
363				~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
364			dst_vb->flags |=
365				src_vb->flags
366				& V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
367			dst_vb->timecode = src_vb->timecode;
368
369			spin_lock_irqsave(&pcdev->irqlock, flags);
370			v4l2_m2m_buf_done(src_vb, VB2_BUF_STATE_DONE);
371			v4l2_m2m_buf_done(dst_vb, VB2_BUF_STATE_DONE);
372			spin_unlock_irqrestore(&pcdev->irqlock, flags);
373		}
374	}
375
376	v4l2_m2m_job_finish(pcdev->m2m_dev, curr_ctx->fh.m2m_ctx);
377	return IRQ_HANDLED;
378}
379
380/*
381 * video ioctls
382 */
383static int vidioc_querycap(struct file *file, void *priv,
384			   struct v4l2_capability *cap)
385{
386	strscpy(cap->driver, MEM2MEM_NAME, sizeof(cap->driver));
387	strscpy(cap->card, MEM2MEM_NAME, sizeof(cap->card));
388	return 0;
389}
390
391static int enum_fmt(struct v4l2_fmtdesc *f, u32 type)
392{
393	int i, num;
394	struct emmaprp_fmt *fmt;
395
396	num = 0;
397
398	for (i = 0; i < NUM_FORMATS; ++i) {
399		if (formats[i].types & type) {
400			/* index-th format of type type found ? */
401			if (num == f->index)
402				break;
403			/* Correct type but haven't reached our index yet,
404			 * just increment per-type index */
405			++num;
406		}
407	}
408
409	if (i < NUM_FORMATS) {
410		/* Format found */
411		fmt = &formats[i];
412		f->pixelformat = fmt->fourcc;
413		return 0;
414	}
415
416	/* Format not found */
417	return -EINVAL;
418}
419
420static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
421				   struct v4l2_fmtdesc *f)
422{
423	return enum_fmt(f, MEM2MEM_CAPTURE);
424}
425
426static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
427				   struct v4l2_fmtdesc *f)
428{
429	return enum_fmt(f, MEM2MEM_OUTPUT);
430}
431
432static int vidioc_g_fmt(struct emmaprp_ctx *ctx, struct v4l2_format *f)
433{
434	struct emmaprp_q_data *q_data;
435
436	q_data = get_q_data(ctx, f->type);
437
438	f->fmt.pix.width	= q_data->width;
439	f->fmt.pix.height	= q_data->height;
440	f->fmt.pix.field	= V4L2_FIELD_NONE;
441	f->fmt.pix.pixelformat	= q_data->fmt->fourcc;
442	if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420)
443		f->fmt.pix.bytesperline = q_data->width * 3 / 2;
444	else /* YUYV */
445		f->fmt.pix.bytesperline = q_data->width * 2;
446	f->fmt.pix.sizeimage	= q_data->sizeimage;
447
448	return 0;
449}
450
451static int vidioc_g_fmt_vid_out(struct file *file, void *priv,
452				struct v4l2_format *f)
453{
454	return vidioc_g_fmt(file_to_emmaprp_ctx(file), f);
455}
456
457static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
458				struct v4l2_format *f)
459{
460	return vidioc_g_fmt(file_to_emmaprp_ctx(file), f);
461}
462
463static int vidioc_try_fmt(struct v4l2_format *f)
464{
465	enum v4l2_field field;
466
467
468	if (!find_format(f))
469		return -EINVAL;
470
471	field = f->fmt.pix.field;
472	if (field == V4L2_FIELD_ANY)
473		field = V4L2_FIELD_NONE;
474	else if (V4L2_FIELD_NONE != field)
475		return -EINVAL;
476
477	/* V4L2 specification suggests the driver corrects the format struct
478	 * if any of the dimensions is unsupported */
479	f->fmt.pix.field = field;
480
481	if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420) {
482		v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W,
483				      W_ALIGN_YUV420, &f->fmt.pix.height,
484				      MIN_H, MAX_H, H_ALIGN, S_ALIGN);
485		f->fmt.pix.bytesperline = f->fmt.pix.width * 3 / 2;
486	} else {
487		v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W,
488				      W_ALIGN_OTHERS, &f->fmt.pix.height,
489				      MIN_H, MAX_H, H_ALIGN, S_ALIGN);
490		f->fmt.pix.bytesperline = f->fmt.pix.width * 2;
491	}
492	f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.bytesperline;
493
494	return 0;
495}
496
497static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
498				  struct v4l2_format *f)
499{
500	struct emmaprp_ctx *ctx = file_to_emmaprp_ctx(file);
501	struct emmaprp_fmt *fmt;
502
503	fmt = find_format(f);
504	if (!fmt || !(fmt->types & MEM2MEM_CAPTURE)) {
505		v4l2_err(&ctx->dev->v4l2_dev,
506			 "Fourcc format (0x%08x) invalid.\n",
507			 f->fmt.pix.pixelformat);
508		return -EINVAL;
509	}
510
511	return vidioc_try_fmt(f);
512}
513
514static int vidioc_try_fmt_vid_out(struct file *file, void *priv,
515				  struct v4l2_format *f)
516{
517	struct emmaprp_ctx *ctx = file_to_emmaprp_ctx(file);
518	struct emmaprp_fmt *fmt;
519
520	fmt = find_format(f);
521	if (!fmt || !(fmt->types & MEM2MEM_OUTPUT)) {
522		v4l2_err(&ctx->dev->v4l2_dev,
523			 "Fourcc format (0x%08x) invalid.\n",
524			 f->fmt.pix.pixelformat);
525		return -EINVAL;
526	}
527
528	return vidioc_try_fmt(f);
529}
530
531static int vidioc_s_fmt(struct emmaprp_ctx *ctx, struct v4l2_format *f)
532{
533	struct emmaprp_q_data *q_data;
534	struct vb2_queue *vq;
535	int ret;
536
537	vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type);
538
539	q_data = get_q_data(ctx, f->type);
540	if (!q_data)
541		return -EINVAL;
542
543	if (vb2_is_busy(vq)) {
544		v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
545		return -EBUSY;
546	}
547
548	ret = vidioc_try_fmt(f);
549	if (ret)
550		return ret;
551
552	q_data->fmt		= find_format(f);
553	q_data->width		= f->fmt.pix.width;
554	q_data->height		= f->fmt.pix.height;
555	if (q_data->fmt->fourcc == V4L2_PIX_FMT_YUV420)
556		q_data->sizeimage = q_data->width * q_data->height * 3 / 2;
557	else /* YUYV */
558		q_data->sizeimage = q_data->width * q_data->height * 2;
559
560	dprintk(ctx->dev,
561		"Setting format for type %d, wxh: %dx%d, fmt: %d\n",
562		f->type, q_data->width, q_data->height, q_data->fmt->fourcc);
563
564	return 0;
565}
566
567static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
568				struct v4l2_format *f)
569{
570	int ret;
571
572	ret = vidioc_try_fmt_vid_cap(file, priv, f);
573	if (ret)
574		return ret;
575
576	return vidioc_s_fmt(file_to_emmaprp_ctx(file), f);
577}
578
579static int vidioc_s_fmt_vid_out(struct file *file, void *priv,
580				struct v4l2_format *f)
581{
582	int ret;
583
584	ret = vidioc_try_fmt_vid_out(file, priv, f);
585	if (ret)
586		return ret;
587
588	return vidioc_s_fmt(file_to_emmaprp_ctx(file), f);
589}
590
591static const struct v4l2_ioctl_ops emmaprp_ioctl_ops = {
592	.vidioc_querycap	= vidioc_querycap,
593
594	.vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
595	.vidioc_g_fmt_vid_cap	= vidioc_g_fmt_vid_cap,
596	.vidioc_try_fmt_vid_cap	= vidioc_try_fmt_vid_cap,
597	.vidioc_s_fmt_vid_cap	= vidioc_s_fmt_vid_cap,
598
599	.vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
600	.vidioc_g_fmt_vid_out	= vidioc_g_fmt_vid_out,
601	.vidioc_try_fmt_vid_out	= vidioc_try_fmt_vid_out,
602	.vidioc_s_fmt_vid_out	= vidioc_s_fmt_vid_out,
603
604	.vidioc_reqbufs		= v4l2_m2m_ioctl_reqbufs,
605	.vidioc_querybuf	= v4l2_m2m_ioctl_querybuf,
606	.vidioc_qbuf		= v4l2_m2m_ioctl_qbuf,
607	.vidioc_dqbuf		= v4l2_m2m_ioctl_dqbuf,
608	.vidioc_prepare_buf	= v4l2_m2m_ioctl_prepare_buf,
609	.vidioc_expbuf		= v4l2_m2m_ioctl_expbuf,
610	.vidioc_streamon	= v4l2_m2m_ioctl_streamon,
611	.vidioc_streamoff	= v4l2_m2m_ioctl_streamoff,
612};
613
614
615/*
616 * Queue operations
617 */
618static int emmaprp_queue_setup(struct vb2_queue *vq,
619				unsigned int *nbuffers, unsigned int *nplanes,
620				unsigned int sizes[], struct device *alloc_devs[])
621{
622	struct emmaprp_ctx *ctx = vb2_get_drv_priv(vq);
623	struct emmaprp_q_data *q_data;
624	unsigned int size, count = *nbuffers;
625
626	q_data = get_q_data(ctx, vq->type);
627
628	if (q_data->fmt->fourcc == V4L2_PIX_FMT_YUV420)
629		size = q_data->width * q_data->height * 3 / 2;
630	else
631		size = q_data->width * q_data->height * 2;
632
633	while (size * count > MEM2MEM_VID_MEM_LIMIT)
634		(count)--;
635
636	*nplanes = 1;
637	*nbuffers = count;
638	sizes[0] = size;
639
640	dprintk(ctx->dev, "get %d buffer(s) of size %d each.\n", count, size);
641
642	return 0;
643}
644
645static int emmaprp_buf_prepare(struct vb2_buffer *vb)
646{
647	struct emmaprp_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
648	struct emmaprp_q_data *q_data;
649
650	dprintk(ctx->dev, "type: %d\n", vb->vb2_queue->type);
651
652	q_data = get_q_data(ctx, vb->vb2_queue->type);
653
654	if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
655		dprintk(ctx->dev,
656			"%s data will not fit into plane(%lu < %lu)\n",
657			__func__, vb2_plane_size(vb, 0),
658			(long)q_data->sizeimage);
659		return -EINVAL;
660	}
661
662	vb2_set_plane_payload(vb, 0, q_data->sizeimage);
663
664	return 0;
665}
666
667static void emmaprp_buf_queue(struct vb2_buffer *vb)
668{
669	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
670	struct emmaprp_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
671	v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf);
672}
673
674static const struct vb2_ops emmaprp_qops = {
675	.queue_setup	 = emmaprp_queue_setup,
676	.buf_prepare	 = emmaprp_buf_prepare,
677	.buf_queue	 = emmaprp_buf_queue,
678};
679
680static int queue_init(void *priv, struct vb2_queue *src_vq,
681		      struct vb2_queue *dst_vq)
682{
683	struct emmaprp_ctx *ctx = priv;
684	int ret;
685
686	src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
687	src_vq->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
688	src_vq->drv_priv = ctx;
689	src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
690	src_vq->ops = &emmaprp_qops;
691	src_vq->mem_ops = &vb2_dma_contig_memops;
692	src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
693	src_vq->dev = ctx->dev->v4l2_dev.dev;
694	src_vq->lock = &ctx->dev->dev_mutex;
695
696	ret = vb2_queue_init(src_vq);
697	if (ret)
698		return ret;
699
700	dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
701	dst_vq->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
702	dst_vq->drv_priv = ctx;
703	dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
704	dst_vq->ops = &emmaprp_qops;
705	dst_vq->mem_ops = &vb2_dma_contig_memops;
706	dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
707	dst_vq->dev = ctx->dev->v4l2_dev.dev;
708	dst_vq->lock = &ctx->dev->dev_mutex;
709
710	return vb2_queue_init(dst_vq);
711}
712
713/*
714 * File operations
715 */
716static int emmaprp_open(struct file *file)
717{
718	struct emmaprp_dev *pcdev = video_drvdata(file);
719	struct emmaprp_ctx *ctx;
720
721	ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
722	if (!ctx)
723		return -ENOMEM;
724
725	v4l2_fh_init(&ctx->fh, video_devdata(file));
726	ctx->dev = pcdev;
727
728	if (mutex_lock_interruptible(&pcdev->dev_mutex)) {
729		kfree(ctx);
730		return -ERESTARTSYS;
731	}
732
733	ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(pcdev->m2m_dev, ctx, &queue_init);
734
735	if (IS_ERR(ctx->fh.m2m_ctx)) {
736		int ret = PTR_ERR(ctx->fh.m2m_ctx);
737
738		mutex_unlock(&pcdev->dev_mutex);
739		kfree(ctx);
740		return ret;
741	}
742
743	clk_prepare_enable(pcdev->clk_emma_ipg);
744	clk_prepare_enable(pcdev->clk_emma_ahb);
745	ctx->q_data[V4L2_M2M_SRC].fmt = &formats[1];
746	ctx->q_data[V4L2_M2M_DST].fmt = &formats[0];
747	v4l2_fh_add(&ctx->fh, file);
748	mutex_unlock(&pcdev->dev_mutex);
749
750	dprintk(pcdev, "Created instance %p, m2m_ctx: %p\n", ctx, ctx->fh.m2m_ctx);
751
752	return 0;
753}
754
755static int emmaprp_release(struct file *file)
756{
757	struct emmaprp_dev *pcdev = video_drvdata(file);
758	struct emmaprp_ctx *ctx = file_to_emmaprp_ctx(file);
759
760	dprintk(pcdev, "Releasing instance %p\n", ctx);
761
762	mutex_lock(&pcdev->dev_mutex);
763	clk_disable_unprepare(pcdev->clk_emma_ahb);
764	clk_disable_unprepare(pcdev->clk_emma_ipg);
765	v4l2_fh_del(&ctx->fh, file);
766	v4l2_fh_exit(&ctx->fh);
767	v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
768	mutex_unlock(&pcdev->dev_mutex);
769	kfree(ctx);
770
771	return 0;
772}
773
774static const struct v4l2_file_operations emmaprp_fops = {
775	.owner		= THIS_MODULE,
776	.open		= emmaprp_open,
777	.release	= emmaprp_release,
778	.poll		= v4l2_m2m_fop_poll,
779	.unlocked_ioctl	= video_ioctl2,
780	.mmap		= v4l2_m2m_fop_mmap,
781};
782
783static const struct video_device emmaprp_videodev = {
784	.name		= MEM2MEM_NAME,
785	.fops		= &emmaprp_fops,
786	.ioctl_ops	= &emmaprp_ioctl_ops,
787	.minor		= -1,
788	.release	= video_device_release,
789	.vfl_dir	= VFL_DIR_M2M,
790	.device_caps	= V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING,
791};
792
793static const struct v4l2_m2m_ops m2m_ops = {
794	.device_run	= emmaprp_device_run,
795	.job_abort	= emmaprp_job_abort,
796};
797
798static int emmaprp_probe(struct platform_device *pdev)
799{
800	struct emmaprp_dev *pcdev;
801	struct video_device *vfd;
802	int irq, ret;
803
804	pcdev = devm_kzalloc(&pdev->dev, sizeof(*pcdev), GFP_KERNEL);
805	if (!pcdev)
806		return -ENOMEM;
807
808	spin_lock_init(&pcdev->irqlock);
809
810	pcdev->clk_emma_ipg = devm_clk_get(&pdev->dev, "ipg");
811	if (IS_ERR(pcdev->clk_emma_ipg)) {
812		return PTR_ERR(pcdev->clk_emma_ipg);
813	}
814
815	pcdev->clk_emma_ahb = devm_clk_get(&pdev->dev, "ahb");
816	if (IS_ERR(pcdev->clk_emma_ahb))
817		return PTR_ERR(pcdev->clk_emma_ahb);
818
819	pcdev->base_emma = devm_platform_ioremap_resource(pdev, 0);
820	if (IS_ERR(pcdev->base_emma))
821		return PTR_ERR(pcdev->base_emma);
822
823	ret = v4l2_device_register(&pdev->dev, &pcdev->v4l2_dev);
824	if (ret)
825		return ret;
826
827	mutex_init(&pcdev->dev_mutex);
828
829	vfd = video_device_alloc();
830	if (!vfd) {
831		v4l2_err(&pcdev->v4l2_dev, "Failed to allocate video device\n");
832		ret = -ENOMEM;
833		goto unreg_dev;
834	}
835
836	*vfd = emmaprp_videodev;
837	vfd->lock = &pcdev->dev_mutex;
838	vfd->v4l2_dev = &pcdev->v4l2_dev;
839
840	video_set_drvdata(vfd, pcdev);
841	pcdev->vfd = vfd;
842	v4l2_info(&pcdev->v4l2_dev, EMMAPRP_MODULE_NAME
843		  " Device registered as /dev/video%d\n", vfd->num);
844
845	platform_set_drvdata(pdev, pcdev);
846
847	irq = platform_get_irq(pdev, 0);
848	if (irq < 0) {
849		ret = irq;
850		goto rel_vdev;
851	}
852
853	ret = devm_request_irq(&pdev->dev, irq, emmaprp_irq, 0,
854			       dev_name(&pdev->dev), pcdev);
855	if (ret)
856		goto rel_vdev;
857
858	pcdev->m2m_dev = v4l2_m2m_init(&m2m_ops);
859	if (IS_ERR(pcdev->m2m_dev)) {
860		v4l2_err(&pcdev->v4l2_dev, "Failed to init mem2mem device\n");
861		ret = PTR_ERR(pcdev->m2m_dev);
862		goto rel_vdev;
863	}
864
865	ret = video_register_device(vfd, VFL_TYPE_VIDEO, 0);
866	if (ret) {
867		v4l2_err(&pcdev->v4l2_dev, "Failed to register video device\n");
868		goto rel_m2m;
869	}
870
871	return 0;
872
873
874rel_m2m:
875	v4l2_m2m_release(pcdev->m2m_dev);
876rel_vdev:
877	video_device_release(vfd);
878unreg_dev:
879	v4l2_device_unregister(&pcdev->v4l2_dev);
880
881	mutex_destroy(&pcdev->dev_mutex);
882
883	return ret;
884}
885
886static void emmaprp_remove(struct platform_device *pdev)
887{
888	struct emmaprp_dev *pcdev = platform_get_drvdata(pdev);
889
890	v4l2_info(&pcdev->v4l2_dev, "Removing " EMMAPRP_MODULE_NAME);
891
892	video_unregister_device(pcdev->vfd);
893	v4l2_m2m_release(pcdev->m2m_dev);
894	v4l2_device_unregister(&pcdev->v4l2_dev);
895	mutex_destroy(&pcdev->dev_mutex);
896}
897
898static struct platform_driver emmaprp_pdrv = {
899	.probe		= emmaprp_probe,
900	.remove		= emmaprp_remove,
901	.driver		= {
902		.name	= MEM2MEM_NAME,
903	},
904};
905module_platform_driver(emmaprp_pdrv);