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vdec_h264_req_multi_if.c

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linux-6.19.14/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c C
   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Copyright (c) 2022 MediaTek Inc.
   4 * Author: Yunfei Dong <yunfei.dong@mediatek.com>
   5 */
   6
   7#include <linux/module.h>
   8#include <linux/slab.h>
   9#include <media/v4l2-h264.h>
  10#include <media/v4l2-mem2mem.h>
  11#include <media/videobuf2-dma-contig.h>
  12
  13#include "../mtk_vcodec_dec.h"
  14#include "../../common/mtk_vcodec_intr.h"
  15#include "../vdec_drv_base.h"
  16#include "../vdec_drv_if.h"
  17#include "../vdec_vpu_if.h"
  18#include "vdec_h264_req_common.h"
  19
  20/**
  21 * enum vdec_h264_core_dec_err_type  - core decode error type
  22 *
  23 * @TRANS_BUFFER_FULL: trans buffer is full
  24 * @SLICE_HEADER_FULL: slice header buffer is full
  25 */
  26enum vdec_h264_core_dec_err_type {
  27	TRANS_BUFFER_FULL = 1,
  28	SLICE_HEADER_FULL,
  29};
  30
  31/**
  32 * struct vdec_h264_slice_lat_dec_param  - parameters for decode current frame
  33 *	(shared data between host and firmware)
  34 *
  35 * @sps:		h264 sps syntax parameters
  36 * @pps:		h264 pps syntax parameters
  37 * @slice_header:	h264 slice header syntax parameters
  38 * @scaling_matrix:	h264 scaling list parameters
  39 * @decode_params:	decoder parameters of each frame used for hardware decode
  40 * @h264_dpb_info:	dpb reference list
  41 */
  42struct vdec_h264_slice_lat_dec_param {
  43	struct mtk_h264_sps_param sps;
  44	struct mtk_h264_pps_param pps;
  45	struct mtk_h264_slice_hd_param slice_header;
  46	struct slice_api_h264_scaling_matrix scaling_matrix;
  47	struct slice_api_h264_decode_param decode_params;
  48	struct mtk_h264_dpb_info h264_dpb_info[V4L2_H264_NUM_DPB_ENTRIES];
  49};
  50
  51/**
  52 * struct vdec_h264_slice_info - decode information (shared data between host and firmware)
  53 *
  54 * @nal_info:		nal info of current picture
  55 * @timeout:		Decode timeout: 1 timeout, 0 no timeout
  56 * @bs_buf_size:	bitstream size
  57 * @bs_buf_addr:	bitstream buffer dma address
  58 * @y_fb_dma:		Y frame buffer dma address
  59 * @c_fb_dma:		C frame buffer dma address
  60 * @vdec_fb_va:	VDEC frame buffer struct virtual address
  61 * @crc:		Used to check whether hardware's status is right
  62 */
  63struct vdec_h264_slice_info {
  64	u16 nal_info;
  65	u16 timeout;
  66	u32 bs_buf_size;
  67	u64 bs_buf_addr;
  68	u64 y_fb_dma;
  69	u64 c_fb_dma;
  70	u64 vdec_fb_va;
  71	u32 crc[8];
  72};
  73
  74/**
  75 * struct vdec_h264_slice_vsi - shared memory for decode information exchange
  76 *        between SCP and Host (shared data between host and firmware).
  77 *
  78 * @wdma_err_addr:        wdma error dma address
  79 * @wdma_start_addr:      wdma start dma address
  80 * @wdma_end_addr:        wdma end dma address
  81 * @slice_bc_start_addr:  slice bc start dma address
  82 * @slice_bc_end_addr:    slice bc end dma address
  83 * @row_info_start_addr:  row info start dma address
  84 * @row_info_end_addr:    row info end dma address
  85 * @trans_start:          trans start dma address
  86 * @trans_end:            trans end dma address
  87 * @wdma_end_addr_offset: wdma end address offset
  88 *
  89 * @mv_buf_dma:           HW working motion vector buffer
  90 * @dec:                  decode information (AP-R, VPU-W)
  91 * @h264_slice_params:    decode parameters for hw used
  92 */
  93struct vdec_h264_slice_vsi {
  94	/* LAT dec addr */
  95	u64 wdma_err_addr;
  96	u64 wdma_start_addr;
  97	u64 wdma_end_addr;
  98	u64 slice_bc_start_addr;
  99	u64 slice_bc_end_addr;
 100	u64 row_info_start_addr;
 101	u64 row_info_end_addr;
 102	u64 trans_start;
 103	u64 trans_end;
 104	u64 wdma_end_addr_offset;
 105
 106	u64 mv_buf_dma[H264_MAX_MV_NUM];
 107	struct vdec_h264_slice_info dec;
 108	struct vdec_h264_slice_lat_dec_param h264_slice_params;
 109};
 110
 111/**
 112 * struct vdec_h264_slice_share_info - shared information used to exchange
 113 *                                     message between lat and core
 114 *
 115 * @sps:               sequence header information from user space
 116 * @dec_params:        decoder params from user space
 117 * @h264_slice_params: decoder params used for hardware
 118 * @trans_start:       trans start dma address
 119 * @trans_end:         trans end dma address
 120 * @nal_info:          nal info of current picture
 121 */
 122struct vdec_h264_slice_share_info {
 123	struct v4l2_ctrl_h264_sps sps;
 124	struct v4l2_ctrl_h264_decode_params dec_params;
 125	struct vdec_h264_slice_lat_dec_param h264_slice_params;
 126	u64 trans_start;
 127	u64 trans_end;
 128	u16 nal_info;
 129};
 130
 131/*
 132 * struct vdec_h264_slice_mem - memory address and size
 133 *        (shared data between host and firmware)
 134 */
 135struct vdec_h264_slice_mem {
 136	union {
 137		u64 buf;
 138		u64 dma_addr;
 139	};
 140	union {
 141		size_t size;
 142		u64 dma_addr_end;
 143	};
 144};
 145
 146/**
 147 * struct vdec_h264_slice_fb - frame buffer for decoding
 148 *        (shared data between host and firmware)
 149 *
 150 * @y:  current luma buffer address info
 151 * @c:  current chroma buffer address info
 152 */
 153struct vdec_h264_slice_fb {
 154	struct vdec_h264_slice_mem y;
 155	struct vdec_h264_slice_mem c;
 156};
 157
 158/**
 159 * struct vdec_h264_slice_info_ext - extend decode information
 160 *        (shared data between host and firmware)
 161 *
 162 * @wdma_end_addr_offset: offset from buffer start
 163 * @nal_info:             nal info of current picture
 164 * @timeout:              toggles whether a decode operation is timeout
 165 * @reserved:             reserved
 166 * @vdec_fb_va:           vdec frame buffer struct virtual address
 167 * @crc:                  displays the hardware status
 168 */
 169struct vdec_h264_slice_info_ext {
 170	u64 wdma_end_addr_offset;
 171	u16 nal_info;
 172	u16 timeout;
 173	u32 reserved;
 174	u64 vdec_fb_va;
 175	u32 crc[8];
 176};
 177
 178/**
 179 * struct vdec_h264_slice_vsi_ext - extend shared memory for decode information exchange
 180 *        between SCP and Host (shared data between host and firmware).
 181 *
 182 * @bs:                input buffer info
 183 * @fb:                current y/c buffer
 184 *
 185 * @ube:               buffer used to share date between lat and core
 186 * @trans:             transcoded buffer used for core decode
 187 * @row_info:          row info buffer
 188 * @err_map:           error map buffer
 189 * @slice_bc:          slice buffer
 190 *
 191 * @mv_buf_dma:        store hardware motion vector data
 192 * @dec:               decode information (AP-R, VPU-W)
 193 * @h264_slice_params: decode parameters used for the hw
 194 */
 195struct vdec_h264_slice_vsi_ext {
 196	/* LAT dec addr */
 197	struct vdec_h264_slice_mem bs;
 198	struct vdec_h264_slice_fb fb;
 199
 200	struct vdec_h264_slice_mem ube;
 201	struct vdec_h264_slice_mem trans;
 202	struct vdec_h264_slice_mem row_info;
 203	struct vdec_h264_slice_mem err_map;
 204	struct vdec_h264_slice_mem slice_bc;
 205
 206	struct vdec_h264_slice_mem mv_buf_dma[H264_MAX_MV_NUM];
 207	struct vdec_h264_slice_info_ext dec;
 208	struct vdec_h264_slice_lat_dec_param h264_slice_params;
 209};
 210
 211/**
 212 * struct vdec_h264_slice_inst - h264 decoder instance
 213 *
 214 * @slice_dec_num:	Number of frames to be decoded
 215 * @ctx:		point to mtk_vcodec_dec_ctx
 216 * @pred_buf:		HW working prediction buffer
 217 * @mv_buf:		HW working motion vector buffer
 218 * @vpu:		VPU instance
 219 * @vsi:		vsi used for lat
 220 * @vsi_core:		vsi used for core
 221 * @vsi_ctx:		vsi data for this decoding context
 222 * @vsi_ext:		extended vsi used for lat
 223 * @vsi_core_ext:	extended vsi used for core
 224 * @vsi_ctx_ext:	extended vsi data for this decoding context
 225 * @h264_slice_param:	the parameters that hardware use to decode
 226 *
 227 * @resolution_changed: resolution changed
 228 * @realloc_mv_buf:	reallocate mv buffer
 229 * @cap_num_planes:	number of capture queue plane
 230 *
 231 * @dpb:		decoded picture buffer used to store reference
 232 *			buffer information
 233 * @is_field_bitstream: not support field bitstream, only support frame
 234 *
 235 * @decode:		lat decoder pointer for different architectures
 236 */
 237struct vdec_h264_slice_inst {
 238	unsigned int slice_dec_num;
 239	struct mtk_vcodec_dec_ctx *ctx;
 240	struct mtk_vcodec_mem pred_buf;
 241	struct mtk_vcodec_mem mv_buf[H264_MAX_MV_NUM];
 242	struct vdec_vpu_inst vpu;
 243	union {
 244		struct {
 245			struct vdec_h264_slice_vsi *vsi;
 246			struct vdec_h264_slice_vsi *vsi_core;
 247			struct vdec_h264_slice_vsi vsi_ctx;
 248		};
 249		struct {
 250			struct vdec_h264_slice_vsi_ext *vsi_ext;
 251			struct vdec_h264_slice_vsi_ext *vsi_core_ext;
 252			struct vdec_h264_slice_vsi_ext vsi_ctx_ext;
 253		};
 254	};
 255	struct vdec_h264_slice_lat_dec_param h264_slice_param;
 256
 257	unsigned int resolution_changed;
 258	unsigned int realloc_mv_buf;
 259	unsigned int cap_num_planes;
 260
 261	struct v4l2_h264_dpb_entry dpb[16];
 262	bool is_field_bitstream;
 263
 264	int (*decode)(void *h_vdec, struct mtk_vcodec_mem *bs,
 265		      struct vdec_fb *unused, bool *res_chg);
 266};
 267
 268static int vdec_h264_slice_fill_decode_parameters(struct vdec_h264_slice_inst *inst,
 269						  struct vdec_h264_slice_share_info *share_info,
 270						  struct vdec_h264_slice_lat_dec_param *slice_param)
 271{
 272	const struct v4l2_ctrl_h264_decode_params *dec_params;
 273	const struct v4l2_ctrl_h264_scaling_matrix *src_matrix;
 274	const struct v4l2_ctrl_h264_sps *sps;
 275	const struct v4l2_ctrl_h264_pps *pps;
 276
 277	dec_params =
 278		mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_DECODE_PARAMS);
 279	if (IS_ERR(dec_params))
 280		return PTR_ERR(dec_params);
 281
 282	src_matrix =
 283		mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_SCALING_MATRIX);
 284	if (IS_ERR(src_matrix))
 285		return PTR_ERR(src_matrix);
 286
 287	sps = mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_SPS);
 288	if (IS_ERR(sps))
 289		return PTR_ERR(sps);
 290
 291	pps = mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_PPS);
 292	if (IS_ERR(pps))
 293		return PTR_ERR(pps);
 294
 295	if (dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC) {
 296		mtk_vdec_err(inst->ctx, "No support for H.264 field decoding.");
 297		inst->is_field_bitstream = true;
 298		return -EINVAL;
 299	}
 300
 301	mtk_vdec_h264_copy_sps_params(&slice_param->sps, sps);
 302	mtk_vdec_h264_copy_pps_params(&slice_param->pps, pps);
 303	mtk_vdec_h264_copy_scaling_matrix(&slice_param->scaling_matrix, src_matrix);
 304
 305	memcpy(&share_info->sps, sps, sizeof(*sps));
 306	memcpy(&share_info->dec_params, dec_params, sizeof(*dec_params));
 307
 308	return 0;
 309}
 310
 311static int get_vdec_sig_decode_parameters(struct vdec_h264_slice_inst *inst)
 312{
 313	const struct v4l2_ctrl_h264_decode_params *dec_params;
 314	const struct v4l2_ctrl_h264_sps *sps;
 315	const struct v4l2_ctrl_h264_pps *pps;
 316	const struct v4l2_ctrl_h264_scaling_matrix *scaling_matrix;
 317	struct vdec_h264_slice_lat_dec_param *slice_param = &inst->h264_slice_param;
 318	struct v4l2_h264_reflist_builder reflist_builder;
 319	struct v4l2_h264_reference v4l2_p0_reflist[V4L2_H264_REF_LIST_LEN];
 320	struct v4l2_h264_reference v4l2_b0_reflist[V4L2_H264_REF_LIST_LEN];
 321	struct v4l2_h264_reference v4l2_b1_reflist[V4L2_H264_REF_LIST_LEN];
 322	u8 *p0_reflist = slice_param->decode_params.ref_pic_list_p0;
 323	u8 *b0_reflist = slice_param->decode_params.ref_pic_list_b0;
 324	u8 *b1_reflist = slice_param->decode_params.ref_pic_list_b1;
 325
 326	dec_params =
 327		mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_DECODE_PARAMS);
 328	if (IS_ERR(dec_params))
 329		return PTR_ERR(dec_params);
 330
 331	sps = mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_SPS);
 332	if (IS_ERR(sps))
 333		return PTR_ERR(sps);
 334
 335	pps = mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_PPS);
 336	if (IS_ERR(pps))
 337		return PTR_ERR(pps);
 338
 339	scaling_matrix =
 340		mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_SCALING_MATRIX);
 341	if (IS_ERR(scaling_matrix))
 342		return PTR_ERR(scaling_matrix);
 343
 344	mtk_vdec_h264_update_dpb(dec_params, inst->dpb);
 345
 346	mtk_vdec_h264_copy_sps_params(&slice_param->sps, sps);
 347	mtk_vdec_h264_copy_pps_params(&slice_param->pps, pps);
 348	mtk_vdec_h264_copy_scaling_matrix(&slice_param->scaling_matrix, scaling_matrix);
 349
 350	mtk_vdec_h264_copy_decode_params(&slice_param->decode_params, dec_params, inst->dpb);
 351	mtk_vdec_h264_fill_dpb_info(inst->ctx, &slice_param->decode_params,
 352				    slice_param->h264_dpb_info);
 353
 354	/* Build the reference lists */
 355	v4l2_h264_init_reflist_builder(&reflist_builder, dec_params, sps, inst->dpb);
 356	v4l2_h264_build_p_ref_list(&reflist_builder, v4l2_p0_reflist);
 357	v4l2_h264_build_b_ref_lists(&reflist_builder, v4l2_b0_reflist, v4l2_b1_reflist);
 358
 359	/* Adapt the built lists to the firmware's expectations */
 360	mtk_vdec_h264_get_ref_list(p0_reflist, v4l2_p0_reflist, reflist_builder.num_valid);
 361	mtk_vdec_h264_get_ref_list(b0_reflist, v4l2_b0_reflist, reflist_builder.num_valid);
 362	mtk_vdec_h264_get_ref_list(b1_reflist, v4l2_b1_reflist, reflist_builder.num_valid);
 363
 364	return 0;
 365}
 366
 367static void vdec_h264_slice_fill_decode_reflist(struct vdec_h264_slice_inst *inst,
 368						struct vdec_h264_slice_lat_dec_param *slice_param,
 369						struct vdec_h264_slice_share_info *share_info)
 370{
 371	struct v4l2_ctrl_h264_decode_params *dec_params = &share_info->dec_params;
 372	struct v4l2_ctrl_h264_sps *sps = &share_info->sps;
 373	struct v4l2_h264_reflist_builder reflist_builder;
 374	struct v4l2_h264_reference v4l2_p0_reflist[V4L2_H264_REF_LIST_LEN];
 375	struct v4l2_h264_reference v4l2_b0_reflist[V4L2_H264_REF_LIST_LEN];
 376	struct v4l2_h264_reference v4l2_b1_reflist[V4L2_H264_REF_LIST_LEN];
 377	u8 *p0_reflist = slice_param->decode_params.ref_pic_list_p0;
 378	u8 *b0_reflist = slice_param->decode_params.ref_pic_list_b0;
 379	u8 *b1_reflist = slice_param->decode_params.ref_pic_list_b1;
 380
 381	mtk_vdec_h264_update_dpb(dec_params, inst->dpb);
 382
 383	mtk_vdec_h264_copy_decode_params(&slice_param->decode_params, dec_params,
 384					 inst->dpb);
 385	mtk_vdec_h264_fill_dpb_info(inst->ctx, &slice_param->decode_params,
 386				    slice_param->h264_dpb_info);
 387
 388	mtk_v4l2_vdec_dbg(3, inst->ctx, "cur poc = %d\n", dec_params->bottom_field_order_cnt);
 389	/* Build the reference lists */
 390	v4l2_h264_init_reflist_builder(&reflist_builder, dec_params, sps,
 391				       inst->dpb);
 392	v4l2_h264_build_p_ref_list(&reflist_builder, v4l2_p0_reflist);
 393	v4l2_h264_build_b_ref_lists(&reflist_builder, v4l2_b0_reflist, v4l2_b1_reflist);
 394
 395	/* Adapt the built lists to the firmware's expectations */
 396	mtk_vdec_h264_get_ref_list(p0_reflist, v4l2_p0_reflist, reflist_builder.num_valid);
 397	mtk_vdec_h264_get_ref_list(b0_reflist, v4l2_b0_reflist, reflist_builder.num_valid);
 398	mtk_vdec_h264_get_ref_list(b1_reflist, v4l2_b1_reflist, reflist_builder.num_valid);
 399}
 400
 401static int vdec_h264_slice_alloc_mv_buf(struct vdec_h264_slice_inst *inst,
 402					struct vdec_pic_info *pic)
 403{
 404	unsigned int buf_sz = mtk_vdec_h264_get_mv_buf_size(pic->buf_w, pic->buf_h);
 405	struct mtk_vcodec_mem *mem;
 406	int i, err;
 407
 408	mtk_v4l2_vdec_dbg(3, inst->ctx, "size = 0x%x", buf_sz);
 409	for (i = 0; i < H264_MAX_MV_NUM; i++) {
 410		mem = &inst->mv_buf[i];
 411		if (mem->va)
 412			mtk_vcodec_mem_free(inst->ctx, mem);
 413		mem->size = buf_sz;
 414		err = mtk_vcodec_mem_alloc(inst->ctx, mem);
 415		if (err) {
 416			mtk_vdec_err(inst->ctx, "failed to allocate mv buf");
 417			return err;
 418		}
 419	}
 420
 421	return 0;
 422}
 423
 424static void vdec_h264_slice_free_mv_buf(struct vdec_h264_slice_inst *inst)
 425{
 426	int i;
 427	struct mtk_vcodec_mem *mem;
 428
 429	for (i = 0; i < H264_MAX_MV_NUM; i++) {
 430		mem = &inst->mv_buf[i];
 431		if (mem->va)
 432			mtk_vcodec_mem_free(inst->ctx, mem);
 433	}
 434}
 435
 436static void vdec_h264_slice_get_pic_info(struct vdec_h264_slice_inst *inst)
 437{
 438	struct mtk_vcodec_dec_ctx *ctx = inst->ctx;
 439	u32 data[3];
 440
 441	data[0] = ctx->picinfo.pic_w;
 442	data[1] = ctx->picinfo.pic_h;
 443	data[2] = ctx->capture_fourcc;
 444	vpu_dec_get_param(&inst->vpu, data, 3, GET_PARAM_PIC_INFO);
 445
 446	ctx->picinfo.buf_w = ALIGN(ctx->picinfo.pic_w, VCODEC_DEC_ALIGNED_64);
 447	ctx->picinfo.buf_h = ALIGN(ctx->picinfo.pic_h, VCODEC_DEC_ALIGNED_64);
 448	ctx->picinfo.fb_sz[0] = inst->vpu.fb_sz[0];
 449	ctx->picinfo.fb_sz[1] = inst->vpu.fb_sz[1];
 450	inst->cap_num_planes =
 451		ctx->q_data[MTK_Q_DATA_DST].fmt->num_planes;
 452
 453	mtk_vdec_debug(ctx, "pic(%d, %d), buf(%d, %d)",
 454		       ctx->picinfo.pic_w, ctx->picinfo.pic_h,
 455		       ctx->picinfo.buf_w, ctx->picinfo.buf_h);
 456	mtk_vdec_debug(ctx, "Y/C(%d, %d)", ctx->picinfo.fb_sz[0],
 457		       ctx->picinfo.fb_sz[1]);
 458
 459	if (ctx->last_decoded_picinfo.pic_w != ctx->picinfo.pic_w ||
 460	    ctx->last_decoded_picinfo.pic_h != ctx->picinfo.pic_h) {
 461		inst->resolution_changed = true;
 462		if (ctx->last_decoded_picinfo.buf_w != ctx->picinfo.buf_w ||
 463		    ctx->last_decoded_picinfo.buf_h != ctx->picinfo.buf_h)
 464			inst->realloc_mv_buf = true;
 465
 466		mtk_v4l2_vdec_dbg(1, inst->ctx, "resChg: (%d %d) : old(%d, %d) -> new(%d, %d)",
 467				  inst->resolution_changed,
 468				  inst->realloc_mv_buf,
 469				  ctx->last_decoded_picinfo.pic_w,
 470				  ctx->last_decoded_picinfo.pic_h,
 471				  ctx->picinfo.pic_w, ctx->picinfo.pic_h);
 472	}
 473}
 474
 475static void vdec_h264_slice_get_crop_info(struct vdec_h264_slice_inst *inst,
 476					  struct v4l2_rect *cr)
 477{
 478	cr->left = 0;
 479	cr->top = 0;
 480	cr->width = inst->ctx->picinfo.pic_w;
 481	cr->height = inst->ctx->picinfo.pic_h;
 482
 483	mtk_vdec_debug(inst->ctx, "l=%d, t=%d, w=%d, h=%d",
 484		       cr->left, cr->top, cr->width, cr->height);
 485}
 486
 487static void vdec_h264_slice_setup_lat_buffer_ext(struct vdec_h264_slice_inst *inst,
 488						 struct mtk_vcodec_mem *bs,
 489						 struct vdec_lat_buf *lat_buf)
 490{
 491	struct mtk_vcodec_mem *mem;
 492	int i;
 493
 494	inst->vsi_ext->bs.dma_addr = (u64)bs->dma_addr;
 495	inst->vsi_ext->bs.size = bs->size;
 496
 497	for (i = 0; i < H264_MAX_MV_NUM; i++) {
 498		mem = &inst->mv_buf[i];
 499		inst->vsi_ext->mv_buf_dma[i].dma_addr = mem->dma_addr;
 500		inst->vsi_ext->mv_buf_dma[i].size = mem->size;
 501	}
 502	inst->vsi_ext->ube.dma_addr = lat_buf->ctx->msg_queue.wdma_addr.dma_addr;
 503	inst->vsi_ext->ube.size = lat_buf->ctx->msg_queue.wdma_addr.size;
 504
 505	inst->vsi_ext->row_info.dma_addr = 0;
 506	inst->vsi_ext->row_info.size = 0;
 507
 508	inst->vsi_ext->err_map.dma_addr = lat_buf->wdma_err_addr.dma_addr;
 509	inst->vsi_ext->err_map.size = lat_buf->wdma_err_addr.size;
 510
 511	inst->vsi_ext->slice_bc.dma_addr = lat_buf->slice_bc_addr.dma_addr;
 512	inst->vsi_ext->slice_bc.size = lat_buf->slice_bc_addr.size;
 513
 514	inst->vsi_ext->trans.dma_addr_end = inst->ctx->msg_queue.wdma_rptr_addr;
 515	inst->vsi_ext->trans.dma_addr = inst->ctx->msg_queue.wdma_wptr_addr;
 516}
 517
 518static int vdec_h264_slice_setup_core_buffer_ext(struct vdec_h264_slice_inst *inst,
 519						 struct vdec_h264_slice_share_info *share_info,
 520						 struct vdec_lat_buf *lat_buf)
 521{
 522	struct mtk_vcodec_mem *mem;
 523	struct mtk_vcodec_dec_ctx *ctx = inst->ctx;
 524	struct vb2_v4l2_buffer *vb2_v4l2;
 525	struct vdec_fb *fb;
 526	u64 y_fb_dma, c_fb_dma = 0;
 527	int i;
 528
 529	fb = ctx->dev->vdec_pdata->get_cap_buffer(ctx);
 530	if (!fb) {
 531		mtk_vdec_err(ctx, "Unable to get a CAPTURE buffer for CAPTURE queue is empty.");
 532		return -EBUSY;
 533	}
 534
 535	y_fb_dma = (u64)fb->base_y.dma_addr;
 536	if (ctx->q_data[MTK_Q_DATA_DST].fmt->num_planes == 1)
 537		c_fb_dma = y_fb_dma + ctx->picinfo.fb_sz[0];
 538	else
 539		c_fb_dma = (u64)fb->base_c.dma_addr;
 540
 541	mtk_vdec_debug(ctx, "[h264-core] y/c addr = 0x%llx 0x%llx", y_fb_dma, c_fb_dma);
 542
 543	inst->vsi_core_ext->fb.y.dma_addr = y_fb_dma;
 544	inst->vsi_core_ext->fb.y.size = ctx->picinfo.fb_sz[0];
 545	inst->vsi_core_ext->fb.c.dma_addr = c_fb_dma;
 546	inst->vsi_core_ext->fb.c.size = ctx->picinfo.fb_sz[1];
 547
 548	inst->vsi_core_ext->dec.vdec_fb_va = (unsigned long)fb;
 549	inst->vsi_core_ext->dec.nal_info = share_info->nal_info;
 550
 551	inst->vsi_core_ext->ube.dma_addr = lat_buf->ctx->msg_queue.wdma_addr.dma_addr;
 552	inst->vsi_core_ext->ube.size = lat_buf->ctx->msg_queue.wdma_addr.size;
 553
 554	inst->vsi_core_ext->err_map.dma_addr = lat_buf->wdma_err_addr.dma_addr;
 555	inst->vsi_core_ext->err_map.size = lat_buf->wdma_err_addr.size;
 556
 557	inst->vsi_core_ext->slice_bc.dma_addr = lat_buf->slice_bc_addr.dma_addr;
 558	inst->vsi_core_ext->slice_bc.size = lat_buf->slice_bc_addr.size;
 559
 560	inst->vsi_core_ext->row_info.dma_addr = 0;
 561	inst->vsi_core_ext->row_info.size = 0;
 562
 563	inst->vsi_core_ext->trans.dma_addr = share_info->trans_start;
 564	inst->vsi_core_ext->trans.dma_addr_end = share_info->trans_end;
 565
 566	for (i = 0; i < H264_MAX_MV_NUM; i++) {
 567		mem = &inst->mv_buf[i];
 568		inst->vsi_core_ext->mv_buf_dma[i].dma_addr = mem->dma_addr;
 569		inst->vsi_core_ext->mv_buf_dma[i].size = mem->size;
 570	}
 571
 572	vb2_v4l2 = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
 573	v4l2_m2m_buf_copy_metadata(&lat_buf->ts_info, vb2_v4l2);
 574
 575	return 0;
 576}
 577
 578static int vdec_h264_slice_core_decode_ext(struct vdec_lat_buf *lat_buf)
 579{
 580	int err, timeout;
 581	struct mtk_vcodec_dec_ctx *ctx = lat_buf->ctx;
 582	struct vdec_h264_slice_inst *inst = ctx->drv_handle;
 583	struct vdec_h264_slice_share_info *share_info = lat_buf->private_data;
 584	struct vdec_vpu_inst *vpu = &inst->vpu;
 585
 586	memcpy(&inst->vsi_core_ext->h264_slice_params, &share_info->h264_slice_params,
 587	       sizeof(share_info->h264_slice_params));
 588
 589	err = vdec_h264_slice_setup_core_buffer_ext(inst, share_info, lat_buf);
 590	if (err)
 591		goto vdec_dec_end;
 592
 593	vdec_h264_slice_fill_decode_reflist(inst, &inst->vsi_core_ext->h264_slice_params,
 594					    share_info);
 595	err = vpu_dec_core(vpu);
 596	if (err) {
 597		mtk_vdec_err(ctx, "core decode err=%d", err);
 598		goto vdec_dec_end;
 599	}
 600
 601	/* wait decoder done interrupt */
 602	timeout = mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED,
 603					       WAIT_INTR_TIMEOUT_MS, MTK_VDEC_CORE);
 604	if (timeout)
 605		mtk_vdec_err(ctx, "core decode timeout: pic_%d", ctx->decoded_frame_cnt);
 606	inst->vsi_core_ext->dec.timeout = !!timeout;
 607
 608	vpu_dec_core_end(vpu);
 609
 610	/* crc is hardware checksum, can be used to check whether the decoder result is right.*/
 611	mtk_vdec_debug(ctx, "pic[%d] crc: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x",
 612		       ctx->decoded_frame_cnt,
 613		       inst->vsi_core_ext->dec.crc[0], inst->vsi_core_ext->dec.crc[1],
 614		       inst->vsi_core_ext->dec.crc[2], inst->vsi_core_ext->dec.crc[3],
 615		       inst->vsi_core_ext->dec.crc[4], inst->vsi_core_ext->dec.crc[5],
 616		       inst->vsi_core_ext->dec.crc[6], inst->vsi_core_ext->dec.crc[7]);
 617
 618vdec_dec_end:
 619	vdec_msg_queue_update_ube_rptr(&lat_buf->ctx->msg_queue, share_info->trans_end);
 620	ctx->dev->vdec_pdata->cap_to_disp(ctx, !!err, lat_buf->src_buf_req);
 621	mtk_vdec_debug(ctx, "core decode done err=%d", err);
 622	ctx->decoded_frame_cnt++;
 623	return 0;
 624}
 625
 626static int vdec_h264_slice_core_decode(struct vdec_lat_buf *lat_buf)
 627{
 628	struct vdec_fb *fb;
 629	u64 y_fb_dma, c_fb_dma;
 630	int err, timeout, i;
 631	struct mtk_vcodec_dec_ctx *ctx = lat_buf->ctx;
 632	struct vdec_h264_slice_inst *inst = ctx->drv_handle;
 633	struct vb2_v4l2_buffer *vb2_v4l2;
 634	struct vdec_h264_slice_share_info *share_info = lat_buf->private_data;
 635	struct mtk_vcodec_mem *mem;
 636	struct vdec_vpu_inst *vpu = &inst->vpu;
 637
 638	memcpy(&inst->vsi_core->h264_slice_params, &share_info->h264_slice_params,
 639	       sizeof(share_info->h264_slice_params));
 640
 641	fb = ctx->dev->vdec_pdata->get_cap_buffer(ctx);
 642	if (!fb) {
 643		err = -EBUSY;
 644		mtk_vdec_err(ctx, "Unable to get a CAPTURE buffer for CAPTURE queue is empty.");
 645		goto vdec_dec_end;
 646	}
 647
 648	y_fb_dma = (u64)fb->base_y.dma_addr;
 649	if (ctx->q_data[MTK_Q_DATA_DST].fmt->num_planes == 1)
 650		c_fb_dma = y_fb_dma + ctx->picinfo.fb_sz[0];
 651	else
 652		c_fb_dma = (u64)fb->base_c.dma_addr;
 653
 654	mtk_vdec_debug(ctx, "[h264-core] y/c addr = 0x%llx 0x%llx", y_fb_dma, c_fb_dma);
 655
 656	inst->vsi_core->dec.y_fb_dma = y_fb_dma;
 657	inst->vsi_core->dec.c_fb_dma = c_fb_dma;
 658	inst->vsi_core->dec.vdec_fb_va = (unsigned long)fb;
 659	inst->vsi_core->dec.nal_info = share_info->nal_info;
 660	inst->vsi_core->wdma_start_addr =
 661		lat_buf->ctx->msg_queue.wdma_addr.dma_addr;
 662	inst->vsi_core->wdma_end_addr =
 663		lat_buf->ctx->msg_queue.wdma_addr.dma_addr +
 664		lat_buf->ctx->msg_queue.wdma_addr.size;
 665	inst->vsi_core->wdma_err_addr = lat_buf->wdma_err_addr.dma_addr;
 666	inst->vsi_core->slice_bc_start_addr = lat_buf->slice_bc_addr.dma_addr;
 667	inst->vsi_core->slice_bc_end_addr = lat_buf->slice_bc_addr.dma_addr +
 668		lat_buf->slice_bc_addr.size;
 669	inst->vsi_core->trans_start = share_info->trans_start;
 670	inst->vsi_core->trans_end = share_info->trans_end;
 671	for (i = 0; i < H264_MAX_MV_NUM; i++) {
 672		mem = &inst->mv_buf[i];
 673		inst->vsi_core->mv_buf_dma[i] = mem->dma_addr;
 674	}
 675
 676	vb2_v4l2 = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
 677	v4l2_m2m_buf_copy_metadata(&lat_buf->ts_info, vb2_v4l2);
 678
 679	vdec_h264_slice_fill_decode_reflist(inst, &inst->vsi_core->h264_slice_params,
 680					    share_info);
 681
 682	err = vpu_dec_core(vpu);
 683	if (err) {
 684		mtk_vdec_err(ctx, "core decode err=%d", err);
 685		goto vdec_dec_end;
 686	}
 687
 688	/* wait decoder done interrupt */
 689	timeout = mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED,
 690					       WAIT_INTR_TIMEOUT_MS, MTK_VDEC_CORE);
 691	if (timeout)
 692		mtk_vdec_err(ctx, "core decode timeout: pic_%d", ctx->decoded_frame_cnt);
 693	inst->vsi_core->dec.timeout = !!timeout;
 694
 695	vpu_dec_core_end(vpu);
 696
 697	/* crc is hardware checksum, can be used to check whether the decoder result is right.*/
 698	mtk_vdec_debug(ctx, "pic[%d] crc: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x",
 699		       ctx->decoded_frame_cnt,
 700		       inst->vsi_core->dec.crc[0], inst->vsi_core->dec.crc[1],
 701		       inst->vsi_core->dec.crc[2], inst->vsi_core->dec.crc[3],
 702		       inst->vsi_core->dec.crc[4], inst->vsi_core->dec.crc[5],
 703		       inst->vsi_core->dec.crc[6], inst->vsi_core->dec.crc[7]);
 704
 705vdec_dec_end:
 706	vdec_msg_queue_update_ube_rptr(&lat_buf->ctx->msg_queue, share_info->trans_end);
 707	ctx->dev->vdec_pdata->cap_to_disp(ctx, !!err, lat_buf->src_buf_req);
 708	mtk_vdec_debug(ctx, "core decode done err=%d", err);
 709	ctx->decoded_frame_cnt++;
 710
 711	return 0;
 712}
 713
 714static void vdec_h264_insert_startcode(struct mtk_vcodec_dec_dev *vcodec_dev, unsigned char *buf,
 715				       size_t *bs_size, struct mtk_h264_pps_param *pps)
 716{
 717	struct device *dev = &vcodec_dev->plat_dev->dev;
 718
 719	/* Need to add pending data at the end of bitstream when bs_sz is small than
 720	 * 20 bytes for cavlc bitstream, or lat will decode fail. This pending data is
 721	 * useful for mt8192 and mt8195 platform.
 722	 *
 723	 * cavlc bitstream when entropy_coding_mode_flag is false.
 724	 */
 725	if (pps->entropy_coding_mode_flag || *bs_size > 20 ||
 726	    !(of_device_is_compatible(dev->of_node, "mediatek,mt8192-vcodec-dec") ||
 727	    of_device_is_compatible(dev->of_node, "mediatek,mt8195-vcodec-dec")))
 728		return;
 729
 730	buf[*bs_size] = 0;
 731	buf[*bs_size + 1] = 0;
 732	buf[*bs_size + 2] = 1;
 733	buf[*bs_size + 3] = 0xff;
 734	(*bs_size) += 4;
 735}
 736
 737static int vdec_h264_slice_lat_decode_ext(void *h_vdec, struct mtk_vcodec_mem *bs,
 738					  struct vdec_fb *fb, bool *res_chg)
 739{
 740	struct vdec_h264_slice_inst *inst = h_vdec;
 741	struct vdec_vpu_inst *vpu = &inst->vpu;
 742	struct mtk_video_dec_buf *src_buf_info;
 743	int err, timeout = 0;
 744	unsigned int data[2];
 745	struct vdec_lat_buf *lat_buf;
 746	struct vdec_h264_slice_share_info *share_info;
 747
 748	if (vdec_msg_queue_init(&inst->ctx->msg_queue, inst->ctx,
 749				vdec_h264_slice_core_decode_ext,
 750				sizeof(*share_info)))
 751		return -ENOMEM;
 752
 753	/* bs NULL means flush decoder */
 754	if (!bs) {
 755		vdec_msg_queue_wait_lat_buf_full(&inst->ctx->msg_queue);
 756		return vpu_dec_reset(vpu);
 757	}
 758
 759	if (inst->is_field_bitstream)
 760		return -EINVAL;
 761
 762	lat_buf = vdec_msg_queue_dqbuf(&inst->ctx->msg_queue.lat_ctx);
 763	if (!lat_buf) {
 764		mtk_vdec_debug(inst->ctx, "failed to get lat buffer");
 765		return -EAGAIN;
 766	}
 767	share_info = lat_buf->private_data;
 768	src_buf_info = container_of(bs, struct mtk_video_dec_buf, bs_buffer);
 769
 770	lat_buf->src_buf_req = src_buf_info->m2m_buf.vb.vb2_buf.req_obj.req;
 771	v4l2_m2m_buf_copy_metadata(&src_buf_info->m2m_buf.vb,
 772				   &lat_buf->ts_info);
 773
 774	err = vdec_h264_slice_fill_decode_parameters(inst, share_info,
 775						     &inst->vsi_ext->h264_slice_params);
 776	if (err)
 777		goto err_free_fb_out;
 778
 779	vdec_h264_insert_startcode(inst->ctx->dev, bs->va, &bs->size,
 780				   &share_info->h264_slice_params.pps);
 781
 782	*res_chg = inst->resolution_changed;
 783	if (inst->resolution_changed) {
 784		mtk_vdec_debug(inst->ctx, "- resolution changed -");
 785		if (inst->realloc_mv_buf) {
 786			err = vdec_h264_slice_alloc_mv_buf(inst, &inst->ctx->picinfo);
 787			inst->realloc_mv_buf = false;
 788			if (err)
 789				goto err_free_fb_out;
 790		}
 791		inst->resolution_changed = false;
 792	}
 793
 794	vdec_h264_slice_setup_lat_buffer_ext(inst, bs, lat_buf);
 795	mtk_vdec_debug(inst->ctx, "lat:trans(0x%llx 0x%lx) err:0x%llx",
 796		       inst->vsi_ext->ube.dma_addr, (unsigned long)inst->vsi_ext->ube.size,
 797		       inst->vsi_ext->err_map.dma_addr);
 798
 799	mtk_vdec_debug(inst->ctx, "slice(0x%llx 0x%lx) rprt((0x%llx 0x%llx))",
 800		       inst->vsi_ext->slice_bc.dma_addr,
 801		       (unsigned long)inst->vsi_ext->slice_bc.size,
 802		       inst->vsi_ext->trans.dma_addr, inst->vsi_ext->trans.dma_addr_end);
 803
 804	err = vpu_dec_start(vpu, data, 2);
 805	if (err) {
 806		mtk_vdec_debug(inst->ctx, "lat decode err: %d", err);
 807		goto err_free_fb_out;
 808	}
 809
 810	share_info->trans_end = inst->ctx->msg_queue.wdma_addr.dma_addr +
 811		inst->vsi_ext->dec.wdma_end_addr_offset;
 812
 813	share_info->trans_start = inst->ctx->msg_queue.wdma_wptr_addr;
 814	share_info->nal_info = inst->vsi_ext->dec.nal_info;
 815
 816	if (IS_VDEC_INNER_RACING(inst->ctx->dev->dec_capability)) {
 817		memcpy(&share_info->h264_slice_params, &inst->vsi_ext->h264_slice_params,
 818		       sizeof(share_info->h264_slice_params));
 819		vdec_msg_queue_qbuf(&inst->ctx->msg_queue.core_ctx, lat_buf);
 820	}
 821
 822	/* wait decoder done interrupt */
 823	timeout = mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED,
 824					       WAIT_INTR_TIMEOUT_MS, MTK_VDEC_LAT0);
 825	if (timeout)
 826		mtk_vdec_err(inst->ctx, "lat decode timeout: pic_%d", inst->slice_dec_num);
 827	inst->vsi_ext->dec.timeout = !!timeout;
 828
 829	err = vpu_dec_end(vpu);
 830	if (err == SLICE_HEADER_FULL || err == TRANS_BUFFER_FULL) {
 831		if (!IS_VDEC_INNER_RACING(inst->ctx->dev->dec_capability))
 832			vdec_msg_queue_qbuf(&inst->ctx->msg_queue.lat_ctx, lat_buf);
 833		inst->slice_dec_num++;
 834		mtk_vdec_err(inst->ctx, "lat dec fail: pic_%d err:%d", inst->slice_dec_num, err);
 835		return -EINVAL;
 836	}
 837
 838	share_info->trans_end = inst->ctx->msg_queue.wdma_addr.dma_addr +
 839		inst->vsi_ext->dec.wdma_end_addr_offset;
 840
 841	vdec_msg_queue_update_ube_wptr(&lat_buf->ctx->msg_queue, share_info->trans_end);
 842
 843	if (!IS_VDEC_INNER_RACING(inst->ctx->dev->dec_capability)) {
 844		memcpy(&share_info->h264_slice_params, &inst->vsi_ext->h264_slice_params,
 845		       sizeof(share_info->h264_slice_params));
 846		vdec_msg_queue_qbuf(&inst->ctx->msg_queue.core_ctx, lat_buf);
 847	}
 848	mtk_vdec_debug(inst->ctx, "dec num: %d lat crc: 0x%x 0x%x 0x%x", inst->slice_dec_num,
 849		       inst->vsi_ext->dec.crc[0], inst->vsi_ext->dec.crc[1],
 850		       inst->vsi_ext->dec.crc[2]);
 851
 852	inst->slice_dec_num++;
 853	return 0;
 854err_free_fb_out:
 855	vdec_msg_queue_qbuf(&inst->ctx->msg_queue.lat_ctx, lat_buf);
 856	mtk_vdec_err(inst->ctx, "slice dec number: %d err: %d", inst->slice_dec_num, err);
 857	return err;
 858}
 859
 860static int vdec_h264_slice_lat_decode(void *h_vdec, struct mtk_vcodec_mem *bs,
 861				      struct vdec_fb *fb, bool *res_chg)
 862{
 863	struct vdec_h264_slice_inst *inst = h_vdec;
 864	struct vdec_vpu_inst *vpu = &inst->vpu;
 865	struct mtk_video_dec_buf *src_buf_info;
 866	int nal_start_idx, err, timeout = 0, i;
 867	unsigned int data[2];
 868	struct vdec_lat_buf *lat_buf;
 869	struct vdec_h264_slice_share_info *share_info;
 870	unsigned char *buf;
 871	struct mtk_vcodec_mem *mem;
 872
 873	if (vdec_msg_queue_init(&inst->ctx->msg_queue, inst->ctx,
 874				vdec_h264_slice_core_decode,
 875				sizeof(*share_info)))
 876		return -ENOMEM;
 877
 878	/* bs NULL means flush decoder */
 879	if (!bs) {
 880		vdec_msg_queue_wait_lat_buf_full(&inst->ctx->msg_queue);
 881		return vpu_dec_reset(vpu);
 882	}
 883
 884	if (inst->is_field_bitstream)
 885		return -EINVAL;
 886
 887	lat_buf = vdec_msg_queue_dqbuf(&inst->ctx->msg_queue.lat_ctx);
 888	if (!lat_buf) {
 889		mtk_vdec_debug(inst->ctx, "failed to get lat buffer");
 890		return -EAGAIN;
 891	}
 892	share_info = lat_buf->private_data;
 893	src_buf_info = container_of(bs, struct mtk_video_dec_buf, bs_buffer);
 894
 895	buf = (unsigned char *)bs->va;
 896	nal_start_idx = mtk_vdec_h264_find_start_code(buf, bs->size);
 897	if (nal_start_idx < 0) {
 898		err = -EINVAL;
 899		goto err_free_fb_out;
 900	}
 901
 902	inst->vsi->dec.nal_info = buf[nal_start_idx];
 903	lat_buf->src_buf_req = src_buf_info->m2m_buf.vb.vb2_buf.req_obj.req;
 904	v4l2_m2m_buf_copy_metadata(&src_buf_info->m2m_buf.vb,
 905				   &lat_buf->ts_info);
 906
 907	err = vdec_h264_slice_fill_decode_parameters(inst, share_info,
 908						     &inst->vsi->h264_slice_params);
 909	if (err)
 910		goto err_free_fb_out;
 911
 912	vdec_h264_insert_startcode(inst->ctx->dev, buf, &bs->size,
 913				   &share_info->h264_slice_params.pps);
 914
 915	inst->vsi->dec.bs_buf_addr = (uint64_t)bs->dma_addr;
 916	inst->vsi->dec.bs_buf_size = bs->size;
 917
 918	*res_chg = inst->resolution_changed;
 919	if (inst->resolution_changed) {
 920		mtk_vdec_debug(inst->ctx, "- resolution changed -");
 921		if (inst->realloc_mv_buf) {
 922			err = vdec_h264_slice_alloc_mv_buf(inst, &inst->ctx->picinfo);
 923			inst->realloc_mv_buf = false;
 924			if (err)
 925				goto err_free_fb_out;
 926		}
 927		inst->resolution_changed = false;
 928	}
 929	for (i = 0; i < H264_MAX_MV_NUM; i++) {
 930		mem = &inst->mv_buf[i];
 931		inst->vsi->mv_buf_dma[i] = mem->dma_addr;
 932	}
 933	inst->vsi->wdma_start_addr = lat_buf->ctx->msg_queue.wdma_addr.dma_addr;
 934	inst->vsi->wdma_end_addr = lat_buf->ctx->msg_queue.wdma_addr.dma_addr +
 935		lat_buf->ctx->msg_queue.wdma_addr.size;
 936	inst->vsi->wdma_err_addr = lat_buf->wdma_err_addr.dma_addr;
 937	inst->vsi->slice_bc_start_addr = lat_buf->slice_bc_addr.dma_addr;
 938	inst->vsi->slice_bc_end_addr = lat_buf->slice_bc_addr.dma_addr +
 939		lat_buf->slice_bc_addr.size;
 940
 941	inst->vsi->trans_end = inst->ctx->msg_queue.wdma_rptr_addr;
 942	inst->vsi->trans_start = inst->ctx->msg_queue.wdma_wptr_addr;
 943	mtk_vdec_debug(inst->ctx, "lat:trans(0x%llx 0x%llx) err:0x%llx",
 944		       inst->vsi->wdma_start_addr,
 945		       inst->vsi->wdma_end_addr,
 946		       inst->vsi->wdma_err_addr);
 947
 948	mtk_vdec_debug(inst->ctx, "slice(0x%llx 0x%llx) rprt((0x%llx 0x%llx))",
 949		       inst->vsi->slice_bc_start_addr,
 950		       inst->vsi->slice_bc_end_addr,
 951		       inst->vsi->trans_start,
 952		       inst->vsi->trans_end);
 953	err = vpu_dec_start(vpu, data, 2);
 954	if (err) {
 955		mtk_vdec_debug(inst->ctx, "lat decode err: %d", err);
 956		goto err_free_fb_out;
 957	}
 958
 959	share_info->trans_end = inst->ctx->msg_queue.wdma_addr.dma_addr +
 960		inst->vsi->wdma_end_addr_offset;
 961	share_info->trans_start = inst->ctx->msg_queue.wdma_wptr_addr;
 962	share_info->nal_info = inst->vsi->dec.nal_info;
 963
 964	if (IS_VDEC_INNER_RACING(inst->ctx->dev->dec_capability)) {
 965		memcpy(&share_info->h264_slice_params, &inst->vsi->h264_slice_params,
 966		       sizeof(share_info->h264_slice_params));
 967		vdec_msg_queue_qbuf(&inst->ctx->msg_queue.core_ctx, lat_buf);
 968	}
 969
 970	/* wait decoder done interrupt */
 971	timeout = mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED,
 972					       WAIT_INTR_TIMEOUT_MS, MTK_VDEC_LAT0);
 973	if (timeout)
 974		mtk_vdec_err(inst->ctx, "lat decode timeout: pic_%d", inst->slice_dec_num);
 975	inst->vsi->dec.timeout = !!timeout;
 976
 977	err = vpu_dec_end(vpu);
 978	if (err == SLICE_HEADER_FULL || err == TRANS_BUFFER_FULL) {
 979		if (!IS_VDEC_INNER_RACING(inst->ctx->dev->dec_capability))
 980			vdec_msg_queue_qbuf(&inst->ctx->msg_queue.lat_ctx, lat_buf);
 981		inst->slice_dec_num++;
 982		mtk_vdec_err(inst->ctx, "lat dec fail: pic_%d err:%d", inst->slice_dec_num, err);
 983		return -EINVAL;
 984	}
 985
 986	share_info->trans_end = inst->ctx->msg_queue.wdma_addr.dma_addr +
 987		inst->vsi->wdma_end_addr_offset;
 988	vdec_msg_queue_update_ube_wptr(&lat_buf->ctx->msg_queue, share_info->trans_end);
 989
 990	if (!IS_VDEC_INNER_RACING(inst->ctx->dev->dec_capability)) {
 991		memcpy(&share_info->h264_slice_params, &inst->vsi->h264_slice_params,
 992		       sizeof(share_info->h264_slice_params));
 993		vdec_msg_queue_qbuf(&inst->ctx->msg_queue.core_ctx, lat_buf);
 994	}
 995	mtk_vdec_debug(inst->ctx, "dec num: %d lat crc: 0x%x 0x%x 0x%x", inst->slice_dec_num,
 996		       inst->vsi->dec.crc[0], inst->vsi->dec.crc[1], inst->vsi->dec.crc[2]);
 997
 998	inst->slice_dec_num++;
 999	return 0;
1000err_free_fb_out:
1001	vdec_msg_queue_qbuf(&inst->ctx->msg_queue.lat_ctx, lat_buf);
1002	mtk_vdec_err(inst->ctx, "slice dec number: %d err: %d", inst->slice_dec_num, err);
1003	return err;
1004}
1005
1006static int vdec_h264_slice_single_decode_ext(void *h_vdec, struct mtk_vcodec_mem *bs,
1007					     struct vdec_fb *unused, bool *res_chg)
1008{
1009	struct vdec_h264_slice_inst *inst = h_vdec;
1010	struct vdec_vpu_inst *vpu = &inst->vpu;
1011	struct mtk_video_dec_buf *src_buf_info, *dst_buf_info;
1012	struct vdec_fb *fb;
1013	unsigned int data[2], i;
1014	u64 y_fb_dma, c_fb_dma;
1015	struct mtk_vcodec_mem *mem;
1016	int err;
1017
1018	/* bs NULL means flush decoder */
1019	if (!bs)
1020		return vpu_dec_reset(vpu);
1021
1022	fb = inst->ctx->dev->vdec_pdata->get_cap_buffer(inst->ctx);
1023	if (!fb) {
1024		mtk_vdec_err(inst->ctx,
1025			     "Unable to get a CAPTURE buffer for CAPTURE queue is empty.");
1026		return -ENOMEM;
1027	}
1028
1029	src_buf_info = container_of(bs, struct mtk_video_dec_buf, bs_buffer);
1030	dst_buf_info = container_of(fb, struct mtk_video_dec_buf, frame_buffer);
1031
1032	y_fb_dma = fb->base_y.dma_addr;
1033	c_fb_dma = fb->base_c.dma_addr;
1034	mtk_vdec_debug(inst->ctx, "[h264-dec] [%d] y_dma=%llx c_dma=%llx",
1035		       inst->ctx->decoded_frame_cnt, y_fb_dma, c_fb_dma);
1036
1037	inst->vsi_ctx_ext.bs.dma_addr = (u64)bs->dma_addr;
1038	inst->vsi_ctx_ext.bs.size = bs->size;
1039	inst->vsi_ctx_ext.fb.y.dma_addr = y_fb_dma;
1040	inst->vsi_ctx_ext.fb.c.dma_addr = c_fb_dma;
1041	inst->vsi_ctx_ext.dec.vdec_fb_va = (u64)(uintptr_t)fb;
1042
1043	v4l2_m2m_buf_copy_metadata(&src_buf_info->m2m_buf.vb,
1044				   &dst_buf_info->m2m_buf.vb);
1045	err = get_vdec_sig_decode_parameters(inst);
1046	if (err)
1047		goto err_free_fb_out;
1048
1049	memcpy(&inst->vsi_ctx_ext.h264_slice_params, &inst->h264_slice_param,
1050	       sizeof(inst->vsi_ctx_ext.h264_slice_params));
1051
1052	*res_chg = inst->resolution_changed;
1053	if (inst->resolution_changed) {
1054		mtk_vdec_debug(inst->ctx, "- resolution changed -");
1055		if (inst->realloc_mv_buf) {
1056			err = vdec_h264_slice_alloc_mv_buf(inst, &inst->ctx->picinfo);
1057			inst->realloc_mv_buf = false;
1058			if (err)
1059				goto err_free_fb_out;
1060		}
1061		inst->resolution_changed = false;
1062
1063		for (i = 0; i < H264_MAX_MV_NUM; i++) {
1064			mem = &inst->mv_buf[i];
1065			inst->vsi_ctx_ext.mv_buf_dma[i].dma_addr = mem->dma_addr;
1066		}
1067	}
1068
1069	memcpy(inst->vpu.vsi, &inst->vsi_ctx_ext, sizeof(inst->vsi_ctx_ext));
1070	err = vpu_dec_start(vpu, data, 2);
1071	if (err)
1072		goto err_free_fb_out;
1073
1074	/* wait decoder done interrupt */
1075	err = mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED,
1076					   WAIT_INTR_TIMEOUT_MS, MTK_VDEC_CORE);
1077	if (err)
1078		mtk_vdec_err(inst->ctx, "decode timeout: pic_%d", inst->ctx->decoded_frame_cnt);
1079
1080	inst->vsi_ext->dec.timeout = !!err;
1081	err = vpu_dec_end(vpu);
1082	if (err)
1083		goto err_free_fb_out;
1084
1085	memcpy(&inst->vsi_ctx_ext, inst->vpu.vsi, sizeof(inst->vsi_ctx_ext));
1086	mtk_vdec_debug(inst->ctx, "pic[%d] crc: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x",
1087		       inst->ctx->decoded_frame_cnt,
1088		       inst->vsi_ctx_ext.dec.crc[0], inst->vsi_ctx_ext.dec.crc[1],
1089		       inst->vsi_ctx_ext.dec.crc[2], inst->vsi_ctx_ext.dec.crc[3],
1090		       inst->vsi_ctx_ext.dec.crc[4], inst->vsi_ctx_ext.dec.crc[5],
1091		       inst->vsi_ctx_ext.dec.crc[6], inst->vsi_ctx_ext.dec.crc[7]);
1092
1093	inst->ctx->decoded_frame_cnt++;
1094	return 0;
1095
1096err_free_fb_out:
1097	mtk_vdec_err(inst->ctx, "dec frame number: %d err: %d", inst->ctx->decoded_frame_cnt, err);
1098	return err;
1099}
1100
1101static int vdec_h264_slice_single_decode(void *h_vdec, struct mtk_vcodec_mem *bs,
1102					 struct vdec_fb *unused, bool *res_chg)
1103{
1104	struct vdec_h264_slice_inst *inst = h_vdec;
1105	struct vdec_vpu_inst *vpu = &inst->vpu;
1106	struct mtk_video_dec_buf *src_buf_info, *dst_buf_info;
1107	struct vdec_fb *fb;
1108	unsigned char *buf;
1109	unsigned int data[2], i;
1110	u64 y_fb_dma, c_fb_dma;
1111	struct mtk_vcodec_mem *mem;
1112	int err, nal_start_idx;
1113
1114	/* bs NULL means flush decoder */
1115	if (!bs)
1116		return vpu_dec_reset(vpu);
1117
1118	fb = inst->ctx->dev->vdec_pdata->get_cap_buffer(inst->ctx);
1119	if (!fb) {
1120		mtk_vdec_err(inst->ctx,
1121			     "Unable to get a CAPTURE buffer for CAPTURE queue is empty.");
1122		return -ENOMEM;
1123	}
1124
1125	src_buf_info = container_of(bs, struct mtk_video_dec_buf, bs_buffer);
1126	dst_buf_info = container_of(fb, struct mtk_video_dec_buf, frame_buffer);
1127
1128	y_fb_dma = fb->base_y.dma_addr;
1129	c_fb_dma = fb->base_c.dma_addr;
1130	mtk_vdec_debug(inst->ctx, "[h264-dec] [%d] y_dma=%llx c_dma=%llx",
1131		       inst->ctx->decoded_frame_cnt, y_fb_dma, c_fb_dma);
1132
1133	inst->vsi_ctx.dec.bs_buf_addr = (u64)bs->dma_addr;
1134	inst->vsi_ctx.dec.bs_buf_size = bs->size;
1135	inst->vsi_ctx.dec.y_fb_dma = y_fb_dma;
1136	inst->vsi_ctx.dec.c_fb_dma = c_fb_dma;
1137	inst->vsi_ctx.dec.vdec_fb_va = (u64)(uintptr_t)fb;
1138
1139	v4l2_m2m_buf_copy_metadata(&src_buf_info->m2m_buf.vb,
1140				   &dst_buf_info->m2m_buf.vb);
1141	err = get_vdec_sig_decode_parameters(inst);
1142	if (err)
1143		goto err_free_fb_out;
1144
1145	memcpy(&inst->vsi_ctx.h264_slice_params, &inst->h264_slice_param,
1146	       sizeof(inst->vsi_ctx.h264_slice_params));
1147
1148	buf = (unsigned char *)bs->va;
1149	nal_start_idx = mtk_vdec_h264_find_start_code(buf, bs->size);
1150	if (nal_start_idx < 0) {
1151		err = -EINVAL;
1152		goto err_free_fb_out;
1153	}
1154	inst->vsi_ctx.dec.nal_info = buf[nal_start_idx];
1155
1156	*res_chg = inst->resolution_changed;
1157	if (inst->resolution_changed) {
1158		mtk_vdec_debug(inst->ctx, "- resolution changed -");
1159		if (inst->realloc_mv_buf) {
1160			err = vdec_h264_slice_alloc_mv_buf(inst, &inst->ctx->picinfo);
1161			inst->realloc_mv_buf = false;
1162			if (err)
1163				goto err_free_fb_out;
1164		}
1165		inst->resolution_changed = false;
1166
1167		for (i = 0; i < H264_MAX_MV_NUM; i++) {
1168			mem = &inst->mv_buf[i];
1169			inst->vsi_ctx.mv_buf_dma[i] = mem->dma_addr;
1170		}
1171	}
1172
1173	memcpy(inst->vpu.vsi, &inst->vsi_ctx, sizeof(inst->vsi_ctx));
1174	err = vpu_dec_start(vpu, data, 2);
1175	if (err)
1176		goto err_free_fb_out;
1177
1178	/* wait decoder done interrupt */
1179	err = mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED,
1180					   WAIT_INTR_TIMEOUT_MS, MTK_VDEC_CORE);
1181	if (err)
1182		mtk_vdec_err(inst->ctx, "decode timeout: pic_%d", inst->ctx->decoded_frame_cnt);
1183
1184	inst->vsi->dec.timeout = !!err;
1185	err = vpu_dec_end(vpu);
1186	if (err)
1187		goto err_free_fb_out;
1188
1189	memcpy(&inst->vsi_ctx, inst->vpu.vsi, sizeof(inst->vsi_ctx));
1190	mtk_vdec_debug(inst->ctx, "pic[%d] crc: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x",
1191		       inst->ctx->decoded_frame_cnt,
1192		       inst->vsi_ctx.dec.crc[0], inst->vsi_ctx.dec.crc[1],
1193		       inst->vsi_ctx.dec.crc[2], inst->vsi_ctx.dec.crc[3],
1194		       inst->vsi_ctx.dec.crc[4], inst->vsi_ctx.dec.crc[5],
1195		       inst->vsi_ctx.dec.crc[6], inst->vsi_ctx.dec.crc[7]);
1196
1197	inst->ctx->decoded_frame_cnt++;
1198	return 0;
1199
1200err_free_fb_out:
1201	mtk_vdec_err(inst->ctx, "dec frame number: %d err: %d", inst->ctx->decoded_frame_cnt, err);
1202	return err;
1203}
1204
1205static int vdec_h264_slice_init(struct mtk_vcodec_dec_ctx *ctx)
1206{
1207	struct vdec_h264_slice_inst *inst;
1208	int err, vsi_size;
1209	unsigned char *temp;
1210
1211	inst = kzalloc(sizeof(*inst), GFP_KERNEL);
1212	if (!inst)
1213		return -ENOMEM;
1214
1215	inst->ctx = ctx;
1216
1217	inst->vpu.id = SCP_IPI_VDEC_LAT;
1218	inst->vpu.core_id = SCP_IPI_VDEC_CORE;
1219	inst->vpu.ctx = ctx;
1220	inst->vpu.codec_type = ctx->current_codec;
1221	inst->vpu.capture_type = ctx->capture_fourcc;
1222
1223	err = vpu_dec_init(&inst->vpu);
1224	if (err) {
1225		mtk_vdec_err(ctx, "vdec_h264 init err=%d", err);
1226		goto error_free_inst;
1227	}
1228
1229	if (IS_VDEC_SUPPORT_EXT(ctx->dev->dec_capability)) {
1230		vsi_size = sizeof(struct vdec_h264_slice_vsi_ext);
1231
1232		vsi_size = round_up(vsi_size, VCODEC_DEC_ALIGNED_64);
1233		inst->vsi_ext = inst->vpu.vsi;
1234		temp = (unsigned char *)inst->vsi_ext;
1235		inst->vsi_core_ext = (struct vdec_h264_slice_vsi_ext *)(temp + vsi_size);
1236
1237		if (inst->ctx->dev->vdec_pdata->hw_arch == MTK_VDEC_PURE_SINGLE_CORE)
1238			inst->decode = vdec_h264_slice_single_decode_ext;
1239		else
1240			inst->decode = vdec_h264_slice_lat_decode_ext;
1241	} else {
1242		vsi_size = sizeof(struct vdec_h264_slice_vsi);
1243
1244		vsi_size = round_up(vsi_size, VCODEC_DEC_ALIGNED_64);
1245		inst->vsi = inst->vpu.vsi;
1246		temp = (unsigned char *)inst->vsi;
1247		inst->vsi_core = (struct vdec_h264_slice_vsi *)(temp + vsi_size);
1248
1249		if (inst->ctx->dev->vdec_pdata->hw_arch == MTK_VDEC_PURE_SINGLE_CORE)
1250			inst->decode = vdec_h264_slice_single_decode;
1251		else
1252			inst->decode = vdec_h264_slice_lat_decode;
1253	}
1254	inst->resolution_changed = true;
1255	inst->realloc_mv_buf = true;
1256
1257	mtk_vdec_debug(ctx, "lat struct size = %d,%d,%d,%d vsi: %d\n",
1258		       (int)sizeof(struct mtk_h264_sps_param),
1259		       (int)sizeof(struct mtk_h264_pps_param),
1260		       (int)sizeof(struct vdec_h264_slice_lat_dec_param),
1261		       (int)sizeof(struct mtk_h264_dpb_info),
1262		       vsi_size);
1263	mtk_vdec_debug(ctx, "lat H264 instance >> %p, codec_type = 0x%x",
1264		       inst, inst->vpu.codec_type);
1265
1266	ctx->drv_handle = inst;
1267	return 0;
1268
1269error_free_inst:
1270	kfree(inst);
1271	return err;
1272}
1273
1274static void vdec_h264_slice_deinit(void *h_vdec)
1275{
1276	struct vdec_h264_slice_inst *inst = h_vdec;
1277
1278	vpu_dec_deinit(&inst->vpu);
1279	vdec_h264_slice_free_mv_buf(inst);
1280	vdec_msg_queue_deinit(&inst->ctx->msg_queue, inst->ctx);
1281
1282	kfree(inst);
1283}
1284
1285static int vdec_h264_slice_decode(void *h_vdec, struct mtk_vcodec_mem *bs,
1286				  struct vdec_fb *unused, bool *res_chg)
1287{
1288	struct vdec_h264_slice_inst *inst = h_vdec;
1289
1290	if (!h_vdec)
1291		return -EINVAL;
1292
1293	return inst->decode(h_vdec, bs, unused, res_chg);
1294}
1295
1296static int vdec_h264_slice_get_param(void *h_vdec, enum vdec_get_param_type type,
1297				     void *out)
1298{
1299	struct vdec_h264_slice_inst *inst = h_vdec;
1300
1301	switch (type) {
1302	case GET_PARAM_PIC_INFO:
1303		vdec_h264_slice_get_pic_info(inst);
1304		break;
1305	case GET_PARAM_DPB_SIZE:
1306		*(unsigned int *)out = 6;
1307		break;
1308	case GET_PARAM_CROP_INFO:
1309		vdec_h264_slice_get_crop_info(inst, out);
1310		break;
1311	default:
1312		mtk_vdec_err(inst->ctx, "invalid get parameter type=%d", type);
1313		return -EINVAL;
1314	}
1315	return 0;
1316}
1317
1318const struct vdec_common_if vdec_h264_slice_multi_if = {
1319	.init		= vdec_h264_slice_init,
1320	.decode		= vdec_h264_slice_decode,
1321	.get_param	= vdec_h264_slice_get_param,
1322	.deinit		= vdec_h264_slice_deinit,
1323};
~/ Read-only file preview.