mtk_vcodec_util.c

  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3* Copyright (c) 2016 MediaTek Inc.
  4* Author: PC Chen <pc.chen@mediatek.com>
  5*	Tiffany Lin <tiffany.lin@mediatek.com>
  6*/
  7
  8#include <linux/module.h>
  9#include <linux/of.h>
 10#include <linux/regmap.h>
 11
 12#include "../decoder/mtk_vcodec_dec_drv.h"
 13#include "../encoder/mtk_vcodec_enc_drv.h"
 14#include "../decoder/mtk_vcodec_dec_hw.h"
 15
 16#if defined(CONFIG_DEBUG_FS)
 17int mtk_vcodec_dbg;
 18EXPORT_SYMBOL(mtk_vcodec_dbg);
 19
 20int mtk_v4l2_dbg_level;
 21EXPORT_SYMBOL(mtk_v4l2_dbg_level);
 22#endif
 23
 24void __iomem *mtk_vcodec_get_reg_addr(void __iomem **reg_base, unsigned int reg_idx)
 25{
 26	if (reg_idx >= NUM_MAX_VCODEC_REG_BASE) {
 27		pr_err(MTK_DBG_V4L2_STR "Invalid arguments, reg_idx=%d", reg_idx);
 28		return NULL;
 29	}
 30	return reg_base[reg_idx];
 31}
 32EXPORT_SYMBOL(mtk_vcodec_get_reg_addr);
 33
 34int mtk_vcodec_write_vdecsys(struct mtk_vcodec_dec_ctx *ctx, unsigned int reg,
 35			     unsigned int val)
 36{
 37	struct mtk_vcodec_dec_dev *dev = ctx->dev;
 38
 39	if (dev->vdecsys_regmap)
 40		return regmap_write(dev->vdecsys_regmap, reg, val);
 41
 42	writel(val, dev->reg_base[VDEC_SYS] + reg);
 43
 44	return 0;
 45}
 46EXPORT_SYMBOL(mtk_vcodec_write_vdecsys);
 47
 48int mtk_vcodec_mem_alloc(void *priv, struct mtk_vcodec_mem *mem)
 49{
 50	enum mtk_instance_type inst_type = *((unsigned int *)priv);
 51	struct platform_device *plat_dev;
 52	int id;
 53
 54	if (inst_type == MTK_INST_ENCODER) {
 55		struct mtk_vcodec_enc_ctx *enc_ctx = priv;
 56
 57		plat_dev = enc_ctx->dev->plat_dev;
 58		id = enc_ctx->id;
 59	} else {
 60		struct mtk_vcodec_dec_ctx *dec_ctx = priv;
 61
 62		plat_dev = dec_ctx->dev->plat_dev;
 63		id = dec_ctx->id;
 64	}
 65
 66        mem->va = dma_alloc_attrs(&plat_dev->dev, mem->size, &mem->dma_addr,
 67                                  GFP_KERNEL, DMA_ATTR_ALLOC_SINGLE_PAGES);
 68	if (!mem->va) {
 69		mtk_v4l2_err(plat_dev, "%s dma_alloc size=0x%zx failed!",
 70			     __func__, mem->size);
 71		return -ENOMEM;
 72	}
 73
 74	mtk_v4l2_debug(plat_dev, 3, "[%d] - va = %p dma = 0x%lx size = 0x%zx", id, mem->va,
 75		       (unsigned long)mem->dma_addr, mem->size);
 76
 77	return 0;
 78}
 79EXPORT_SYMBOL(mtk_vcodec_mem_alloc);
 80
 81void mtk_vcodec_mem_free(void *priv, struct mtk_vcodec_mem *mem)
 82{
 83	enum mtk_instance_type inst_type = *((unsigned int *)priv);
 84	struct platform_device *plat_dev;
 85	int id;
 86
 87	if (inst_type == MTK_INST_ENCODER) {
 88		struct mtk_vcodec_enc_ctx *enc_ctx = priv;
 89
 90		plat_dev = enc_ctx->dev->plat_dev;
 91		id = enc_ctx->id;
 92	} else {
 93		struct mtk_vcodec_dec_ctx *dec_ctx = priv;
 94
 95		plat_dev = dec_ctx->dev->plat_dev;
 96		id = dec_ctx->id;
 97	}
 98
 99	if (!mem->va) {
100		mtk_v4l2_err(plat_dev, "%s: Tried to free a NULL VA", __func__);
101		if (mem->size)
102			mtk_v4l2_err(plat_dev, "Failed to free %zu bytes", mem->size);
103		return;
104	}
105
106	mtk_v4l2_debug(plat_dev, 3, "[%d] - va = %p dma = 0x%lx size = 0x%zx", id, mem->va,
107		       (unsigned long)mem->dma_addr, mem->size);
108
109	dma_free_coherent(&plat_dev->dev, mem->size, mem->va, mem->dma_addr);
110	mem->va = NULL;
111	mem->dma_addr = 0;
112	mem->size = 0;
113}
114EXPORT_SYMBOL(mtk_vcodec_mem_free);
115
116void *mtk_vcodec_get_hw_dev(struct mtk_vcodec_dec_dev *dev, int hw_idx)
117{
118	if (hw_idx >= MTK_VDEC_HW_MAX || hw_idx < 0 || !dev->subdev_dev[hw_idx]) {
119		dev_err(&dev->plat_dev->dev, "hw idx is out of range:%d", hw_idx);
120		return NULL;
121	}
122
123	return dev->subdev_dev[hw_idx];
124}
125EXPORT_SYMBOL(mtk_vcodec_get_hw_dev);
126
127void mtk_vcodec_set_curr_ctx(struct mtk_vcodec_dec_dev *vdec_dev,
128			     struct mtk_vcodec_dec_ctx *ctx, int hw_idx)
129{
130	unsigned long flags;
131	struct mtk_vdec_hw_dev *subdev_dev;
132
133	spin_lock_irqsave(&vdec_dev->irqlock, flags);
134	if (vdec_dev->vdec_pdata->is_subdev_supported) {
135		subdev_dev = mtk_vcodec_get_hw_dev(vdec_dev, hw_idx);
136		if (!subdev_dev) {
137			dev_err(&vdec_dev->plat_dev->dev, "Failed to get hw dev");
138			spin_unlock_irqrestore(&vdec_dev->irqlock, flags);
139			return;
140		}
141		subdev_dev->curr_ctx = ctx;
142	} else {
143		vdec_dev->curr_ctx = ctx;
144	}
145	spin_unlock_irqrestore(&vdec_dev->irqlock, flags);
146}
147EXPORT_SYMBOL(mtk_vcodec_set_curr_ctx);
148
149struct mtk_vcodec_dec_ctx *mtk_vcodec_get_curr_ctx(struct mtk_vcodec_dec_dev *vdec_dev,
150						   unsigned int hw_idx)
151{
152	unsigned long flags;
153	struct mtk_vcodec_dec_ctx *ctx;
154	struct mtk_vdec_hw_dev *subdev_dev;
155
156	spin_lock_irqsave(&vdec_dev->irqlock, flags);
157	if (vdec_dev->vdec_pdata->is_subdev_supported) {
158		subdev_dev = mtk_vcodec_get_hw_dev(vdec_dev, hw_idx);
159		if (!subdev_dev) {
160			dev_err(&vdec_dev->plat_dev->dev, "Failed to get hw dev");
161			spin_unlock_irqrestore(&vdec_dev->irqlock, flags);
162			return NULL;
163		}
164		ctx = subdev_dev->curr_ctx;
165	} else {
166		ctx = vdec_dev->curr_ctx;
167	}
168	spin_unlock_irqrestore(&vdec_dev->irqlock, flags);
169	return ctx;
170}
171EXPORT_SYMBOL(mtk_vcodec_get_curr_ctx);
172
173MODULE_LICENSE("GPL v2");
174MODULE_DESCRIPTION("Mediatek video codec driver");