mmp-driver.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Support for the camera device found on Marvell MMP processors; known
  4 * to work with the Armada 610 as used in the OLPC 1.75 system.
  5 *
  6 * Copyright 2011 Jonathan Corbet <corbet@lwn.net>
  7 * Copyright 2018 Lubomir Rintel <lkundrak@v3.sk>
  8 */
  9
 10#include <linux/init.h>
 11#include <linux/kernel.h>
 12#include <linux/module.h>
 13#include <linux/interrupt.h>
 14#include <linux/spinlock.h>
 15#include <linux/slab.h>
 16#include <linux/videodev2.h>
 17#include <media/v4l2-device.h>
 18#include <linux/platform_data/media/mmp-camera.h>
 19#include <linux/device.h>
 20#include <linux/of.h>
 21#include <linux/of_platform.h>
 22#include <linux/platform_device.h>
 23#include <linux/pm_runtime.h>
 24#include <linux/io.h>
 25#include <linux/list.h>
 26#include <linux/pm.h>
 27#include <linux/clk.h>
 28
 29#include "mcam-core.h"
 30
 31MODULE_ALIAS("platform:mmp-camera");
 32MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>");
 33MODULE_DESCRIPTION("Support for the camera device found on Marvell MMP processors");
 34MODULE_LICENSE("GPL");
 35
 36static char *mcam_clks[] = {"axi", "func", "phy"};
 37
 38struct mmp_camera {
 39	struct platform_device *pdev;
 40	struct mcam_camera mcam;
 41	struct list_head devlist;
 42	struct clk *mipi_clk;
 43	int irq;
 44};
 45
 46static inline struct mmp_camera *mcam_to_cam(struct mcam_camera *mcam)
 47{
 48	return container_of(mcam, struct mmp_camera, mcam);
 49}
 50
 51/*
 52 * calc the dphy register values
 53 * There are three dphy registers being used.
 54 * dphy[0] - CSI2_DPHY3
 55 * dphy[1] - CSI2_DPHY5
 56 * dphy[2] - CSI2_DPHY6
 57 * CSI2_DPHY3 and CSI2_DPHY6 can be set with a default value
 58 * or be calculated dynamically
 59 */
 60static void mmpcam_calc_dphy(struct mcam_camera *mcam)
 61{
 62	struct mmp_camera *cam = mcam_to_cam(mcam);
 63	struct mmp_camera_platform_data *pdata = cam->pdev->dev.platform_data;
 64	struct device *dev = &cam->pdev->dev;
 65	unsigned long tx_clk_esc;
 66
 67	/*
 68	 * If CSI2_DPHY3 is calculated dynamically,
 69	 * pdata->lane_clk should be already set
 70	 * either in the board driver statically
 71	 * or in the sensor driver dynamically.
 72	 */
 73	/*
 74	 * dphy[0] - CSI2_DPHY3:
 75	 *  bit 0 ~ bit 7: HS Term Enable.
 76	 *   defines the time that the DPHY
 77	 *   wait before enabling the data
 78	 *   lane termination after detecting
 79	 *   that the sensor has driven the data
 80	 *   lanes to the LP00 bridge state.
 81	 *   The value is calculated by:
 82	 *   (Max T(D_TERM_EN)/Period(DDR)) - 1
 83	 *  bit 8 ~ bit 15: HS_SETTLE
 84	 *   Time interval during which the HS
 85	 *   receiver shall ignore any Data Lane
 86	 *   HS transitions.
 87	 *   The value has been calibrated on
 88	 *   different boards. It seems to work well.
 89	 *
 90	 *  More detail please refer
 91	 *  MIPI Alliance Spectification for D-PHY
 92	 *  document for explanation of HS-SETTLE
 93	 *  and D-TERM-EN.
 94	 */
 95	switch (pdata->dphy3_algo) {
 96	case DPHY3_ALGO_PXA910:
 97		/*
 98		 * Calculate CSI2_DPHY3 algo for PXA910
 99		 */
100		pdata->dphy[0] =
101			(((1 + (pdata->lane_clk * 80) / 1000) & 0xff) << 8)
102			| (1 + pdata->lane_clk * 35 / 1000);
103		break;
104	case DPHY3_ALGO_PXA2128:
105		/*
106		 * Calculate CSI2_DPHY3 algo for PXA2128
107		 */
108		pdata->dphy[0] =
109			(((2 + (pdata->lane_clk * 110) / 1000) & 0xff) << 8)
110			| (1 + pdata->lane_clk * 35 / 1000);
111		break;
112	default:
113		/*
114		 * Use default CSI2_DPHY3 value for PXA688/PXA988
115		 */
116		dev_dbg(dev, "camera: use the default CSI2_DPHY3 value\n");
117	}
118
119	/*
120	 * mipi_clk will never be changed, it is a fixed value on MMP
121	 */
122	if (IS_ERR(cam->mipi_clk))
123		return;
124
125	/* get the escape clk, this is hard coded */
126	clk_prepare_enable(cam->mipi_clk);
127	tx_clk_esc = (clk_get_rate(cam->mipi_clk) / 1000000) / 12;
128	clk_disable_unprepare(cam->mipi_clk);
129	/*
130	 * dphy[2] - CSI2_DPHY6:
131	 * bit 0 ~ bit 7: CK Term Enable
132	 *  Time for the Clock Lane receiver to enable the HS line
133	 *  termination. The value is calculated similarly with
134	 *  HS Term Enable
135	 * bit 8 ~ bit 15: CK Settle
136	 *  Time interval during which the HS receiver shall ignore
137	 *  any Clock Lane HS transitions.
138	 *  The value is calibrated on the boards.
139	 */
140	pdata->dphy[2] =
141		((((534 * tx_clk_esc) / 2000 - 1) & 0xff) << 8)
142		| (((38 * tx_clk_esc) / 1000 - 1) & 0xff);
143
144	dev_dbg(dev, "camera: DPHY sets: dphy3=0x%x, dphy5=0x%x, dphy6=0x%x\n",
145		pdata->dphy[0], pdata->dphy[1], pdata->dphy[2]);
146}
147
148static irqreturn_t mmpcam_irq(int irq, void *data)
149{
150	struct mcam_camera *mcam = data;
151	unsigned int irqs, handled;
152
153	spin_lock(&mcam->dev_lock);
154	irqs = mcam_reg_read(mcam, REG_IRQSTAT);
155	handled = mccic_irq(mcam, irqs);
156	spin_unlock(&mcam->dev_lock);
157	return IRQ_RETVAL(handled);
158}
159
160static void mcam_init_clk(struct mcam_camera *mcam)
161{
162	unsigned int i;
163
164	for (i = 0; i < NR_MCAM_CLK; i++) {
165		if (mcam_clks[i] != NULL) {
166			/* Some clks are not necessary on some boards
167			 * We still try to run even it fails getting clk
168			 */
169			mcam->clk[i] = devm_clk_get(mcam->dev, mcam_clks[i]);
170			if (IS_ERR(mcam->clk[i]))
171				dev_warn(mcam->dev, "Could not get clk: %s\n",
172						mcam_clks[i]);
173		}
174	}
175}
176
177static int mmpcam_probe(struct platform_device *pdev)
178{
179	struct mmp_camera *cam;
180	struct mcam_camera *mcam;
181	struct resource *res;
182	struct fwnode_handle *ep;
183	struct mmp_camera_platform_data *pdata;
184	struct v4l2_async_connection *asd;
185	int ret;
186
187	cam = devm_kzalloc(&pdev->dev, sizeof(*cam), GFP_KERNEL);
188	if (cam == NULL)
189		return -ENOMEM;
190	platform_set_drvdata(pdev, cam);
191	cam->pdev = pdev;
192	INIT_LIST_HEAD(&cam->devlist);
193
194	mcam = &cam->mcam;
195	mcam->calc_dphy = mmpcam_calc_dphy;
196	mcam->dev = &pdev->dev;
197	pdata = pdev->dev.platform_data;
198	if (pdata) {
199		mcam->mclk_src = pdata->mclk_src;
200		mcam->mclk_div = pdata->mclk_div;
201		mcam->bus_type = pdata->bus_type;
202		mcam->dphy = pdata->dphy;
203		mcam->lane = pdata->lane;
204	} else {
205		/*
206		 * These are values that used to be hardcoded in mcam-core and
207		 * work well on a OLPC XO 1.75 with a parallel bus sensor.
208		 * If it turns out other setups make sense, the values should
209		 * be obtained from the device tree.
210		 */
211		mcam->mclk_src = 3;
212		mcam->mclk_div = 2;
213	}
214	if (mcam->bus_type == V4L2_MBUS_CSI2_DPHY) {
215		cam->mipi_clk = devm_clk_get(mcam->dev, "mipi");
216		if ((IS_ERR(cam->mipi_clk) && mcam->dphy[2] == 0))
217			return PTR_ERR(cam->mipi_clk);
218	}
219	mcam->mipi_enabled = false;
220	mcam->chip_id = MCAM_ARMADA610;
221	mcam->buffer_mode = B_DMA_sg;
222	strscpy(mcam->bus_info, "platform:mmp-camera", sizeof(mcam->bus_info));
223	spin_lock_init(&mcam->dev_lock);
224	/*
225	 * Get our I/O memory.
226	 */
227	mcam->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
228	if (IS_ERR(mcam->regs))
229		return PTR_ERR(mcam->regs);
230	mcam->regs_size = resource_size(res);
231
232	mcam_init_clk(mcam);
233
234	/*
235	 * Register with V4L.
236	 */
237
238	ret = v4l2_device_register(mcam->dev, &mcam->v4l2_dev);
239	if (ret)
240		return ret;
241
242	/*
243	 * Create a match of the sensor against its OF node.
244	 */
245	ep = fwnode_graph_get_next_endpoint(of_fwnode_handle(pdev->dev.of_node),
246					    NULL);
247	if (!ep) {
248		ret = -ENODEV;
249		goto out_v4l2_device_unregister;
250	}
251
252	v4l2_async_nf_init(&mcam->notifier, &mcam->v4l2_dev);
253
254	asd = v4l2_async_nf_add_fwnode_remote(&mcam->notifier, ep,
255					      struct v4l2_async_connection);
256	fwnode_handle_put(ep);
257	if (IS_ERR(asd)) {
258		ret = PTR_ERR(asd);
259		goto out_v4l2_device_unregister;
260	}
261
262	/*
263	 * Register the device with the core.
264	 */
265	ret = mccic_register(mcam);
266	if (ret)
267		goto out_v4l2_device_unregister;
268
269	/*
270	 * Add OF clock provider.
271	 */
272	ret = of_clk_add_provider(pdev->dev.of_node, of_clk_src_simple_get,
273								mcam->mclk);
274	if (ret) {
275		dev_err(&pdev->dev, "can't add DT clock provider\n");
276		goto out;
277	}
278
279	/*
280	 * Finally, set up our IRQ now that the core is ready to
281	 * deal with it.
282	 */
283	ret = platform_get_irq(pdev, 0);
284	if (ret < 0)
285		goto out;
286	cam->irq = ret;
287	ret = devm_request_irq(&pdev->dev, cam->irq, mmpcam_irq, IRQF_SHARED,
288					"mmp-camera", mcam);
289	if (ret)
290		goto out;
291
292	pm_runtime_enable(&pdev->dev);
293	return 0;
294out:
295	mccic_shutdown(mcam);
296out_v4l2_device_unregister:
297	v4l2_device_unregister(&mcam->v4l2_dev);
298
299	return ret;
300}
301
302static void mmpcam_remove(struct platform_device *pdev)
303{
304	struct mmp_camera *cam = platform_get_drvdata(pdev);
305	struct mcam_camera *mcam = &cam->mcam;
306
307	mccic_shutdown(mcam);
308	v4l2_device_unregister(&mcam->v4l2_dev);
309	pm_runtime_force_suspend(mcam->dev);
310}
311
312/*
313 * Suspend/resume support.
314 */
315
316static int __maybe_unused mmpcam_runtime_resume(struct device *dev)
317{
318	struct mmp_camera *cam = dev_get_drvdata(dev);
319	struct mcam_camera *mcam = &cam->mcam;
320	unsigned int i;
321
322	for (i = 0; i < NR_MCAM_CLK; i++) {
323		if (!IS_ERR(mcam->clk[i]))
324			clk_prepare_enable(mcam->clk[i]);
325	}
326
327	return 0;
328}
329
330static int __maybe_unused mmpcam_runtime_suspend(struct device *dev)
331{
332	struct mmp_camera *cam = dev_get_drvdata(dev);
333	struct mcam_camera *mcam = &cam->mcam;
334	int i;
335
336	for (i = NR_MCAM_CLK - 1; i >= 0; i--) {
337		if (!IS_ERR(mcam->clk[i]))
338			clk_disable_unprepare(mcam->clk[i]);
339	}
340
341	return 0;
342}
343
344static int __maybe_unused mmpcam_suspend(struct device *dev)
345{
346	struct mmp_camera *cam = dev_get_drvdata(dev);
347
348	if (!pm_runtime_suspended(dev))
349		mccic_suspend(&cam->mcam);
350	return 0;
351}
352
353static int __maybe_unused mmpcam_resume(struct device *dev)
354{
355	struct mmp_camera *cam = dev_get_drvdata(dev);
356
357	if (!pm_runtime_suspended(dev))
358		return mccic_resume(&cam->mcam);
359	return 0;
360}
361
362static const struct dev_pm_ops mmpcam_pm_ops = {
363	SET_RUNTIME_PM_OPS(mmpcam_runtime_suspend, mmpcam_runtime_resume, NULL)
364	SET_SYSTEM_SLEEP_PM_OPS(mmpcam_suspend, mmpcam_resume)
365};
366
367static const struct of_device_id mmpcam_of_match[] = {
368	{ .compatible = "marvell,mmp2-ccic", },
369	{},
370};
371MODULE_DEVICE_TABLE(of, mmpcam_of_match);
372
373static struct platform_driver mmpcam_driver = {
374	.probe		= mmpcam_probe,
375	.remove		= mmpcam_remove,
376	.driver = {
377		.name	= "mmp-camera",
378		.of_match_table = mmpcam_of_match,
379		.pm = &mmpcam_pm_ops,
380	}
381};
382
383module_platform_driver(mmpcam_driver);