FILE
wave5-vpuerror.h
File preview with syntax highlighting.
linux-6.19.14/drivers/media/platform/chips-media/wave5/wave5-vpuerror.h
1/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */ 2/* 3 * Wave5 series multi-standard codec IP - error values 4 * 5 * Copyright (C) 2021-2023 CHIPS&MEDIA INC 6 */ 7 8#ifndef ERROR_CODE_H_INCLUDED 9#define ERROR_CODE_H_INCLUDED 10 11/* 12 * WAVE5 13 */ 14 15/************************************************************************/ 16/* WAVE5 COMMON SYSTEM ERROR (FAIL_REASON) */ 17/************************************************************************/ 18#define WAVE5_SYSERR_QUEUEING_FAIL 0x00000001 19#define WAVE5_SYSERR_ACCESS_VIOLATION_HW 0x00000040 20#define WAVE5_SYSERR_BUS_ERROR 0x00000200 21#define WAVE5_SYSERR_DOUBLE_FAULT 0x00000400 22#define WAVE5_SYSERR_RESULT_NOT_READY 0x00000800 23#define WAVE5_SYSERR_VPU_STILL_RUNNING 0x00001000 24#define WAVE5_SYSERR_UNKNOWN_CMD 0x00002000 25#define WAVE5_SYSERR_UNKNOWN_CODEC_STD 0x00004000 26#define WAVE5_SYSERR_UNKNOWN_QUERY_OPTION 0x00008000 27#define WAVE5_SYSERR_VLC_BUF_FULL 0x00010000 28#define WAVE5_SYSERR_WATCHDOG_TIMEOUT 0x00020000 29#define WAVE5_SYSERR_VCPU_TIMEOUT 0x00080000 30#define WAVE5_SYSERR_TEMP_SEC_BUF_OVERFLOW 0x00200000 31#define WAVE5_SYSERR_NEED_MORE_TASK_BUF 0x00400000 32#define WAVE5_SYSERR_PRESCAN_ERR 0x00800000 33#define WAVE5_SYSERR_ENC_GBIN_OVERCONSUME 0x01000000 34#define WAVE5_SYSERR_ENC_MAX_ZERO_DETECT 0x02000000 35#define WAVE5_SYSERR_ENC_LVL_FIRST_ERROR 0x04000000 36#define WAVE5_SYSERR_ENC_EG_RANGE_OVER 0x08000000 37#define WAVE5_SYSERR_ENC_IRB_FRAME_DROP 0x10000000 38#define WAVE5_SYSERR_INPLACE_V 0x20000000 39#define WAVE5_SYSERR_FATAL_VPU_HANGUP 0xf0000000 40 41/************************************************************************/ 42/* WAVE5 COMMAND QUEUE ERROR (FAIL_REASON) */ 43/************************************************************************/ 44#define WAVE5_CMDQ_ERR_NOT_QUEABLE_CMD 0x00000001 45#define WAVE5_CMDQ_ERR_SKIP_MODE_ENABLE 0x00000002 46#define WAVE5_CMDQ_ERR_INST_FLUSHING 0x00000003 47#define WAVE5_CMDQ_ERR_INST_INACTIVE 0x00000004 48#define WAVE5_CMDQ_ERR_QUEUE_FAIL 0x00000005 49#define WAVE5_CMDQ_ERR_CMD_BUF_FULL 0x00000006 50 51/************************************************************************/ 52/* WAVE5 ERROR ON DECODER (ERR_INFO) */ 53/************************************************************************/ 54// HEVC 55#define HEVC_SPSERR_SEQ_PARAMETER_SET_ID 0x00001000 56#define HEVC_SPSERR_CHROMA_FORMAT_IDC 0x00001001 57#define HEVC_SPSERR_PIC_WIDTH_IN_LUMA_SAMPLES 0x00001002 58#define HEVC_SPSERR_PIC_HEIGHT_IN_LUMA_SAMPLES 0x00001003 59#define HEVC_SPSERR_CONF_WIN_LEFT_OFFSET 0x00001004 60#define HEVC_SPSERR_CONF_WIN_RIGHT_OFFSET 0x00001005 61#define HEVC_SPSERR_CONF_WIN_TOP_OFFSET 0x00001006 62#define HEVC_SPSERR_CONF_WIN_BOTTOM_OFFSET 0x00001007 63#define HEVC_SPSERR_BIT_DEPTH_LUMA_MINUS8 0x00001008 64#define HEVC_SPSERR_BIT_DEPTH_CHROMA_MINUS8 0x00001009 65#define HEVC_SPSERR_LOG2_MAX_PIC_ORDER_CNT_LSB_MINUS4 0x0000100A 66#define HEVC_SPSERR_SPS_MAX_DEC_PIC_BUFFERING 0x0000100B 67#define HEVC_SPSERR_SPS_MAX_NUM_REORDER_PICS 0x0000100C 68#define HEVC_SPSERR_SPS_MAX_LATENCY_INCREASE 0x0000100D 69#define HEVC_SPSERR_LOG2_MIN_LUMA_CODING_BLOCK_SIZE_MINUS3 0x0000100E 70#define HEVC_SPSERR_LOG2_DIFF_MAX_MIN_LUMA_CODING_BLOCK_SIZE 0x0000100F 71#define HEVC_SPSERR_LOG2_MIN_TRANSFORM_BLOCK_SIZE_MINUS2 0x00001010 72#define HEVC_SPSERR_LOG2_DIFF_MAX_MIN_TRANSFORM_BLOCK_SIZE 0x00001011 73#define HEVC_SPSERR_MAX_TRANSFORM_HIERARCHY_DEPTH_INTER 0x00001012 74#define HEVC_SPSERR_MAX_TRANSFORM_HIERARCHY_DEPTH_INTRA 0x00001013 75#define HEVC_SPSERR_SCALING_LIST 0x00001014 76#define HEVC_SPSERR_LOG2_DIFF_MIN_PCM_LUMA_CODING_BLOCK_SIZE_MINUS3 0x00001015 77#define HEVC_SPSERR_LOG2_DIFF_MAX_MIN_PCM_LUMA_CODING_BLOCK_SIZE 0x00001016 78#define HEVC_SPSERR_NUM_SHORT_TERM_REF_PIC_SETS 0x00001017 79#define HEVC_SPSERR_NUM_LONG_TERM_REF_PICS_SPS 0x00001018 80#define HEVC_SPSERR_GBU_PARSING_ERROR 0x00001019 81#define HEVC_SPSERR_EXTENSION_FLAG 0x0000101A 82#define HEVC_SPSERR_VUI_ERROR 0x0000101B 83#define HEVC_SPSERR_ACTIVATE_SPS 0x0000101C 84#define HEVC_SPSERR_PROFILE_SPACE 0x0000101D 85#define HEVC_PPSERR_PPS_PIC_PARAMETER_SET_ID 0x00002000 86#define HEVC_PPSERR_PPS_SEQ_PARAMETER_SET_ID 0x00002001 87#define HEVC_PPSERR_NUM_REF_IDX_L0_DEFAULT_ACTIVE_MINUS1 0x00002002 88#define HEVC_PPSERR_NUM_REF_IDX_L1_DEFAULT_ACTIVE_MINUS1 0x00002003 89#define HEVC_PPSERR_INIT_QP_MINUS26 0x00002004 90#define HEVC_PPSERR_DIFF_CU_QP_DELTA_DEPTH 0x00002005 91#define HEVC_PPSERR_PPS_CB_QP_OFFSET 0x00002006 92#define HEVC_PPSERR_PPS_CR_QP_OFFSET 0x00002007 93#define HEVC_PPSERR_NUM_TILE_COLUMNS_MINUS1 0x00002008 94#define HEVC_PPSERR_NUM_TILE_ROWS_MINUS1 0x00002009 95#define HEVC_PPSERR_COLUMN_WIDTH_MINUS1 0x0000200A 96#define HEVC_PPSERR_ROW_HEIGHT_MINUS1 0x0000200B 97#define HEVC_PPSERR_PPS_BETA_OFFSET_DIV2 0x0000200C 98#define HEVC_PPSERR_PPS_TC_OFFSET_DIV2 0x0000200D 99#define HEVC_PPSERR_SCALING_LIST 0x0000200E 100#define HEVC_PPSERR_LOG2_PARALLEL_MERGE_LEVEL_MINUS2 0x0000200F 101#define HEVC_PPSERR_NUM_TILE_COLUMNS_RANGE_OUT 0x00002010 102#define HEVC_PPSERR_NUM_TILE_ROWS_RANGE_OUT 0x00002011 103#define HEVC_PPSERR_MORE_RBSP_DATA_ERROR 0x00002012 104#define HEVC_PPSERR_PPS_PIC_PARAMETER_SET_ID_RANGE_OUT 0x00002013 105#define HEVC_PPSERR_PPS_SEQ_PARAMETER_SET_ID_RANGE_OUT 0x00002014 106#define HEVC_PPSERR_NUM_REF_IDX_L0_DEFAULT_ACTIVE_MINUS1_RANGE_OUT 0x00002015 107#define HEVC_PPSERR_NUM_REF_IDX_L1_DEFAULT_ACTIVE_MINUS1_RANGE_OUT 0x00002016 108#define HEVC_PPSERR_PPS_CB_QP_OFFSET_RANGE_OUT 0x00002017 109#define HEVC_PPSERR_PPS_CR_QP_OFFSET_RANGE_OUT 0x00002018 110#define HEVC_PPSERR_COLUMN_WIDTH_MINUS1_RANGE_OUT 0x00002019 111#define HEVC_PPSERR_ROW_HEIGHT_MINUS1_RANGE_OUT 0x00002020 112#define HEVC_PPSERR_PPS_BETA_OFFSET_DIV2_RANGE_OUT 0x00002021 113#define HEVC_PPSERR_PPS_TC_OFFSET_DIV2_RANGE_OUT 0x00002022 114#define HEVC_SHERR_SLICE_PIC_PARAMETER_SET_ID 0x00003000 115#define HEVC_SHERR_ACTIVATE_PPS 0x00003001 116#define HEVC_SHERR_ACTIVATE_SPS 0x00003002 117#define HEVC_SHERR_SLICE_TYPE 0x00003003 118#define HEVC_SHERR_FIRST_SLICE_IS_DEPENDENT_SLICE 0x00003004 119#define HEVC_SHERR_SHORT_TERM_REF_PIC_SET_SPS_FLAG 0x00003005 120#define HEVC_SHERR_SHORT_TERM_REF_PIC_SET 0x00003006 121#define HEVC_SHERR_SHORT_TERM_REF_PIC_SET_IDX 0x00003007 122#define HEVC_SHERR_NUM_LONG_TERM_SPS 0x00003008 123#define HEVC_SHERR_NUM_LONG_TERM_PICS 0x00003009 124#define HEVC_SHERR_LT_IDX_SPS_IS_OUT_OF_RANGE 0x0000300A 125#define HEVC_SHERR_DELTA_POC_MSB_CYCLE_LT 0x0000300B 126#define HEVC_SHERR_NUM_REF_IDX_L0_ACTIVE_MINUS1 0x0000300C 127#define HEVC_SHERR_NUM_REF_IDX_L1_ACTIVE_MINUS1 0x0000300D 128#define HEVC_SHERR_COLLOCATED_REF_IDX 0x0000300E 129#define HEVC_SHERR_PRED_WEIGHT_TABLE 0x0000300F 130#define HEVC_SHERR_FIVE_MINUS_MAX_NUM_MERGE_CAND 0x00003010 131#define HEVC_SHERR_SLICE_QP_DELTA 0x00003011 132#define HEVC_SHERR_SLICE_QP_DELTA_IS_OUT_OF_RANGE 0x00003012 133#define HEVC_SHERR_SLICE_CB_QP_OFFSET 0x00003013 134#define HEVC_SHERR_SLICE_CR_QP_OFFSET 0x00003014 135#define HEVC_SHERR_SLICE_BETA_OFFSET_DIV2 0x00003015 136#define HEVC_SHERR_SLICE_TC_OFFSET_DIV2 0x00003016 137#define HEVC_SHERR_NUM_ENTRY_POINT_OFFSETS 0x00003017 138#define HEVC_SHERR_OFFSET_LEN_MINUS1 0x00003018 139#define HEVC_SHERR_SLICE_SEGMENT_HEADER_EXTENSION_LENGTH 0x00003019 140#define HEVC_SHERR_WRONG_POC_IN_STILL_PICTURE_PROFILE 0x0000301A 141#define HEVC_SHERR_SLICE_TYPE_ERROR_IN_STILL_PICTURE_PROFILE 0x0000301B 142#define HEVC_SHERR_PPS_ID_NOT_EQUAL_PREV_VALUE 0x0000301C 143#define HEVC_SPECERR_OVER_PICTURE_WIDTH_SIZE 0x00004000 144#define HEVC_SPECERR_OVER_PICTURE_HEIGHT_SIZE 0x00004001 145#define HEVC_SPECERR_OVER_CHROMA_FORMAT 0x00004002 146#define HEVC_SPECERR_OVER_BIT_DEPTH 0x00004003 147#define HEVC_SPECERR_OVER_BUFFER_OVER_FLOW 0x00004004 148#define HEVC_SPECERR_OVER_WRONG_BUFFER_ACCESS 0x00004005 149#define HEVC_ETCERR_INIT_SEQ_SPS_NOT_FOUND 0x00005000 150#define HEVC_ETCERR_DEC_PIC_VCL_NOT_FOUND 0x00005001 151#define HEVC_ETCERR_NO_VALID_SLICE_IN_AU 0x00005002 152#define HEVC_ETCERR_INPLACE_V 0x0000500F 153 154// AVC 155#define AVC_SPSERR_SEQ_PARAMETER_SET_ID 0x00001000 156#define AVC_SPSERR_CHROMA_FORMAT_IDC 0x00001001 157#define AVC_SPSERR_PIC_WIDTH_IN_LUMA_SAMPLES 0x00001002 158#define AVC_SPSERR_PIC_HEIGHT_IN_LUMA_SAMPLES 0x00001003 159#define AVC_SPSERR_CONF_WIN_LEFT_OFFSET 0x00001004 160#define AVC_SPSERR_CONF_WIN_RIGHT_OFFSET 0x00001005 161#define AVC_SPSERR_CONF_WIN_TOP_OFFSET 0x00001006 162#define AVC_SPSERR_CONF_WIN_BOTTOM_OFFSET 0x00001007 163#define AVC_SPSERR_BIT_DEPTH_LUMA_MINUS8 0x00001008 164#define AVC_SPSERR_BIT_DEPTH_CHROMA_MINUS8 0x00001009 165#define AVC_SPSERR_SPS_MAX_DEC_PIC_BUFFERING 0x0000100B 166#define AVC_SPSERR_SPS_MAX_NUM_REORDER_PICS 0x0000100C 167#define AVC_SPSERR_SCALING_LIST 0x00001014 168#define AVC_SPSERR_GBU_PARSING_ERROR 0x00001019 169#define AVC_SPSERR_VUI_ERROR 0x0000101B 170#define AVC_SPSERR_ACTIVATE_SPS 0x0000101C 171#define AVC_PPSERR_PPS_PIC_PARAMETER_SET_ID 0x00002000 172#define AVC_PPSERR_PPS_SEQ_PARAMETER_SET_ID 0x00002001 173#define AVC_PPSERR_NUM_REF_IDX_L0_DEFAULT_ACTIVE_MINUS1 0x00002002 174#define AVC_PPSERR_NUM_REF_IDX_L1_DEFAULT_ACTIVE_MINUS1 0x00002003 175#define AVC_PPSERR_INIT_QP_MINUS26 0x00002004 176#define AVC_PPSERR_PPS_CB_QP_OFFSET 0x00002006 177#define AVC_PPSERR_PPS_CR_QP_OFFSET 0x00002007 178#define AVC_PPSERR_SCALING_LIST 0x0000200E 179#define AVC_PPSERR_MORE_RBSP_DATA_ERROR 0x00002012 180#define AVC_PPSERR_PPS_PIC_PARAMETER_SET_ID_RANGE_OUT 0x00002013 181#define AVC_PPSERR_PPS_SEQ_PARAMETER_SET_ID_RANGE_OUT 0x00002014 182#define AVC_PPSERR_NUM_REF_IDX_L0_DEFAULT_ACTIVE_MINUS1_RANGE_OUT 0x00002015 183#define AVC_PPSERR_NUM_REF_IDX_L1_DEFAULT_ACTIVE_MINUS1_RANGE_OUT 0x00002016 184#define AVC_PPSERR_PPS_CB_QP_OFFSET_RANGE_OUT 0x00002017 185#define AVC_PPSERR_PPS_CR_QP_OFFSET_RANGE_OUT 0x00002018 186#define AVC_SHERR_SLICE_PIC_PARAMETER_SET_ID 0x00003000 187#define AVC_SHERR_ACTIVATE_PPS 0x00003001 188#define AVC_SHERR_ACTIVATE_SPS 0x00003002 189#define AVC_SHERR_SLICE_TYPE 0x00003003 190#define AVC_SHERR_FIRST_MB_IN_SLICE 0x00003004 191#define AVC_SHERR_RPLM 0x00003006 192#define AVC_SHERR_LT_IDX_SPS_IS_OUT_OF_RANGE 0x0000300A 193#define AVC_SHERR_NUM_REF_IDX_L0_ACTIVE_MINUS1 0x0000300C 194#define AVC_SHERR_NUM_REF_IDX_L1_ACTIVE_MINUS1 0x0000300D 195#define AVC_SHERR_PRED_WEIGHT_TABLE 0x0000300F 196#define AVC_SHERR_SLICE_QP_DELTA 0x00003011 197#define AVC_SHERR_SLICE_BETA_OFFSET_DIV2 0x00003015 198#define AVC_SHERR_SLICE_TC_OFFSET_DIV2 0x00003016 199#define AVC_SHERR_DISABLE_DEBLOCK_FILTER_IDC 0x00003017 200#define AVC_SPECERR_OVER_PICTURE_WIDTH_SIZE 0x00004000 201#define AVC_SPECERR_OVER_PICTURE_HEIGHT_SIZE 0x00004001 202#define AVC_SPECERR_OVER_CHROMA_FORMAT 0x00004002 203#define AVC_SPECERR_OVER_BIT_DEPTH 0x00004003 204#define AVC_SPECERR_OVER_BUFFER_OVER_FLOW 0x00004004 205#define AVC_SPECERR_OVER_WRONG_BUFFER_ACCESS 0x00004005 206#define AVC_ETCERR_INIT_SEQ_SPS_NOT_FOUND 0x00005000 207#define AVC_ETCERR_DEC_PIC_VCL_NOT_FOUND 0x00005001 208#define AVC_ETCERR_NO_VALID_SLICE_IN_AU 0x00005002 209#define AVC_ETCERR_ASO 0x00005004 210#define AVC_ETCERR_FMO 0x00005005 211#define AVC_ETCERR_INPLACE_V 0x0000500F 212 213/************************************************************************/ 214/* WAVE5 WARNING ON DECODER (WARN_INFO) */ 215/************************************************************************/ 216// HEVC 217#define HEVC_SPSWARN_MAX_SUB_LAYERS_MINUS1 0x00000001 218#define HEVC_SPSWARN_GENERAL_RESERVED_ZERO_44BITS 0x00000002 219#define HEVC_SPSWARN_RESERVED_ZERO_2BITS 0x00000004 220#define HEVC_SPSWARN_SUB_LAYER_RESERVED_ZERO_44BITS 0x00000008 221#define HEVC_SPSWARN_GENERAL_LEVEL_IDC 0x00000010 222#define HEVC_SPSWARN_SPS_MAX_DEC_PIC_BUFFERING_VALUE_OVER 0x00000020 223#define HEVC_SPSWARN_RBSP_TRAILING_BITS 0x00000040 224#define HEVC_SPSWARN_ST_RPS_UE_ERROR 0x00000080 225#define HEVC_SPSWARN_EXTENSION_FLAG 0x01000000 226#define HEVC_SPSWARN_REPLACED_WITH_PREV_SPS 0x02000000 227#define HEVC_PPSWARN_RBSP_TRAILING_BITS 0x00000100 228#define HEVC_PPSWARN_REPLACED_WITH_PREV_PPS 0x00000200 229#define HEVC_SHWARN_FIRST_SLICE_SEGMENT_IN_PIC_FLAG 0x00001000 230#define HEVC_SHWARN_NO_OUTPUT_OF_PRIOR_PICS_FLAG 0x00002000 231#define HEVC_SHWARN_PIC_OUTPUT_FLAG 0x00004000 232#define HEVC_SHWARN_DUPLICATED_SLICE_SEGMENT 0x00008000 233#define HEVC_ETCWARN_INIT_SEQ_VCL_NOT_FOUND 0x00010000 234#define HEVC_ETCWARN_MISSING_REFERENCE_PICTURE 0x00020000 235#define HEVC_ETCWARN_WRONG_TEMPORAL_ID 0x00040000 236#define HEVC_ETCWARN_ERROR_PICTURE_IS_REFERENCED 0x00080000 237#define HEVC_SPECWARN_OVER_PROFILE 0x00100000 238#define HEVC_SPECWARN_OVER_LEVEL 0x00200000 239#define HEVC_PRESWARN_PARSING_ERR 0x04000000 240#define HEVC_PRESWARN_MVD_OUT_OF_RANGE 0x08000000 241#define HEVC_PRESWARN_CU_QP_DELTA_VAL_OUT_OF_RANGE 0x09000000 242#define HEVC_PRESWARN_COEFF_LEVEL_REMAINING_OUT_OF_RANGE 0x0A000000 243#define HEVC_PRESWARN_PCM_ERR 0x0B000000 244#define HEVC_PRESWARN_OVERCONSUME 0x0C000000 245#define HEVC_PRESWARN_END_OF_SUBSET_ONE_BIT_ERR 0x10000000 246#define HEVC_PRESWARN_END_OF_SLICE_SEGMENT_FLAG 0x20000000 247 248// AVC 249#define AVC_SPSWARN_RESERVED_ZERO_2BITS 0x00000004 250#define AVC_SPSWARN_GENERAL_LEVEL_IDC 0x00000010 251#define AVC_SPSWARN_RBSP_TRAILING_BITS 0x00000040 252#define AVC_PPSWARN_RBSP_TRAILING_BITS 0x00000100 253#define AVC_SHWARN_NO_OUTPUT_OF_PRIOR_PICS_FLAG 0x00002000 254#define AVC_ETCWARN_INIT_SEQ_VCL_NOT_FOUND 0x00010000 255#define AVC_ETCWARN_MISSING_REFERENCE_PICTURE 0x00020000 256#define AVC_ETCWARN_ERROR_PICTURE_IS_REFERENCED 0x00080000 257#define AVC_SPECWARN_OVER_PROFILE 0x00100000 258#define AVC_SPECWARN_OVER_LEVEL 0x00200000 259#define AVC_PRESWARN_MVD_RANGE_OUT 0x00400000 260#define AVC_PRESWARN_MB_QPD_RANGE_OUT 0x00500000 261#define AVC_PRESWARN_COEFF_RANGE_OUT 0x00600000 262#define AVC_PRESWARN_MV_RANGE_OUT 0x00700000 263#define AVC_PRESWARN_MB_SKIP_RUN_RANGE_OUT 0x00800000 264#define AVC_PRESWARN_MB_TYPE_RANGE_OUT 0x00900000 265#define AVC_PRESWARN_SUB_MB_TYPE_RANGE_OUT 0x00A00000 266#define AVC_PRESWARN_CBP_RANGE_OUT 0x00B00000 267#define AVC_PRESWARN_INTRA_CHROMA_PRED_MODE_RANGE_OUT 0x00C00000 268#define AVC_PRESWARN_REF_IDX_RANGE_OUT 0x00D00000 269#define AVC_PRESWARN_COEFF_TOKEN_RANGE_OUT 0x00E00000 270#define AVC_PRESWARN_TOTAL_ZERO_RANGE_OUT 0x00F00000 271#define AVC_PRESWARN_RUN_BEFORE_RANGE_OUT 0x01000000 272#define AVC_PRESWARN_OVERCONSUME 0x01100000 273#define AVC_PRESWARN_MISSING_SLICE 0x01200000 274 275/************************************************************************/ 276/* WAVE5 ERROR ON ENCODER (ERR_INFO) */ 277/************************************************************************/ 278 279/************************************************************************/ 280/* WAVE5 WARNING ON ENCODER (WARN_INFO) */ 281/************************************************************************/ 282#define WAVE5_ETCWARN_FORCED_SPLIT_BY_CU8X8 0x000000001 283 284/************************************************************************/ 285/* WAVE5 debug info (PRI_REASON) */ 286/************************************************************************/ 287#define WAVE5_DEC_VCORE_VCE_HANGUP 0x0001 288#define WAVE5_DEC_VCORE_UNDETECTED_SYNTAX_ERR 0x0002 289#define WAVE5_DEC_VCORE_MIB_BUSY 0x0003 290#define WAVE5_DEC_VCORE_VLC_BUSY 0x0004 291 292#endif /* ERROR_CODE_H_INCLUDED */
~/
Read-only file preview.