tw5864.h

  1/* SPDX-License-Identifier: GPL-2.0-or-later */
  2/*
  3 *  TW5864 driver  - common header file
  4 *
  5 *  Copyright (C) 2016 Bluecherry, LLC <maintainers@bluecherrydvr.com>
  6 */
  7
  8#include <linux/pci.h>
  9#include <linux/videodev2.h>
 10#include <linux/notifier.h>
 11#include <linux/delay.h>
 12#include <linux/mutex.h>
 13#include <linux/io.h>
 14#include <linux/interrupt.h>
 15#include <linux/workqueue.h>
 16
 17#include <media/v4l2-common.h>
 18#include <media/v4l2-ioctl.h>
 19#include <media/v4l2-ctrls.h>
 20#include <media/v4l2-device.h>
 21#include <media/videobuf2-dma-sg.h>
 22
 23#include "tw5864-reg.h"
 24
 25#define PCI_DEVICE_ID_TECHWELL_5864 0x5864
 26
 27#define TW5864_NORMS V4L2_STD_ALL
 28
 29/* ----------------------------------------------------------- */
 30/* card configuration   */
 31
 32#define TW5864_INPUTS 4
 33
 34/* The TW5864 uses 192 (16x12) detection cells in full screen for motion
 35 * detection. Each detection cell is composed of 44 pixels and 20 lines for
 36 * NTSC and 24 lines for PAL.
 37 */
 38#define MD_CELLS_HOR 16
 39#define MD_CELLS_VERT 12
 40#define MD_CELLS (MD_CELLS_HOR * MD_CELLS_VERT)
 41
 42#define H264_VLC_BUF_SIZE 0x80000
 43#define H264_MV_BUF_SIZE 0x2000 /* device writes 5396 bytes */
 44#define QP_VALUE 28
 45#define MAX_GOP_SIZE 255
 46#define GOP_SIZE MAX_GOP_SIZE
 47
 48enum resolution {
 49	D1 = 1,
 50	HD1 = 2, /* half d1 - 360x(240|288) */
 51	CIF = 3,
 52	QCIF = 4,
 53};
 54
 55/* ----------------------------------------------------------- */
 56/* device / file handle status                                 */
 57
 58struct tw5864_dev; /* forward delclaration */
 59
 60/* buffer for one video/vbi/ts frame */
 61struct tw5864_buf {
 62	struct vb2_v4l2_buffer vb;
 63	struct list_head list;
 64
 65	unsigned int size;
 66};
 67
 68struct tw5864_dma_buf {
 69	void *addr;
 70	dma_addr_t dma_addr;
 71};
 72
 73enum tw5864_vid_std {
 74	STD_NTSC = 0, /* NTSC (M) */
 75	STD_PAL = 1, /* PAL (B, D, G, H, I) */
 76	STD_SECAM = 2, /* SECAM */
 77	STD_NTSC443 = 3, /* NTSC4.43 */
 78	STD_PAL_M = 4, /* PAL (M) */
 79	STD_PAL_CN = 5, /* PAL (CN) */
 80	STD_PAL_60 = 6, /* PAL 60 */
 81	STD_INVALID = 7,
 82	STD_AUTO = 7,
 83};
 84
 85struct tw5864_input {
 86	int nr; /* input number */
 87	struct tw5864_dev *root;
 88	struct mutex lock; /* used for vidq and vdev */
 89	spinlock_t slock; /* used for sync between ISR, bh_work & V4L2 API */
 90	struct video_device vdev;
 91	struct v4l2_ctrl_handler hdl;
 92	struct vb2_queue vidq;
 93	struct list_head active;
 94	enum resolution resolution;
 95	unsigned int width, height;
 96	unsigned int frame_seqno;
 97	unsigned int frame_gop_seqno;
 98	unsigned int h264_idr_pic_id;
 99	int enabled;
100	enum tw5864_vid_std std;
101	v4l2_std_id v4l2_std;
102	int tail_nb_bits;
103	u8 tail;
104	u8 *buf_cur_ptr;
105	int buf_cur_space_left;
106
107	u32 reg_interlacing;
108	u32 reg_vlc;
109	u32 reg_dsp_codec;
110	u32 reg_dsp;
111	u32 reg_emu;
112	u32 reg_dsp_qp;
113	u32 reg_dsp_ref_mvp_lambda;
114	u32 reg_dsp_i4x4_weight;
115	u32 buf_id;
116
117	struct tw5864_buf *vb;
118
119	struct v4l2_ctrl *md_threshold_grid_ctrl;
120	u16 md_threshold_grid_values[12 * 16];
121	int qp;
122	int gop;
123
124	/*
125	 * In (1/MAX_FPS) units.
126	 * For max FPS (default), set to 1.
127	 * For 1 FPS, set to e.g. 32.
128	 */
129	int frame_interval;
130	unsigned long new_frame_deadline;
131};
132
133struct tw5864_h264_frame {
134	struct tw5864_dma_buf vlc;
135	struct tw5864_dma_buf mv;
136	int vlc_len;
137	u32 checksum;
138	struct tw5864_input *input;
139	u64 timestamp;
140	unsigned int seqno;
141	unsigned int gop_seqno;
142};
143
144/* global device status */
145struct tw5864_dev {
146	spinlock_t slock; /* used for sync between ISR, bh_work & V4L2 API */
147	struct v4l2_device v4l2_dev;
148	struct tw5864_input inputs[TW5864_INPUTS];
149#define H264_BUF_CNT 4
150	struct tw5864_h264_frame h264_buf[H264_BUF_CNT];
151	int h264_buf_r_index;
152	int h264_buf_w_index;
153
154	struct work_struct bh_work;
155
156	int encoder_busy;
157	/* Input number to check next for ready raw picture (in RR fashion) */
158	int next_input;
159
160	/* pci i/o */
161	char name[64];
162	struct pci_dev *pci;
163	void __iomem *mmio;
164	u32 irqmask;
165};
166
167#define tw_readl(reg) readl(dev->mmio + reg)
168#define tw_mask_readl(reg, mask) \
169	(tw_readl(reg) & (mask))
170#define tw_mask_shift_readl(reg, mask, shift) \
171	(tw_mask_readl((reg), ((mask) << (shift))) >> (shift))
172
173#define tw_writel(reg, value) writel((value), dev->mmio + reg)
174#define tw_mask_writel(reg, mask, value) \
175	tw_writel(reg, (tw_readl(reg) & ~(mask)) | ((value) & (mask)))
176#define tw_mask_shift_writel(reg, mask, shift, value) \
177	tw_mask_writel((reg), ((mask) << (shift)), ((value) << (shift)))
178
179#define tw_setl(reg, bit) tw_writel((reg), tw_readl(reg) | (bit))
180#define tw_clearl(reg, bit) tw_writel((reg), tw_readl(reg) & ~(bit))
181
182u8 tw5864_indir_readb(struct tw5864_dev *dev, u16 addr);
183#define tw_indir_readb(addr) tw5864_indir_readb(dev, addr)
184void tw5864_indir_writeb(struct tw5864_dev *dev, u16 addr, u8 data);
185#define tw_indir_writeb(addr, data) tw5864_indir_writeb(dev, addr, data)
186
187void tw5864_irqmask_apply(struct tw5864_dev *dev);
188int tw5864_video_init(struct tw5864_dev *dev, int *video_nr);
189void tw5864_video_fini(struct tw5864_dev *dev);
190void tw5864_prepare_frame_headers(struct tw5864_input *input);
191void tw5864_h264_put_stream_header(u8 **buf, size_t *space_left, int qp,
192				   int width, int height);
193void tw5864_h264_put_slice_header(u8 **buf, size_t *space_left,
194				  unsigned int idr_pic_id,
195				  unsigned int frame_gop_seqno,
196				  int *tail_nb_bits, u8 *tail);
197void tw5864_request_encoded_frame(struct tw5864_input *input);