ddbridge-i2c.c

  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * ddbridge-i2c.c: Digital Devices bridge i2c driver
  4 *
  5 * Copyright (C) 2010-2017 Digital Devices GmbH
  6 *                         Ralph Metzler <rjkm@metzlerbros.de>
  7 *                         Marcus Metzler <mocm@metzlerbros.de>
  8 */
  9
 10#include <linux/module.h>
 11#include <linux/init.h>
 12#include <linux/interrupt.h>
 13#include <linux/delay.h>
 14#include <linux/slab.h>
 15#include <linux/poll.h>
 16#include <linux/io.h>
 17#include <linux/pci.h>
 18#include <linux/pci_ids.h>
 19#include <linux/timer.h>
 20#include <linux/i2c.h>
 21#include <linux/swab.h>
 22#include <linux/vmalloc.h>
 23
 24#include "ddbridge.h"
 25#include "ddbridge-i2c.h"
 26#include "ddbridge-regs.h"
 27#include "ddbridge-io.h"
 28
 29/******************************************************************************/
 30
 31static int ddb_i2c_cmd(struct ddb_i2c *i2c, u32 adr, u32 cmd)
 32{
 33	struct ddb *dev = i2c->dev;
 34	unsigned long stat;
 35	u32 val;
 36
 37	ddbwritel(dev, (adr << 9) | cmd, i2c->regs + I2C_COMMAND);
 38	stat = wait_for_completion_timeout(&i2c->completion, HZ);
 39	val = ddbreadl(dev, i2c->regs + I2C_COMMAND);
 40	if (stat == 0) {
 41		dev_err(dev->dev, "I2C timeout, card %d, port %d, link %u\n",
 42			dev->nr, i2c->nr, i2c->link);
 43		{
 44			u32 istat = ddbreadl(dev, INTERRUPT_STATUS);
 45
 46			dev_err(dev->dev, "DDBridge IRS %08x\n", istat);
 47			if (i2c->link) {
 48				u32 listat = ddbreadl(dev,
 49					DDB_LINK_TAG(i2c->link) |
 50					INTERRUPT_STATUS);
 51
 52				dev_err(dev->dev, "DDBridge link %u IRS %08x\n",
 53					i2c->link, listat);
 54			}
 55			if (istat & 1) {
 56				ddbwritel(dev, istat & 1, INTERRUPT_ACK);
 57			} else {
 58				u32 mon = ddbreadl(dev,
 59					i2c->regs + I2C_MONITOR);
 60
 61				dev_err(dev->dev, "I2C cmd=%08x mon=%08x\n",
 62					val, mon);
 63			}
 64		}
 65		return -EIO;
 66	}
 67	val &= 0x70000;
 68	if (val == 0x20000)
 69		dev_err(dev->dev, "I2C bus error\n");
 70	if (val)
 71		return -EIO;
 72	return 0;
 73}
 74
 75static int ddb_i2c_master_xfer(struct i2c_adapter *adapter,
 76			       struct i2c_msg msg[], int num)
 77{
 78	struct ddb_i2c *i2c = (struct ddb_i2c *)i2c_get_adapdata(adapter);
 79	struct ddb *dev = i2c->dev;
 80	u8 addr = 0;
 81
 82	addr = msg[0].addr;
 83	if (msg[0].len > i2c->bsize)
 84		return -EIO;
 85	switch (num) {
 86	case 1:
 87		if (msg[0].flags & I2C_M_RD) {
 88			ddbwritel(dev, msg[0].len << 16,
 89				  i2c->regs + I2C_TASKLENGTH);
 90			if (ddb_i2c_cmd(i2c, addr, 3))
 91				break;
 92			ddbcpyfrom(dev, msg[0].buf,
 93				   i2c->rbuf, msg[0].len);
 94			return num;
 95		}
 96		ddbcpyto(dev, i2c->wbuf, msg[0].buf, msg[0].len);
 97		ddbwritel(dev, msg[0].len, i2c->regs + I2C_TASKLENGTH);
 98		if (ddb_i2c_cmd(i2c, addr, 2))
 99			break;
100		return num;
101	case 2:
102		if ((msg[0].flags & I2C_M_RD) == I2C_M_RD)
103			break;
104		if ((msg[1].flags & I2C_M_RD) != I2C_M_RD)
105			break;
106		if (msg[1].len > i2c->bsize)
107			break;
108		ddbcpyto(dev, i2c->wbuf, msg[0].buf, msg[0].len);
109		ddbwritel(dev, msg[0].len | (msg[1].len << 16),
110			  i2c->regs + I2C_TASKLENGTH);
111		if (ddb_i2c_cmd(i2c, addr, 1))
112			break;
113		ddbcpyfrom(dev, msg[1].buf,
114			   i2c->rbuf,
115			   msg[1].len);
116		return num;
117	default:
118		break;
119	}
120	return -EIO;
121}
122
123static u32 ddb_i2c_functionality(struct i2c_adapter *adap)
124{
125	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
126}
127
128static const struct i2c_algorithm ddb_i2c_algo = {
129	.master_xfer   = ddb_i2c_master_xfer,
130	.functionality = ddb_i2c_functionality,
131};
132
133void ddb_i2c_release(struct ddb *dev)
134{
135	int i;
136	struct ddb_i2c *i2c;
137
138	for (i = 0; i < dev->i2c_num; i++) {
139		i2c = &dev->i2c[i];
140		i2c_del_adapter(&i2c->adap);
141	}
142}
143
144static void i2c_handler(void *priv)
145{
146	struct ddb_i2c *i2c = (struct ddb_i2c *)priv;
147
148	complete(&i2c->completion);
149}
150
151static int ddb_i2c_add(struct ddb *dev, struct ddb_i2c *i2c,
152		       const struct ddb_regmap *regmap, int link,
153		       int i, int num)
154{
155	struct i2c_adapter *adap;
156
157	i2c->nr = i;
158	i2c->dev = dev;
159	i2c->link = link;
160	i2c->bsize = regmap->i2c_buf->size;
161	i2c->wbuf = DDB_LINK_TAG(link) |
162		(regmap->i2c_buf->base + i2c->bsize * i);
163	i2c->rbuf = i2c->wbuf; /* + i2c->bsize / 2 */
164	i2c->regs = DDB_LINK_TAG(link) |
165		(regmap->i2c->base + regmap->i2c->size * i);
166	ddbwritel(dev, I2C_SPEED_100, i2c->regs + I2C_TIMING);
167	ddbwritel(dev, ((i2c->rbuf & 0xffff) << 16) | (i2c->wbuf & 0xffff),
168		  i2c->regs + I2C_TASKADDRESS);
169	init_completion(&i2c->completion);
170
171	adap = &i2c->adap;
172	i2c_set_adapdata(adap, i2c);
173#ifdef I2C_ADAP_CLASS_TV_DIGITAL
174	adap->class = I2C_ADAP_CLASS_TV_DIGITAL | I2C_CLASS_TV_ANALOG;
175#else
176#ifdef I2C_CLASS_TV_ANALOG
177	adap->class = I2C_CLASS_TV_ANALOG;
178#endif
179#endif
180	snprintf(adap->name, I2C_NAME_SIZE, "ddbridge_%02x.%x.%x",
181		 dev->nr, i2c->link, i);
182	adap->algo = &ddb_i2c_algo;
183	adap->algo_data = (void *)i2c;
184	adap->dev.parent = dev->dev;
185	return i2c_add_adapter(adap);
186}
187
188int ddb_i2c_init(struct ddb *dev)
189{
190	int stat = 0;
191	u32 i, j, num = 0, l, base;
192	struct ddb_i2c *i2c;
193	struct i2c_adapter *adap;
194	const struct ddb_regmap *regmap;
195
196	for (l = 0; l < DDB_MAX_LINK; l++) {
197		if (!dev->link[l].info)
198			continue;
199		regmap = dev->link[l].info->regmap;
200		if (!regmap || !regmap->i2c)
201			continue;
202		base = regmap->irq_base_i2c;
203		for (i = 0; i < regmap->i2c->num; i++) {
204			if (!(dev->link[l].info->i2c_mask & (1 << i)))
205				continue;
206			i2c = &dev->i2c[num];
207			ddb_irq_set(dev, l, i + base, i2c_handler, i2c);
208			stat = ddb_i2c_add(dev, i2c, regmap, l, i, num);
209			if (stat)
210				break;
211			num++;
212		}
213	}
214	if (stat) {
215		for (j = 0; j < num; j++) {
216			i2c = &dev->i2c[j];
217			adap = &i2c->adap;
218			i2c_del_adapter(adap);
219		}
220	} else {
221		dev->i2c_num = num;
222	}
223
224	return stat;
225}