cx88-video.c

   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 *
   4 * device driver for Conexant 2388x based TV cards
   5 * video4linux video interface
   6 *
   7 * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
   8 *
   9 * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@kernel.org>
  10 *	- Multituner support
  11 *	- video_ioctl2 conversion
  12 *	- PAL/M fixes
  13 */
  14
  15#include "cx88.h"
  16
  17#include <linux/init.h>
  18#include <linux/list.h>
  19#include <linux/module.h>
  20#include <linux/kmod.h>
  21#include <linux/kernel.h>
  22#include <linux/slab.h>
  23#include <linux/interrupt.h>
  24#include <linux/dma-mapping.h>
  25#include <linux/delay.h>
  26#include <linux/kthread.h>
  27#include <asm/div64.h>
  28
  29#include <media/v4l2-common.h>
  30#include <media/v4l2-ioctl.h>
  31#include <media/v4l2-event.h>
  32#include <media/i2c/wm8775.h>
  33
  34MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
  35MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  36MODULE_LICENSE("GPL v2");
  37MODULE_VERSION(CX88_VERSION);
  38
  39/* ------------------------------------------------------------------ */
  40
  41static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  42static unsigned int vbi_nr[]   = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  43static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  44
  45module_param_array(video_nr, int, NULL, 0444);
  46module_param_array(vbi_nr,   int, NULL, 0444);
  47module_param_array(radio_nr, int, NULL, 0444);
  48
  49MODULE_PARM_DESC(video_nr, "video device numbers");
  50MODULE_PARM_DESC(vbi_nr, "vbi device numbers");
  51MODULE_PARM_DESC(radio_nr, "radio device numbers");
  52
  53static unsigned int video_debug;
  54module_param(video_debug, int, 0644);
  55MODULE_PARM_DESC(video_debug, "enable debug messages [video]");
  56
  57static unsigned int irq_debug;
  58module_param(irq_debug, int, 0644);
  59MODULE_PARM_DESC(irq_debug, "enable debug messages [IRQ handler]");
  60
  61#define dprintk(level, fmt, arg...) do {			\
  62	if (video_debug >= level)				\
  63		printk(KERN_DEBUG pr_fmt("%s: video:" fmt),	\
  64			__func__, ##arg);			\
  65} while (0)
  66
  67/* ------------------------------------------------------------------- */
  68/* static data                                                         */
  69
  70static const struct cx8800_fmt formats[] = {
  71	{
  72		.fourcc   = V4L2_PIX_FMT_GREY,
  73		.cxformat = ColorFormatY8,
  74		.depth    = 8,
  75		.flags    = FORMAT_FLAGS_PACKED,
  76	}, {
  77		.fourcc   = V4L2_PIX_FMT_RGB555,
  78		.cxformat = ColorFormatRGB15,
  79		.depth    = 16,
  80		.flags    = FORMAT_FLAGS_PACKED,
  81	}, {
  82		.fourcc   = V4L2_PIX_FMT_RGB555X,
  83		.cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
  84		.depth    = 16,
  85		.flags    = FORMAT_FLAGS_PACKED,
  86	}, {
  87		.fourcc   = V4L2_PIX_FMT_RGB565,
  88		.cxformat = ColorFormatRGB16,
  89		.depth    = 16,
  90		.flags    = FORMAT_FLAGS_PACKED,
  91	}, {
  92		.fourcc   = V4L2_PIX_FMT_RGB565X,
  93		.cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
  94		.depth    = 16,
  95		.flags    = FORMAT_FLAGS_PACKED,
  96	}, {
  97		.fourcc   = V4L2_PIX_FMT_BGR24,
  98		.cxformat = ColorFormatRGB24,
  99		.depth    = 24,
 100		.flags    = FORMAT_FLAGS_PACKED,
 101	}, {
 102		.fourcc   = V4L2_PIX_FMT_BGR32,
 103		.cxformat = ColorFormatRGB32,
 104		.depth    = 32,
 105		.flags    = FORMAT_FLAGS_PACKED,
 106	}, {
 107		.fourcc   = V4L2_PIX_FMT_RGB32,
 108		.cxformat = ColorFormatRGB32 | ColorFormatBSWAP |
 109			    ColorFormatWSWAP,
 110		.depth    = 32,
 111		.flags    = FORMAT_FLAGS_PACKED,
 112	}, {
 113		.fourcc   = V4L2_PIX_FMT_YUYV,
 114		.cxformat = ColorFormatYUY2,
 115		.depth    = 16,
 116		.flags    = FORMAT_FLAGS_PACKED,
 117	}, {
 118		.fourcc   = V4L2_PIX_FMT_UYVY,
 119		.cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
 120		.depth    = 16,
 121		.flags    = FORMAT_FLAGS_PACKED,
 122	},
 123};
 124
 125static const struct cx8800_fmt *format_by_fourcc(unsigned int fourcc)
 126{
 127	unsigned int i;
 128
 129	for (i = 0; i < ARRAY_SIZE(formats); i++)
 130		if (formats[i].fourcc == fourcc)
 131			return formats + i;
 132	return NULL;
 133}
 134
 135/* ------------------------------------------------------------------- */
 136
 137struct cx88_ctrl {
 138	/* control information */
 139	u32 id;
 140	s32 minimum;
 141	s32 maximum;
 142	u32 step;
 143	s32 default_value;
 144
 145	/* control register information */
 146	u32 off;
 147	u32 reg;
 148	u32 sreg;
 149	u32 mask;
 150	u32 shift;
 151};
 152
 153static const struct cx88_ctrl cx8800_vid_ctls[] = {
 154	/* --- video --- */
 155	{
 156		.id            = V4L2_CID_BRIGHTNESS,
 157		.minimum       = 0x00,
 158		.maximum       = 0xff,
 159		.step          = 1,
 160		.default_value = 0x7f,
 161		.off           = 128,
 162		.reg           = MO_CONTR_BRIGHT,
 163		.mask          = 0x00ff,
 164		.shift         = 0,
 165	}, {
 166		.id            = V4L2_CID_CONTRAST,
 167		.minimum       = 0,
 168		.maximum       = 0xff,
 169		.step          = 1,
 170		.default_value = 0x3f,
 171		.off           = 0,
 172		.reg           = MO_CONTR_BRIGHT,
 173		.mask          = 0xff00,
 174		.shift         = 8,
 175	}, {
 176		.id            = V4L2_CID_HUE,
 177		.minimum       = 0,
 178		.maximum       = 0xff,
 179		.step          = 1,
 180		.default_value = 0x7f,
 181		.off           = 128,
 182		.reg           = MO_HUE,
 183		.mask          = 0x00ff,
 184		.shift         = 0,
 185	}, {
 186		/* strictly, this only describes only U saturation.
 187		 * V saturation is handled specially through code.
 188		 */
 189		.id            = V4L2_CID_SATURATION,
 190		.minimum       = 0,
 191		.maximum       = 0xff,
 192		.step          = 1,
 193		.default_value = 0x7f,
 194		.off           = 0,
 195		.reg           = MO_UV_SATURATION,
 196		.mask          = 0x00ff,
 197		.shift         = 0,
 198	}, {
 199		.id            = V4L2_CID_SHARPNESS,
 200		.minimum       = 0,
 201		.maximum       = 4,
 202		.step          = 1,
 203		.default_value = 0x0,
 204		.off           = 0,
 205		/*
 206		 * NOTE: the value is converted and written to both even
 207		 * and odd registers in the code
 208		 */
 209		.reg           = MO_FILTER_ODD,
 210		.mask          = 7 << 7,
 211		.shift         = 7,
 212	}, {
 213		.id            = V4L2_CID_CHROMA_AGC,
 214		.minimum       = 0,
 215		.maximum       = 1,
 216		.default_value = 0x1,
 217		.reg           = MO_INPUT_FORMAT,
 218		.mask          = 1 << 10,
 219		.shift         = 10,
 220	}, {
 221		.id            = V4L2_CID_COLOR_KILLER,
 222		.minimum       = 0,
 223		.maximum       = 1,
 224		.default_value = 0x1,
 225		.reg           = MO_INPUT_FORMAT,
 226		.mask          = 1 << 9,
 227		.shift         = 9,
 228	}, {
 229		.id            = V4L2_CID_BAND_STOP_FILTER,
 230		.minimum       = 0,
 231		.maximum       = 1,
 232		.step          = 1,
 233		.default_value = 0x0,
 234		.off           = 0,
 235		.reg           = MO_HTOTAL,
 236		.mask          = 3 << 11,
 237		.shift         = 11,
 238	}
 239};
 240
 241static const struct cx88_ctrl cx8800_aud_ctls[] = {
 242	{
 243		/* --- audio --- */
 244		.id            = V4L2_CID_AUDIO_MUTE,
 245		.minimum       = 0,
 246		.maximum       = 1,
 247		.default_value = 1,
 248		.reg           = AUD_VOL_CTL,
 249		.sreg          = SHADOW_AUD_VOL_CTL,
 250		.mask          = (1 << 6),
 251		.shift         = 6,
 252	}, {
 253		.id            = V4L2_CID_AUDIO_VOLUME,
 254		.minimum       = 0,
 255		.maximum       = 0x3f,
 256		.step          = 1,
 257		.default_value = 0x3f,
 258		.reg           = AUD_VOL_CTL,
 259		.sreg          = SHADOW_AUD_VOL_CTL,
 260		.mask          = 0x3f,
 261		.shift         = 0,
 262	}, {
 263		.id            = V4L2_CID_AUDIO_BALANCE,
 264		.minimum       = 0,
 265		.maximum       = 0x7f,
 266		.step          = 1,
 267		.default_value = 0x40,
 268		.reg           = AUD_BAL_CTL,
 269		.sreg          = SHADOW_AUD_BAL_CTL,
 270		.mask          = 0x7f,
 271		.shift         = 0,
 272	}
 273};
 274
 275enum {
 276	CX8800_VID_CTLS = ARRAY_SIZE(cx8800_vid_ctls),
 277	CX8800_AUD_CTLS = ARRAY_SIZE(cx8800_aud_ctls),
 278};
 279
 280/* ------------------------------------------------------------------ */
 281
 282int cx88_video_mux(struct cx88_core *core, unsigned int input)
 283{
 284	/* struct cx88_core *core = dev->core; */
 285
 286	dprintk(1, "video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
 287		input, INPUT(input).vmux,
 288		INPUT(input).gpio0, INPUT(input).gpio1,
 289		INPUT(input).gpio2, INPUT(input).gpio3);
 290	core->input = input;
 291	cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
 292	cx_write(MO_GP3_IO, INPUT(input).gpio3);
 293	cx_write(MO_GP0_IO, INPUT(input).gpio0);
 294	cx_write(MO_GP1_IO, INPUT(input).gpio1);
 295	cx_write(MO_GP2_IO, INPUT(input).gpio2);
 296
 297	switch (INPUT(input).type) {
 298	case CX88_VMUX_SVIDEO:
 299		cx_set(MO_AFECFG_IO,    0x00000001);
 300		cx_set(MO_INPUT_FORMAT, 0x00010010);
 301		cx_set(MO_FILTER_EVEN,  0x00002020);
 302		cx_set(MO_FILTER_ODD,   0x00002020);
 303		break;
 304	default:
 305		cx_clear(MO_AFECFG_IO,    0x00000001);
 306		cx_clear(MO_INPUT_FORMAT, 0x00010010);
 307		cx_clear(MO_FILTER_EVEN,  0x00002020);
 308		cx_clear(MO_FILTER_ODD,   0x00002020);
 309		break;
 310	}
 311
 312	/*
 313	 * if there are audioroutes defined, we have an external
 314	 * ADC to deal with audio
 315	 */
 316	if (INPUT(input).audioroute) {
 317		/*
 318		 * The wm8775 module has the "2" route hardwired into
 319		 * the initialization. Some boards may use different
 320		 * routes for different inputs. HVR-1300 surely does
 321		 */
 322		if (core->sd_wm8775) {
 323			call_all(core, audio, s_routing,
 324				 INPUT(input).audioroute, 0, 0);
 325		}
 326		/*
 327		 * cx2388's C-ADC is connected to the tuner only.
 328		 * When used with S-Video, that ADC is busy dealing with
 329		 * chroma, so an external must be used for baseband audio
 330		 */
 331		if (INPUT(input).type != CX88_VMUX_TELEVISION &&
 332		    INPUT(input).type != CX88_VMUX_CABLE) {
 333			/* "I2S ADC mode" */
 334			core->tvaudio = WW_I2SADC;
 335			cx88_set_tvaudio(core);
 336		} else {
 337			/* Normal mode */
 338			cx_write(AUD_I2SCNTL, 0x0);
 339			cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
 340		}
 341	}
 342
 343	return 0;
 344}
 345EXPORT_SYMBOL(cx88_video_mux);
 346
 347/* ------------------------------------------------------------------ */
 348
 349static int start_video_dma(struct cx8800_dev    *dev,
 350			   struct cx88_dmaqueue *q,
 351			   struct cx88_buffer   *buf)
 352{
 353	struct cx88_core *core = dev->core;
 354
 355	/* setup fifo + format */
 356	cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
 357				buf->bpl, buf->risc.dma);
 358	cx88_set_scale(core, core->width, core->height, core->field);
 359	cx_write(MO_COLOR_CTRL, dev->fmt->cxformat | ColorFormatGamma);
 360
 361	/* reset counter */
 362	cx_write(MO_VIDY_GPCNTRL, GP_COUNT_CONTROL_RESET);
 363	q->count = 0;
 364
 365	/* enable irqs */
 366	cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
 367
 368	/*
 369	 * Enables corresponding bits at PCI_INT_STAT:
 370	 *	bits 0 to 4: video, audio, transport stream, VIP, Host
 371	 *	bit 7: timer
 372	 *	bits 8 and 9: DMA complete for: SRC, DST
 373	 *	bits 10 and 11: BERR signal asserted for RISC: RD, WR
 374	 *	bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
 375	 */
 376	cx_set(MO_VID_INTMSK, 0x0f0011);
 377
 378	/* enable capture */
 379	cx_set(VID_CAPTURE_CONTROL, 0x06);
 380
 381	/* start dma */
 382	cx_set(MO_DEV_CNTRL2, (1 << 5));
 383	cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
 384
 385	return 0;
 386}
 387
 388static int __maybe_unused stop_video_dma(struct cx8800_dev    *dev)
 389{
 390	struct cx88_core *core = dev->core;
 391
 392	/* stop dma */
 393	cx_clear(MO_VID_DMACNTRL, 0x11);
 394
 395	/* disable capture */
 396	cx_clear(VID_CAPTURE_CONTROL, 0x06);
 397
 398	/* disable irqs */
 399	cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
 400	cx_clear(MO_VID_INTMSK, 0x0f0011);
 401	return 0;
 402}
 403
 404static int __maybe_unused restart_video_queue(struct cx8800_dev *dev,
 405					      struct cx88_dmaqueue *q)
 406{
 407	struct cx88_buffer *buf;
 408
 409	if (!list_empty(&q->active)) {
 410		buf = list_entry(q->active.next, struct cx88_buffer, list);
 411		dprintk(2, "restart_queue [%p/%d]: restart dma\n",
 412			buf, buf->vb.vb2_buf.index);
 413		start_video_dma(dev, q, buf);
 414	}
 415	return 0;
 416}
 417
 418/* ------------------------------------------------------------------ */
 419
 420static int queue_setup(struct vb2_queue *q,
 421		       unsigned int *num_buffers, unsigned int *num_planes,
 422		       unsigned int sizes[], struct device *alloc_devs[])
 423{
 424	struct cx8800_dev *dev = q->drv_priv;
 425	struct cx88_core *core = dev->core;
 426
 427	*num_planes = 1;
 428	sizes[0] = (dev->fmt->depth * core->width * core->height) >> 3;
 429	return 0;
 430}
 431
 432static int buffer_prepare(struct vb2_buffer *vb)
 433{
 434	int ret;
 435	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
 436	struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
 437	struct cx88_core *core = dev->core;
 438	struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
 439	struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
 440
 441	buf->bpl = core->width * dev->fmt->depth >> 3;
 442
 443	if (vb2_plane_size(vb, 0) < core->height * buf->bpl)
 444		return -EINVAL;
 445	vb2_set_plane_payload(vb, 0, core->height * buf->bpl);
 446
 447	switch (core->field) {
 448	case V4L2_FIELD_TOP:
 449		ret = cx88_risc_buffer(dev->pci, &buf->risc,
 450				       sgt->sgl, 0, UNSET,
 451				       buf->bpl, 0, core->height);
 452		break;
 453	case V4L2_FIELD_BOTTOM:
 454		ret = cx88_risc_buffer(dev->pci, &buf->risc,
 455				       sgt->sgl, UNSET, 0,
 456				       buf->bpl, 0, core->height);
 457		break;
 458	case V4L2_FIELD_SEQ_TB:
 459		ret = cx88_risc_buffer(dev->pci, &buf->risc,
 460				       sgt->sgl,
 461				       0, buf->bpl * (core->height >> 1),
 462				       buf->bpl, 0,
 463				       core->height >> 1);
 464		break;
 465	case V4L2_FIELD_SEQ_BT:
 466		ret = cx88_risc_buffer(dev->pci, &buf->risc,
 467				       sgt->sgl,
 468				       buf->bpl * (core->height >> 1), 0,
 469				       buf->bpl, 0,
 470				       core->height >> 1);
 471		break;
 472	case V4L2_FIELD_INTERLACED:
 473	default:
 474		ret = cx88_risc_buffer(dev->pci, &buf->risc,
 475				       sgt->sgl, 0, buf->bpl,
 476				       buf->bpl, buf->bpl,
 477				       core->height >> 1);
 478		break;
 479	}
 480	dprintk(2,
 481		"[%p/%d] %s - %dx%d %dbpp 0x%08x - dma=0x%08lx\n",
 482		buf, buf->vb.vb2_buf.index, __func__,
 483		core->width, core->height, dev->fmt->depth, dev->fmt->fourcc,
 484		(unsigned long)buf->risc.dma);
 485	return ret;
 486}
 487
 488static void buffer_finish(struct vb2_buffer *vb)
 489{
 490	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
 491	struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
 492	struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
 493	struct cx88_riscmem *risc = &buf->risc;
 494
 495	if (risc->cpu)
 496		dma_free_coherent(&dev->pci->dev, risc->size, risc->cpu,
 497				  risc->dma);
 498	memset(risc, 0, sizeof(*risc));
 499}
 500
 501static void buffer_queue(struct vb2_buffer *vb)
 502{
 503	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
 504	struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
 505	struct cx88_buffer    *buf = container_of(vbuf, struct cx88_buffer, vb);
 506	struct cx88_buffer    *prev;
 507	struct cx88_dmaqueue  *q    = &dev->vidq;
 508
 509	/* add jump to start */
 510	buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 8);
 511	buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC);
 512	buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 8);
 513
 514	if (list_empty(&q->active)) {
 515		list_add_tail(&buf->list, &q->active);
 516		dprintk(2, "[%p/%d] buffer_queue - first active\n",
 517			buf, buf->vb.vb2_buf.index);
 518
 519	} else {
 520		buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1);
 521		prev = list_entry(q->active.prev, struct cx88_buffer, list);
 522		list_add_tail(&buf->list, &q->active);
 523		prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
 524		dprintk(2, "[%p/%d] buffer_queue - append to active\n",
 525			buf, buf->vb.vb2_buf.index);
 526	}
 527}
 528
 529static int start_streaming(struct vb2_queue *q, unsigned int count)
 530{
 531	struct cx8800_dev *dev = q->drv_priv;
 532	struct cx88_dmaqueue *dmaq = &dev->vidq;
 533	struct cx88_buffer *buf = list_entry(dmaq->active.next,
 534			struct cx88_buffer, list);
 535
 536	start_video_dma(dev, dmaq, buf);
 537	return 0;
 538}
 539
 540static void stop_streaming(struct vb2_queue *q)
 541{
 542	struct cx8800_dev *dev = q->drv_priv;
 543	struct cx88_core *core = dev->core;
 544	struct cx88_dmaqueue *dmaq = &dev->vidq;
 545	unsigned long flags;
 546
 547	cx_clear(MO_VID_DMACNTRL, 0x11);
 548	cx_clear(VID_CAPTURE_CONTROL, 0x06);
 549	spin_lock_irqsave(&dev->slock, flags);
 550	while (!list_empty(&dmaq->active)) {
 551		struct cx88_buffer *buf = list_entry(dmaq->active.next,
 552			struct cx88_buffer, list);
 553
 554		list_del(&buf->list);
 555		vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
 556	}
 557	spin_unlock_irqrestore(&dev->slock, flags);
 558}
 559
 560static const struct vb2_ops cx8800_video_qops = {
 561	.queue_setup    = queue_setup,
 562	.buf_prepare  = buffer_prepare,
 563	.buf_finish = buffer_finish,
 564	.buf_queue    = buffer_queue,
 565	.start_streaming = start_streaming,
 566	.stop_streaming = stop_streaming,
 567};
 568
 569/* ------------------------------------------------------------------ */
 570
 571static int radio_open(struct file *file)
 572{
 573	struct cx8800_dev *dev = video_drvdata(file);
 574	struct cx88_core *core = dev->core;
 575	int ret = v4l2_fh_open(file);
 576
 577	if (ret)
 578		return ret;
 579
 580	cx_write(MO_GP3_IO, core->board.radio.gpio3);
 581	cx_write(MO_GP0_IO, core->board.radio.gpio0);
 582	cx_write(MO_GP1_IO, core->board.radio.gpio1);
 583	cx_write(MO_GP2_IO, core->board.radio.gpio2);
 584	if (core->board.radio.audioroute) {
 585		if (core->sd_wm8775) {
 586			call_all(core, audio, s_routing,
 587				 core->board.radio.audioroute, 0, 0);
 588		}
 589		/* "I2S ADC mode" */
 590		core->tvaudio = WW_I2SADC;
 591		cx88_set_tvaudio(core);
 592	} else {
 593		/* FM Mode */
 594		core->tvaudio = WW_FM;
 595		cx88_set_tvaudio(core);
 596		cx88_set_stereo(core, V4L2_TUNER_MODE_STEREO, 1);
 597	}
 598	call_all(core, tuner, s_radio);
 599	return 0;
 600}
 601
 602/* ------------------------------------------------------------------ */
 603/* VIDEO CTRL IOCTLS                                                  */
 604
 605static int cx8800_s_vid_ctrl(struct v4l2_ctrl *ctrl)
 606{
 607	struct cx88_core *core =
 608		container_of(ctrl->handler, struct cx88_core, video_hdl);
 609	const struct cx88_ctrl *cc = ctrl->priv;
 610	u32 value, mask;
 611
 612	mask = cc->mask;
 613	switch (ctrl->id) {
 614	case V4L2_CID_SATURATION:
 615		/* special v_sat handling */
 616
 617		value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
 618
 619		if (core->tvnorm & V4L2_STD_SECAM) {
 620			/* For SECAM, both U and V sat should be equal */
 621			value = value << 8 | value;
 622		} else {
 623			/* Keeps U Saturation proportional to V Sat */
 624			value = (value * 0x5a) / 0x7f << 8 | value;
 625		}
 626		mask = 0xffff;
 627		break;
 628	case V4L2_CID_SHARPNESS:
 629		/* 0b000, 0b100, 0b101, 0b110, or 0b111 */
 630		value = (ctrl->val < 1 ? 0 : ((ctrl->val + 3) << 7));
 631		/* needs to be set for both fields */
 632		cx_andor(MO_FILTER_EVEN, mask, value);
 633		break;
 634	case V4L2_CID_CHROMA_AGC:
 635		value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
 636		break;
 637	default:
 638		value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
 639		break;
 640	}
 641	dprintk(1,
 642		"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
 643		ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
 644		mask, cc->sreg ? " [shadowed]" : "");
 645	if (cc->sreg)
 646		cx_sandor(cc->sreg, cc->reg, mask, value);
 647	else
 648		cx_andor(cc->reg, mask, value);
 649	return 0;
 650}
 651
 652static int cx8800_s_aud_ctrl(struct v4l2_ctrl *ctrl)
 653{
 654	struct cx88_core *core =
 655		container_of(ctrl->handler, struct cx88_core, audio_hdl);
 656	const struct cx88_ctrl *cc = ctrl->priv;
 657	u32 value, mask;
 658
 659	/* Pass changes onto any WM8775 */
 660	if (core->sd_wm8775) {
 661		switch (ctrl->id) {
 662		case V4L2_CID_AUDIO_MUTE:
 663			wm8775_s_ctrl(core, ctrl->id, ctrl->val);
 664			break;
 665		case V4L2_CID_AUDIO_VOLUME:
 666			wm8775_s_ctrl(core, ctrl->id, (ctrl->val) ?
 667						(0x90 + ctrl->val) << 8 : 0);
 668			break;
 669		case V4L2_CID_AUDIO_BALANCE:
 670			wm8775_s_ctrl(core, ctrl->id, ctrl->val << 9);
 671			break;
 672		default:
 673			break;
 674		}
 675	}
 676
 677	mask = cc->mask;
 678	switch (ctrl->id) {
 679	case V4L2_CID_AUDIO_BALANCE:
 680		value = (ctrl->val < 0x40) ?
 681			(0x7f - ctrl->val) : (ctrl->val - 0x40);
 682		break;
 683	case V4L2_CID_AUDIO_VOLUME:
 684		value = 0x3f - (ctrl->val & 0x3f);
 685		break;
 686	default:
 687		value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
 688		break;
 689	}
 690	dprintk(1,
 691		"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
 692		ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
 693		mask, cc->sreg ? " [shadowed]" : "");
 694	if (cc->sreg)
 695		cx_sandor(cc->sreg, cc->reg, mask, value);
 696	else
 697		cx_andor(cc->reg, mask, value);
 698	return 0;
 699}
 700
 701/* ------------------------------------------------------------------ */
 702/* VIDEO IOCTLS                                                       */
 703
 704static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
 705				struct v4l2_format *f)
 706{
 707	struct cx8800_dev *dev = video_drvdata(file);
 708	struct cx88_core *core = dev->core;
 709
 710	f->fmt.pix.width        = core->width;
 711	f->fmt.pix.height       = core->height;
 712	f->fmt.pix.field        = core->field;
 713	f->fmt.pix.pixelformat  = dev->fmt->fourcc;
 714	f->fmt.pix.bytesperline =
 715		(f->fmt.pix.width * dev->fmt->depth) >> 3;
 716	f->fmt.pix.sizeimage =
 717		f->fmt.pix.height * f->fmt.pix.bytesperline;
 718	f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
 719	return 0;
 720}
 721
 722static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
 723				  struct v4l2_format *f)
 724{
 725	struct cx8800_dev *dev = video_drvdata(file);
 726	struct cx88_core *core = dev->core;
 727	const struct cx8800_fmt *fmt;
 728	enum v4l2_field   field;
 729	unsigned int      maxw, maxh;
 730
 731	fmt = format_by_fourcc(f->fmt.pix.pixelformat);
 732	if (!fmt)
 733		return -EINVAL;
 734
 735	maxw = norm_maxw(core->tvnorm);
 736	maxh = norm_maxh(core->tvnorm);
 737
 738	field = f->fmt.pix.field;
 739
 740	switch (field) {
 741	case V4L2_FIELD_TOP:
 742	case V4L2_FIELD_BOTTOM:
 743	case V4L2_FIELD_INTERLACED:
 744	case V4L2_FIELD_SEQ_BT:
 745	case V4L2_FIELD_SEQ_TB:
 746		break;
 747	default:
 748		field = (f->fmt.pix.height > maxh / 2)
 749			? V4L2_FIELD_INTERLACED
 750			: V4L2_FIELD_BOTTOM;
 751		break;
 752	}
 753	if (V4L2_FIELD_HAS_T_OR_B(field))
 754		maxh /= 2;
 755
 756	v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
 757			      &f->fmt.pix.height, 32, maxh, 0, 0);
 758	f->fmt.pix.field = field;
 759	f->fmt.pix.bytesperline =
 760		(f->fmt.pix.width * fmt->depth) >> 3;
 761	f->fmt.pix.sizeimage =
 762		f->fmt.pix.height * f->fmt.pix.bytesperline;
 763	f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
 764
 765	return 0;
 766}
 767
 768static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
 769				struct v4l2_format *f)
 770{
 771	struct cx8800_dev *dev = video_drvdata(file);
 772	struct cx88_core *core = dev->core;
 773	int err = vidioc_try_fmt_vid_cap(file, priv, f);
 774
 775	if (err != 0)
 776		return err;
 777	if (vb2_is_busy(&dev->vb2_vidq) || vb2_is_busy(&dev->vb2_vbiq))
 778		return -EBUSY;
 779	if (core->dvbdev && vb2_is_busy(&core->dvbdev->vb2_mpegq))
 780		return -EBUSY;
 781	dev->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
 782	core->width = f->fmt.pix.width;
 783	core->height = f->fmt.pix.height;
 784	core->field = f->fmt.pix.field;
 785	return 0;
 786}
 787
 788int cx88_querycap(struct file *file, struct cx88_core *core,
 789		  struct v4l2_capability *cap)
 790{
 791	strscpy(cap->card, core->board.name, sizeof(cap->card));
 792	cap->capabilities = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
 793			    V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VBI_CAPTURE |
 794			    V4L2_CAP_DEVICE_CAPS;
 795	if (core->board.tuner_type != UNSET)
 796		cap->capabilities |= V4L2_CAP_TUNER;
 797	if (core->board.radio.type == CX88_RADIO)
 798		cap->capabilities |= V4L2_CAP_RADIO;
 799	return 0;
 800}
 801EXPORT_SYMBOL(cx88_querycap);
 802
 803static int vidioc_querycap(struct file *file, void  *priv,
 804			   struct v4l2_capability *cap)
 805{
 806	struct cx8800_dev *dev = video_drvdata(file);
 807	struct cx88_core *core = dev->core;
 808
 809	strscpy(cap->driver, "cx8800", sizeof(cap->driver));
 810	return cx88_querycap(file, core, cap);
 811}
 812
 813static int vidioc_enum_fmt_vid_cap(struct file *file, void  *priv,
 814				   struct v4l2_fmtdesc *f)
 815{
 816	if (unlikely(f->index >= ARRAY_SIZE(formats)))
 817		return -EINVAL;
 818
 819	f->pixelformat = formats[f->index].fourcc;
 820
 821	return 0;
 822}
 823
 824static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *tvnorm)
 825{
 826	struct cx8800_dev *dev = video_drvdata(file);
 827	struct cx88_core *core = dev->core;
 828
 829	*tvnorm = core->tvnorm;
 830	return 0;
 831}
 832
 833static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id tvnorms)
 834{
 835	struct cx8800_dev *dev = video_drvdata(file);
 836	struct cx88_core *core = dev->core;
 837
 838	return cx88_set_tvnorm(core, tvnorms);
 839}
 840
 841/* only one input in this sample driver */
 842int cx88_enum_input(struct cx88_core  *core, struct v4l2_input *i)
 843{
 844	static const char * const iname[] = {
 845		[CX88_VMUX_COMPOSITE1] = "Composite1",
 846		[CX88_VMUX_COMPOSITE2] = "Composite2",
 847		[CX88_VMUX_COMPOSITE3] = "Composite3",
 848		[CX88_VMUX_COMPOSITE4] = "Composite4",
 849		[CX88_VMUX_SVIDEO] = "S-Video",
 850		[CX88_VMUX_TELEVISION] = "Television",
 851		[CX88_VMUX_CABLE] = "Cable TV",
 852		[CX88_VMUX_DVB] = "DVB",
 853		[CX88_VMUX_DEBUG] = "for debug only",
 854	};
 855	unsigned int n = i->index;
 856
 857	if (n >= 4)
 858		return -EINVAL;
 859	if (!INPUT(n).type)
 860		return -EINVAL;
 861	i->type  = V4L2_INPUT_TYPE_CAMERA;
 862	strscpy(i->name, iname[INPUT(n).type], sizeof(i->name));
 863	if ((INPUT(n).type == CX88_VMUX_TELEVISION) ||
 864	    (INPUT(n).type == CX88_VMUX_CABLE))
 865		i->type = V4L2_INPUT_TYPE_TUNER;
 866
 867	i->std = CX88_NORMS;
 868	return 0;
 869}
 870EXPORT_SYMBOL(cx88_enum_input);
 871
 872static int vidioc_enum_input(struct file *file, void *priv,
 873			     struct v4l2_input *i)
 874{
 875	struct cx8800_dev *dev = video_drvdata(file);
 876	struct cx88_core *core = dev->core;
 877
 878	return cx88_enum_input(core, i);
 879}
 880
 881static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
 882{
 883	struct cx8800_dev *dev = video_drvdata(file);
 884	struct cx88_core *core = dev->core;
 885
 886	*i = core->input;
 887	return 0;
 888}
 889
 890static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
 891{
 892	struct cx8800_dev *dev = video_drvdata(file);
 893	struct cx88_core *core = dev->core;
 894
 895	if (i >= 4)
 896		return -EINVAL;
 897	if (!INPUT(i).type)
 898		return -EINVAL;
 899
 900	cx88_newstation(core);
 901	cx88_video_mux(core, i);
 902	return 0;
 903}
 904
 905static int vidioc_g_tuner(struct file *file, void *priv,
 906			  struct v4l2_tuner *t)
 907{
 908	struct cx8800_dev *dev = video_drvdata(file);
 909	struct cx88_core *core = dev->core;
 910	u32 reg;
 911
 912	if (unlikely(core->board.tuner_type == UNSET))
 913		return -EINVAL;
 914	if (t->index != 0)
 915		return -EINVAL;
 916
 917	strscpy(t->name, "Television", sizeof(t->name));
 918	t->capability = V4L2_TUNER_CAP_NORM;
 919	t->rangehigh  = 0xffffffffUL;
 920	call_all(core, tuner, g_tuner, t);
 921
 922	cx88_get_stereo(core, t);
 923	reg = cx_read(MO_DEVICE_STATUS);
 924	t->signal = (reg & (1 << 5)) ? 0xffff : 0x0000;
 925	return 0;
 926}
 927
 928static int vidioc_s_tuner(struct file *file, void *priv,
 929			  const struct v4l2_tuner *t)
 930{
 931	struct cx8800_dev *dev = video_drvdata(file);
 932	struct cx88_core *core = dev->core;
 933
 934	if (core->board.tuner_type == UNSET)
 935		return -EINVAL;
 936	if (t->index != 0)
 937		return -EINVAL;
 938
 939	cx88_set_stereo(core, t->audmode, 1);
 940	return 0;
 941}
 942
 943static int vidioc_g_frequency(struct file *file, void *priv,
 944			      struct v4l2_frequency *f)
 945{
 946	struct cx8800_dev *dev = video_drvdata(file);
 947	struct cx88_core *core = dev->core;
 948
 949	if (unlikely(core->board.tuner_type == UNSET))
 950		return -EINVAL;
 951	if (f->tuner)
 952		return -EINVAL;
 953
 954	f->frequency = core->freq;
 955
 956	call_all(core, tuner, g_frequency, f);
 957
 958	return 0;
 959}
 960
 961int cx88_set_freq(struct cx88_core  *core,
 962		  const struct v4l2_frequency *f)
 963{
 964	struct v4l2_frequency new_freq = *f;
 965
 966	if (unlikely(core->board.tuner_type == UNSET))
 967		return -EINVAL;
 968	if (unlikely(f->tuner != 0))
 969		return -EINVAL;
 970
 971	cx88_newstation(core);
 972	call_all(core, tuner, s_frequency, f);
 973	call_all(core, tuner, g_frequency, &new_freq);
 974	core->freq = new_freq.frequency;
 975
 976	/* When changing channels it is required to reset TVAUDIO */
 977	usleep_range(10000, 20000);
 978	cx88_set_tvaudio(core);
 979
 980	return 0;
 981}
 982EXPORT_SYMBOL(cx88_set_freq);
 983
 984static int vidioc_s_frequency(struct file *file, void *priv,
 985			      const struct v4l2_frequency *f)
 986{
 987	struct cx8800_dev *dev = video_drvdata(file);
 988	struct cx88_core *core = dev->core;
 989
 990	return cx88_set_freq(core, f);
 991}
 992
 993#ifdef CONFIG_VIDEO_ADV_DEBUG
 994static int vidioc_g_register(struct file *file, void *fh,
 995			     struct v4l2_dbg_register *reg)
 996{
 997	struct cx8800_dev *dev = video_drvdata(file);
 998	struct cx88_core *core = dev->core;
 999
1000	/* cx2388x has a 24-bit register space */
1001	reg->val = cx_read(reg->reg & 0xfffffc);
1002	reg->size = 4;
1003	return 0;
1004}
1005
1006static int vidioc_s_register(struct file *file, void *fh,
1007			     const struct v4l2_dbg_register *reg)
1008{
1009	struct cx8800_dev *dev = video_drvdata(file);
1010	struct cx88_core *core = dev->core;
1011
1012	cx_write(reg->reg & 0xfffffc, reg->val);
1013	return 0;
1014}
1015#endif
1016
1017/* ----------------------------------------------------------- */
1018/* RADIO ESPECIFIC IOCTLS                                      */
1019/* ----------------------------------------------------------- */
1020
1021static int radio_g_tuner(struct file *file, void *priv,
1022			 struct v4l2_tuner *t)
1023{
1024	struct cx8800_dev *dev = video_drvdata(file);
1025	struct cx88_core *core = dev->core;
1026
1027	if (unlikely(t->index > 0))
1028		return -EINVAL;
1029
1030	strscpy(t->name, "Radio", sizeof(t->name));
1031
1032	call_all(core, tuner, g_tuner, t);
1033	return 0;
1034}
1035
1036static int radio_s_tuner(struct file *file, void *priv,
1037			 const struct v4l2_tuner *t)
1038{
1039	struct cx8800_dev *dev = video_drvdata(file);
1040	struct cx88_core *core = dev->core;
1041
1042	if (t->index != 0)
1043		return -EINVAL;
1044
1045	call_all(core, tuner, s_tuner, t);
1046	return 0;
1047}
1048
1049/* ----------------------------------------------------------- */
1050
1051static const char *cx88_vid_irqs[32] = {
1052	"y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1053	"y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1054	"y_oflow",  "u_oflow",  "v_oflow",  "vbi_oflow",
1055	"y_sync",   "u_sync",   "v_sync",   "vbi_sync",
1056	"opc_err",  "par_err",  "rip_err",  "pci_abort",
1057};
1058
1059static void cx8800_vid_irq(struct cx8800_dev *dev)
1060{
1061	struct cx88_core *core = dev->core;
1062	u32 status, mask, count;
1063
1064	status = cx_read(MO_VID_INTSTAT);
1065	mask   = cx_read(MO_VID_INTMSK);
1066	if (0 == (status & mask))
1067		return;
1068	cx_write(MO_VID_INTSTAT, status);
1069	if (irq_debug  ||  (status & mask & ~0xff))
1070		cx88_print_irqbits("irq vid",
1071				   cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
1072				   status, mask);
1073
1074	/* risc op code error */
1075	if (status & (1 << 16)) {
1076		pr_warn("video risc op code error\n");
1077		cx_clear(MO_VID_DMACNTRL, 0x11);
1078		cx_clear(VID_CAPTURE_CONTROL, 0x06);
1079		cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1080	}
1081
1082	/* risc1 y */
1083	if (status & 0x01) {
1084		spin_lock(&dev->slock);
1085		count = cx_read(MO_VIDY_GPCNT);
1086		cx88_wakeup(core, &dev->vidq, count);
1087		spin_unlock(&dev->slock);
1088	}
1089
1090	/* risc1 vbi */
1091	if (status & 0x08) {
1092		spin_lock(&dev->slock);
1093		count = cx_read(MO_VBI_GPCNT);
1094		cx88_wakeup(core, &dev->vbiq, count);
1095		spin_unlock(&dev->slock);
1096	}
1097}
1098
1099static irqreturn_t cx8800_irq(int irq, void *dev_id)
1100{
1101	struct cx8800_dev *dev = dev_id;
1102	struct cx88_core *core = dev->core;
1103	u32 status;
1104	int loop, handled = 0;
1105
1106	for (loop = 0; loop < 10; loop++) {
1107		status = cx_read(MO_PCI_INTSTAT) &
1108			(core->pci_irqmask | PCI_INT_VIDINT);
1109		if (status == 0)
1110			goto out;
1111		cx_write(MO_PCI_INTSTAT, status);
1112		handled = 1;
1113
1114		if (status & core->pci_irqmask)
1115			cx88_core_irq(core, status);
1116		if (status & PCI_INT_VIDINT)
1117			cx8800_vid_irq(dev);
1118	}
1119	if (loop == 10) {
1120		pr_warn("irq loop -- clearing mask\n");
1121		cx_write(MO_PCI_INTMSK, 0);
1122	}
1123
1124 out:
1125	return IRQ_RETVAL(handled);
1126}
1127
1128/* ----------------------------------------------------------- */
1129/* exported stuff                                              */
1130
1131static const struct v4l2_file_operations video_fops = {
1132	.owner	       = THIS_MODULE,
1133	.open	       = v4l2_fh_open,
1134	.release       = vb2_fop_release,
1135	.read	       = vb2_fop_read,
1136	.poll          = vb2_fop_poll,
1137	.mmap	       = vb2_fop_mmap,
1138	.unlocked_ioctl = video_ioctl2,
1139};
1140
1141static const struct v4l2_ioctl_ops video_ioctl_ops = {
1142	.vidioc_querycap      = vidioc_querycap,
1143	.vidioc_enum_fmt_vid_cap  = vidioc_enum_fmt_vid_cap,
1144	.vidioc_g_fmt_vid_cap     = vidioc_g_fmt_vid_cap,
1145	.vidioc_try_fmt_vid_cap   = vidioc_try_fmt_vid_cap,
1146	.vidioc_s_fmt_vid_cap     = vidioc_s_fmt_vid_cap,
1147	.vidioc_reqbufs       = vb2_ioctl_reqbufs,
1148	.vidioc_querybuf      = vb2_ioctl_querybuf,
1149	.vidioc_qbuf          = vb2_ioctl_qbuf,
1150	.vidioc_dqbuf         = vb2_ioctl_dqbuf,
1151	.vidioc_g_std         = vidioc_g_std,
1152	.vidioc_s_std         = vidioc_s_std,
1153	.vidioc_enum_input    = vidioc_enum_input,
1154	.vidioc_g_input       = vidioc_g_input,
1155	.vidioc_s_input       = vidioc_s_input,
1156	.vidioc_streamon      = vb2_ioctl_streamon,
1157	.vidioc_streamoff     = vb2_ioctl_streamoff,
1158	.vidioc_g_tuner       = vidioc_g_tuner,
1159	.vidioc_s_tuner       = vidioc_s_tuner,
1160	.vidioc_g_frequency   = vidioc_g_frequency,
1161	.vidioc_s_frequency   = vidioc_s_frequency,
1162	.vidioc_subscribe_event      = v4l2_ctrl_subscribe_event,
1163	.vidioc_unsubscribe_event    = v4l2_event_unsubscribe,
1164#ifdef CONFIG_VIDEO_ADV_DEBUG
1165	.vidioc_g_register    = vidioc_g_register,
1166	.vidioc_s_register    = vidioc_s_register,
1167#endif
1168};
1169
1170static const struct video_device cx8800_video_template = {
1171	.name                 = "cx8800-video",
1172	.fops                 = &video_fops,
1173	.ioctl_ops	      = &video_ioctl_ops,
1174	.tvnorms              = CX88_NORMS,
1175};
1176
1177static const struct v4l2_ioctl_ops vbi_ioctl_ops = {
1178	.vidioc_querycap      = vidioc_querycap,
1179	.vidioc_g_fmt_vbi_cap     = cx8800_vbi_fmt,
1180	.vidioc_try_fmt_vbi_cap   = cx8800_vbi_fmt,
1181	.vidioc_s_fmt_vbi_cap     = cx8800_vbi_fmt,
1182	.vidioc_reqbufs       = vb2_ioctl_reqbufs,
1183	.vidioc_querybuf      = vb2_ioctl_querybuf,
1184	.vidioc_qbuf          = vb2_ioctl_qbuf,
1185	.vidioc_dqbuf         = vb2_ioctl_dqbuf,
1186	.vidioc_g_std         = vidioc_g_std,
1187	.vidioc_s_std         = vidioc_s_std,
1188	.vidioc_enum_input    = vidioc_enum_input,
1189	.vidioc_g_input       = vidioc_g_input,
1190	.vidioc_s_input       = vidioc_s_input,
1191	.vidioc_streamon      = vb2_ioctl_streamon,
1192	.vidioc_streamoff     = vb2_ioctl_streamoff,
1193	.vidioc_g_tuner       = vidioc_g_tuner,
1194	.vidioc_s_tuner       = vidioc_s_tuner,
1195	.vidioc_g_frequency   = vidioc_g_frequency,
1196	.vidioc_s_frequency   = vidioc_s_frequency,
1197#ifdef CONFIG_VIDEO_ADV_DEBUG
1198	.vidioc_g_register    = vidioc_g_register,
1199	.vidioc_s_register    = vidioc_s_register,
1200#endif
1201};
1202
1203static const struct video_device cx8800_vbi_template = {
1204	.name                 = "cx8800-vbi",
1205	.fops                 = &video_fops,
1206	.ioctl_ops	      = &vbi_ioctl_ops,
1207	.tvnorms              = CX88_NORMS,
1208};
1209
1210static const struct v4l2_file_operations radio_fops = {
1211	.owner         = THIS_MODULE,
1212	.open          = radio_open,
1213	.poll          = v4l2_ctrl_poll,
1214	.release       = v4l2_fh_release,
1215	.unlocked_ioctl = video_ioctl2,
1216};
1217
1218static const struct v4l2_ioctl_ops radio_ioctl_ops = {
1219	.vidioc_querycap      = vidioc_querycap,
1220	.vidioc_g_tuner       = radio_g_tuner,
1221	.vidioc_s_tuner       = radio_s_tuner,
1222	.vidioc_g_frequency   = vidioc_g_frequency,
1223	.vidioc_s_frequency   = vidioc_s_frequency,
1224	.vidioc_subscribe_event      = v4l2_ctrl_subscribe_event,
1225	.vidioc_unsubscribe_event    = v4l2_event_unsubscribe,
1226#ifdef CONFIG_VIDEO_ADV_DEBUG
1227	.vidioc_g_register    = vidioc_g_register,
1228	.vidioc_s_register    = vidioc_s_register,
1229#endif
1230};
1231
1232static const struct video_device cx8800_radio_template = {
1233	.name                 = "cx8800-radio",
1234	.fops                 = &radio_fops,
1235	.ioctl_ops	      = &radio_ioctl_ops,
1236};
1237
1238static const struct v4l2_ctrl_ops cx8800_ctrl_vid_ops = {
1239	.s_ctrl = cx8800_s_vid_ctrl,
1240};
1241
1242static const struct v4l2_ctrl_ops cx8800_ctrl_aud_ops = {
1243	.s_ctrl = cx8800_s_aud_ctrl,
1244};
1245
1246/* ----------------------------------------------------------- */
1247
1248static void cx8800_unregister_video(struct cx8800_dev *dev)
1249{
1250	video_unregister_device(&dev->radio_dev);
1251	video_unregister_device(&dev->vbi_dev);
1252	video_unregister_device(&dev->video_dev);
1253}
1254
1255static int cx8800_initdev(struct pci_dev *pci_dev,
1256			  const struct pci_device_id *pci_id)
1257{
1258	struct cx8800_dev *dev;
1259	struct cx88_core *core;
1260	struct vb2_queue *q;
1261	int err;
1262	int i;
1263
1264	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1265	if (!dev)
1266		return -ENOMEM;
1267
1268	/* pci init */
1269	dev->pci = pci_dev;
1270	if (pci_enable_device(pci_dev)) {
1271		err = -EIO;
1272		goto fail_free;
1273	}
1274	core = cx88_core_get(dev->pci);
1275	if (!core) {
1276		err = -EINVAL;
1277		goto fail_disable;
1278	}
1279	dev->core = core;
1280
1281	/* print pci info */
1282	dev->pci_rev = pci_dev->revision;
1283	pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER,  &dev->pci_lat);
1284	pr_info("found at %s, rev: %d, irq: %d, latency: %d, mmio: 0x%llx\n",
1285		pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
1286		dev->pci_lat,
1287		(unsigned long long)pci_resource_start(pci_dev, 0));
1288
1289	pci_set_master(pci_dev);
1290	err = dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32));
1291	if (err) {
1292		pr_err("Oops: no 32bit PCI DMA ???\n");
1293		goto fail_core;
1294	}
1295
1296	/* initialize driver struct */
1297	spin_lock_init(&dev->slock);
1298
1299	/* init video dma queues */
1300	INIT_LIST_HEAD(&dev->vidq.active);
1301
1302	/* init vbi dma queues */
1303	INIT_LIST_HEAD(&dev->vbiq.active);
1304
1305	/* get irq */
1306	err = request_irq(pci_dev->irq, cx8800_irq,
1307			  IRQF_SHARED, core->name, dev);
1308	if (err < 0) {
1309		pr_err("can't get IRQ %d\n", pci_dev->irq);
1310		goto fail_core;
1311	}
1312	cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1313
1314	for (i = 0; i < CX8800_AUD_CTLS; i++) {
1315		const struct cx88_ctrl *cc = &cx8800_aud_ctls[i];
1316		struct v4l2_ctrl *vc;
1317
1318		vc = v4l2_ctrl_new_std(&core->audio_hdl, &cx8800_ctrl_aud_ops,
1319				       cc->id, cc->minimum, cc->maximum,
1320				       cc->step, cc->default_value);
1321		if (!vc) {
1322			err = core->audio_hdl.error;
1323			goto fail_irq;
1324		}
1325		vc->priv = (void *)cc;
1326	}
1327
1328	for (i = 0; i < CX8800_VID_CTLS; i++) {
1329		const struct cx88_ctrl *cc = &cx8800_vid_ctls[i];
1330		struct v4l2_ctrl *vc;
1331
1332		vc = v4l2_ctrl_new_std(&core->video_hdl, &cx8800_ctrl_vid_ops,
1333				       cc->id, cc->minimum, cc->maximum,
1334				       cc->step, cc->default_value);
1335		if (!vc) {
1336			err = core->video_hdl.error;
1337			goto fail_irq;
1338		}
1339		vc->priv = (void *)cc;
1340		if (vc->id == V4L2_CID_CHROMA_AGC)
1341			core->chroma_agc = vc;
1342	}
1343	v4l2_ctrl_add_handler(&core->video_hdl, &core->audio_hdl, NULL, false);
1344
1345	/* load and configure helper modules */
1346
1347	if (core->board.audio_chip == CX88_AUDIO_WM8775) {
1348		struct i2c_board_info wm8775_info = {
1349			.type = "wm8775",
1350			.addr = 0x36 >> 1,
1351			.platform_data = &core->wm8775_data,
1352		};
1353		struct v4l2_subdev *sd;
1354
1355		if (core->boardnr == CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1)
1356			core->wm8775_data.is_nova_s = true;
1357		else
1358			core->wm8775_data.is_nova_s = false;
1359
1360		sd = v4l2_i2c_new_subdev_board(&core->v4l2_dev, &core->i2c_adap,
1361					       &wm8775_info, NULL);
1362		if (sd) {
1363			core->sd_wm8775 = sd;
1364			sd->grp_id = WM8775_GID;
1365		}
1366	}
1367
1368	if (core->board.audio_chip == CX88_AUDIO_TVAUDIO) {
1369		/*
1370		 * This probes for a tda9874 as is used on some
1371		 * Pixelview Ultra boards.
1372		 */
1373		v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
1374				    "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
1375	}
1376
1377	switch (core->boardnr) {
1378	case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
1379	case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
1380		static const struct i2c_board_info rtc_info = {
1381			I2C_BOARD_INFO("isl1208", 0x6f)
1382		};
1383
1384		request_module("rtc-isl1208");
1385		core->i2c_rtc = i2c_new_client_device(&core->i2c_adap, &rtc_info);
1386	}
1387		fallthrough;
1388	case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1389	case CX88_BOARD_NOTONLYTV_LV3H:
1390		request_module("ir-kbd-i2c");
1391	}
1392
1393	/* Sets device info at pci_dev */
1394	pci_set_drvdata(pci_dev, dev);
1395
1396	dev->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
1397
1398	/* Maintain a reference so cx88-blackbird can query the 8800 device. */
1399	core->v4ldev = dev;
1400
1401	/* initial device configuration */
1402	mutex_lock(&core->lock);
1403	cx88_set_tvnorm(core, V4L2_STD_NTSC_M);
1404	v4l2_ctrl_handler_setup(&core->video_hdl);
1405	v4l2_ctrl_handler_setup(&core->audio_hdl);
1406	cx88_video_mux(core, 0);
1407
1408	q = &dev->vb2_vidq;
1409	q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1410	q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1411	q->gfp_flags = GFP_DMA32;
1412	q->min_queued_buffers = 2;
1413	q->drv_priv = dev;
1414	q->buf_struct_size = sizeof(struct cx88_buffer);
1415	q->ops = &cx8800_video_qops;
1416	q->mem_ops = &vb2_dma_sg_memops;
1417	q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1418	q->lock = &core->lock;
1419	q->dev = &dev->pci->dev;
1420
1421	err = vb2_queue_init(q);
1422	if (err < 0)
1423		goto fail_unreg;
1424
1425	q = &dev->vb2_vbiq;
1426	q->type = V4L2_BUF_TYPE_VBI_CAPTURE;
1427	q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1428	q->gfp_flags = GFP_DMA32;
1429	q->min_queued_buffers = 2;
1430	q->drv_priv = dev;
1431	q->buf_struct_size = sizeof(struct cx88_buffer);
1432	q->ops = &cx8800_vbi_qops;
1433	q->mem_ops = &vb2_dma_sg_memops;
1434	q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1435	q->lock = &core->lock;
1436	q->dev = &dev->pci->dev;
1437
1438	err = vb2_queue_init(q);
1439	if (err < 0)
1440		goto fail_unreg;
1441
1442	/* register v4l devices */
1443	cx88_vdev_init(core, dev->pci, &dev->video_dev,
1444		       &cx8800_video_template, "video");
1445	video_set_drvdata(&dev->video_dev, dev);
1446	dev->video_dev.ctrl_handler = &core->video_hdl;
1447	dev->video_dev.queue = &dev->vb2_vidq;
1448	dev->video_dev.device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
1449				     V4L2_CAP_VIDEO_CAPTURE;
1450	if (core->board.tuner_type != UNSET)
1451		dev->video_dev.device_caps |= V4L2_CAP_TUNER;
1452	err = video_register_device(&dev->video_dev, VFL_TYPE_VIDEO,
1453				    video_nr[core->nr]);
1454	if (err < 0) {
1455		pr_err("can't register video device\n");
1456		goto fail_unreg;
1457	}
1458	pr_info("registered device %s [v4l2]\n",
1459		video_device_node_name(&dev->video_dev));
1460
1461	cx88_vdev_init(core, dev->pci, &dev->vbi_dev,
1462		       &cx8800_vbi_template, "vbi");
1463	video_set_drvdata(&dev->vbi_dev, dev);
1464	dev->vbi_dev.queue = &dev->vb2_vbiq;
1465	dev->vbi_dev.device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
1466				   V4L2_CAP_VBI_CAPTURE;
1467	if (core->board.tuner_type != UNSET)
1468		dev->vbi_dev.device_caps |= V4L2_CAP_TUNER;
1469	err = video_register_device(&dev->vbi_dev, VFL_TYPE_VBI,
1470				    vbi_nr[core->nr]);
1471	if (err < 0) {
1472		pr_err("can't register vbi device\n");
1473		goto fail_unreg;
1474	}
1475	pr_info("registered device %s\n",
1476		video_device_node_name(&dev->vbi_dev));
1477
1478	if (core->board.radio.type == CX88_RADIO) {
1479		cx88_vdev_init(core, dev->pci, &dev->radio_dev,
1480			       &cx8800_radio_template, "radio");
1481		video_set_drvdata(&dev->radio_dev, dev);
1482		dev->radio_dev.ctrl_handler = &core->audio_hdl;
1483		dev->radio_dev.device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER;
1484		err = video_register_device(&dev->radio_dev, VFL_TYPE_RADIO,
1485					    radio_nr[core->nr]);
1486		if (err < 0) {
1487			pr_err("can't register radio device\n");
1488			goto fail_unreg;
1489		}
1490		pr_info("registered device %s\n",
1491			video_device_node_name(&dev->radio_dev));
1492	}
1493
1494	/* start tvaudio thread */
1495	if (core->board.tuner_type != UNSET) {
1496		core->kthread = kthread_run(cx88_audio_thread,
1497					    core, "cx88 tvaudio");
1498		if (IS_ERR(core->kthread)) {
1499			err = PTR_ERR(core->kthread);
1500			pr_err("failed to create cx88 audio thread, err=%d\n",
1501			       err);
1502		}
1503	}
1504	mutex_unlock(&core->lock);
1505
1506	return 0;
1507
1508fail_unreg:
1509	cx8800_unregister_video(dev);
1510	mutex_unlock(&core->lock);
1511fail_irq:
1512	free_irq(pci_dev->irq, dev);
1513fail_core:
1514	core->v4ldev = NULL;
1515	cx88_core_put(core, dev->pci);
1516fail_disable:
1517	pci_disable_device(pci_dev);
1518fail_free:
1519	kfree(dev);
1520	return err;
1521}
1522
1523static void cx8800_finidev(struct pci_dev *pci_dev)
1524{
1525	struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1526	struct cx88_core *core = dev->core;
1527
1528	/* stop thread */
1529	if (core->kthread) {
1530		kthread_stop(core->kthread);
1531		core->kthread = NULL;
1532	}
1533
1534	if (core->ir)
1535		cx88_ir_stop(core);
1536
1537	cx88_shutdown(core); /* FIXME */
1538
1539	/* unregister stuff */
1540
1541	free_irq(pci_dev->irq, dev);
1542	cx8800_unregister_video(dev);
1543	pci_disable_device(pci_dev);
1544
1545	core->v4ldev = NULL;
1546
1547	/* free memory */
1548	cx88_core_put(core, dev->pci);
1549	kfree(dev);
1550}
1551
1552static int __maybe_unused cx8800_suspend(struct device *dev_d)
1553{
1554	struct cx8800_dev *dev = dev_get_drvdata(dev_d);
1555	struct cx88_core *core = dev->core;
1556	unsigned long flags;
1557
1558	/* stop video+vbi capture */
1559	spin_lock_irqsave(&dev->slock, flags);
1560	if (!list_empty(&dev->vidq.active)) {
1561		pr_info("suspend video\n");
1562		stop_video_dma(dev);
1563	}
1564	if (!list_empty(&dev->vbiq.active)) {
1565		pr_info("suspend vbi\n");
1566		cx8800_stop_vbi_dma(dev);
1567	}
1568	spin_unlock_irqrestore(&dev->slock, flags);
1569
1570	if (core->ir)
1571		cx88_ir_stop(core);
1572	/* FIXME -- shutdown device */
1573	cx88_shutdown(core);
1574
1575	dev->state.disabled = 1;
1576	return 0;
1577}
1578
1579static int __maybe_unused cx8800_resume(struct device *dev_d)
1580{
1581	struct cx8800_dev *dev = dev_get_drvdata(dev_d);
1582	struct cx88_core *core = dev->core;
1583	unsigned long flags;
1584
1585	dev->state.disabled = 0;
1586
1587	/* FIXME: re-initialize hardware */
1588	cx88_reset(core);
1589	if (core->ir)
1590		cx88_ir_start(core);
1591
1592	cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1593
1594	/* restart video+vbi capture */
1595	spin_lock_irqsave(&dev->slock, flags);
1596	if (!list_empty(&dev->vidq.active)) {
1597		pr_info("resume video\n");
1598		restart_video_queue(dev, &dev->vidq);
1599	}
1600	if (!list_empty(&dev->vbiq.active)) {
1601		pr_info("resume vbi\n");
1602		cx8800_restart_vbi_queue(dev, &dev->vbiq);
1603	}
1604	spin_unlock_irqrestore(&dev->slock, flags);
1605
1606	return 0;
1607}
1608
1609/* ----------------------------------------------------------- */
1610
1611static const struct pci_device_id cx8800_pci_tbl[] = {
1612	{
1613		.vendor       = 0x14f1,
1614		.device       = 0x8800,
1615		.subvendor    = PCI_ANY_ID,
1616		.subdevice    = PCI_ANY_ID,
1617	}, {
1618		/* --- end of list --- */
1619	}
1620};
1621MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
1622
1623static SIMPLE_DEV_PM_OPS(cx8800_pm_ops, cx8800_suspend, cx8800_resume);
1624
1625static struct pci_driver cx8800_pci_driver = {
1626	.name      = "cx8800",
1627	.id_table  = cx8800_pci_tbl,
1628	.probe     = cx8800_initdev,
1629	.remove    = cx8800_finidev,
1630	.driver.pm = &cx8800_pm_ops,
1631};
1632
1633module_pci_driver(cx8800_pci_driver);