cx25821-medusa-reg.h

  1/* SPDX-License-Identifier: GPL-2.0-or-later */
  2/*
  3 *  Driver for the Conexant CX25821 PCIe bridge
  4 *
  5 *  Copyright (C) 2009 Conexant Systems Inc.
  6 *  Authors  <shu.lin@conexant.com>, <hiep.huynh@conexant.com>
  7 */
  8
  9#ifndef __MEDUSA_REGISTERS__
 10#define __MEDUSA_REGISTERS__
 11
 12/* Serial Slave Registers */
 13#define	HOST_REGISTER1				0x0000
 14#define	HOST_REGISTER2				0x0001
 15
 16/* Chip Configuration Registers */
 17#define	CHIP_CTRL				0x0100
 18#define	AFE_AB_CTRL				0x0104
 19#define	AFE_CD_CTRL				0x0108
 20#define	AFE_EF_CTRL				0x010C
 21#define	AFE_GH_CTRL				0x0110
 22#define	DENC_AB_CTRL				0x0114
 23#define	BYP_AB_CTRL				0x0118
 24#define	MON_A_CTRL				0x011C
 25#define	DISP_SEQ_A				0x0120
 26#define	DISP_SEQ_B				0x0124
 27#define	DISP_AB_CNT				0x0128
 28#define	DISP_CD_CNT				0x012C
 29#define	DISP_EF_CNT				0x0130
 30#define	DISP_GH_CNT				0x0134
 31#define	DISP_IJ_CNT				0x0138
 32#define	PIN_OE_CTRL				0x013C
 33#define	PIN_SPD_CTRL				0x0140
 34#define	PIN_SPD_CTRL2				0x0144
 35#define	IRQ_STAT_CTRL				0x0148
 36#define	POWER_CTRL_AB				0x014C
 37#define	POWER_CTRL_CD				0x0150
 38#define	POWER_CTRL_EF				0x0154
 39#define	POWER_CTRL_GH				0x0158
 40#define	TUNE_CTRL				0x015C
 41#define	BIAS_CTRL				0x0160
 42#define	AFE_AB_DIAG_CTRL			0x0164
 43#define	AFE_CD_DIAG_CTRL			0x0168
 44#define	AFE_EF_DIAG_CTRL			0x016C
 45#define	AFE_GH_DIAG_CTRL			0x0170
 46#define	PLL_AB_DIAG_CTRL			0x0174
 47#define	PLL_CD_DIAG_CTRL			0x0178
 48#define	PLL_EF_DIAG_CTRL			0x017C
 49#define	PLL_GH_DIAG_CTRL			0x0180
 50#define	TEST_CTRL				0x0184
 51#define	BIST_STAT				0x0188
 52#define	BIST_STAT2				0x018C
 53#define	BIST_VID_PLL_AB_STAT			0x0190
 54#define	BIST_VID_PLL_CD_STAT			0x0194
 55#define	BIST_VID_PLL_EF_STAT			0x0198
 56#define	BIST_VID_PLL_GH_STAT			0x019C
 57#define	DLL_DIAG_CTRL				0x01A0
 58#define	DEV_CH_ID_CTRL				0x01A4
 59#define	ABIST_CTRL_STATUS			0x01A8
 60#define	ABIST_FREQ				0x01AC
 61#define	ABIST_GOERT_SHIFT			0x01B0
 62#define	ABIST_COEF12				0x01B4
 63#define	ABIST_COEF34				0x01B8
 64#define	ABIST_COEF56				0x01BC
 65#define	ABIST_COEF7_SNR				0x01C0
 66#define	ABIST_ADC_CAL				0x01C4
 67#define	ABIST_BIN1_VGA0				0x01C8
 68#define	ABIST_BIN2_VGA1				0x01CC
 69#define	ABIST_BIN3_VGA2				0x01D0
 70#define	ABIST_BIN4_VGA3				0x01D4
 71#define	ABIST_BIN5_VGA4				0x01D8
 72#define	ABIST_BIN6_VGA5				0x01DC
 73#define	ABIST_BIN7_VGA6				0x01E0
 74#define	ABIST_CLAMP_A				0x01E4
 75#define	ABIST_CLAMP_B				0x01E8
 76#define	ABIST_CLAMP_C				0x01EC
 77#define	ABIST_CLAMP_D				0x01F0
 78#define	ABIST_CLAMP_E				0x01F4
 79#define	ABIST_CLAMP_F				0x01F8
 80
 81/* Digital Video Encoder A Registers */
 82#define	DENC_A_REG_1				0x0200
 83#define	DENC_A_REG_2				0x0204
 84#define	DENC_A_REG_3				0x0208
 85#define	DENC_A_REG_4				0x020C
 86#define	DENC_A_REG_5				0x0210
 87#define	DENC_A_REG_6				0x0214
 88#define	DENC_A_REG_7				0x0218
 89#define	DENC_A_REG_8				0x021C
 90
 91/* Digital Video Encoder B Registers */
 92#define	DENC_B_REG_1				0x0300
 93#define	DENC_B_REG_2				0x0304
 94#define	DENC_B_REG_3				0x0308
 95#define	DENC_B_REG_4				0x030C
 96#define	DENC_B_REG_5				0x0310
 97#define	DENC_B_REG_6				0x0314
 98#define	DENC_B_REG_7				0x0318
 99#define	DENC_B_REG_8				0x031C
100
101/* Video Decoder A Registers */
102#define	MODE_CTRL				0x1000
103#define	OUT_CTRL1				0x1004
104#define	OUT_CTRL_NS				0x1008
105#define	GEN_STAT				0x100C
106#define	INT_STAT_MASK				0x1010
107#define	LUMA_CTRL				0x1014
108#define	CHROMA_CTRL				0x1018
109#define	CRUSH_CTRL				0x101C
110#define	HORIZ_TIM_CTRL				0x1020
111#define	VERT_TIM_CTRL				0x1024
112#define	MISC_TIM_CTRL				0x1028
113#define	FIELD_COUNT				0x102C
114#define	HSCALE_CTRL				0x1030
115#define	VSCALE_CTRL				0x1034
116#define	MAN_VGA_CTRL				0x1038
117#define	MAN_AGC_CTRL				0x103C
118#define	DFE_CTRL1				0x1040
119#define	DFE_CTRL2				0x1044
120#define	DFE_CTRL3				0x1048
121#define	PLL_CTRL				0x104C
122#define	PLL_CTRL_FAST				0x1050
123#define	HTL_CTRL				0x1054
124#define	SRC_CFG					0x1058
125#define	SC_STEP_SIZE				0x105C
126#define	SC_CONVERGE_CTRL			0x1060
127#define	SC_LOOP_CTRL				0x1064
128#define	COMB_2D_HFS_CFG				0x1068
129#define	COMB_2D_HFD_CFG				0x106C
130#define	COMB_2D_LF_CFG				0x1070
131#define	COMB_2D_BLEND				0x1074
132#define	COMB_MISC_CTRL				0x1078
133#define	COMB_FLAT_THRESH_CTRL			0x107C
134#define	COMB_TEST				0x1080
135#define	BP_MISC_CTRL				0x1084
136#define	VCR_DET_CTRL				0x1088
137#define	NOISE_DET_CTRL				0x108C
138#define	COMB_FLAT_NOISE_CTRL			0x1090
139#define	VERSION					0x11F8
140#define	SOFT_RST_CTRL				0x11FC
141
142/* Video Decoder B Registers */
143#define	VDEC_B_MODE_CTRL			0x1200
144#define	VDEC_B_OUT_CTRL1			0x1204
145#define	VDEC_B_OUT_CTRL_NS			0x1208
146#define	VDEC_B_GEN_STAT				0x120C
147#define	VDEC_B_INT_STAT_MASK			0x1210
148#define	VDEC_B_LUMA_CTRL			0x1214
149#define	VDEC_B_CHROMA_CTRL			0x1218
150#define	VDEC_B_CRUSH_CTRL			0x121C
151#define	VDEC_B_HORIZ_TIM_CTRL			0x1220
152#define	VDEC_B_VERT_TIM_CTRL			0x1224
153#define	VDEC_B_MISC_TIM_CTRL			0x1228
154#define	VDEC_B_FIELD_COUNT			0x122C
155#define	VDEC_B_HSCALE_CTRL			0x1230
156#define	VDEC_B_VSCALE_CTRL			0x1234
157#define	VDEC_B_MAN_VGA_CTRL			0x1238
158#define	VDEC_B_MAN_AGC_CTRL			0x123C
159#define	VDEC_B_DFE_CTRL1			0x1240
160#define	VDEC_B_DFE_CTRL2			0x1244
161#define	VDEC_B_DFE_CTRL3			0x1248
162#define	VDEC_B_PLL_CTRL				0x124C
163#define	VDEC_B_PLL_CTRL_FAST			0x1250
164#define	VDEC_B_HTL_CTRL				0x1254
165#define	VDEC_B_SRC_CFG				0x1258
166#define	VDEC_B_SC_STEP_SIZE			0x125C
167#define	VDEC_B_SC_CONVERGE_CTRL			0x1260
168#define	VDEC_B_SC_LOOP_CTRL			0x1264
169#define	VDEC_B_COMB_2D_HFS_CFG			0x1268
170#define	VDEC_B_COMB_2D_HFD_CFG			0x126C
171#define	VDEC_B_COMB_2D_LF_CFG			0x1270
172#define	VDEC_B_COMB_2D_BLEND			0x1274
173#define	VDEC_B_COMB_MISC_CTRL			0x1278
174#define	VDEC_B_COMB_FLAT_THRESH_CTRL		0x127C
175#define	VDEC_B_COMB_TEST			0x1280
176#define	VDEC_B_BP_MISC_CTRL			0x1284
177#define	VDEC_B_VCR_DET_CTRL			0x1288
178#define	VDEC_B_NOISE_DET_CTRL			0x128C
179#define	VDEC_B_COMB_FLAT_NOISE_CTRL		0x1290
180#define	VDEC_B_VERSION				0x13F8
181#define	VDEC_B_SOFT_RST_CTRL			0x13FC
182
183/* Video Decoder C Registers */
184#define	VDEC_C_MODE_CTRL			0x1400
185#define	VDEC_C_OUT_CTRL1			0x1404
186#define	VDEC_C_OUT_CTRL_NS			0x1408
187#define	VDEC_C_GEN_STAT				0x140C
188#define	VDEC_C_INT_STAT_MASK			0x1410
189#define VDEC_C_LUMA_CTRL			0x1414
190#define VDEC_C_CHROMA_CTRL			0x1418
191#define	VDEC_C_CRUSH_CTRL			0x141C
192#define	VDEC_C_HORIZ_TIM_CTRL			0x1420
193#define	VDEC_C_VERT_TIM_CTRL			0x1424
194#define	VDEC_C_MISC_TIM_CTRL			0x1428
195#define	VDEC_C_FIELD_COUNT			0x142C
196#define	VDEC_C_HSCALE_CTRL			0x1430
197#define	VDEC_C_VSCALE_CTRL			0x1434
198#define	VDEC_C_MAN_VGA_CTRL			0x1438
199#define	VDEC_C_MAN_AGC_CTRL			0x143C
200#define	VDEC_C_DFE_CTRL1			0x1440
201#define	VDEC_C_DFE_CTRL2			0x1444
202#define	VDEC_C_DFE_CTRL3			0x1448
203#define	VDEC_C_PLL_CTRL				0x144C
204#define	VDEC_C_PLL_CTRL_FAST			0x1450
205#define	VDEC_C_HTL_CTRL				0x1454
206#define	VDEC_C_SRC_CFG				0x1458
207#define	VDEC_C_SC_STEP_SIZE			0x145C
208#define	VDEC_C_SC_CONVERGE_CTRL			0x1460
209#define	VDEC_C_SC_LOOP_CTRL			0x1464
210#define	VDEC_C_COMB_2D_HFS_CFG			0x1468
211#define	VDEC_C_COMB_2D_HFD_CFG			0x146C
212#define	VDEC_C_COMB_2D_LF_CFG			0x1470
213#define	VDEC_C_COMB_2D_BLEND			0x1474
214#define	VDEC_C_COMB_MISC_CTRL			0x1478
215#define	VDEC_C_COMB_FLAT_THRESH_CTRL		0x147C
216#define	VDEC_C_COMB_TEST			0x1480
217#define	VDEC_C_BP_MISC_CTRL			0x1484
218#define	VDEC_C_VCR_DET_CTRL			0x1488
219#define	VDEC_C_NOISE_DET_CTRL			0x148C
220#define	VDEC_C_COMB_FLAT_NOISE_CTRL		0x1490
221#define	VDEC_C_VERSION				0x15F8
222#define	VDEC_C_SOFT_RST_CTRL			0x15FC
223
224/* Video Decoder D Registers */
225#define VDEC_D_MODE_CTRL			0x1600
226#define VDEC_D_OUT_CTRL1			0x1604
227#define VDEC_D_OUT_CTRL_NS			0x1608
228#define VDEC_D_GEN_STAT				0x160C
229#define VDEC_D_INT_STAT_MASK			0x1610
230#define VDEC_D_LUMA_CTRL			0x1614
231#define VDEC_D_CHROMA_CTRL			0x1618
232#define VDEC_D_CRUSH_CTRL			0x161C
233#define VDEC_D_HORIZ_TIM_CTRL			0x1620
234#define VDEC_D_VERT_TIM_CTRL			0x1624
235#define VDEC_D_MISC_TIM_CTRL			0x1628
236#define VDEC_D_FIELD_COUNT			0x162C
237#define VDEC_D_HSCALE_CTRL			0x1630
238#define VDEC_D_VSCALE_CTRL			0x1634
239#define VDEC_D_MAN_VGA_CTRL			0x1638
240#define VDEC_D_MAN_AGC_CTRL			0x163C
241#define VDEC_D_DFE_CTRL1			0x1640
242#define VDEC_D_DFE_CTRL2			0x1644
243#define VDEC_D_DFE_CTRL3			0x1648
244#define VDEC_D_PLL_CTRL				0x164C
245#define VDEC_D_PLL_CTRL_FAST			0x1650
246#define VDEC_D_HTL_CTRL				0x1654
247#define VDEC_D_SRC_CFG				0x1658
248#define VDEC_D_SC_STEP_SIZE			0x165C
249#define VDEC_D_SC_CONVERGE_CTRL			0x1660
250#define VDEC_D_SC_LOOP_CTRL			0x1664
251#define VDEC_D_COMB_2D_HFS_CFG			0x1668
252#define VDEC_D_COMB_2D_HFD_CFG			0x166C
253#define VDEC_D_COMB_2D_LF_CFG			0x1670
254#define VDEC_D_COMB_2D_BLEND			0x1674
255#define VDEC_D_COMB_MISC_CTRL			0x1678
256#define VDEC_D_COMB_FLAT_THRESH_CTRL		0x167C
257#define VDEC_D_COMB_TEST			0x1680
258#define VDEC_D_BP_MISC_CTRL			0x1684
259#define VDEC_D_VCR_DET_CTRL			0x1688
260#define VDEC_D_NOISE_DET_CTRL			0x168C
261#define VDEC_D_COMB_FLAT_NOISE_CTRL		0x1690
262#define VDEC_D_VERSION				0x17F8
263#define VDEC_D_SOFT_RST_CTRL			0x17FC
264
265/* Video Decoder E Registers */
266#define	VDEC_E_MODE_CTRL			0x1800
267#define	VDEC_E_OUT_CTRL1			0x1804
268#define	VDEC_E_OUT_CTRL_NS			0x1808
269#define	VDEC_E_GEN_STAT				0x180C
270#define	VDEC_E_INT_STAT_MASK			0x1810
271#define	VDEC_E_LUMA_CTRL			0x1814
272#define	VDEC_E_CHROMA_CTRL			0x1818
273#define	VDEC_E_CRUSH_CTRL			0x181C
274#define	VDEC_E_HORIZ_TIM_CTRL			0x1820
275#define	VDEC_E_VERT_TIM_CTRL			0x1824
276#define	VDEC_E_MISC_TIM_CTRL			0x1828
277#define	VDEC_E_FIELD_COUNT			0x182C
278#define	VDEC_E_HSCALE_CTRL			0x1830
279#define	VDEC_E_VSCALE_CTRL			0x1834
280#define	VDEC_E_MAN_VGA_CTRL			0x1838
281#define	VDEC_E_MAN_AGC_CTRL			0x183C
282#define	VDEC_E_DFE_CTRL1			0x1840
283#define	VDEC_E_DFE_CTRL2			0x1844
284#define	VDEC_E_DFE_CTRL3			0x1848
285#define	VDEC_E_PLL_CTRL				0x184C
286#define	VDEC_E_PLL_CTRL_FAST			0x1850
287#define	VDEC_E_HTL_CTRL				0x1854
288#define	VDEC_E_SRC_CFG				0x1858
289#define	VDEC_E_SC_STEP_SIZE			0x185C
290#define	VDEC_E_SC_CONVERGE_CTRL			0x1860
291#define	VDEC_E_SC_LOOP_CTRL			0x1864
292#define	VDEC_E_COMB_2D_HFS_CFG			0x1868
293#define	VDEC_E_COMB_2D_HFD_CFG			0x186C
294#define	VDEC_E_COMB_2D_LF_CFG			0x1870
295#define	VDEC_E_COMB_2D_BLEND			0x1874
296#define	VDEC_E_COMB_MISC_CTRL			0x1878
297#define	VDEC_E_COMB_FLAT_THRESH_CTRL		0x187C
298#define	VDEC_E_COMB_TEST			0x1880
299#define	VDEC_E_BP_MISC_CTRL			0x1884
300#define	VDEC_E_VCR_DET_CTRL			0x1888
301#define	VDEC_E_NOISE_DET_CTRL			0x188C
302#define	VDEC_E_COMB_FLAT_NOISE_CTRL		0x1890
303#define	VDEC_E_VERSION				0x19F8
304#define	VDEC_E_SOFT_RST_CTRL			0x19FC
305
306/* Video Decoder F Registers */
307#define	VDEC_F_MODE_CTRL			0x1A00
308#define	VDEC_F_OUT_CTRL1			0x1A04
309#define	VDEC_F_OUT_CTRL_NS			0x1A08
310#define	VDEC_F_GEN_STAT				0x1A0C
311#define	VDEC_F_INT_STAT_MASK			0x1A10
312#define	VDEC_F_LUMA_CTRL			0x1A14
313#define	VDEC_F_CHROMA_CTRL			0x1A18
314#define	VDEC_F_CRUSH_CTRL			0x1A1C
315#define	VDEC_F_HORIZ_TIM_CTRL			0x1A20
316#define	VDEC_F_VERT_TIM_CTRL			0x1A24
317#define	VDEC_F_MISC_TIM_CTRL			0x1A28
318#define	VDEC_F_FIELD_COUNT			0x1A2C
319#define	VDEC_F_HSCALE_CTRL			0x1A30
320#define	VDEC_F_VSCALE_CTRL			0x1A34
321#define	VDEC_F_MAN_VGA_CTRL			0x1A38
322#define	VDEC_F_MAN_AGC_CTRL			0x1A3C
323#define	VDEC_F_DFE_CTRL1			0x1A40
324#define	VDEC_F_DFE_CTRL2			0x1A44
325#define	VDEC_F_DFE_CTRL3			0x1A48
326#define	VDEC_F_PLL_CTRL				0x1A4C
327#define	VDEC_F_PLL_CTRL_FAST			0x1A50
328#define	VDEC_F_HTL_CTRL				0x1A54
329#define	VDEC_F_SRC_CFG				0x1A58
330#define	VDEC_F_SC_STEP_SIZE			0x1A5C
331#define	VDEC_F_SC_CONVERGE_CTRL			0x1A60
332#define	VDEC_F_SC_LOOP_CTRL			0x1A64
333#define	VDEC_F_COMB_2D_HFS_CFG			0x1A68
334#define	VDEC_F_COMB_2D_HFD_CFG			0x1A6C
335#define	VDEC_F_COMB_2D_LF_CFG			0x1A70
336#define	VDEC_F_COMB_2D_BLEND			0x1A74
337#define	VDEC_F_COMB_MISC_CTRL			0x1A78
338#define	VDEC_F_COMB_FLAT_THRESH_CTRL		0x1A7C
339#define	VDEC_F_COMB_TEST			0x1A80
340#define	VDEC_F_BP_MISC_CTRL			0x1A84
341#define	VDEC_F_VCR_DET_CTRL			0x1A88
342#define	VDEC_F_NOISE_DET_CTRL			0x1A8C
343#define	VDEC_F_COMB_FLAT_NOISE_CTRL		0x1A90
344#define	VDEC_F_VERSION				0x1BF8
345#define	VDEC_F_SOFT_RST_CTRL			0x1BFC
346
347/* Video Decoder G Registers */
348#define	VDEC_G_MODE_CTRL			0x1C00
349#define	VDEC_G_OUT_CTRL1			0x1C04
350#define	VDEC_G_OUT_CTRL_NS			0x1C08
351#define	VDEC_G_GEN_STAT				0x1C0C
352#define	VDEC_G_INT_STAT_MASK			0x1C10
353#define	VDEC_G_LUMA_CTRL			0x1C14
354#define	VDEC_G_CHROMA_CTRL			0x1C18
355#define	VDEC_G_CRUSH_CTRL			0x1C1C
356#define	VDEC_G_HORIZ_TIM_CTRL			0x1C20
357#define	VDEC_G_VERT_TIM_CTRL			0x1C24
358#define	VDEC_G_MISC_TIM_CTRL			0x1C28
359#define	VDEC_G_FIELD_COUNT			0x1C2C
360#define	VDEC_G_HSCALE_CTRL			0x1C30
361#define	VDEC_G_VSCALE_CTRL			0x1C34
362#define	VDEC_G_MAN_VGA_CTRL			0x1C38
363#define	VDEC_G_MAN_AGC_CTRL			0x1C3C
364#define	VDEC_G_DFE_CTRL1			0x1C40
365#define	VDEC_G_DFE_CTRL2			0x1C44
366#define	VDEC_G_DFE_CTRL3			0x1C48
367#define	VDEC_G_PLL_CTRL				0x1C4C
368#define	VDEC_G_PLL_CTRL_FAST			0x1C50
369#define	VDEC_G_HTL_CTRL				0x1C54
370#define	VDEC_G_SRC_CFG				0x1C58
371#define	VDEC_G_SC_STEP_SIZE			0x1C5C
372#define	VDEC_G_SC_CONVERGE_CTRL			0x1C60
373#define	VDEC_G_SC_LOOP_CTRL			0x1C64
374#define	VDEC_G_COMB_2D_HFS_CFG			0x1C68
375#define	VDEC_G_COMB_2D_HFD_CFG			0x1C6C
376#define	VDEC_G_COMB_2D_LF_CFG			0x1C70
377#define	VDEC_G_COMB_2D_BLEND			0x1C74
378#define	VDEC_G_COMB_MISC_CTRL			0x1C78
379#define	VDEC_G_COMB_FLAT_THRESH_CTRL		0x1C7C
380#define	VDEC_G_COMB_TEST			0x1C80
381#define	VDEC_G_BP_MISC_CTRL			0x1C84
382#define	VDEC_G_VCR_DET_CTRL			0x1C88
383#define	VDEC_G_NOISE_DET_CTRL			0x1C8C
384#define	VDEC_G_COMB_FLAT_NOISE_CTRL		0x1C90
385#define	VDEC_G_VERSION				0x1DF8
386#define	VDEC_G_SOFT_RST_CTRL			0x1DFC
387
388/* Video Decoder H Registers  */
389#define	VDEC_H_MODE_CTRL			0x1E00
390#define	VDEC_H_OUT_CTRL1			0x1E04
391#define	VDEC_H_OUT_CTRL_NS			0x1E08
392#define	VDEC_H_GEN_STAT				0x1E0C
393#define	VDEC_H_INT_STAT_MASK			0x1E1E
394#define	VDEC_H_LUMA_CTRL			0x1E14
395#define	VDEC_H_CHROMA_CTRL			0x1E18
396#define	VDEC_H_CRUSH_CTRL			0x1E1C
397#define	VDEC_H_HORIZ_TIM_CTRL			0x1E20
398#define	VDEC_H_VERT_TIM_CTRL			0x1E24
399#define	VDEC_H_MISC_TIM_CTRL			0x1E28
400#define	VDEC_H_FIELD_COUNT			0x1E2C
401#define	VDEC_H_HSCALE_CTRL			0x1E30
402#define	VDEC_H_VSCALE_CTRL			0x1E34
403#define	VDEC_H_MAN_VGA_CTRL			0x1E38
404#define	VDEC_H_MAN_AGC_CTRL			0x1E3C
405#define	VDEC_H_DFE_CTRL1			0x1E40
406#define	VDEC_H_DFE_CTRL2			0x1E44
407#define	VDEC_H_DFE_CTRL3			0x1E48
408#define	VDEC_H_PLL_CTRL				0x1E4C
409#define	VDEC_H_PLL_CTRL_FAST			0x1E50
410#define	VDEC_H_HTL_CTRL				0x1E54
411#define	VDEC_H_SRC_CFG				0x1E58
412#define	VDEC_H_SC_STEP_SIZE			0x1E5C
413#define	VDEC_H_SC_CONVERGE_CTRL			0x1E60
414#define	VDEC_H_SC_LOOP_CTRL			0x1E64
415#define	VDEC_H_COMB_2D_HFS_CFG			0x1E68
416#define	VDEC_H_COMB_2D_HFD_CFG			0x1E6C
417#define	VDEC_H_COMB_2D_LF_CFG			0x1E70
418#define	VDEC_H_COMB_2D_BLEND			0x1E74
419#define	VDEC_H_COMB_MISC_CTRL			0x1E78
420#define	VDEC_H_COMB_FLAT_THRESH_CTRL		0x1E7C
421#define	VDEC_H_COMB_TEST			0x1E80
422#define	VDEC_H_BP_MISC_CTRL			0x1E84
423#define	VDEC_H_VCR_DET_CTRL			0x1E88
424#define	VDEC_H_NOISE_DET_CTRL			0x1E8C
425#define	VDEC_H_COMB_FLAT_NOISE_CTRL		0x1E90
426#define	VDEC_H_VERSION				0x1FF8
427#define	VDEC_H_SOFT_RST_CTRL			0x1FFC
428
429/*****************************************************************************/
430/* LUMA_CTRL register fields */
431#define VDEC_A_BRITE_CTRL			0x1014
432#define VDEC_A_CNTRST_CTRL			0x1015
433#define VDEC_A_PEAK_SEL				0x1016
434
435/*****************************************************************************/
436/* CHROMA_CTRL register fields */
437#define VDEC_A_USAT_CTRL			0x1018
438#define VDEC_A_VSAT_CTRL			0x1019
439#define VDEC_A_HUE_CTRL				0x101A
440
441#endif