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cx23885.h
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linux-6.19.14/drivers/media/pci/cx23885/cx23885.h
1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * Driver for the Conexant CX23885 PCIe bridge 4 * 5 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org> 6 */ 7 8#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 9 10#include <linux/pci.h> 11#include <linux/i2c.h> 12#include <linux/kdev_t.h> 13#include <linux/slab.h> 14 15#include <media/v4l2-device.h> 16#include <media/v4l2-fh.h> 17#include <media/v4l2-ctrls.h> 18#include <media/tuner.h> 19#include <media/tveeprom.h> 20#include <media/videobuf2-dma-sg.h> 21#include <media/videobuf2-dvb.h> 22#include <media/rc-core.h> 23 24#include "cx23885-reg.h" 25#include "media/drv-intf/cx2341x.h" 26 27#include <linux/mutex.h> 28 29#define CX23885_VERSION "0.0.4" 30 31#define UNSET (-1U) 32 33#define CX23885_MAXBOARDS 8 34 35/* Max number of inputs by card */ 36#define MAX_CX23885_INPUT 8 37#define INPUT(nr) (&cx23885_boards[dev->board].input[nr]) 38 39#define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */ 40 41#define CX23885_BOARD_NOAUTO UNSET 42#define CX23885_BOARD_UNKNOWN 0 43#define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1 44#define CX23885_BOARD_HAUPPAUGE_HVR1800 2 45#define CX23885_BOARD_HAUPPAUGE_HVR1250 3 46#define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4 47#define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5 48#define CX23885_BOARD_HAUPPAUGE_HVR1500 6 49#define CX23885_BOARD_HAUPPAUGE_HVR1200 7 50#define CX23885_BOARD_HAUPPAUGE_HVR1700 8 51#define CX23885_BOARD_HAUPPAUGE_HVR1400 9 52#define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10 53#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11 54#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12 55#define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13 56#define CX23885_BOARD_TBS_6920 14 57#define CX23885_BOARD_TEVII_S470 15 58#define CX23885_BOARD_DVBWORLD_2005 16 59#define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17 60#define CX23885_BOARD_HAUPPAUGE_HVR1270 18 61#define CX23885_BOARD_HAUPPAUGE_HVR1275 19 62#define CX23885_BOARD_HAUPPAUGE_HVR1255 20 63#define CX23885_BOARD_HAUPPAUGE_HVR1210 21 64#define CX23885_BOARD_MYGICA_X8506 22 65#define CX23885_BOARD_MAGICPRO_PROHDTVE2 23 66#define CX23885_BOARD_HAUPPAUGE_HVR1850 24 67#define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25 68#define CX23885_BOARD_HAUPPAUGE_HVR1290 26 69#define CX23885_BOARD_MYGICA_X8558PRO 27 70#define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28 71#define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29 72#define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30 73#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31 74#define CX23885_BOARD_MPX885 32 75#define CX23885_BOARD_MYGICA_X8507 33 76#define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34 77#define CX23885_BOARD_TEVII_S471 35 78#define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36 79#define CX23885_BOARD_PROF_8000 37 80#define CX23885_BOARD_HAUPPAUGE_HVR4400 38 81#define CX23885_BOARD_AVERMEDIA_HC81R 39 82#define CX23885_BOARD_TBS_6981 40 83#define CX23885_BOARD_TBS_6980 41 84#define CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200 42 85#define CX23885_BOARD_HAUPPAUGE_IMPACTVCBE 43 86#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2 44 87#define CX23885_BOARD_DVBSKY_T9580 45 88#define CX23885_BOARD_DVBSKY_T980C 46 89#define CX23885_BOARD_DVBSKY_S950C 47 90#define CX23885_BOARD_TT_CT2_4500_CI 48 91#define CX23885_BOARD_DVBSKY_S950 49 92#define CX23885_BOARD_DVBSKY_S952 50 93#define CX23885_BOARD_DVBSKY_T982 51 94#define CX23885_BOARD_HAUPPAUGE_HVR5525 52 95#define CX23885_BOARD_HAUPPAUGE_STARBURST 53 96#define CX23885_BOARD_VIEWCAST_260E 54 97#define CX23885_BOARD_VIEWCAST_460E 55 98#define CX23885_BOARD_HAUPPAUGE_QUADHD_DVB 56 99#define CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC 57 100#define CX23885_BOARD_HAUPPAUGE_HVR1265_K4 58 101#define CX23885_BOARD_HAUPPAUGE_STARBURST2 59 102#define CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885 60 103#define CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885 61 104#define CX23885_BOARD_AVERMEDIA_CE310B 62 105#define CX23885_BOARD_AVERMEDIA_H789C 63 106 107#define GPIO_0 0x00000001 108#define GPIO_1 0x00000002 109#define GPIO_2 0x00000004 110#define GPIO_3 0x00000008 111#define GPIO_4 0x00000010 112#define GPIO_5 0x00000020 113#define GPIO_6 0x00000040 114#define GPIO_7 0x00000080 115#define GPIO_8 0x00000100 116#define GPIO_9 0x00000200 117#define GPIO_10 0x00000400 118#define GPIO_11 0x00000800 119#define GPIO_12 0x00001000 120#define GPIO_13 0x00002000 121#define GPIO_14 0x00004000 122#define GPIO_15 0x00008000 123 124/* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */ 125#define CX23885_NORMS (\ 126 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \ 127 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \ 128 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \ 129 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK) 130 131struct cx23885_fmt { 132 u32 fourcc; /* v4l2 format id */ 133 int depth; 134 int flags; 135 u32 cxformat; 136}; 137 138struct cx23885_tvnorm { 139 char *name; 140 v4l2_std_id id; 141 u32 cxiformat; 142 u32 cxoformat; 143}; 144 145enum cx23885_itype { 146 CX23885_VMUX_COMPOSITE1 = 1, 147 CX23885_VMUX_COMPOSITE2, 148 CX23885_VMUX_COMPOSITE3, 149 CX23885_VMUX_COMPOSITE4, 150 CX23885_VMUX_SVIDEO, 151 CX23885_VMUX_COMPONENT, 152 CX23885_VMUX_TELEVISION, 153 CX23885_VMUX_CABLE, 154 CX23885_VMUX_DVB, 155 CX23885_VMUX_DEBUG, 156 CX23885_RADIO, 157}; 158 159enum cx23885_src_sel_type { 160 CX23885_SRC_SEL_EXT_656_VIDEO = 0, 161 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO 162}; 163 164struct cx23885_riscmem { 165 unsigned int size; 166 __le32 *cpu; 167 __le32 *jmp; 168 dma_addr_t dma; 169}; 170 171/* buffer for one video frame */ 172struct cx23885_buffer { 173 /* common v4l buffer stuff -- must be first */ 174 struct vb2_v4l2_buffer vb; 175 struct list_head queue; 176 177 /* cx23885 specific */ 178 unsigned int bpl; 179 struct cx23885_riscmem risc; 180 struct cx23885_fmt *fmt; 181 u32 count; 182}; 183 184struct cx23885_input { 185 enum cx23885_itype type; 186 unsigned int vmux; 187 unsigned int amux; 188 u32 gpio0, gpio1, gpio2, gpio3; 189}; 190 191typedef enum { 192 CX23885_MPEG_UNDEFINED = 0, 193 CX23885_MPEG_DVB, 194 CX23885_ANALOG_VIDEO, 195 CX23885_MPEG_ENCODER, 196} port_t; 197 198struct cx23885_board { 199 char *name; 200 port_t porta, portb, portc; 201 int num_fds_portb, num_fds_portc; 202 unsigned int tuner_type; 203 unsigned int radio_type; 204 unsigned char tuner_addr; 205 unsigned char radio_addr; 206 unsigned int tuner_bus; 207 208 /* Vendors can and do run the PCIe bridge at different 209 * clock rates, driven physically by crystals on the PCBs. 210 * The core has to accommodate this. This allows the user 211 * to add new boards with new frequencys. The value is 212 * expressed in Hz. 213 * 214 * The core framework will default this value based on 215 * current designs, but it can vary. 216 */ 217 u32 clk_freq; 218 struct cx23885_input input[MAX_CX23885_INPUT]; 219 int ci_type; /* for NetUP */ 220 /* Force bottom field first during DMA (888 workaround) */ 221 u32 force_bff; 222}; 223 224struct cx23885_subid { 225 u16 subvendor; 226 u16 subdevice; 227 u32 card; 228}; 229 230struct cx23885_i2c { 231 struct cx23885_dev *dev; 232 233 int nr; 234 235 /* i2c i/o */ 236 struct i2c_adapter i2c_adap; 237 struct i2c_client i2c_client; 238 u32 i2c_rc; 239 240 /* 885 registers used for raw address */ 241 u32 i2c_period; 242 u32 reg_ctrl; 243 u32 reg_stat; 244 u32 reg_addr; 245 u32 reg_rdata; 246 u32 reg_wdata; 247}; 248 249struct cx23885_dmaqueue { 250 struct list_head active; 251 u32 count; 252}; 253 254struct cx23885_tsport { 255 struct cx23885_dev *dev; 256 257 unsigned nr; 258 int sram_chno; 259 260 struct vb2_dvb_frontends frontends; 261 262 /* dma queues */ 263 struct cx23885_dmaqueue mpegq; 264 u32 ts_packet_size; 265 u32 ts_packet_count; 266 267 int width; 268 int height; 269 270 spinlock_t slock; 271 272 /* registers */ 273 u32 reg_gpcnt; 274 u32 reg_gpcnt_ctl; 275 u32 reg_dma_ctl; 276 u32 reg_lngth; 277 u32 reg_hw_sop_ctrl; 278 u32 reg_gen_ctrl; 279 u32 reg_bd_pkt_status; 280 u32 reg_sop_status; 281 u32 reg_fifo_ovfl_stat; 282 u32 reg_vld_misc; 283 u32 reg_ts_clk_en; 284 u32 reg_ts_int_msk; 285 u32 reg_ts_int_stat; 286 u32 reg_src_sel; 287 288 /* Default register vals */ 289 int pci_irqmask; 290 u32 dma_ctl_val; 291 u32 ts_int_msk_val; 292 u32 gen_ctrl_val; 293 u32 ts_clk_en_val; 294 u32 src_sel_val; 295 u32 vld_misc_val; 296 u32 hw_sop_ctrl_val; 297 298 /* Allow a single tsport to have multiple frontends */ 299 u32 num_frontends; 300 void (*gate_ctrl)(struct cx23885_tsport *port, int open); 301 void *port_priv; 302 303 /* Workaround for a temp dvb_frontend that the tuner can attached to */ 304 struct dvb_frontend analog_fe; 305 306 struct i2c_client *i2c_client_demod; 307 struct i2c_client *i2c_client_tuner; 308 struct i2c_client *i2c_client_sec; 309 struct i2c_client *i2c_client_ci; 310 311 int (*set_frontend)(struct dvb_frontend *fe); 312 int (*fe_set_voltage)(struct dvb_frontend *fe, 313 enum fe_sec_voltage voltage); 314}; 315 316struct cx23885_kernel_ir { 317 struct cx23885_dev *cx; 318 char *name; 319 char *phys; 320 321 struct rc_dev *rc; 322}; 323 324struct cx23885_audio_buffer { 325 unsigned int bpl; 326 struct cx23885_riscmem risc; 327 void *vaddr; 328 struct scatterlist *sglist; 329 int sglen; 330 unsigned long nr_pages; 331}; 332 333struct cx23885_audio_dev { 334 struct cx23885_dev *dev; 335 336 struct pci_dev *pci; 337 338 struct snd_card *card; 339 340 spinlock_t lock; 341 342 atomic_t count; 343 344 unsigned int dma_size; 345 unsigned int period_size; 346 unsigned int num_periods; 347 348 struct cx23885_audio_buffer *buf; 349 350 struct snd_pcm_substream *substream; 351}; 352 353struct cx23885_dev { 354 atomic_t refcount; 355 struct v4l2_device v4l2_dev; 356 struct v4l2_ctrl_handler ctrl_handler; 357 358 /* pci stuff */ 359 struct pci_dev *pci; 360 unsigned char pci_rev, pci_lat; 361 int pci_bus, pci_slot; 362 u32 __iomem *lmmio; 363 u8 __iomem *bmmio; 364 int pci_irqmask; 365 spinlock_t pci_irqmask_lock; /* protects mask reg too */ 366 int hwrevision; 367 368 /* This valud is board specific and is used to configure the 369 * AV core so we see nice clean and stable video and audio. */ 370 u32 clk_freq; 371 372 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */ 373 struct cx23885_i2c i2c_bus[3]; 374 375 int nr; 376 struct mutex lock; 377 struct mutex gpio_lock; 378 379 /* board details */ 380 unsigned int board; 381 char name[32]; 382 383 struct cx23885_tsport ts1, ts2; 384 385 /* sram configuration */ 386 struct sram_channel *sram_channels; 387 388 enum { 389 CX23885_BRIDGE_UNDEFINED = 0, 390 CX23885_BRIDGE_885 = 885, 391 CX23885_BRIDGE_887 = 887, 392 CX23885_BRIDGE_888 = 888, 393 } bridge; 394 395 /* Analog video */ 396 unsigned int input; 397 unsigned int audinput; /* Selectable audio input */ 398 u32 tvaudio; 399 v4l2_std_id tvnorm; 400 unsigned int tuner_type; 401 unsigned char tuner_addr; 402 unsigned int tuner_bus; 403 unsigned int radio_type; 404 unsigned char radio_addr; 405 struct v4l2_subdev *sd_cx25840; 406 struct work_struct cx25840_work; 407 408 /* Infrared */ 409 struct v4l2_subdev *sd_ir; 410 struct work_struct ir_rx_work; 411 unsigned long ir_rx_notifications; 412 struct work_struct ir_tx_work; 413 unsigned long ir_tx_notifications; 414 415 struct cx23885_kernel_ir *kernel_ir; 416 atomic_t ir_input_stopping; 417 418 /* V4l */ 419 u32 freq; 420 struct video_device *video_dev; 421 struct video_device *vbi_dev; 422 423 /* video capture */ 424 struct cx23885_fmt *fmt; 425 unsigned int width, height; 426 unsigned field; 427 428 struct cx23885_dmaqueue vidq; 429 struct vb2_queue vb2_vidq; 430 struct cx23885_dmaqueue vbiq; 431 struct vb2_queue vb2_vbiq; 432 433 spinlock_t slock; 434 435 /* MPEG Encoder ONLY settings */ 436 u32 cx23417_mailbox; 437 struct cx2341x_handler cxhdl; 438 struct video_device *v4l_device; 439 struct vb2_queue vb2_mpegq; 440 struct cx23885_tvnorm encodernorm; 441 442 /* Analog raw audio */ 443 struct cx23885_audio_dev *audio_dev; 444 445 /* Does the system require periodic DMA resets? */ 446 unsigned int need_dma_reset:1; 447}; 448 449static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev) 450{ 451 return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev); 452} 453 454#define call_all(dev, o, f, args...) \ 455 v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args) 456 457#define CX23885_HW_888_IR (1 << 0) 458#define CX23885_HW_AV_CORE (1 << 1) 459 460#define call_hw(dev, grpid, o, f, args...) \ 461 v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args) 462 463extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw); 464 465#define SRAM_CH01 0 /* Video A */ 466#define SRAM_CH02 1 /* VBI A */ 467#define SRAM_CH03 2 /* Video B */ 468#define SRAM_CH04 3 /* Transport via B */ 469#define SRAM_CH05 4 /* VBI B */ 470#define SRAM_CH06 5 /* Video C */ 471#define SRAM_CH07 6 /* Transport via C */ 472#define SRAM_CH08 7 /* Audio Internal A */ 473#define SRAM_CH09 8 /* Audio Internal B */ 474#define SRAM_CH10 9 /* Audio External */ 475#define SRAM_CH11 10 /* COMB_3D_N */ 476#define SRAM_CH12 11 /* Comb 3D N1 */ 477#define SRAM_CH13 12 /* Comb 3D N2 */ 478#define SRAM_CH14 13 /* MOE Vid */ 479#define SRAM_CH15 14 /* MOE RSLT */ 480 481struct sram_channel { 482 char *name; 483 u32 cmds_start; 484 u32 ctrl_start; 485 u32 cdt; 486 u32 fifo_start; 487 u32 fifo_size; 488 u32 ptr1_reg; 489 u32 ptr2_reg; 490 u32 cnt1_reg; 491 u32 cnt2_reg; 492 u32 jumponly; 493}; 494 495/* ----------------------------------------------------------- */ 496 497#define cx_read(reg) readl(dev->lmmio + ((reg)>>2)) 498#define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2)) 499 500#define cx_andor(reg, mask, value) \ 501 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\ 502 ((value) & (mask)), dev->lmmio+((reg)>>2)) 503 504#define cx_set(reg, bit) cx_andor((reg), (bit), (bit)) 505#define cx_clear(reg, bit) cx_andor((reg), (bit), 0) 506 507/* ----------------------------------------------------------- */ 508/* cx23885-core.c */ 509 510extern int cx23885_sram_channel_setup(struct cx23885_dev *dev, 511 struct sram_channel *ch, 512 unsigned int bpl, u32 risc); 513 514extern void cx23885_sram_channel_dump(struct cx23885_dev *dev, 515 struct sram_channel *ch); 516 517extern int cx23885_risc_buffer(struct pci_dev *pci, struct cx23885_riscmem *risc, 518 struct scatterlist *sglist, 519 unsigned int top_offset, unsigned int bottom_offset, 520 unsigned int bpl, unsigned int padding, unsigned int lines); 521 522extern int cx23885_risc_vbibuffer(struct pci_dev *pci, 523 struct cx23885_riscmem *risc, struct scatterlist *sglist, 524 unsigned int top_offset, unsigned int bottom_offset, 525 unsigned int bpl, unsigned int padding, unsigned int lines); 526 527int cx23885_start_dma(struct cx23885_tsport *port, 528 struct cx23885_dmaqueue *q, 529 struct cx23885_buffer *buf); 530void cx23885_cancel_buffers(struct cx23885_tsport *port); 531 532 533extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask); 534extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask); 535extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask); 536extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask, 537 int asoutput); 538 539extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask); 540extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask); 541extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask); 542extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask); 543 544/* ----------------------------------------------------------- */ 545/* cx23885-cards.c */ 546extern struct cx23885_board cx23885_boards[]; 547extern const unsigned int cx23885_bcount; 548 549extern struct cx23885_subid cx23885_subids[]; 550extern const unsigned int cx23885_idcount; 551 552extern int cx23885_tuner_callback(void *priv, int component, 553 int command, int arg); 554extern void cx23885_card_list(struct cx23885_dev *dev); 555extern int cx23885_ir_init(struct cx23885_dev *dev); 556extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev); 557extern void cx23885_ir_fini(struct cx23885_dev *dev); 558extern void cx23885_gpio_setup(struct cx23885_dev *dev); 559extern void cx23885_card_setup(struct cx23885_dev *dev); 560extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev); 561 562extern int cx23885_dvb_register(struct cx23885_tsport *port); 563extern int cx23885_dvb_unregister(struct cx23885_tsport *port); 564 565extern int cx23885_buf_prepare(struct cx23885_buffer *buf, 566 struct cx23885_tsport *port); 567extern void cx23885_buf_queue(struct cx23885_tsport *port, 568 struct cx23885_buffer *buf); 569extern void cx23885_free_buffer(struct cx23885_dev *dev, 570 struct cx23885_buffer *buf); 571 572/* ----------------------------------------------------------- */ 573/* cx23885-video.c */ 574/* Video */ 575extern int cx23885_video_register(struct cx23885_dev *dev); 576extern void cx23885_video_unregister(struct cx23885_dev *dev); 577extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status); 578extern void cx23885_video_wakeup(struct cx23885_dev *dev, 579 struct cx23885_dmaqueue *q, u32 count); 580int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i); 581int cx23885_set_input(struct file *file, void *priv, unsigned int i); 582int cx23885_get_input(struct file *file, void *priv, unsigned int *i); 583int cx23885_set_frequency(struct file *file, void *priv, const struct v4l2_frequency *f); 584int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm); 585 586/* ----------------------------------------------------------- */ 587/* cx23885-vbi.c */ 588extern int cx23885_vbi_fmt(struct file *file, void *priv, 589 struct v4l2_format *f); 590extern void cx23885_vbi_timeout(unsigned long data); 591extern const struct vb2_ops cx23885_vbi_qops; 592extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status); 593 594/* cx23885-i2c.c */ 595extern int cx23885_i2c_register(struct cx23885_i2c *bus); 596extern int cx23885_i2c_unregister(struct cx23885_i2c *bus); 597extern void cx23885_av_clk(struct cx23885_dev *dev, int enable); 598 599/* ----------------------------------------------------------- */ 600/* cx23885-417.c */ 601extern int cx23885_417_register(struct cx23885_dev *dev); 602extern void cx23885_417_unregister(struct cx23885_dev *dev); 603extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status); 604extern void cx23885_417_check_encoder(struct cx23885_dev *dev); 605extern void cx23885_mc417_init(struct cx23885_dev *dev); 606extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value); 607extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value); 608extern int mc417_register_read(struct cx23885_dev *dev, 609 u16 address, u32 *value); 610extern int mc417_register_write(struct cx23885_dev *dev, 611 u16 address, u32 value); 612extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask); 613extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask); 614extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput); 615 616/* ----------------------------------------------------------- */ 617/* cx23885-alsa.c */ 618extern struct cx23885_audio_dev *cx23885_audio_register( 619 struct cx23885_dev *dev); 620extern void cx23885_audio_unregister(struct cx23885_dev *dev); 621extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask); 622extern int cx23885_risc_databuffer(struct pci_dev *pci, 623 struct cx23885_riscmem *risc, 624 struct scatterlist *sglist, 625 unsigned int bpl, 626 unsigned int lines, 627 unsigned int lpi); 628 629/* ----------------------------------------------------------- */ 630/* tv norms */ 631 632static inline unsigned int norm_maxh(v4l2_std_id norm) 633{ 634 return (norm & V4L2_STD_525_60) ? 480 : 576; 635}
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