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cx23885-cards.c
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linux-6.19.14/drivers/media/pci/cx23885/cx23885-cards.c
1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Driver for the Conexant CX23885 PCIe bridge 4 * 5 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org> 6 */ 7 8#include "cx23885.h" 9 10#include <linux/init.h> 11#include <linux/module.h> 12#include <linux/pci.h> 13#include <linux/delay.h> 14#include <media/drv-intf/cx25840.h> 15#include <linux/firmware.h> 16#include <misc/altera.h> 17 18#include "xc2028.h" 19#include "netup-eeprom.h" 20#include "netup-init.h" 21#include "altera-ci.h" 22#include "xc4000.h" 23#include "xc5000.h" 24#include "cx23888-ir.h" 25 26static unsigned int netup_card_rev = 4; 27module_param(netup_card_rev, int, 0644); 28MODULE_PARM_DESC(netup_card_rev, 29 "NetUP Dual DVB-T/C CI card revision"); 30static unsigned int enable_885_ir; 31module_param(enable_885_ir, int, 0644); 32MODULE_PARM_DESC(enable_885_ir, 33 "Enable integrated IR controller for supported\n" 34 "\t\t CX2388[57] boards that are wired for it:\n" 35 "\t\t\tHVR-1250 (reported safe)\n" 36 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n" 37 "\t\t\tTeVii S470 (reported unsafe)\n" 38 "\t\t This can cause an interrupt storm with some cards.\n" 39 "\t\t Default: 0 [Disabled]"); 40 41/* ------------------------------------------------------------------ */ 42/* board config info */ 43 44struct cx23885_board cx23885_boards[] = { 45 [CX23885_BOARD_UNKNOWN] = { 46 .name = "UNKNOWN/GENERIC", 47 /* Ensure safe default for unknown boards */ 48 .clk_freq = 0, 49 .input = {{ 50 .type = CX23885_VMUX_COMPOSITE1, 51 .vmux = 0, 52 }, { 53 .type = CX23885_VMUX_COMPOSITE2, 54 .vmux = 1, 55 }, { 56 .type = CX23885_VMUX_COMPOSITE3, 57 .vmux = 2, 58 }, { 59 .type = CX23885_VMUX_COMPOSITE4, 60 .vmux = 3, 61 } }, 62 }, 63 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = { 64 .name = "Hauppauge WinTV-HVR1800lp", 65 .portc = CX23885_MPEG_DVB, 66 .input = {{ 67 .type = CX23885_VMUX_TELEVISION, 68 .vmux = 0, 69 .gpio0 = 0xff00, 70 }, { 71 .type = CX23885_VMUX_DEBUG, 72 .vmux = 0, 73 .gpio0 = 0xff01, 74 }, { 75 .type = CX23885_VMUX_COMPOSITE1, 76 .vmux = 1, 77 .gpio0 = 0xff02, 78 }, { 79 .type = CX23885_VMUX_SVIDEO, 80 .vmux = 2, 81 .gpio0 = 0xff02, 82 } }, 83 }, 84 [CX23885_BOARD_HAUPPAUGE_HVR1800] = { 85 .name = "Hauppauge WinTV-HVR1800", 86 .porta = CX23885_ANALOG_VIDEO, 87 .portb = CX23885_MPEG_ENCODER, 88 .portc = CX23885_MPEG_DVB, 89 .tuner_type = TUNER_PHILIPS_TDA8290, 90 .tuner_addr = 0x42, /* 0x84 >> 1 */ 91 .tuner_bus = 1, 92 .input = {{ 93 .type = CX23885_VMUX_TELEVISION, 94 .vmux = CX25840_VIN7_CH3 | 95 CX25840_VIN5_CH2 | 96 CX25840_VIN2_CH1, 97 .amux = CX25840_AUDIO8, 98 .gpio0 = 0, 99 }, { 100 .type = CX23885_VMUX_COMPOSITE1, 101 .vmux = CX25840_VIN7_CH3 | 102 CX25840_VIN4_CH2 | 103 CX25840_VIN6_CH1, 104 .amux = CX25840_AUDIO7, 105 .gpio0 = 0, 106 }, { 107 .type = CX23885_VMUX_SVIDEO, 108 .vmux = CX25840_VIN7_CH3 | 109 CX25840_VIN4_CH2 | 110 CX25840_VIN8_CH1 | 111 CX25840_SVIDEO_ON, 112 .amux = CX25840_AUDIO7, 113 .gpio0 = 0, 114 } }, 115 }, 116 [CX23885_BOARD_HAUPPAUGE_HVR1250] = { 117 .name = "Hauppauge WinTV-HVR1250", 118 .porta = CX23885_ANALOG_VIDEO, 119 .portc = CX23885_MPEG_DVB, 120#ifdef MT2131_NO_ANALOG_SUPPORT_YET 121 .tuner_type = TUNER_PHILIPS_TDA8290, 122 .tuner_addr = 0x42, /* 0x84 >> 1 */ 123 .tuner_bus = 1, 124#endif 125 .force_bff = 1, 126 .input = {{ 127#ifdef MT2131_NO_ANALOG_SUPPORT_YET 128 .type = CX23885_VMUX_TELEVISION, 129 .vmux = CX25840_VIN7_CH3 | 130 CX25840_VIN5_CH2 | 131 CX25840_VIN2_CH1, 132 .amux = CX25840_AUDIO8, 133 .gpio0 = 0xff00, 134 }, { 135#endif 136 .type = CX23885_VMUX_COMPOSITE1, 137 .vmux = CX25840_VIN7_CH3 | 138 CX25840_VIN4_CH2 | 139 CX25840_VIN6_CH1, 140 .amux = CX25840_AUDIO7, 141 .gpio0 = 0xff02, 142 }, { 143 .type = CX23885_VMUX_SVIDEO, 144 .vmux = CX25840_VIN7_CH3 | 145 CX25840_VIN4_CH2 | 146 CX25840_VIN8_CH1 | 147 CX25840_SVIDEO_ON, 148 .amux = CX25840_AUDIO7, 149 .gpio0 = 0xff02, 150 } }, 151 }, 152 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = { 153 .name = "DViCO FusionHDTV5 Express", 154 .portb = CX23885_MPEG_DVB, 155 }, 156 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = { 157 .name = "Hauppauge WinTV-HVR1500Q", 158 .portc = CX23885_MPEG_DVB, 159 }, 160 [CX23885_BOARD_HAUPPAUGE_HVR1500] = { 161 .name = "Hauppauge WinTV-HVR1500", 162 .porta = CX23885_ANALOG_VIDEO, 163 .portc = CX23885_MPEG_DVB, 164 .tuner_type = TUNER_XC2028, 165 .tuner_addr = 0x61, /* 0xc2 >> 1 */ 166 .input = {{ 167 .type = CX23885_VMUX_TELEVISION, 168 .vmux = CX25840_VIN7_CH3 | 169 CX25840_VIN5_CH2 | 170 CX25840_VIN2_CH1, 171 .gpio0 = 0, 172 }, { 173 .type = CX23885_VMUX_COMPOSITE1, 174 .vmux = CX25840_VIN7_CH3 | 175 CX25840_VIN4_CH2 | 176 CX25840_VIN6_CH1, 177 .gpio0 = 0, 178 }, { 179 .type = CX23885_VMUX_SVIDEO, 180 .vmux = CX25840_VIN7_CH3 | 181 CX25840_VIN4_CH2 | 182 CX25840_VIN8_CH1 | 183 CX25840_SVIDEO_ON, 184 .gpio0 = 0, 185 } }, 186 }, 187 [CX23885_BOARD_HAUPPAUGE_HVR1200] = { 188 .name = "Hauppauge WinTV-HVR1200", 189 .portc = CX23885_MPEG_DVB, 190 }, 191 [CX23885_BOARD_HAUPPAUGE_HVR1700] = { 192 .name = "Hauppauge WinTV-HVR1700", 193 .portc = CX23885_MPEG_DVB, 194 }, 195 [CX23885_BOARD_HAUPPAUGE_HVR1400] = { 196 .name = "Hauppauge WinTV-HVR1400", 197 .portc = CX23885_MPEG_DVB, 198 }, 199 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = { 200 .name = "DViCO FusionHDTV7 Dual Express", 201 .portb = CX23885_MPEG_DVB, 202 .portc = CX23885_MPEG_DVB, 203 }, 204 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = { 205 .name = "DViCO FusionHDTV DVB-T Dual Express", 206 .portb = CX23885_MPEG_DVB, 207 .portc = CX23885_MPEG_DVB, 208 }, 209 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = { 210 .name = "Leadtek Winfast PxDVR3200 H", 211 .portc = CX23885_MPEG_DVB, 212 }, 213 [CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200] = { 214 .name = "Leadtek Winfast PxPVR2200", 215 .porta = CX23885_ANALOG_VIDEO, 216 .tuner_type = TUNER_XC2028, 217 .tuner_addr = 0x61, 218 .tuner_bus = 1, 219 .input = {{ 220 .type = CX23885_VMUX_TELEVISION, 221 .vmux = CX25840_VIN2_CH1 | 222 CX25840_VIN5_CH2, 223 .amux = CX25840_AUDIO8, 224 .gpio0 = 0x704040, 225 }, { 226 .type = CX23885_VMUX_COMPOSITE1, 227 .vmux = CX25840_COMPOSITE1, 228 .amux = CX25840_AUDIO7, 229 .gpio0 = 0x704040, 230 }, { 231 .type = CX23885_VMUX_SVIDEO, 232 .vmux = CX25840_SVIDEO_LUMA3 | 233 CX25840_SVIDEO_CHROMA4, 234 .amux = CX25840_AUDIO7, 235 .gpio0 = 0x704040, 236 }, { 237 .type = CX23885_VMUX_COMPONENT, 238 .vmux = CX25840_VIN7_CH1 | 239 CX25840_VIN6_CH2 | 240 CX25840_VIN8_CH3 | 241 CX25840_COMPONENT_ON, 242 .amux = CX25840_AUDIO7, 243 .gpio0 = 0x704040, 244 } }, 245 }, 246 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = { 247 .name = "Leadtek Winfast PxDVR3200 H XC4000", 248 .porta = CX23885_ANALOG_VIDEO, 249 .portc = CX23885_MPEG_DVB, 250 .tuner_type = TUNER_XC4000, 251 .tuner_addr = 0x61, 252 .radio_type = UNSET, 253 .radio_addr = ADDR_UNSET, 254 .input = {{ 255 .type = CX23885_VMUX_TELEVISION, 256 .vmux = CX25840_VIN2_CH1 | 257 CX25840_VIN5_CH2 | 258 CX25840_NONE0_CH3, 259 }, { 260 .type = CX23885_VMUX_COMPOSITE1, 261 .vmux = CX25840_COMPOSITE1, 262 }, { 263 .type = CX23885_VMUX_SVIDEO, 264 .vmux = CX25840_SVIDEO_LUMA3 | 265 CX25840_SVIDEO_CHROMA4, 266 }, { 267 .type = CX23885_VMUX_COMPONENT, 268 .vmux = CX25840_VIN7_CH1 | 269 CX25840_VIN6_CH2 | 270 CX25840_VIN8_CH3 | 271 CX25840_COMPONENT_ON, 272 } }, 273 }, 274 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = { 275 .name = "Compro VideoMate E650F", 276 .portc = CX23885_MPEG_DVB, 277 }, 278 [CX23885_BOARD_TBS_6920] = { 279 .name = "TurboSight TBS 6920", 280 .portb = CX23885_MPEG_DVB, 281 }, 282 [CX23885_BOARD_TBS_6980] = { 283 .name = "TurboSight TBS 6980", 284 .portb = CX23885_MPEG_DVB, 285 .portc = CX23885_MPEG_DVB, 286 }, 287 [CX23885_BOARD_TBS_6981] = { 288 .name = "TurboSight TBS 6981", 289 .portb = CX23885_MPEG_DVB, 290 .portc = CX23885_MPEG_DVB, 291 }, 292 [CX23885_BOARD_TEVII_S470] = { 293 .name = "TeVii S470", 294 .portb = CX23885_MPEG_DVB, 295 }, 296 [CX23885_BOARD_DVBWORLD_2005] = { 297 .name = "DVBWorld DVB-S2 2005", 298 .portb = CX23885_MPEG_DVB, 299 }, 300 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = { 301 .ci_type = 1, 302 .name = "NetUP Dual DVB-S2 CI", 303 .portb = CX23885_MPEG_DVB, 304 .portc = CX23885_MPEG_DVB, 305 }, 306 [CX23885_BOARD_HAUPPAUGE_HVR1270] = { 307 .name = "Hauppauge WinTV-HVR1270", 308 .portc = CX23885_MPEG_DVB, 309 }, 310 [CX23885_BOARD_HAUPPAUGE_HVR1275] = { 311 .name = "Hauppauge WinTV-HVR1275", 312 .portc = CX23885_MPEG_DVB, 313 }, 314 [CX23885_BOARD_HAUPPAUGE_HVR1255] = { 315 .name = "Hauppauge WinTV-HVR1255", 316 .porta = CX23885_ANALOG_VIDEO, 317 .portc = CX23885_MPEG_DVB, 318 .tuner_type = TUNER_ABSENT, 319 .tuner_addr = 0x42, /* 0x84 >> 1 */ 320 .force_bff = 1, 321 .input = {{ 322 .type = CX23885_VMUX_TELEVISION, 323 .vmux = CX25840_VIN7_CH3 | 324 CX25840_VIN5_CH2 | 325 CX25840_VIN2_CH1 | 326 CX25840_DIF_ON, 327 .amux = CX25840_AUDIO8, 328 }, { 329 .type = CX23885_VMUX_COMPOSITE1, 330 .vmux = CX25840_VIN7_CH3 | 331 CX25840_VIN4_CH2 | 332 CX25840_VIN6_CH1, 333 .amux = CX25840_AUDIO7, 334 }, { 335 .type = CX23885_VMUX_SVIDEO, 336 .vmux = CX25840_VIN7_CH3 | 337 CX25840_VIN4_CH2 | 338 CX25840_VIN8_CH1 | 339 CX25840_SVIDEO_ON, 340 .amux = CX25840_AUDIO7, 341 } }, 342 }, 343 [CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = { 344 .name = "Hauppauge WinTV-HVR1255", 345 .porta = CX23885_ANALOG_VIDEO, 346 .portc = CX23885_MPEG_DVB, 347 .tuner_type = TUNER_ABSENT, 348 .tuner_addr = 0x42, /* 0x84 >> 1 */ 349 .force_bff = 1, 350 .input = {{ 351 .type = CX23885_VMUX_TELEVISION, 352 .vmux = CX25840_VIN7_CH3 | 353 CX25840_VIN5_CH2 | 354 CX25840_VIN2_CH1 | 355 CX25840_DIF_ON, 356 .amux = CX25840_AUDIO8, 357 }, { 358 .type = CX23885_VMUX_SVIDEO, 359 .vmux = CX25840_VIN7_CH3 | 360 CX25840_VIN4_CH2 | 361 CX25840_VIN8_CH1 | 362 CX25840_SVIDEO_ON, 363 .amux = CX25840_AUDIO7, 364 } }, 365 }, 366 [CX23885_BOARD_HAUPPAUGE_HVR1210] = { 367 .name = "Hauppauge WinTV-HVR1210", 368 .portc = CX23885_MPEG_DVB, 369 }, 370 [CX23885_BOARD_MYGICA_X8506] = { 371 .name = "Mygica X8506 DMB-TH", 372 .tuner_type = TUNER_XC5000, 373 .tuner_addr = 0x61, 374 .tuner_bus = 1, 375 .porta = CX23885_ANALOG_VIDEO, 376 .portb = CX23885_MPEG_DVB, 377 .input = { 378 { 379 .type = CX23885_VMUX_TELEVISION, 380 .vmux = CX25840_COMPOSITE2, 381 }, 382 { 383 .type = CX23885_VMUX_COMPOSITE1, 384 .vmux = CX25840_COMPOSITE8, 385 }, 386 { 387 .type = CX23885_VMUX_SVIDEO, 388 .vmux = CX25840_SVIDEO_LUMA3 | 389 CX25840_SVIDEO_CHROMA4, 390 }, 391 { 392 .type = CX23885_VMUX_COMPONENT, 393 .vmux = CX25840_COMPONENT_ON | 394 CX25840_VIN1_CH1 | 395 CX25840_VIN6_CH2 | 396 CX25840_VIN7_CH3, 397 }, 398 }, 399 }, 400 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = { 401 .name = "Magic-Pro ProHDTV Extreme 2", 402 .tuner_type = TUNER_XC5000, 403 .tuner_addr = 0x61, 404 .tuner_bus = 1, 405 .porta = CX23885_ANALOG_VIDEO, 406 .portb = CX23885_MPEG_DVB, 407 .input = { 408 { 409 .type = CX23885_VMUX_TELEVISION, 410 .vmux = CX25840_COMPOSITE2, 411 }, 412 { 413 .type = CX23885_VMUX_COMPOSITE1, 414 .vmux = CX25840_COMPOSITE8, 415 }, 416 { 417 .type = CX23885_VMUX_SVIDEO, 418 .vmux = CX25840_SVIDEO_LUMA3 | 419 CX25840_SVIDEO_CHROMA4, 420 }, 421 { 422 .type = CX23885_VMUX_COMPONENT, 423 .vmux = CX25840_COMPONENT_ON | 424 CX25840_VIN1_CH1 | 425 CX25840_VIN6_CH2 | 426 CX25840_VIN7_CH3, 427 }, 428 }, 429 }, 430 [CX23885_BOARD_HAUPPAUGE_HVR1850] = { 431 .name = "Hauppauge WinTV-HVR1850", 432 .porta = CX23885_ANALOG_VIDEO, 433 .portb = CX23885_MPEG_ENCODER, 434 .portc = CX23885_MPEG_DVB, 435 .tuner_type = TUNER_ABSENT, 436 .tuner_addr = 0x42, /* 0x84 >> 1 */ 437 .force_bff = 1, 438 .input = {{ 439 .type = CX23885_VMUX_TELEVISION, 440 .vmux = CX25840_VIN7_CH3 | 441 CX25840_VIN5_CH2 | 442 CX25840_VIN2_CH1 | 443 CX25840_DIF_ON, 444 .amux = CX25840_AUDIO8, 445 }, { 446 .type = CX23885_VMUX_COMPOSITE1, 447 .vmux = CX25840_VIN7_CH3 | 448 CX25840_VIN4_CH2 | 449 CX25840_VIN6_CH1, 450 .amux = CX25840_AUDIO7, 451 }, { 452 .type = CX23885_VMUX_SVIDEO, 453 .vmux = CX25840_VIN7_CH3 | 454 CX25840_VIN4_CH2 | 455 CX25840_VIN8_CH1 | 456 CX25840_SVIDEO_ON, 457 .amux = CX25840_AUDIO7, 458 } }, 459 }, 460 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = { 461 .name = "Compro VideoMate E800", 462 .portc = CX23885_MPEG_DVB, 463 }, 464 [CX23885_BOARD_HAUPPAUGE_HVR1290] = { 465 .name = "Hauppauge WinTV-HVR1290", 466 .portc = CX23885_MPEG_DVB, 467 }, 468 [CX23885_BOARD_MYGICA_X8558PRO] = { 469 .name = "Mygica X8558 PRO DMB-TH", 470 .portb = CX23885_MPEG_DVB, 471 .portc = CX23885_MPEG_DVB, 472 }, 473 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = { 474 .name = "LEADTEK WinFast PxTV1200", 475 .porta = CX23885_ANALOG_VIDEO, 476 .tuner_type = TUNER_XC2028, 477 .tuner_addr = 0x61, 478 .tuner_bus = 1, 479 .input = {{ 480 .type = CX23885_VMUX_TELEVISION, 481 .vmux = CX25840_VIN2_CH1 | 482 CX25840_VIN5_CH2 | 483 CX25840_NONE0_CH3, 484 }, { 485 .type = CX23885_VMUX_COMPOSITE1, 486 .vmux = CX25840_COMPOSITE1, 487 }, { 488 .type = CX23885_VMUX_SVIDEO, 489 .vmux = CX25840_SVIDEO_LUMA3 | 490 CX25840_SVIDEO_CHROMA4, 491 }, { 492 .type = CX23885_VMUX_COMPONENT, 493 .vmux = CX25840_VIN7_CH1 | 494 CX25840_VIN6_CH2 | 495 CX25840_VIN8_CH3 | 496 CX25840_COMPONENT_ON, 497 } }, 498 }, 499 [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = { 500 .name = "GoTView X5 3D Hybrid", 501 .tuner_type = TUNER_XC5000, 502 .tuner_addr = 0x64, 503 .tuner_bus = 1, 504 .porta = CX23885_ANALOG_VIDEO, 505 .portb = CX23885_MPEG_DVB, 506 .input = {{ 507 .type = CX23885_VMUX_TELEVISION, 508 .vmux = CX25840_VIN2_CH1 | 509 CX25840_VIN5_CH2, 510 .gpio0 = 0x02, 511 }, { 512 .type = CX23885_VMUX_COMPOSITE1, 513 .vmux = CX23885_VMUX_COMPOSITE1, 514 }, { 515 .type = CX23885_VMUX_SVIDEO, 516 .vmux = CX25840_SVIDEO_LUMA3 | 517 CX25840_SVIDEO_CHROMA4, 518 } }, 519 }, 520 [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = { 521 .ci_type = 2, 522 .name = "NetUP Dual DVB-T/C-CI RF", 523 .porta = CX23885_ANALOG_VIDEO, 524 .portb = CX23885_MPEG_DVB, 525 .portc = CX23885_MPEG_DVB, 526 .num_fds_portb = 2, 527 .num_fds_portc = 2, 528 .tuner_type = TUNER_XC5000, 529 .tuner_addr = 0x64, 530 .input = { { 531 .type = CX23885_VMUX_TELEVISION, 532 .vmux = CX25840_COMPOSITE1, 533 } }, 534 }, 535 [CX23885_BOARD_MPX885] = { 536 .name = "MPX-885", 537 .porta = CX23885_ANALOG_VIDEO, 538 .input = {{ 539 .type = CX23885_VMUX_COMPOSITE1, 540 .vmux = CX25840_COMPOSITE1, 541 .amux = CX25840_AUDIO6, 542 .gpio0 = 0, 543 }, { 544 .type = CX23885_VMUX_COMPOSITE2, 545 .vmux = CX25840_COMPOSITE2, 546 .amux = CX25840_AUDIO6, 547 .gpio0 = 0, 548 }, { 549 .type = CX23885_VMUX_COMPOSITE3, 550 .vmux = CX25840_COMPOSITE3, 551 .amux = CX25840_AUDIO7, 552 .gpio0 = 0, 553 }, { 554 .type = CX23885_VMUX_COMPOSITE4, 555 .vmux = CX25840_COMPOSITE4, 556 .amux = CX25840_AUDIO7, 557 .gpio0 = 0, 558 } }, 559 }, 560 [CX23885_BOARD_MYGICA_X8507] = { 561 .name = "Mygica X8502/X8507 ISDB-T", 562 .tuner_type = TUNER_XC5000, 563 .tuner_addr = 0x61, 564 .tuner_bus = 1, 565 .porta = CX23885_ANALOG_VIDEO, 566 .portb = CX23885_MPEG_DVB, 567 .input = { 568 { 569 .type = CX23885_VMUX_TELEVISION, 570 .vmux = CX25840_COMPOSITE2, 571 .amux = CX25840_AUDIO8, 572 }, 573 { 574 .type = CX23885_VMUX_COMPOSITE1, 575 .vmux = CX25840_COMPOSITE8, 576 .amux = CX25840_AUDIO7, 577 }, 578 { 579 .type = CX23885_VMUX_SVIDEO, 580 .vmux = CX25840_SVIDEO_LUMA3 | 581 CX25840_SVIDEO_CHROMA4, 582 .amux = CX25840_AUDIO7, 583 }, 584 { 585 .type = CX23885_VMUX_COMPONENT, 586 .vmux = CX25840_COMPONENT_ON | 587 CX25840_VIN1_CH1 | 588 CX25840_VIN6_CH2 | 589 CX25840_VIN7_CH3, 590 .amux = CX25840_AUDIO7, 591 }, 592 }, 593 }, 594 [CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = { 595 .name = "TerraTec Cinergy T PCIe Dual", 596 .portb = CX23885_MPEG_DVB, 597 .portc = CX23885_MPEG_DVB, 598 }, 599 [CX23885_BOARD_TEVII_S471] = { 600 .name = "TeVii S471", 601 .portb = CX23885_MPEG_DVB, 602 }, 603 [CX23885_BOARD_PROF_8000] = { 604 .name = "Prof Revolution DVB-S2 8000", 605 .portb = CX23885_MPEG_DVB, 606 }, 607 [CX23885_BOARD_HAUPPAUGE_HVR4400] = { 608 .name = "Hauppauge WinTV-HVR4400/HVR5500", 609 .porta = CX23885_ANALOG_VIDEO, 610 .portb = CX23885_MPEG_DVB, 611 .portc = CX23885_MPEG_DVB, 612 .tuner_type = TUNER_NXP_TDA18271, 613 .tuner_addr = 0x60, /* 0xc0 >> 1 */ 614 .tuner_bus = 1, 615 }, 616 [CX23885_BOARD_HAUPPAUGE_STARBURST] = { 617 .name = "Hauppauge WinTV Starburst", 618 .portb = CX23885_MPEG_DVB, 619 }, 620 [CX23885_BOARD_AVERMEDIA_HC81R] = { 621 .name = "AVerTV Hybrid Express Slim HC81R", 622 .tuner_type = TUNER_XC2028, 623 .tuner_addr = 0x61, /* 0xc2 >> 1 */ 624 .tuner_bus = 1, 625 .porta = CX23885_ANALOG_VIDEO, 626 .input = {{ 627 .type = CX23885_VMUX_TELEVISION, 628 .vmux = CX25840_VIN2_CH1 | 629 CX25840_VIN5_CH2 | 630 CX25840_NONE0_CH3 | 631 CX25840_NONE1_CH3, 632 .amux = CX25840_AUDIO8, 633 }, { 634 .type = CX23885_VMUX_SVIDEO, 635 .vmux = CX25840_VIN8_CH1 | 636 CX25840_NONE_CH2 | 637 CX25840_VIN7_CH3 | 638 CX25840_SVIDEO_ON, 639 .amux = CX25840_AUDIO6, 640 }, { 641 .type = CX23885_VMUX_COMPONENT, 642 .vmux = CX25840_VIN1_CH1 | 643 CX25840_NONE_CH2 | 644 CX25840_NONE0_CH3 | 645 CX25840_NONE1_CH3, 646 .amux = CX25840_AUDIO6, 647 } }, 648 }, 649 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2] = { 650 .name = "DViCO FusionHDTV DVB-T Dual Express2", 651 .portb = CX23885_MPEG_DVB, 652 .portc = CX23885_MPEG_DVB, 653 }, 654 [CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = { 655 .name = "Hauppauge ImpactVCB-e", 656 .tuner_type = TUNER_ABSENT, 657 .porta = CX23885_ANALOG_VIDEO, 658 .input = {{ 659 .type = CX23885_VMUX_COMPOSITE1, 660 .vmux = CX25840_VIN6_CH1, 661 .amux = CX25840_AUDIO7, 662 }, { 663 .type = CX23885_VMUX_SVIDEO, 664 .vmux = CX25840_VIN4_CH2 | 665 CX25840_VIN8_CH1 | 666 CX25840_SVIDEO_ON, 667 .amux = CX25840_AUDIO7, 668 } }, 669 }, 670 [CX23885_BOARD_DVBSKY_T9580] = { 671 .name = "DVBSky T9580", 672 .portb = CX23885_MPEG_DVB, 673 .portc = CX23885_MPEG_DVB, 674 }, 675 [CX23885_BOARD_DVBSKY_T980C] = { 676 .name = "DVBSky T980C", 677 .portb = CX23885_MPEG_DVB, 678 }, 679 [CX23885_BOARD_DVBSKY_S950C] = { 680 .name = "DVBSky S950C", 681 .portb = CX23885_MPEG_DVB, 682 }, 683 [CX23885_BOARD_TT_CT2_4500_CI] = { 684 .name = "Technotrend TT-budget CT2-4500 CI", 685 .portb = CX23885_MPEG_DVB, 686 }, 687 [CX23885_BOARD_DVBSKY_S950] = { 688 .name = "DVBSky S950", 689 .portb = CX23885_MPEG_DVB, 690 }, 691 [CX23885_BOARD_DVBSKY_S952] = { 692 .name = "DVBSky S952", 693 .portb = CX23885_MPEG_DVB, 694 .portc = CX23885_MPEG_DVB, 695 }, 696 [CX23885_BOARD_DVBSKY_T982] = { 697 .name = "DVBSky T982", 698 .portb = CX23885_MPEG_DVB, 699 .portc = CX23885_MPEG_DVB, 700 }, 701 [CX23885_BOARD_HAUPPAUGE_HVR5525] = { 702 .name = "Hauppauge WinTV-HVR5525", 703 .porta = CX23885_ANALOG_VIDEO, 704 .portb = CX23885_MPEG_DVB, 705 .portc = CX23885_MPEG_DVB, 706 .tuner_type = TUNER_ABSENT, 707 .force_bff = 1, 708 .input = {{ 709 .type = CX23885_VMUX_TELEVISION, 710 .vmux = CX25840_VIN7_CH3 | 711 CX25840_VIN5_CH2 | 712 CX25840_VIN2_CH1 | 713 CX25840_DIF_ON, 714 .amux = CX25840_AUDIO8, 715 }, { 716 .type = CX23885_VMUX_COMPOSITE1, 717 .vmux = CX25840_VIN6_CH1, 718 .amux = CX25840_AUDIO7, 719 }, { 720 .type = CX23885_VMUX_SVIDEO, 721 .vmux = CX25840_VIN7_CH3 | 722 CX25840_VIN8_CH1 | 723 CX25840_SVIDEO_ON, 724 .amux = CX25840_AUDIO7, 725 } }, 726 }, 727 [CX23885_BOARD_VIEWCAST_260E] = { 728 .name = "ViewCast 260e", 729 .porta = CX23885_ANALOG_VIDEO, 730 .force_bff = 1, 731 .input = {{ 732 .type = CX23885_VMUX_COMPOSITE1, 733 .vmux = CX25840_VIN6_CH1, 734 .amux = CX25840_AUDIO7, 735 }, { 736 .type = CX23885_VMUX_SVIDEO, 737 .vmux = CX25840_VIN7_CH3 | 738 CX25840_VIN5_CH1 | 739 CX25840_SVIDEO_ON, 740 .amux = CX25840_AUDIO7, 741 }, { 742 .type = CX23885_VMUX_COMPONENT, 743 .vmux = CX25840_VIN7_CH3 | 744 CX25840_VIN6_CH2 | 745 CX25840_VIN5_CH1 | 746 CX25840_COMPONENT_ON, 747 .amux = CX25840_AUDIO7, 748 } }, 749 }, 750 [CX23885_BOARD_VIEWCAST_460E] = { 751 .name = "ViewCast 460e", 752 .porta = CX23885_ANALOG_VIDEO, 753 .force_bff = 1, 754 .input = {{ 755 .type = CX23885_VMUX_COMPOSITE1, 756 .vmux = CX25840_VIN4_CH1, 757 .amux = CX25840_AUDIO7, 758 }, { 759 .type = CX23885_VMUX_SVIDEO, 760 .vmux = CX25840_VIN7_CH3 | 761 CX25840_VIN6_CH1 | 762 CX25840_SVIDEO_ON, 763 .amux = CX25840_AUDIO7, 764 }, { 765 .type = CX23885_VMUX_COMPONENT, 766 .vmux = CX25840_VIN7_CH3 | 767 CX25840_VIN6_CH1 | 768 CX25840_VIN5_CH2 | 769 CX25840_COMPONENT_ON, 770 .amux = CX25840_AUDIO7, 771 }, { 772 .type = CX23885_VMUX_COMPOSITE2, 773 .vmux = CX25840_VIN6_CH1, 774 .amux = CX25840_AUDIO7, 775 } }, 776 }, 777 [CX23885_BOARD_HAUPPAUGE_QUADHD_DVB] = { 778 .name = "Hauppauge WinTV-QuadHD-DVB", 779 .porta = CX23885_ANALOG_VIDEO, 780 .portb = CX23885_MPEG_DVB, 781 .portc = CX23885_MPEG_DVB, 782 .tuner_type = TUNER_ABSENT, 783 .force_bff = 1, 784 .input = {{ 785 .type = CX23885_VMUX_TELEVISION, 786 .vmux = CX25840_VIN7_CH3 | 787 CX25840_VIN5_CH2 | 788 CX25840_VIN2_CH1 | 789 CX25840_DIF_ON, 790 .amux = CX25840_AUDIO8, 791 } }, 792 }, 793 [CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885] = { 794 .name = "Hauppauge WinTV-QuadHD-DVB(885)", 795 .portb = CX23885_MPEG_DVB, 796 .portc = CX23885_MPEG_DVB, 797 .tuner_type = TUNER_ABSENT, 798 }, 799 [CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC] = { 800 .name = "Hauppauge WinTV-QuadHD-ATSC", 801 .porta = CX23885_ANALOG_VIDEO, 802 .portb = CX23885_MPEG_DVB, 803 .portc = CX23885_MPEG_DVB, 804 .tuner_type = TUNER_ABSENT, 805 .input = {{ 806 .type = CX23885_VMUX_TELEVISION, 807 .vmux = CX25840_VIN7_CH3 | 808 CX25840_VIN5_CH2 | 809 CX25840_VIN2_CH1 | 810 CX25840_DIF_ON, 811 .amux = CX25840_AUDIO8, 812 } }, 813 }, 814 [CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885] = { 815 .name = "Hauppauge WinTV-QuadHD-ATSC(885)", 816 .portb = CX23885_MPEG_DVB, 817 .portc = CX23885_MPEG_DVB, 818 .tuner_type = TUNER_ABSENT, 819 }, 820 [CX23885_BOARD_HAUPPAUGE_HVR1265_K4] = { 821 .name = "Hauppauge WinTV-HVR-1265(161111)", 822 .porta = CX23885_ANALOG_VIDEO, 823 .portc = CX23885_MPEG_DVB, 824 .tuner_type = TUNER_ABSENT, 825 .input = {{ 826 .type = CX23885_VMUX_TELEVISION, 827 .vmux = CX25840_VIN7_CH3 | 828 CX25840_VIN5_CH2 | 829 CX25840_VIN2_CH1 | 830 CX25840_DIF_ON, 831 .amux = CX25840_AUDIO8, 832 }, { 833 .type = CX23885_VMUX_SVIDEO, 834 .vmux = CX25840_VIN4_CH2 | 835 CX25840_VIN6_CH1 | 836 CX25840_SVIDEO_ON, 837 .amux = CX25840_AUDIO7, 838 } }, 839 }, 840 [CX23885_BOARD_HAUPPAUGE_STARBURST2] = { 841 .name = "Hauppauge WinTV-Starburst2", 842 .portb = CX23885_MPEG_DVB, 843 }, 844 [CX23885_BOARD_AVERMEDIA_CE310B] = { 845 .name = "AVerMedia CE310B", 846 .porta = CX23885_ANALOG_VIDEO, 847 .force_bff = 1, 848 .input = {{ 849 .type = CX23885_VMUX_COMPOSITE1, 850 .vmux = CX25840_VIN1_CH1 | 851 CX25840_NONE_CH2 | 852 CX25840_NONE0_CH3, 853 .amux = CX25840_AUDIO7, 854 }, { 855 .type = CX23885_VMUX_SVIDEO, 856 .vmux = CX25840_VIN8_CH1 | 857 CX25840_NONE_CH2 | 858 CX25840_VIN7_CH3 | 859 CX25840_SVIDEO_ON, 860 .amux = CX25840_AUDIO7, 861 } }, 862 }, 863 [CX23885_BOARD_AVERMEDIA_H789C] = { 864 .name = "AVerMedia H789-C", 865 .porta = CX23885_ANALOG_VIDEO, 866 .tuner_type = TUNER_NXP_TDA18271, 867 .tuner_addr = 0x63, /* 0xc0 >> 1 */ 868 .tuner_bus = 1, 869 .input = {{ 870 .type = CX23885_VMUX_TELEVISION, 871 .vmux = CX25840_VIN7_CH3 | 872 CX25840_VIN5_CH2 | 873 CX25840_VIN2_CH1 | 874 CX25840_DIF_ON, 875 .amux = CX25840_AUDIO8, 876 }, { 877 .type = CX23885_VMUX_COMPOSITE1, 878 .vmux = CX25840_VIN8_CH1, 879 .amux = CX25840_AUDIO7, 880 }, { 881 .type = CX23885_VMUX_SVIDEO, 882 .vmux = CX25840_VIN8_CH1 | 883 CX25840_VIN7_CH3 | 884 CX25840_SVIDEO_ON, 885 .amux = CX25840_AUDIO7, 886 }, }, 887 }, 888}; 889const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards); 890 891/* ------------------------------------------------------------------ */ 892/* PCI subsystem IDs */ 893 894struct cx23885_subid cx23885_subids[] = { 895 { 896 .subvendor = 0x0070, 897 .subdevice = 0x3400, 898 .card = CX23885_BOARD_UNKNOWN, 899 }, { 900 .subvendor = 0x0070, 901 .subdevice = 0x7600, 902 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp, 903 }, { 904 .subvendor = 0x0070, 905 .subdevice = 0x7800, 906 .card = CX23885_BOARD_HAUPPAUGE_HVR1800, 907 }, { 908 .subvendor = 0x0070, 909 .subdevice = 0x7801, 910 .card = CX23885_BOARD_HAUPPAUGE_HVR1800, 911 }, { 912 .subvendor = 0x0070, 913 .subdevice = 0x7809, 914 .card = CX23885_BOARD_HAUPPAUGE_HVR1800, 915 }, { 916 .subvendor = 0x0070, 917 .subdevice = 0x7911, 918 .card = CX23885_BOARD_HAUPPAUGE_HVR1250, 919 }, { 920 .subvendor = 0x18ac, 921 .subdevice = 0xd500, 922 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP, 923 }, { 924 .subvendor = 0x0070, 925 .subdevice = 0x7790, 926 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q, 927 }, { 928 .subvendor = 0x0070, 929 .subdevice = 0x7797, 930 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q, 931 }, { 932 .subvendor = 0x0070, 933 .subdevice = 0x7710, 934 .card = CX23885_BOARD_HAUPPAUGE_HVR1500, 935 }, { 936 .subvendor = 0x0070, 937 .subdevice = 0x7717, 938 .card = CX23885_BOARD_HAUPPAUGE_HVR1500, 939 }, { 940 .subvendor = 0x0070, 941 .subdevice = 0x71d1, 942 .card = CX23885_BOARD_HAUPPAUGE_HVR1200, 943 }, { 944 .subvendor = 0x0070, 945 .subdevice = 0x71d3, 946 .card = CX23885_BOARD_HAUPPAUGE_HVR1200, 947 }, { 948 .subvendor = 0x0070, 949 .subdevice = 0x8101, 950 .card = CX23885_BOARD_HAUPPAUGE_HVR1700, 951 }, { 952 .subvendor = 0x0070, 953 .subdevice = 0x8010, 954 .card = CX23885_BOARD_HAUPPAUGE_HVR1400, 955 }, { 956 .subvendor = 0x18ac, 957 .subdevice = 0xd618, 958 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP, 959 }, { 960 .subvendor = 0x18ac, 961 .subdevice = 0xdb78, 962 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP, 963 }, { 964 .subvendor = 0x107d, 965 .subdevice = 0x6681, 966 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H, 967 }, { 968 .subvendor = 0x107d, 969 .subdevice = 0x6f21, 970 .card = CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200, 971 }, { 972 .subvendor = 0x107d, 973 .subdevice = 0x6f39, 974 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000, 975 }, { 976 .subvendor = 0x185b, 977 .subdevice = 0xe800, 978 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F, 979 }, { 980 .subvendor = 0x6920, 981 .subdevice = 0x8888, 982 .card = CX23885_BOARD_TBS_6920, 983 }, { 984 .subvendor = 0x6980, 985 .subdevice = 0x8888, 986 .card = CX23885_BOARD_TBS_6980, 987 }, { 988 .subvendor = 0x6981, 989 .subdevice = 0x8888, 990 .card = CX23885_BOARD_TBS_6981, 991 }, { 992 .subvendor = 0xd470, 993 .subdevice = 0x9022, 994 .card = CX23885_BOARD_TEVII_S470, 995 }, { 996 .subvendor = 0x0001, 997 .subdevice = 0x2005, 998 .card = CX23885_BOARD_DVBWORLD_2005, 999 }, { 1000 .subvendor = 0x1b55, 1001 .subdevice = 0x2a2c, 1002 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI, 1003 }, { 1004 .subvendor = 0x0070, 1005 .subdevice = 0x2211, 1006 .card = CX23885_BOARD_HAUPPAUGE_HVR1270, 1007 }, { 1008 .subvendor = 0x0070, 1009 .subdevice = 0x2215, 1010 .card = CX23885_BOARD_HAUPPAUGE_HVR1275, 1011 }, { 1012 .subvendor = 0x0070, 1013 .subdevice = 0x221d, 1014 .card = CX23885_BOARD_HAUPPAUGE_HVR1275, 1015 }, { 1016 .subvendor = 0x0070, 1017 .subdevice = 0x2251, 1018 .card = CX23885_BOARD_HAUPPAUGE_HVR1255, 1019 }, { 1020 .subvendor = 0x0070, 1021 .subdevice = 0x2259, 1022 .card = CX23885_BOARD_HAUPPAUGE_HVR1255_22111, 1023 }, { 1024 .subvendor = 0x0070, 1025 .subdevice = 0x2291, 1026 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 1027 }, { 1028 .subvendor = 0x0070, 1029 .subdevice = 0x2295, 1030 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 1031 }, { 1032 .subvendor = 0x0070, 1033 .subdevice = 0x2299, 1034 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 1035 }, { 1036 .subvendor = 0x0070, 1037 .subdevice = 0x229d, 1038 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */ 1039 }, { 1040 .subvendor = 0x0070, 1041 .subdevice = 0x22f0, 1042 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 1043 }, { 1044 .subvendor = 0x0070, 1045 .subdevice = 0x22f1, 1046 .card = CX23885_BOARD_HAUPPAUGE_HVR1255, 1047 }, { 1048 .subvendor = 0x0070, 1049 .subdevice = 0x22f2, 1050 .card = CX23885_BOARD_HAUPPAUGE_HVR1275, 1051 }, { 1052 .subvendor = 0x0070, 1053 .subdevice = 0x22f3, 1054 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */ 1055 }, { 1056 .subvendor = 0x0070, 1057 .subdevice = 0x22f4, 1058 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, 1059 }, { 1060 .subvendor = 0x0070, 1061 .subdevice = 0x22f5, 1062 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */ 1063 }, { 1064 .subvendor = 0x14f1, 1065 .subdevice = 0x8651, 1066 .card = CX23885_BOARD_MYGICA_X8506, 1067 }, { 1068 .subvendor = 0x14f1, 1069 .subdevice = 0x8657, 1070 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2, 1071 }, { 1072 .subvendor = 0x0070, 1073 .subdevice = 0x8541, 1074 .card = CX23885_BOARD_HAUPPAUGE_HVR1850, 1075 }, { 1076 .subvendor = 0x1858, 1077 .subdevice = 0xe800, 1078 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800, 1079 }, { 1080 .subvendor = 0x0070, 1081 .subdevice = 0x8551, 1082 .card = CX23885_BOARD_HAUPPAUGE_HVR1290, 1083 }, { 1084 .subvendor = 0x14f1, 1085 .subdevice = 0x8578, 1086 .card = CX23885_BOARD_MYGICA_X8558PRO, 1087 }, { 1088 .subvendor = 0x107d, 1089 .subdevice = 0x6f22, 1090 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200, 1091 }, { 1092 .subvendor = 0x5654, 1093 .subdevice = 0x2390, 1094 .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID, 1095 }, { 1096 .subvendor = 0x1b55, 1097 .subdevice = 0xe2e4, 1098 .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF, 1099 }, { 1100 .subvendor = 0x14f1, 1101 .subdevice = 0x8502, 1102 .card = CX23885_BOARD_MYGICA_X8507, 1103 }, { 1104 .subvendor = 0x153b, 1105 .subdevice = 0x117e, 1106 .card = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL, 1107 }, { 1108 .subvendor = 0xd471, 1109 .subdevice = 0x9022, 1110 .card = CX23885_BOARD_TEVII_S471, 1111 }, { 1112 .subvendor = 0x8000, 1113 .subdevice = 0x3034, 1114 .card = CX23885_BOARD_PROF_8000, 1115 }, { 1116 .subvendor = 0x0070, 1117 .subdevice = 0xc108, 1118 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-4400 (Model 121xxx, Hybrid DVB-T/S2, IR) */ 1119 }, { 1120 .subvendor = 0x0070, 1121 .subdevice = 0xc138, 1122 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */ 1123 }, { 1124 .subvendor = 0x0070, 1125 .subdevice = 0xc12a, 1126 .card = CX23885_BOARD_HAUPPAUGE_STARBURST, /* Hauppauge WinTV Starburst (Model 121x00, DVB-S2, IR) */ 1127 }, { 1128 .subvendor = 0x0070, 1129 .subdevice = 0xc1f8, 1130 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */ 1131 }, { 1132 .subvendor = 0x1461, 1133 .subdevice = 0xd939, 1134 .card = CX23885_BOARD_AVERMEDIA_HC81R, 1135 }, { 1136 .subvendor = 0x0070, 1137 .subdevice = 0x7133, 1138 .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE, 1139 }, { 1140 .subvendor = 0x0070, 1141 .subdevice = 0x7137, 1142 .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE, 1143 }, { 1144 .subvendor = 0x18ac, 1145 .subdevice = 0xdb98, 1146 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2, 1147 }, { 1148 .subvendor = 0x4254, 1149 .subdevice = 0x9580, 1150 .card = CX23885_BOARD_DVBSKY_T9580, 1151 }, { 1152 .subvendor = 0x4254, 1153 .subdevice = 0x980c, 1154 .card = CX23885_BOARD_DVBSKY_T980C, 1155 }, { 1156 .subvendor = 0x4254, 1157 .subdevice = 0x950c, 1158 .card = CX23885_BOARD_DVBSKY_S950C, 1159 }, { 1160 .subvendor = 0x13c2, 1161 .subdevice = 0x3013, 1162 .card = CX23885_BOARD_TT_CT2_4500_CI, 1163 }, { 1164 .subvendor = 0x4254, 1165 .subdevice = 0x0950, 1166 .card = CX23885_BOARD_DVBSKY_S950, 1167 }, { 1168 .subvendor = 0x4254, 1169 .subdevice = 0x0952, 1170 .card = CX23885_BOARD_DVBSKY_S952, 1171 }, { 1172 .subvendor = 0x4254, 1173 .subdevice = 0x0982, 1174 .card = CX23885_BOARD_DVBSKY_T982, 1175 }, { 1176 .subvendor = 0x0070, 1177 .subdevice = 0xf038, 1178 .card = CX23885_BOARD_HAUPPAUGE_HVR5525, 1179 }, { 1180 .subvendor = 0x1576, 1181 .subdevice = 0x0260, 1182 .card = CX23885_BOARD_VIEWCAST_260E, 1183 }, { 1184 .subvendor = 0x1576, 1185 .subdevice = 0x0460, 1186 .card = CX23885_BOARD_VIEWCAST_460E, 1187 }, { 1188 .subvendor = 0x0070, 1189 .subdevice = 0x6a28, 1190 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 1 */ 1191 }, { 1192 .subvendor = 0x0070, 1193 .subdevice = 0x6b28, 1194 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 2 */ 1195 }, { 1196 .subvendor = 0x0070, 1197 .subdevice = 0x6a18, 1198 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 1 */ 1199 }, { 1200 .subvendor = 0x0070, 1201 .subdevice = 0x6b18, 1202 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 2 */ 1203 }, { 1204 .subvendor = 0x0070, 1205 .subdevice = 0x2a18, 1206 .card = CX23885_BOARD_HAUPPAUGE_HVR1265_K4, /* Hauppauge WinTV HVR-1265 (Model 161xx1, Hybrid ATSC/QAM-B) */ 1207 }, { 1208 .subvendor = 0x0070, 1209 .subdevice = 0xf02a, 1210 .card = CX23885_BOARD_HAUPPAUGE_STARBURST2, 1211 }, { 1212 .subvendor = 0x1461, 1213 .subdevice = 0x3100, 1214 .card = CX23885_BOARD_AVERMEDIA_CE310B, 1215 }, { 1216 .subvendor = 0x1461, 1217 .subdevice = 0xe139, 1218 .card = CX23885_BOARD_AVERMEDIA_H789C, 1219 }, 1220}; 1221const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids); 1222 1223void cx23885_card_list(struct cx23885_dev *dev) 1224{ 1225 int i; 1226 1227 if (0 == dev->pci->subsystem_vendor && 1228 0 == dev->pci->subsystem_device) { 1229 pr_info("%s: Board has no valid PCIe Subsystem ID and can't\n" 1230 "%s: be autodetected. Pass card=<n> insmod option\n" 1231 "%s: to workaround that. Redirect complaints to the\n" 1232 "%s: vendor of the TV card. Best regards,\n" 1233 "%s: -- tux\n", 1234 dev->name, dev->name, dev->name, dev->name, dev->name); 1235 } else { 1236 pr_info("%s: Your board isn't known (yet) to the driver.\n" 1237 "%s: Try to pick one of the existing card configs via\n" 1238 "%s: card=<n> insmod option. Updating to the latest\n" 1239 "%s: version might help as well.\n", 1240 dev->name, dev->name, dev->name, dev->name); 1241 } 1242 pr_info("%s: Here is a list of valid choices for the card=<n> insmod option:\n", 1243 dev->name); 1244 for (i = 0; i < cx23885_bcount; i++) 1245 pr_info("%s: card=%d -> %s\n", 1246 dev->name, i, cx23885_boards[i].name); 1247} 1248 1249static void viewcast_eeprom(struct cx23885_dev *dev, u8 *eeprom_data) 1250{ 1251 u32 sn; 1252 1253 /* The serial number record begins with tag 0x59 */ 1254 if (*(eeprom_data + 0x00) != 0x59) { 1255 pr_info("%s() eeprom records are undefined, no serial number\n", 1256 __func__); 1257 return; 1258 } 1259 1260 sn = (*(eeprom_data + 0x06) << 24) | 1261 (*(eeprom_data + 0x05) << 16) | 1262 (*(eeprom_data + 0x04) << 8) | 1263 (*(eeprom_data + 0x03)); 1264 1265 pr_info("%s: card '%s' sn# MM%d\n", 1266 dev->name, 1267 cx23885_boards[dev->board].name, 1268 sn); 1269} 1270 1271static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data) 1272{ 1273 struct tveeprom tv; 1274 1275 tveeprom_hauppauge_analog(&tv, eeprom_data); 1276 1277 /* Make sure we support the board model */ 1278 switch (tv.model) { 1279 case 22001: 1280 /* WinTV-HVR1270 (PCIe, Retail, half height) 1281 * ATSC/QAM and basic analog, IR Blast */ 1282 case 22009: 1283 /* WinTV-HVR1210 (PCIe, Retail, half height) 1284 * DVB-T and basic analog, IR Blast */ 1285 case 22011: 1286 /* WinTV-HVR1270 (PCIe, Retail, half height) 1287 * ATSC/QAM and basic analog, IR Recv */ 1288 case 22019: 1289 /* WinTV-HVR1210 (PCIe, Retail, half height) 1290 * DVB-T and basic analog, IR Recv */ 1291 case 22021: 1292 /* WinTV-HVR1275 (PCIe, Retail, half height) 1293 * ATSC/QAM and basic analog, IR Recv */ 1294 case 22029: 1295 /* WinTV-HVR1210 (PCIe, Retail, half height) 1296 * DVB-T and basic analog, IR Recv */ 1297 case 22101: 1298 /* WinTV-HVR1270 (PCIe, Retail, full height) 1299 * ATSC/QAM and basic analog, IR Blast */ 1300 case 22109: 1301 /* WinTV-HVR1210 (PCIe, Retail, full height) 1302 * DVB-T and basic analog, IR Blast */ 1303 case 22111: 1304 /* WinTV-HVR1270 (PCIe, Retail, full height) 1305 * ATSC/QAM and basic analog, IR Recv */ 1306 case 22119: 1307 /* WinTV-HVR1210 (PCIe, Retail, full height) 1308 * DVB-T and basic analog, IR Recv */ 1309 case 22121: 1310 /* WinTV-HVR1275 (PCIe, Retail, full height) 1311 * ATSC/QAM and basic analog, IR Recv */ 1312 case 22129: 1313 /* WinTV-HVR1210 (PCIe, Retail, full height) 1314 * DVB-T and basic analog, IR Recv */ 1315 case 71009: 1316 /* WinTV-HVR1200 (PCIe, Retail, full height) 1317 * DVB-T and basic analog */ 1318 case 71100: 1319 /* WinTV-ImpactVCB-e (PCIe, Retail, half height) 1320 * Basic analog */ 1321 case 71359: 1322 /* WinTV-HVR1200 (PCIe, OEM, half height) 1323 * DVB-T and basic analog */ 1324 case 71439: 1325 /* WinTV-HVR1200 (PCIe, OEM, half height) 1326 * DVB-T and basic analog */ 1327 case 71449: 1328 /* WinTV-HVR1200 (PCIe, OEM, full height) 1329 * DVB-T and basic analog */ 1330 case 71939: 1331 /* WinTV-HVR1200 (PCIe, OEM, half height) 1332 * DVB-T and basic analog */ 1333 case 71949: 1334 /* WinTV-HVR1200 (PCIe, OEM, full height) 1335 * DVB-T and basic analog */ 1336 case 71959: 1337 /* WinTV-HVR1200 (PCIe, OEM, full height) 1338 * DVB-T and basic analog */ 1339 case 71979: 1340 /* WinTV-HVR1200 (PCIe, OEM, half height) 1341 * DVB-T and basic analog */ 1342 case 71999: 1343 /* WinTV-HVR1200 (PCIe, OEM, full height) 1344 * DVB-T and basic analog */ 1345 case 76601: 1346 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual 1347 channel ATSC and MPEG2 HW Encoder */ 1348 case 77001: 1349 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC 1350 and Basic analog */ 1351 case 77011: 1352 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC 1353 and Basic analog */ 1354 case 77041: 1355 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM 1356 and Basic analog */ 1357 case 77051: 1358 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM 1359 and Basic analog */ 1360 case 78011: 1361 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM, 1362 Dual channel ATSC and MPEG2 HW Encoder */ 1363 case 78501: 1364 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM, 1365 Dual channel ATSC and MPEG2 HW Encoder */ 1366 case 78521: 1367 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM, 1368 Dual channel ATSC and MPEG2 HW Encoder */ 1369 case 78531: 1370 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM, 1371 Dual channel ATSC and MPEG2 HW Encoder */ 1372 case 78631: 1373 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM, 1374 Dual channel ATSC and MPEG2 HW Encoder */ 1375 case 79001: 1376 /* WinTV-HVR1250 (PCIe, Retail, IR, full height, 1377 ATSC and Basic analog */ 1378 case 79101: 1379 /* WinTV-HVR1250 (PCIe, Retail, IR, half height, 1380 ATSC and Basic analog */ 1381 case 79501: 1382 /* WinTV-HVR1250 (PCIe, No IR, half height, 1383 ATSC [at least] and Basic analog) */ 1384 case 79561: 1385 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height, 1386 ATSC and Basic analog */ 1387 case 79571: 1388 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height, 1389 ATSC and Basic analog */ 1390 case 79671: 1391 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height, 1392 ATSC and Basic analog */ 1393 case 80019: 1394 /* WinTV-HVR1400 (Express Card, Retail, IR, 1395 * DVB-T and Basic analog */ 1396 case 81509: 1397 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height) 1398 * DVB-T and MPEG2 HW Encoder */ 1399 case 81519: 1400 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height) 1401 * DVB-T and MPEG2 HW Encoder */ 1402 break; 1403 case 85021: 1404 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM, 1405 Dual channel ATSC and MPEG2 HW Encoder */ 1406 break; 1407 case 85721: 1408 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR, 1409 Dual channel ATSC and Basic analog */ 1410 case 121019: 1411 /* WinTV-HVR4400 (PCIe, DVB-S2, DVB-C/T) */ 1412 break; 1413 case 121029: 1414 /* WinTV-HVR5500 (PCIe, DVB-S2, DVB-C/T) */ 1415 break; 1416 case 150329: 1417 /* WinTV-HVR5525 (PCIe, DVB-S/S2, DVB-T/T2/C) */ 1418 break; 1419 case 161111: 1420 /* WinTV-HVR-1265 K4 (PCIe, Analog/ATSC/QAM-B) */ 1421 break; 1422 case 166100: /* 888 version, hybrid */ 1423 case 166200: /* 885 version, DVB only */ 1424 /* WinTV-QuadHD (DVB) Tuner Pair 1 (PCIe, IR, half height, 1425 DVB-T/T2/C, DVB-T/T2/C */ 1426 break; 1427 case 166101: /* 888 version, hybrid */ 1428 case 166201: /* 885 version, DVB only */ 1429 /* WinTV-QuadHD (DVB) Tuner Pair 2 (PCIe, IR, half height, 1430 DVB-T/T2/C, DVB-T/T2/C */ 1431 break; 1432 case 165100: /* 888 version, hybrid */ 1433 case 165200: /* 885 version, digital only */ 1434 /* WinTV-QuadHD (ATSC) Tuner Pair 1 (PCIe, IR, half height, 1435 * ATSC/QAM-B, ATSC/QAM-B */ 1436 break; 1437 case 165101: /* 888 version, hybrid */ 1438 case 165201: /* 885 version, digital only */ 1439 /* WinTV-QuadHD (ATSC) Tuner Pair 2 (PCIe, IR, half height, 1440 * ATSC/QAM-B, ATSC/QAM-B */ 1441 break; 1442 default: 1443 pr_warn("%s: warning: unknown hauppauge model #%d\n", 1444 dev->name, tv.model); 1445 break; 1446 } 1447 1448 pr_info("%s: hauppauge eeprom: model=%d\n", 1449 dev->name, tv.model); 1450} 1451 1452/* Some TBS cards require initing a chip using a bitbanged SPI attached 1453 to the cx23885 gpio's. If this chip doesn't get init'ed the demod 1454 doesn't respond to any command. */ 1455static void tbs_card_init(struct cx23885_dev *dev) 1456{ 1457 int i; 1458 static const u8 buf[] = { 1459 0xe0, 0x06, 0x66, 0x33, 0x65, 1460 0x01, 0x17, 0x06, 0xde}; 1461 1462 switch (dev->board) { 1463 case CX23885_BOARD_TBS_6980: 1464 case CX23885_BOARD_TBS_6981: 1465 cx_set(GP0_IO, 0x00070007); 1466 usleep_range(1000, 10000); 1467 cx_clear(GP0_IO, 2); 1468 usleep_range(1000, 10000); 1469 for (i = 0; i < 9 * 8; i++) { 1470 cx_clear(GP0_IO, 7); 1471 usleep_range(1000, 10000); 1472 cx_set(GP0_IO, 1473 ((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4); 1474 usleep_range(1000, 10000); 1475 } 1476 cx_set(GP0_IO, 7); 1477 break; 1478 } 1479} 1480 1481int cx23885_tuner_callback(void *priv, int component, int command, int arg) 1482{ 1483 struct cx23885_tsport *port = priv; 1484 struct cx23885_dev *dev = port->dev; 1485 u32 bitmask = 0; 1486 1487 if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH)) 1488 return 0; 1489 1490 if (command != 0) { 1491 pr_err("%s(): Unknown command 0x%x.\n", 1492 __func__, command); 1493 return -EINVAL; 1494 } 1495 1496 switch (dev->board) { 1497 case CX23885_BOARD_HAUPPAUGE_HVR1400: 1498 case CX23885_BOARD_HAUPPAUGE_HVR1500: 1499 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 1500 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: 1501 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200: 1502 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: 1503 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: 1504 case CX23885_BOARD_COMPRO_VIDEOMATE_E800: 1505 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: 1506 /* Tuner Reset Command */ 1507 bitmask = 0x04; 1508 break; 1509 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: 1510 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: 1511 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: 1512 /* Two identical tuners on two different i2c buses, 1513 * we need to reset the correct gpio. */ 1514 if (port->nr == 1) 1515 bitmask = 0x01; 1516 else if (port->nr == 2) 1517 bitmask = 0x04; 1518 break; 1519 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: 1520 /* Tuner Reset Command */ 1521 bitmask = 0x02; 1522 break; 1523 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: 1524 altera_ci_tuner_reset(dev, port->nr); 1525 break; 1526 case CX23885_BOARD_AVERMEDIA_HC81R: 1527 /* XC3028L Reset Command */ 1528 bitmask = 1 << 2; 1529 break; 1530 } 1531 1532 if (bitmask) { 1533 /* Drive the tuner into reset and back out */ 1534 cx_clear(GP0_IO, bitmask); 1535 mdelay(200); 1536 cx_set(GP0_IO, bitmask); 1537 } 1538 1539 return 0; 1540} 1541 1542void cx23885_gpio_setup(struct cx23885_dev *dev) 1543{ 1544 switch (dev->board) { 1545 case CX23885_BOARD_HAUPPAUGE_HVR1250: 1546 /* GPIO-0 cx24227 demodulator reset */ 1547 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */ 1548 break; 1549 case CX23885_BOARD_HAUPPAUGE_HVR1500: 1550 /* GPIO-0 cx24227 demodulator */ 1551 /* GPIO-2 xc3028 tuner */ 1552 1553 /* Put the parts into reset */ 1554 cx_set(GP0_IO, 0x00050000); 1555 cx_clear(GP0_IO, 0x00000005); 1556 msleep(5); 1557 1558 /* Bring the parts out of reset */ 1559 cx_set(GP0_IO, 0x00050005); 1560 break; 1561 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 1562 /* GPIO-0 cx24227 demodulator reset */ 1563 /* GPIO-2 xc5000 tuner reset */ 1564 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */ 1565 break; 1566 case CX23885_BOARD_HAUPPAUGE_HVR1800: 1567 /* GPIO-0 656_CLK */ 1568 /* GPIO-1 656_D0 */ 1569 /* GPIO-2 8295A Reset */ 1570 /* GPIO-3-10 cx23417 data0-7 */ 1571 /* GPIO-11-14 cx23417 addr0-3 */ 1572 /* GPIO-15-18 cx23417 READY, CS, RD, WR */ 1573 /* GPIO-19 IR_RX */ 1574 1575 /* CX23417 GPIO's */ 1576 /* EIO15 Zilog Reset */ 1577 /* EIO14 S5H1409/CX24227 Reset */ 1578 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1); 1579 1580 /* Put the demod into reset and protect the eeprom */ 1581 mc417_gpio_clear(dev, GPIO_15 | GPIO_14); 1582 msleep(100); 1583 1584 /* Bring the demod and blaster out of reset */ 1585 mc417_gpio_set(dev, GPIO_15 | GPIO_14); 1586 msleep(100); 1587 1588 /* Force the TDA8295A into reset and back */ 1589 cx23885_gpio_enable(dev, GPIO_2, 1); 1590 cx23885_gpio_set(dev, GPIO_2); 1591 msleep(20); 1592 cx23885_gpio_clear(dev, GPIO_2); 1593 msleep(20); 1594 cx23885_gpio_set(dev, GPIO_2); 1595 msleep(20); 1596 break; 1597 case CX23885_BOARD_HAUPPAUGE_HVR1200: 1598 /* GPIO-0 tda10048 demodulator reset */ 1599 /* GPIO-2 tda18271 tuner reset */ 1600 1601 /* Put the parts into reset and back */ 1602 cx_set(GP0_IO, 0x00050000); 1603 msleep(20); 1604 cx_clear(GP0_IO, 0x00000005); 1605 msleep(20); 1606 cx_set(GP0_IO, 0x00050005); 1607 break; 1608 case CX23885_BOARD_HAUPPAUGE_HVR1700: 1609 /* GPIO-0 TDA10048 demodulator reset */ 1610 /* GPIO-2 TDA8295A Reset */ 1611 /* GPIO-3-10 cx23417 data0-7 */ 1612 /* GPIO-11-14 cx23417 addr0-3 */ 1613 /* GPIO-15-18 cx23417 READY, CS, RD, WR */ 1614 1615 /* The following GPIO's are on the interna AVCore (cx25840) */ 1616 /* GPIO-19 IR_RX */ 1617 /* GPIO-20 IR_TX 416/DVBT Select */ 1618 /* GPIO-21 IIS DAT */ 1619 /* GPIO-22 IIS WCLK */ 1620 /* GPIO-23 IIS BCLK */ 1621 1622 /* Put the parts into reset and back */ 1623 cx_set(GP0_IO, 0x00050000); 1624 msleep(20); 1625 cx_clear(GP0_IO, 0x00000005); 1626 msleep(20); 1627 cx_set(GP0_IO, 0x00050005); 1628 break; 1629 case CX23885_BOARD_HAUPPAUGE_HVR1400: 1630 /* GPIO-0 Dibcom7000p demodulator reset */ 1631 /* GPIO-2 xc3028L tuner reset */ 1632 /* GPIO-13 LED */ 1633 1634 /* Put the parts into reset and back */ 1635 cx_set(GP0_IO, 0x00050000); 1636 msleep(20); 1637 cx_clear(GP0_IO, 0x00000005); 1638 msleep(20); 1639 cx_set(GP0_IO, 0x00050005); 1640 break; 1641 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: 1642 /* GPIO-0 xc5000 tuner reset i2c bus 0 */ 1643 /* GPIO-1 s5h1409 demod reset i2c bus 0 */ 1644 /* GPIO-2 xc5000 tuner reset i2c bus 1 */ 1645 /* GPIO-3 s5h1409 demod reset i2c bus 0 */ 1646 1647 /* Put the parts into reset and back */ 1648 cx_set(GP0_IO, 0x000f0000); 1649 msleep(20); 1650 cx_clear(GP0_IO, 0x0000000f); 1651 msleep(20); 1652 cx_set(GP0_IO, 0x000f000f); 1653 break; 1654 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: 1655 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: 1656 /* GPIO-0 portb xc3028 reset */ 1657 /* GPIO-1 portb zl10353 reset */ 1658 /* GPIO-2 portc xc3028 reset */ 1659 /* GPIO-3 portc zl10353 reset */ 1660 1661 /* Put the parts into reset and back */ 1662 cx_set(GP0_IO, 0x000f0000); 1663 msleep(20); 1664 cx_clear(GP0_IO, 0x0000000f); 1665 msleep(20); 1666 cx_set(GP0_IO, 0x000f000f); 1667 break; 1668 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: 1669 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200: 1670 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: 1671 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: 1672 case CX23885_BOARD_COMPRO_VIDEOMATE_E800: 1673 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: 1674 /* GPIO-2 xc3028 tuner reset */ 1675 1676 /* The following GPIO's are on the internal AVCore (cx25840) */ 1677 /* GPIO-? zl10353 demod reset */ 1678 1679 /* Put the parts into reset and back */ 1680 cx_set(GP0_IO, 0x00040000); 1681 msleep(20); 1682 cx_clear(GP0_IO, 0x00000004); 1683 msleep(20); 1684 cx_set(GP0_IO, 0x00040004); 1685 break; 1686 case CX23885_BOARD_TBS_6920: 1687 case CX23885_BOARD_TBS_6980: 1688 case CX23885_BOARD_TBS_6981: 1689 case CX23885_BOARD_PROF_8000: 1690 cx_write(MC417_CTL, 0x00000036); 1691 cx_write(MC417_OEN, 0x00001000); 1692 cx_set(MC417_RWD, 0x00000002); 1693 msleep(200); 1694 cx_clear(MC417_RWD, 0x00000800); 1695 msleep(200); 1696 cx_set(MC417_RWD, 0x00000800); 1697 msleep(200); 1698 break; 1699 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: 1700 /* GPIO-0 INTA from CiMax1 1701 GPIO-1 INTB from CiMax2 1702 GPIO-2 reset chips 1703 GPIO-3 to GPIO-10 data/addr for CA 1704 GPIO-11 ~CS0 to CiMax1 1705 GPIO-12 ~CS1 to CiMax2 1706 GPIO-13 ADL0 load LSB addr 1707 GPIO-14 ADL1 load MSB addr 1708 GPIO-15 ~RDY from CiMax 1709 GPIO-17 ~RD to CiMax 1710 GPIO-18 ~WR to CiMax 1711 */ 1712 cx_set(GP0_IO, 0x00040000); /* GPIO as out */ 1713 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */ 1714 cx_clear(GP0_IO, 0x00030004); 1715 msleep(100);/* reset delay */ 1716 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */ 1717 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */ 1718 /* GPIO-15 IN as ~ACK, rest as OUT */ 1719 cx_write(MC417_OEN, 0x00001000); 1720 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */ 1721 cx_write(MC417_RWD, 0x0000c300); 1722 /* enable irq */ 1723 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/ 1724 break; 1725 case CX23885_BOARD_HAUPPAUGE_HVR1270: 1726 case CX23885_BOARD_HAUPPAUGE_HVR1275: 1727 case CX23885_BOARD_HAUPPAUGE_HVR1255: 1728 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 1729 case CX23885_BOARD_HAUPPAUGE_HVR1210: 1730 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */ 1731 /* GPIO-6 I2C Gate which can isolate the demod from the bus */ 1732 /* GPIO-9 Demod reset */ 1733 1734 /* Put the parts into reset and back */ 1735 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1); 1736 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5); 1737 cx23885_gpio_clear(dev, GPIO_9); 1738 msleep(20); 1739 cx23885_gpio_set(dev, GPIO_9); 1740 break; 1741 case CX23885_BOARD_MYGICA_X8506: 1742 case CX23885_BOARD_MAGICPRO_PROHDTVE2: 1743 case CX23885_BOARD_MYGICA_X8507: 1744 /* GPIO-0 (0)Analog / (1)Digital TV */ 1745 /* GPIO-1 reset XC5000 */ 1746 /* GPIO-2 demod reset */ 1747 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1); 1748 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2); 1749 msleep(100); 1750 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2); 1751 msleep(100); 1752 break; 1753 case CX23885_BOARD_MYGICA_X8558PRO: 1754 /* GPIO-0 reset first ATBM8830 */ 1755 /* GPIO-1 reset second ATBM8830 */ 1756 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1); 1757 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1); 1758 msleep(100); 1759 cx23885_gpio_set(dev, GPIO_0 | GPIO_1); 1760 msleep(100); 1761 break; 1762 case CX23885_BOARD_HAUPPAUGE_HVR1850: 1763 case CX23885_BOARD_HAUPPAUGE_HVR1290: 1764 /* GPIO-0 656_CLK */ 1765 /* GPIO-1 656_D0 */ 1766 /* GPIO-2 Wake# */ 1767 /* GPIO-3-10 cx23417 data0-7 */ 1768 /* GPIO-11-14 cx23417 addr0-3 */ 1769 /* GPIO-15-18 cx23417 READY, CS, RD, WR */ 1770 /* GPIO-19 IR_RX */ 1771 /* GPIO-20 C_IR_TX */ 1772 /* GPIO-21 I2S DAT */ 1773 /* GPIO-22 I2S WCLK */ 1774 /* GPIO-23 I2S BCLK */ 1775 /* ALT GPIO: EXP GPIO LATCH */ 1776 1777 /* CX23417 GPIO's */ 1778 /* GPIO-14 S5H1411/CX24228 Reset */ 1779 /* GPIO-13 EEPROM write protect */ 1780 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1); 1781 1782 /* Put the demod into reset and protect the eeprom */ 1783 mc417_gpio_clear(dev, GPIO_14 | GPIO_13); 1784 msleep(100); 1785 1786 /* Bring the demod out of reset */ 1787 mc417_gpio_set(dev, GPIO_14); 1788 msleep(100); 1789 1790 /* CX24228 GPIO */ 1791 /* Connected to IF / Mux */ 1792 break; 1793 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: 1794 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */ 1795 break; 1796 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: 1797 /* GPIO-0 ~INT in 1798 GPIO-1 TMS out 1799 GPIO-2 ~reset chips out 1800 GPIO-3 to GPIO-10 data/addr for CA in/out 1801 GPIO-11 ~CS out 1802 GPIO-12 ADDR out 1803 GPIO-13 ~WR out 1804 GPIO-14 ~RD out 1805 GPIO-15 ~RDY in 1806 GPIO-16 TCK out 1807 GPIO-17 TDO in 1808 GPIO-18 TDI out 1809 */ 1810 cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */ 1811 /* GPIO-0 as INT, reset & TMS low */ 1812 cx_clear(GP0_IO, 0x00010006); 1813 msleep(100);/* reset delay */ 1814 cx_set(GP0_IO, 0x00000004); /* reset high */ 1815 cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */ 1816 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */ 1817 cx_write(MC417_OEN, 0x00005000); 1818 /* ~RD, ~WR high; ADDR low; ~CS high */ 1819 cx_write(MC417_RWD, 0x00000d00); 1820 /* enable irq */ 1821 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/ 1822 break; 1823 case CX23885_BOARD_HAUPPAUGE_HVR4400: 1824 case CX23885_BOARD_HAUPPAUGE_STARBURST: 1825 /* GPIO-8 tda10071 demod reset */ 1826 /* GPIO-9 si2165 demod reset (only HVR4400/HVR5500)*/ 1827 1828 /* Put the parts into reset and back */ 1829 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1); 1830 1831 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9); 1832 msleep(100); 1833 cx23885_gpio_set(dev, GPIO_8 | GPIO_9); 1834 msleep(100); 1835 1836 break; 1837 case CX23885_BOARD_AVERMEDIA_HC81R: 1838 cx_clear(MC417_CTL, 1); 1839 /* GPIO-0,1,2 setup direction as output */ 1840 cx_set(GP0_IO, 0x00070000); 1841 usleep_range(10000, 11000); 1842 /* AF9013 demod reset */ 1843 cx_set(GP0_IO, 0x00010001); 1844 usleep_range(10000, 11000); 1845 cx_clear(GP0_IO, 0x00010001); 1846 usleep_range(10000, 11000); 1847 cx_set(GP0_IO, 0x00010001); 1848 usleep_range(10000, 11000); 1849 /* demod tune? */ 1850 cx_clear(GP0_IO, 0x00030003); 1851 usleep_range(10000, 11000); 1852 cx_set(GP0_IO, 0x00020002); 1853 usleep_range(10000, 11000); 1854 cx_set(GP0_IO, 0x00010001); 1855 usleep_range(10000, 11000); 1856 cx_clear(GP0_IO, 0x00020002); 1857 /* XC3028L tuner reset */ 1858 cx_set(GP0_IO, 0x00040004); 1859 cx_clear(GP0_IO, 0x00040004); 1860 cx_set(GP0_IO, 0x00040004); 1861 msleep(60); 1862 break; 1863 case CX23885_BOARD_DVBSKY_T9580: 1864 case CX23885_BOARD_DVBSKY_S952: 1865 case CX23885_BOARD_DVBSKY_T982: 1866 /* enable GPIO3-18 pins */ 1867 cx_write(MC417_CTL, 0x00000037); 1868 cx23885_gpio_enable(dev, GPIO_2 | GPIO_11, 1); 1869 cx23885_gpio_clear(dev, GPIO_2 | GPIO_11); 1870 msleep(100); 1871 cx23885_gpio_set(dev, GPIO_2 | GPIO_11); 1872 break; 1873 case CX23885_BOARD_DVBSKY_T980C: 1874 case CX23885_BOARD_DVBSKY_S950C: 1875 case CX23885_BOARD_TT_CT2_4500_CI: 1876 /* 1877 * GPIO-0 INTA from CiMax, input 1878 * GPIO-1 reset CiMax, output, high active 1879 * GPIO-2 reset demod, output, low active 1880 * GPIO-3 to GPIO-10 data/addr for CAM 1881 * GPIO-11 ~CS0 to CiMax1 1882 * GPIO-12 ~CS1 to CiMax2 1883 * GPIO-13 ADL0 load LSB addr 1884 * GPIO-14 ADL1 load MSB addr 1885 * GPIO-15 ~RDY from CiMax 1886 * GPIO-17 ~RD to CiMax 1887 * GPIO-18 ~WR to CiMax 1888 */ 1889 1890 cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */ 1891 cx_clear(GP0_IO, 0x00010004); /* GPIO 0 as input */ 1892 msleep(100); /* reset delay */ 1893 cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */ 1894 cx_clear(GP0_IO, 0x00010002); 1895 cx_write(MC417_CTL, 0x00000037); /* enable GPIO3-18 pins */ 1896 1897 /* GPIO-15 IN as ~ACK, rest as OUT */ 1898 cx_write(MC417_OEN, 0x00001000); 1899 1900 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */ 1901 cx_write(MC417_RWD, 0x0000c300); 1902 1903 /* enable irq */ 1904 cx_write(GPIO_ISM, 0x00000000); /* INTERRUPTS active low */ 1905 break; 1906 case CX23885_BOARD_DVBSKY_S950: 1907 cx23885_gpio_enable(dev, GPIO_2, 1); 1908 cx23885_gpio_clear(dev, GPIO_2); 1909 msleep(100); 1910 cx23885_gpio_set(dev, GPIO_2); 1911 break; 1912 case CX23885_BOARD_HAUPPAUGE_HVR5525: 1913 case CX23885_BOARD_HAUPPAUGE_STARBURST2: 1914 /* 1915 * HVR5525 GPIO Details: 1916 * GPIO-00 IR_WIDE 1917 * GPIO-02 wake# 1918 * GPIO-03 VAUX Pres. 1919 * GPIO-07 PROG# 1920 * GPIO-08 SAT_RESN 1921 * GPIO-09 TER_RESN 1922 * GPIO-10 B2_SENSE 1923 * GPIO-11 B1_SENSE 1924 * GPIO-15 IR_LED_STATUS 1925 * GPIO-19 IR_NARROW 1926 * GPIO-20 Blauster1 1927 * ALTGPIO VAUX_SWITCH 1928 * AUX_PLL_CLK : Blaster2 1929 */ 1930 /* Put the parts into reset and back */ 1931 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1); 1932 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9); 1933 msleep(100); 1934 cx23885_gpio_set(dev, GPIO_8 | GPIO_9); 1935 msleep(100); 1936 break; 1937 case CX23885_BOARD_VIEWCAST_260E: 1938 case CX23885_BOARD_VIEWCAST_460E: 1939 /* For documentation purposes, it's worth noting that this 1940 * card does not have any GPIO's connected to subcomponents. 1941 */ 1942 break; 1943 case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: 1944 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: 1945 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885: 1946 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: 1947 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885: 1948 /* 1949 * GPIO-08 TER1_RESN 1950 * GPIO-09 TER2_RESN 1951 */ 1952 /* Put the parts into reset and back */ 1953 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1); 1954 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9); 1955 msleep(100); 1956 cx23885_gpio_set(dev, GPIO_8 | GPIO_9); 1957 msleep(100); 1958 break; 1959 } 1960} 1961 1962int cx23885_ir_init(struct cx23885_dev *dev) 1963{ 1964 static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = { 1965 { 1966 .flags = BIT(V4L2_SUBDEV_IO_PIN_INPUT), 1967 .pin = CX23885_PIN_IR_RX_GPIO19, 1968 .function = CX23885_PAD_IR_RX, 1969 .value = 0, 1970 .strength = CX25840_PIN_DRIVE_MEDIUM, 1971 }, { 1972 .flags = BIT(V4L2_SUBDEV_IO_PIN_OUTPUT), 1973 .pin = CX23885_PIN_IR_TX_GPIO20, 1974 .function = CX23885_PAD_IR_TX, 1975 .value = 0, 1976 .strength = CX25840_PIN_DRIVE_MEDIUM, 1977 } 1978 }; 1979 const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg); 1980 1981 static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = { 1982 { 1983 .flags = BIT(V4L2_SUBDEV_IO_PIN_INPUT), 1984 .pin = CX23885_PIN_IR_RX_GPIO19, 1985 .function = CX23885_PAD_IR_RX, 1986 .value = 0, 1987 .strength = CX25840_PIN_DRIVE_MEDIUM, 1988 } 1989 }; 1990 const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg); 1991 1992 struct v4l2_subdev_ir_parameters params; 1993 int ret = 0; 1994 switch (dev->board) { 1995 case CX23885_BOARD_HAUPPAUGE_HVR1500: 1996 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 1997 case CX23885_BOARD_HAUPPAUGE_HVR1800: 1998 case CX23885_BOARD_HAUPPAUGE_HVR1200: 1999 case CX23885_BOARD_HAUPPAUGE_HVR1400: 2000 case CX23885_BOARD_HAUPPAUGE_HVR1275: 2001 case CX23885_BOARD_HAUPPAUGE_HVR1255: 2002 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 2003 case CX23885_BOARD_HAUPPAUGE_HVR1210: 2004 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: 2005 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: 2006 /* FIXME: Implement me */ 2007 break; 2008 case CX23885_BOARD_HAUPPAUGE_HVR1270: 2009 ret = cx23888_ir_probe(dev); 2010 if (ret) 2011 break; 2012 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR); 2013 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, 2014 ir_rx_pin_cfg_count, ir_rx_pin_cfg); 2015 break; 2016 case CX23885_BOARD_HAUPPAUGE_HVR1850: 2017 case CX23885_BOARD_HAUPPAUGE_HVR1290: 2018 ret = cx23888_ir_probe(dev); 2019 if (ret) 2020 break; 2021 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR); 2022 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, 2023 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg); 2024 /* 2025 * For these boards we need to invert the Tx output via the 2026 * IR controller to have the LED off while idle 2027 */ 2028 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, ¶ms); 2029 params.enable = false; 2030 params.shutdown = false; 2031 params.invert_level = true; 2032 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms); 2033 params.shutdown = true; 2034 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, ¶ms); 2035 break; 2036 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 2037 case CX23885_BOARD_TEVII_S470: 2038 case CX23885_BOARD_MYGICA_X8507: 2039 case CX23885_BOARD_TBS_6980: 2040 case CX23885_BOARD_TBS_6981: 2041 case CX23885_BOARD_DVBSKY_T9580: 2042 case CX23885_BOARD_DVBSKY_T980C: 2043 case CX23885_BOARD_DVBSKY_S950C: 2044 case CX23885_BOARD_TT_CT2_4500_CI: 2045 case CX23885_BOARD_DVBSKY_S950: 2046 case CX23885_BOARD_DVBSKY_S952: 2047 case CX23885_BOARD_DVBSKY_T982: 2048 if (!enable_885_ir) 2049 break; 2050 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE); 2051 if (dev->sd_ir == NULL) { 2052 ret = -ENODEV; 2053 break; 2054 } 2055 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, 2056 ir_rx_pin_cfg_count, ir_rx_pin_cfg); 2057 break; 2058 case CX23885_BOARD_HAUPPAUGE_HVR1250: 2059 if (!enable_885_ir) 2060 break; 2061 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE); 2062 if (dev->sd_ir == NULL) { 2063 ret = -ENODEV; 2064 break; 2065 } 2066 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, 2067 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg); 2068 break; 2069 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: 2070 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: 2071 request_module("ir-kbd-i2c"); 2072 break; 2073 } 2074 2075 return ret; 2076} 2077 2078void cx23885_ir_fini(struct cx23885_dev *dev) 2079{ 2080 switch (dev->board) { 2081 case CX23885_BOARD_HAUPPAUGE_HVR1270: 2082 case CX23885_BOARD_HAUPPAUGE_HVR1850: 2083 case CX23885_BOARD_HAUPPAUGE_HVR1290: 2084 cx23885_irq_remove(dev, PCI_MSK_IR); 2085 cx23888_ir_remove(dev); 2086 dev->sd_ir = NULL; 2087 break; 2088 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 2089 case CX23885_BOARD_TEVII_S470: 2090 case CX23885_BOARD_HAUPPAUGE_HVR1250: 2091 case CX23885_BOARD_MYGICA_X8507: 2092 case CX23885_BOARD_TBS_6980: 2093 case CX23885_BOARD_TBS_6981: 2094 case CX23885_BOARD_DVBSKY_T9580: 2095 case CX23885_BOARD_DVBSKY_T980C: 2096 case CX23885_BOARD_DVBSKY_S950C: 2097 case CX23885_BOARD_TT_CT2_4500_CI: 2098 case CX23885_BOARD_DVBSKY_S950: 2099 case CX23885_BOARD_DVBSKY_S952: 2100 case CX23885_BOARD_DVBSKY_T982: 2101 cx23885_irq_remove(dev, PCI_MSK_AV_CORE); 2102 /* sd_ir is a duplicate pointer to the AV Core, just clear it */ 2103 dev->sd_ir = NULL; 2104 break; 2105 } 2106} 2107 2108static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo) 2109{ 2110 int data; 2111 int tdo = 0; 2112 struct cx23885_dev *dev = (struct cx23885_dev *)device; 2113 /*TMS*/ 2114 data = ((cx_read(GP0_IO)) & (~0x00000002)); 2115 data |= (tms ? 0x00020002 : 0x00020000); 2116 cx_write(GP0_IO, data); 2117 2118 /*TDI*/ 2119 data = ((cx_read(MC417_RWD)) & (~0x0000a000)); 2120 data |= (tdi ? 0x00008000 : 0); 2121 cx_write(MC417_RWD, data); 2122 if (read_tdo) 2123 tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/ 2124 2125 cx_write(MC417_RWD, data | 0x00002000); 2126 udelay(1); 2127 /*TCK*/ 2128 cx_write(MC417_RWD, data); 2129 2130 return tdo; 2131} 2132 2133void cx23885_ir_pci_int_enable(struct cx23885_dev *dev) 2134{ 2135 switch (dev->board) { 2136 case CX23885_BOARD_HAUPPAUGE_HVR1270: 2137 case CX23885_BOARD_HAUPPAUGE_HVR1850: 2138 case CX23885_BOARD_HAUPPAUGE_HVR1290: 2139 if (dev->sd_ir) 2140 cx23885_irq_add_enable(dev, PCI_MSK_IR); 2141 break; 2142 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 2143 case CX23885_BOARD_TEVII_S470: 2144 case CX23885_BOARD_HAUPPAUGE_HVR1250: 2145 case CX23885_BOARD_MYGICA_X8507: 2146 case CX23885_BOARD_TBS_6980: 2147 case CX23885_BOARD_TBS_6981: 2148 case CX23885_BOARD_DVBSKY_T9580: 2149 case CX23885_BOARD_DVBSKY_T980C: 2150 case CX23885_BOARD_DVBSKY_S950C: 2151 case CX23885_BOARD_TT_CT2_4500_CI: 2152 case CX23885_BOARD_DVBSKY_S950: 2153 case CX23885_BOARD_DVBSKY_S952: 2154 case CX23885_BOARD_DVBSKY_T982: 2155 if (dev->sd_ir) 2156 cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE); 2157 break; 2158 } 2159} 2160 2161void cx23885_card_setup(struct cx23885_dev *dev) 2162{ 2163 struct cx23885_tsport *ts1 = &dev->ts1; 2164 struct cx23885_tsport *ts2 = &dev->ts2; 2165 2166 static u8 eeprom[256]; 2167 2168 if (dev->i2c_bus[0].i2c_rc == 0) { 2169 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; 2170 tveeprom_read(&dev->i2c_bus[0].i2c_client, 2171 eeprom, sizeof(eeprom)); 2172 } 2173 2174 switch (dev->board) { 2175 case CX23885_BOARD_HAUPPAUGE_HVR1250: 2176 if (dev->i2c_bus[0].i2c_rc == 0) { 2177 if (eeprom[0x80] != 0x84) 2178 hauppauge_eeprom(dev, eeprom+0xc0); 2179 else 2180 hauppauge_eeprom(dev, eeprom+0x80); 2181 } 2182 break; 2183 case CX23885_BOARD_HAUPPAUGE_HVR1500: 2184 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 2185 case CX23885_BOARD_HAUPPAUGE_HVR1400: 2186 if (dev->i2c_bus[0].i2c_rc == 0) 2187 hauppauge_eeprom(dev, eeprom+0x80); 2188 break; 2189 case CX23885_BOARD_HAUPPAUGE_HVR1800: 2190 case CX23885_BOARD_HAUPPAUGE_HVR1800lp: 2191 case CX23885_BOARD_HAUPPAUGE_HVR1200: 2192 case CX23885_BOARD_HAUPPAUGE_HVR1700: 2193 case CX23885_BOARD_HAUPPAUGE_HVR1270: 2194 case CX23885_BOARD_HAUPPAUGE_HVR1275: 2195 case CX23885_BOARD_HAUPPAUGE_HVR1255: 2196 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 2197 case CX23885_BOARD_HAUPPAUGE_HVR1210: 2198 case CX23885_BOARD_HAUPPAUGE_HVR1850: 2199 case CX23885_BOARD_HAUPPAUGE_HVR1290: 2200 case CX23885_BOARD_HAUPPAUGE_HVR4400: 2201 case CX23885_BOARD_HAUPPAUGE_STARBURST: 2202 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE: 2203 case CX23885_BOARD_HAUPPAUGE_HVR5525: 2204 case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: 2205 case CX23885_BOARD_HAUPPAUGE_STARBURST2: 2206 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: 2207 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885: 2208 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: 2209 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885: 2210 if (dev->i2c_bus[0].i2c_rc == 0) 2211 hauppauge_eeprom(dev, eeprom+0xc0); 2212 break; 2213 case CX23885_BOARD_VIEWCAST_260E: 2214 case CX23885_BOARD_VIEWCAST_460E: 2215 dev->i2c_bus[1].i2c_client.addr = 0xa0 >> 1; 2216 tveeprom_read(&dev->i2c_bus[1].i2c_client, 2217 eeprom, sizeof(eeprom)); 2218 if (dev->i2c_bus[0].i2c_rc == 0) 2219 viewcast_eeprom(dev, eeprom); 2220 break; 2221 } 2222 2223 switch (dev->board) { 2224 case CX23885_BOARD_AVERMEDIA_HC81R: 2225 /* Defaults for VID B */ 2226 ts1->gen_ctrl_val = 0x4; /* Parallel */ 2227 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2228 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2229 /* Defaults for VID C */ 2230 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */ 2231 ts2->gen_ctrl_val = 0x10e; 2232 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2233 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2234 break; 2235 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: 2236 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: 2237 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: 2238 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2239 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2240 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2241 fallthrough; 2242 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP: 2243 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2244 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2245 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2246 break; 2247 case CX23885_BOARD_HAUPPAUGE_HVR1850: 2248 case CX23885_BOARD_HAUPPAUGE_HVR1800: 2249 /* Defaults for VID B - Analog encoder */ 2250 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */ 2251 ts1->gen_ctrl_val = 0x10e; 2252 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2253 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2254 2255 /* APB_TSVALERR_POL (active low)*/ 2256 ts1->vld_misc_val = 0x2000; 2257 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc); 2258 cx_write(0x130184, 0xc); 2259 2260 /* Defaults for VID C */ 2261 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2262 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2263 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2264 break; 2265 case CX23885_BOARD_TBS_6920: 2266 ts1->gen_ctrl_val = 0x4; /* Parallel */ 2267 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2268 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2269 break; 2270 case CX23885_BOARD_TEVII_S470: 2271 case CX23885_BOARD_TEVII_S471: 2272 case CX23885_BOARD_DVBWORLD_2005: 2273 case CX23885_BOARD_PROF_8000: 2274 case CX23885_BOARD_DVBSKY_T980C: 2275 case CX23885_BOARD_DVBSKY_S950C: 2276 case CX23885_BOARD_TT_CT2_4500_CI: 2277 case CX23885_BOARD_DVBSKY_S950: 2278 ts1->gen_ctrl_val = 0x5; /* Parallel */ 2279 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2280 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2281 break; 2282 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: 2283 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: 2284 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 2285 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2286 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2287 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2288 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2289 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2290 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2291 break; 2292 case CX23885_BOARD_TBS_6980: 2293 case CX23885_BOARD_TBS_6981: 2294 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2295 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2296 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2297 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2298 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2299 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2300 tbs_card_init(dev); 2301 break; 2302 case CX23885_BOARD_MYGICA_X8506: 2303 case CX23885_BOARD_MAGICPRO_PROHDTVE2: 2304 case CX23885_BOARD_MYGICA_X8507: 2305 ts1->gen_ctrl_val = 0x5; /* Parallel */ 2306 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2307 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2308 break; 2309 case CX23885_BOARD_MYGICA_X8558PRO: 2310 ts1->gen_ctrl_val = 0x5; /* Parallel */ 2311 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2312 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2313 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2314 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2315 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2316 break; 2317 case CX23885_BOARD_HAUPPAUGE_HVR4400: 2318 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2319 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2320 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2321 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2322 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2323 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2324 break; 2325 case CX23885_BOARD_HAUPPAUGE_STARBURST: 2326 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2327 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2328 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2329 break; 2330 case CX23885_BOARD_DVBSKY_T9580: 2331 case CX23885_BOARD_DVBSKY_T982: 2332 ts1->gen_ctrl_val = 0x5; /* Parallel */ 2333 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2334 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2335 ts2->gen_ctrl_val = 0x8; /* Serial bus */ 2336 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2337 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2338 break; 2339 case CX23885_BOARD_DVBSKY_S952: 2340 ts1->gen_ctrl_val = 0x5; /* Parallel */ 2341 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2342 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2343 ts2->gen_ctrl_val = 0xe; /* Serial bus */ 2344 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2345 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2346 break; 2347 case CX23885_BOARD_HAUPPAUGE_HVR5525: 2348 case CX23885_BOARD_HAUPPAUGE_STARBURST2: 2349 ts1->gen_ctrl_val = 0x5; /* Parallel */ 2350 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2351 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2352 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2353 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2354 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2355 break; 2356 case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: 2357 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: 2358 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885: 2359 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: 2360 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885: 2361 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2362 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2363 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2364 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2365 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2366 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2367 break; 2368 case CX23885_BOARD_HAUPPAUGE_HVR1250: 2369 case CX23885_BOARD_HAUPPAUGE_HVR1500: 2370 case CX23885_BOARD_HAUPPAUGE_HVR1500Q: 2371 case CX23885_BOARD_HAUPPAUGE_HVR1800lp: 2372 case CX23885_BOARD_HAUPPAUGE_HVR1200: 2373 case CX23885_BOARD_HAUPPAUGE_HVR1700: 2374 case CX23885_BOARD_HAUPPAUGE_HVR1400: 2375 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE: 2376 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: 2377 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200: 2378 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: 2379 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: 2380 case CX23885_BOARD_HAUPPAUGE_HVR1270: 2381 case CX23885_BOARD_HAUPPAUGE_HVR1275: 2382 case CX23885_BOARD_HAUPPAUGE_HVR1255: 2383 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 2384 case CX23885_BOARD_HAUPPAUGE_HVR1210: 2385 case CX23885_BOARD_COMPRO_VIDEOMATE_E800: 2386 case CX23885_BOARD_HAUPPAUGE_HVR1290: 2387 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: 2388 default: 2389 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ 2390 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ 2391 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; 2392 } 2393 2394 /* Certain boards support analog, or require the avcore to be 2395 * loaded, ensure this happens. 2396 */ 2397 switch (dev->board) { 2398 case CX23885_BOARD_TEVII_S470: 2399 /* Currently only enabled for the integrated IR controller */ 2400 if (!enable_885_ir) 2401 break; 2402 fallthrough; 2403 case CX23885_BOARD_HAUPPAUGE_HVR1250: 2404 case CX23885_BOARD_HAUPPAUGE_HVR1800: 2405 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE: 2406 case CX23885_BOARD_HAUPPAUGE_HVR1800lp: 2407 case CX23885_BOARD_HAUPPAUGE_HVR1700: 2408 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: 2409 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200: 2410 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: 2411 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: 2412 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: 2413 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: 2414 case CX23885_BOARD_COMPRO_VIDEOMATE_E800: 2415 case CX23885_BOARD_HAUPPAUGE_HVR1255: 2416 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: 2417 case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: 2418 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB: 2419 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC: 2420 case CX23885_BOARD_HAUPPAUGE_HVR1270: 2421 case CX23885_BOARD_HAUPPAUGE_HVR1850: 2422 case CX23885_BOARD_HAUPPAUGE_HVR5525: 2423 case CX23885_BOARD_MYGICA_X8506: 2424 case CX23885_BOARD_MAGICPRO_PROHDTVE2: 2425 case CX23885_BOARD_HAUPPAUGE_HVR1290: 2426 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: 2427 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID: 2428 case CX23885_BOARD_HAUPPAUGE_HVR1500: 2429 case CX23885_BOARD_MPX885: 2430 case CX23885_BOARD_MYGICA_X8507: 2431 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: 2432 case CX23885_BOARD_AVERMEDIA_HC81R: 2433 case CX23885_BOARD_TBS_6980: 2434 case CX23885_BOARD_TBS_6981: 2435 case CX23885_BOARD_DVBSKY_T9580: 2436 case CX23885_BOARD_DVBSKY_T980C: 2437 case CX23885_BOARD_DVBSKY_S950C: 2438 case CX23885_BOARD_TT_CT2_4500_CI: 2439 case CX23885_BOARD_DVBSKY_S950: 2440 case CX23885_BOARD_DVBSKY_S952: 2441 case CX23885_BOARD_DVBSKY_T982: 2442 case CX23885_BOARD_VIEWCAST_260E: 2443 case CX23885_BOARD_VIEWCAST_460E: 2444 case CX23885_BOARD_AVERMEDIA_CE310B: 2445 case CX23885_BOARD_AVERMEDIA_H789C: 2446 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev, 2447 &dev->i2c_bus[2].i2c_adap, 2448 "cx25840", 0x88 >> 1, NULL); 2449 if (dev->sd_cx25840) { 2450 /* set host data for clk_freq configuration */ 2451 v4l2_set_subdev_hostdata(dev->sd_cx25840, 2452 &dev->clk_freq); 2453 2454 dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE; 2455 v4l2_subdev_call(dev->sd_cx25840, core, load_fw); 2456 } 2457 break; 2458 } 2459 2460 switch (dev->board) { 2461 case CX23885_BOARD_VIEWCAST_260E: 2462 v4l2_i2c_new_subdev(&dev->v4l2_dev, 2463 &dev->i2c_bus[0].i2c_adap, 2464 "cs3308", 0x82 >> 1, NULL); 2465 break; 2466 case CX23885_BOARD_VIEWCAST_460E: 2467 /* This cs3308 controls the audio from the breakout cable */ 2468 v4l2_i2c_new_subdev(&dev->v4l2_dev, 2469 &dev->i2c_bus[0].i2c_adap, 2470 "cs3308", 0x80 >> 1, NULL); 2471 /* This cs3308 controls the audio from the onboard header */ 2472 v4l2_i2c_new_subdev(&dev->v4l2_dev, 2473 &dev->i2c_bus[0].i2c_adap, 2474 "cs3308", 0x82 >> 1, NULL); 2475 break; 2476 } 2477 2478 /* AUX-PLL 27MHz CLK */ 2479 switch (dev->board) { 2480 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: 2481 netup_initialize(dev); 2482 break; 2483 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: { 2484 int ret; 2485 const struct firmware *fw; 2486 const char *filename = "dvb-netup-altera-01.fw"; 2487 char *action = "configure"; 2488 static struct netup_card_info cinfo; 2489 struct altera_config netup_config = { 2490 .dev = dev, 2491 .action = action, 2492 .jtag_io = netup_jtag_io, 2493 }; 2494 2495 netup_initialize(dev); 2496 2497 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo); 2498 if (netup_card_rev) 2499 cinfo.rev = netup_card_rev; 2500 2501 switch (cinfo.rev) { 2502 case 0x4: 2503 filename = "dvb-netup-altera-04.fw"; 2504 break; 2505 default: 2506 filename = "dvb-netup-altera-01.fw"; 2507 break; 2508 } 2509 pr_info("NetUP card rev=0x%x fw_filename=%s\n", 2510 cinfo.rev, filename); 2511 2512 ret = request_firmware(&fw, filename, &dev->pci->dev); 2513 if (ret != 0) 2514 pr_err("did not find the firmware file '%s'. You can use <kernel_dir>/scripts/get_dvb_firmware to get the firmware.", 2515 filename); 2516 else 2517 altera_init(&netup_config, fw); 2518 2519 release_firmware(fw); 2520 break; 2521 } 2522 } 2523}
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