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cx18-driver.h
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linux-6.19.14/drivers/media/pci/cx18/cx18-driver.h
1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * cx18 driver internal defines and structures 4 * 5 * Derived from ivtv-driver.h 6 * 7 * Copyright (C) 2007 Hans Verkuil <hverkuil@kernel.org> 8 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net> 9 */ 10 11#ifndef CX18_DRIVER_H 12#define CX18_DRIVER_H 13 14#include <linux/module.h> 15#include <linux/moduleparam.h> 16#include <linux/init.h> 17#include <linux/delay.h> 18#include <linux/sched/signal.h> 19#include <linux/fs.h> 20#include <linux/pci.h> 21#include <linux/interrupt.h> 22#include <linux/spinlock.h> 23#include <linux/i2c.h> 24#include <linux/i2c-algo-bit.h> 25#include <linux/list.h> 26#include <linux/unistd.h> 27#include <linux/pagemap.h> 28#include <linux/workqueue.h> 29#include <linux/mutex.h> 30#include <linux/slab.h> 31#include <asm/byteorder.h> 32 33#include <media/v4l2-common.h> 34#include <media/v4l2-ioctl.h> 35#include <media/v4l2-device.h> 36#include <media/v4l2-fh.h> 37#include <media/tuner.h> 38#include <media/i2c/ir-kbd-i2c.h> 39#include "cx18-mailbox.h" 40#include "cx18-av-core.h" 41#include "cx23418.h" 42 43/* DVB */ 44#include <media/demux.h> 45#include <media/dmxdev.h> 46#include <media/dvb_demux.h> 47#include <media/dvb_frontend.h> 48#include <media/dvb_net.h> 49#include <media/dvbdev.h> 50 51/* vb2 YUV support */ 52#include <media/videobuf2-vmalloc.h> 53 54#ifndef CONFIG_PCI 55# error "This driver requires kernel PCI support." 56#endif 57 58#define CX18_MEM_OFFSET 0x00000000 59#define CX18_MEM_SIZE 0x04000000 60#define CX18_REG_OFFSET 0x02000000 61 62/* Maximum cx18 driver instances. */ 63#define CX18_MAX_CARDS 32 64 65/* Supported cards */ 66#define CX18_CARD_HVR_1600_ESMT 0 /* Hauppauge HVR 1600 (ESMT memory) */ 67#define CX18_CARD_HVR_1600_SAMSUNG 1 /* Hauppauge HVR 1600 (Samsung memory) */ 68#define CX18_CARD_COMPRO_H900 2 /* Compro VideoMate H900 */ 69#define CX18_CARD_YUAN_MPC718 3 /* Yuan MPC718 */ 70#define CX18_CARD_CNXT_RAPTOR_PAL 4 /* Conexant Raptor PAL */ 71#define CX18_CARD_TOSHIBA_QOSMIO_DVBT 5 /* Toshiba Qosmio Interal DVB-T/Analog*/ 72#define CX18_CARD_LEADTEK_PVR2100 6 /* Leadtek WinFast PVR2100 */ 73#define CX18_CARD_LEADTEK_DVR3100H 7 /* Leadtek WinFast DVR3100 H */ 74#define CX18_CARD_GOTVIEW_PCI_DVD3 8 /* GoTView PCI DVD3 Hybrid */ 75#define CX18_CARD_HVR_1600_S5H1411 9 /* Hauppauge HVR 1600 s5h1411/tda18271*/ 76#define CX18_CARD_LAST 9 77 78#define CX18_ENC_STREAM_TYPE_MPG 0 79#define CX18_ENC_STREAM_TYPE_TS 1 80#define CX18_ENC_STREAM_TYPE_YUV 2 81#define CX18_ENC_STREAM_TYPE_VBI 3 82#define CX18_ENC_STREAM_TYPE_PCM 4 83#define CX18_ENC_STREAM_TYPE_IDX 5 84#define CX18_ENC_STREAM_TYPE_RAD 6 85#define CX18_MAX_STREAMS 7 86 87/* system vendor and device IDs */ 88#define PCI_VENDOR_ID_CX 0x14f1 89#define PCI_DEVICE_ID_CX23418 0x5b7a 90 91/* subsystem vendor ID */ 92#define CX18_PCI_ID_HAUPPAUGE 0x0070 93#define CX18_PCI_ID_COMPRO 0x185b 94#define CX18_PCI_ID_YUAN 0x12ab 95#define CX18_PCI_ID_CONEXANT 0x14f1 96#define CX18_PCI_ID_TOSHIBA 0x1179 97#define CX18_PCI_ID_LEADTEK 0x107D 98#define CX18_PCI_ID_GOTVIEW 0x5854 99 100/* ======================================================================== */ 101/* ========================== START USER SETTABLE DMA VARIABLES =========== */ 102/* ======================================================================== */ 103 104/* DMA Buffers, Default size in MB allocated */ 105#define CX18_DEFAULT_ENC_TS_BUFFERS 1 106#define CX18_DEFAULT_ENC_MPG_BUFFERS 2 107#define CX18_DEFAULT_ENC_IDX_BUFFERS 1 108#define CX18_DEFAULT_ENC_YUV_BUFFERS 2 109#define CX18_DEFAULT_ENC_VBI_BUFFERS 1 110#define CX18_DEFAULT_ENC_PCM_BUFFERS 1 111 112/* Maximum firmware DMA buffers per stream */ 113#define CX18_MAX_FW_MDLS_PER_STREAM 63 114 115/* YUV buffer sizes in bytes to ensure integer # of frames per buffer */ 116#define CX18_UNIT_ENC_YUV_BUFSIZE (720 * 32 * 3 / 2) /* bytes */ 117#define CX18_625_LINE_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 576/32) 118#define CX18_525_LINE_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 480/32) 119 120/* IDX buffer size should be a multiple of the index entry size from the chip */ 121struct cx18_enc_idx_entry { 122 __le32 length; 123 __le32 offset_low; 124 __le32 offset_high; 125 __le32 flags; 126 __le32 pts_low; 127 __le32 pts_high; 128} __attribute__ ((packed)); 129#define CX18_UNIT_ENC_IDX_BUFSIZE \ 130 (sizeof(struct cx18_enc_idx_entry) * V4L2_ENC_IDX_ENTRIES) 131 132/* DMA buffer, default size in kB allocated */ 133#define CX18_DEFAULT_ENC_TS_BUFSIZE 32 134#define CX18_DEFAULT_ENC_MPG_BUFSIZE 32 135#define CX18_DEFAULT_ENC_IDX_BUFSIZE (CX18_UNIT_ENC_IDX_BUFSIZE * 1 / 1024 + 1) 136#define CX18_DEFAULT_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 3 / 1024 + 1) 137#define CX18_DEFAULT_ENC_PCM_BUFSIZE 4 138 139/* i2c stuff */ 140#define I2C_CLIENTS_MAX 16 141 142/* debugging */ 143 144/* Flag to turn on high volume debugging */ 145#define CX18_DBGFLG_WARN (1 << 0) 146#define CX18_DBGFLG_INFO (1 << 1) 147#define CX18_DBGFLG_API (1 << 2) 148#define CX18_DBGFLG_DMA (1 << 3) 149#define CX18_DBGFLG_IOCTL (1 << 4) 150#define CX18_DBGFLG_FILE (1 << 5) 151#define CX18_DBGFLG_I2C (1 << 6) 152#define CX18_DBGFLG_IRQ (1 << 7) 153/* Flag to turn on high volume debugging */ 154#define CX18_DBGFLG_HIGHVOL (1 << 8) 155 156/* NOTE: extra space before comma in 'fmt , ## args' is required for 157 gcc-2.95, otherwise it won't compile. */ 158#define CX18_DEBUG(x, type, fmt, args...) \ 159 do { \ 160 if ((x) & cx18_debug) \ 161 v4l2_info(&cx->v4l2_dev, " " type ": " fmt , ## args); \ 162 } while (0) 163#define CX18_DEBUG_WARN(fmt, args...) CX18_DEBUG(CX18_DBGFLG_WARN, "warning", fmt , ## args) 164#define CX18_DEBUG_INFO(fmt, args...) CX18_DEBUG(CX18_DBGFLG_INFO, "info", fmt , ## args) 165#define CX18_DEBUG_API(fmt, args...) CX18_DEBUG(CX18_DBGFLG_API, "api", fmt , ## args) 166#define CX18_DEBUG_DMA(fmt, args...) CX18_DEBUG(CX18_DBGFLG_DMA, "dma", fmt , ## args) 167#define CX18_DEBUG_IOCTL(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args) 168#define CX18_DEBUG_FILE(fmt, args...) CX18_DEBUG(CX18_DBGFLG_FILE, "file", fmt , ## args) 169#define CX18_DEBUG_I2C(fmt, args...) CX18_DEBUG(CX18_DBGFLG_I2C, "i2c", fmt , ## args) 170#define CX18_DEBUG_IRQ(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IRQ, "irq", fmt , ## args) 171 172#define CX18_DEBUG_HIGH_VOL(x, type, fmt, args...) \ 173 do { \ 174 if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \ 175 v4l2_info(&cx->v4l2_dev, " " type ": " fmt , ## args); \ 176 } while (0) 177#define CX18_DEBUG_HI_WARN(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_WARN, "warning", fmt , ## args) 178#define CX18_DEBUG_HI_INFO(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_INFO, "info", fmt , ## args) 179#define CX18_DEBUG_HI_API(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_API, "api", fmt , ## args) 180#define CX18_DEBUG_HI_DMA(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_DMA, "dma", fmt , ## args) 181#define CX18_DEBUG_HI_IOCTL(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args) 182#define CX18_DEBUG_HI_FILE(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_FILE, "file", fmt , ## args) 183#define CX18_DEBUG_HI_I2C(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_I2C, "i2c", fmt , ## args) 184#define CX18_DEBUG_HI_IRQ(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IRQ, "irq", fmt , ## args) 185 186/* Standard kernel messages */ 187#define CX18_ERR(fmt, args...) v4l2_err(&cx->v4l2_dev, fmt , ## args) 188#define CX18_WARN(fmt, args...) v4l2_warn(&cx->v4l2_dev, fmt , ## args) 189#define CX18_INFO(fmt, args...) v4l2_info(&cx->v4l2_dev, fmt , ## args) 190 191/* Messages for internal subdevs to use */ 192#define CX18_DEBUG_DEV(x, dev, type, fmt, args...) \ 193 do { \ 194 if ((x) & cx18_debug) \ 195 v4l2_info(dev, " " type ": " fmt , ## args); \ 196 } while (0) 197#define CX18_DEBUG_WARN_DEV(dev, fmt, args...) \ 198 CX18_DEBUG_DEV(CX18_DBGFLG_WARN, dev, "warning", fmt , ## args) 199#define CX18_DEBUG_INFO_DEV(dev, fmt, args...) \ 200 CX18_DEBUG_DEV(CX18_DBGFLG_INFO, dev, "info", fmt , ## args) 201#define CX18_DEBUG_API_DEV(dev, fmt, args...) \ 202 CX18_DEBUG_DEV(CX18_DBGFLG_API, dev, "api", fmt , ## args) 203#define CX18_DEBUG_DMA_DEV(dev, fmt, args...) \ 204 CX18_DEBUG_DEV(CX18_DBGFLG_DMA, dev, "dma", fmt , ## args) 205#define CX18_DEBUG_IOCTL_DEV(dev, fmt, args...) \ 206 CX18_DEBUG_DEV(CX18_DBGFLG_IOCTL, dev, "ioctl", fmt , ## args) 207#define CX18_DEBUG_FILE_DEV(dev, fmt, args...) \ 208 CX18_DEBUG_DEV(CX18_DBGFLG_FILE, dev, "file", fmt , ## args) 209#define CX18_DEBUG_I2C_DEV(dev, fmt, args...) \ 210 CX18_DEBUG_DEV(CX18_DBGFLG_I2C, dev, "i2c", fmt , ## args) 211#define CX18_DEBUG_IRQ_DEV(dev, fmt, args...) \ 212 CX18_DEBUG_DEV(CX18_DBGFLG_IRQ, dev, "irq", fmt , ## args) 213 214#define CX18_DEBUG_HIGH_VOL_DEV(x, dev, type, fmt, args...) \ 215 do { \ 216 if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \ 217 v4l2_info(dev, " " type ": " fmt , ## args); \ 218 } while (0) 219#define CX18_DEBUG_HI_WARN_DEV(dev, fmt, args...) \ 220 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_WARN, dev, "warning", fmt , ## args) 221#define CX18_DEBUG_HI_INFO_DEV(dev, fmt, args...) \ 222 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_INFO, dev, "info", fmt , ## args) 223#define CX18_DEBUG_HI_API_DEV(dev, fmt, args...) \ 224 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_API, dev, "api", fmt , ## args) 225#define CX18_DEBUG_HI_DMA_DEV(dev, fmt, args...) \ 226 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_DMA, dev, "dma", fmt , ## args) 227#define CX18_DEBUG_HI_IOCTL_DEV(dev, fmt, args...) \ 228 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_IOCTL, dev, "ioctl", fmt , ## args) 229#define CX18_DEBUG_HI_FILE_DEV(dev, fmt, args...) \ 230 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_FILE, dev, "file", fmt , ## args) 231#define CX18_DEBUG_HI_I2C_DEV(dev, fmt, args...) \ 232 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_I2C, dev, "i2c", fmt , ## args) 233#define CX18_DEBUG_HI_IRQ_DEV(dev, fmt, args...) \ 234 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_IRQ, dev, "irq", fmt , ## args) 235 236#define CX18_ERR_DEV(dev, fmt, args...) v4l2_err(dev, fmt , ## args) 237#define CX18_WARN_DEV(dev, fmt, args...) v4l2_warn(dev, fmt , ## args) 238#define CX18_INFO_DEV(dev, fmt, args...) v4l2_info(dev, fmt , ## args) 239 240extern int cx18_debug; 241 242struct cx18_options { 243 int megabytes[CX18_MAX_STREAMS]; /* Size in megabytes of each stream */ 244 int cardtype; /* force card type on load */ 245 int tuner; /* set tuner on load */ 246 int radio; /* enable/disable radio */ 247}; 248 249/* per-mdl bit flags */ 250#define CX18_F_M_NEED_SWAP 0 /* mdl buffer data must be endianness swapped */ 251 252/* per-stream, s_flags */ 253#define CX18_F_S_CLAIMED 3 /* this stream is claimed */ 254#define CX18_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */ 255#define CX18_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */ 256#define CX18_F_S_STREAMOFF 7 /* signal end of stream EOS */ 257#define CX18_F_S_APPL_IO 8 /* this stream is used read/written by an application */ 258#define CX18_F_S_STOPPING 9 /* telling the fw to stop capturing */ 259 260/* per-cx18, i_flags */ 261#define CX18_F_I_LOADED_FW 0 /* Loaded firmware 1st time */ 262#define CX18_F_I_EOS 4 /* End of encoder stream */ 263#define CX18_F_I_RADIO_USER 5 /* radio tuner is selected */ 264#define CX18_F_I_ENC_PAUSED 13 /* the encoder is paused */ 265#define CX18_F_I_INITED 21 /* set after first open */ 266#define CX18_F_I_FAILED 22 /* set if first open failed */ 267 268/* These are the VBI types as they appear in the embedded VBI private packets. */ 269#define CX18_SLICED_TYPE_TELETEXT_B (1) 270#define CX18_SLICED_TYPE_CAPTION_525 (4) 271#define CX18_SLICED_TYPE_WSS_625 (5) 272#define CX18_SLICED_TYPE_VPS (7) 273 274struct cx18_vb2_buffer { 275 /* Common video buffer sub-system struct */ 276 struct vb2_v4l2_buffer vb; 277 struct list_head list; 278 v4l2_std_id tvnorm; /* selected tv norm */ 279 u32 bytes_used; 280}; 281 282struct cx18_buffer { 283 struct list_head list; 284 dma_addr_t dma_handle; 285 char *buf; 286 287 u32 bytesused; 288 u32 readpos; 289}; 290 291struct cx18_mdl { 292 struct list_head list; 293 u32 id; /* index into cx->scb->cpu_mdl[] of 1st cx18_mdl_ent */ 294 295 unsigned int skipped; 296 unsigned long m_flags; 297 298 struct list_head buf_list; 299 struct cx18_buffer *curr_buf; /* current buffer in list for reading */ 300 301 u32 bytesused; 302 u32 readpos; 303}; 304 305struct cx18_queue { 306 struct list_head list; 307 atomic_t depth; 308 u32 bytesused; 309 spinlock_t lock; 310}; 311 312struct cx18_stream; /* forward reference */ 313 314struct cx18_dvb { 315 struct cx18_stream *stream; 316 struct dmx_frontend hw_frontend; 317 struct dmx_frontend mem_frontend; 318 struct dmxdev dmxdev; 319 struct dvb_adapter dvb_adapter; 320 struct dvb_demux demux; 321 struct dvb_frontend *fe; 322 struct dvb_net dvbnet; 323 int enabled; 324 int feeding; 325 struct mutex feedlock; 326}; 327 328struct cx18; /* forward reference */ 329struct cx18_scb; /* forward reference */ 330 331 332#define CX18_MAX_MDL_ACKS 2 333#define CX18_MAX_IN_WORK_ORDERS (CX18_MAX_FW_MDLS_PER_STREAM + 7) 334/* CPU_DE_RELEASE_MDL can burst CX18_MAX_FW_MDLS_PER_STREAM orders in a group */ 335 336#define CX18_F_EWO_MB_STALE_UPON_RECEIPT 0x1 337#define CX18_F_EWO_MB_STALE_WHILE_PROC 0x2 338#define CX18_F_EWO_MB_STALE \ 339 (CX18_F_EWO_MB_STALE_UPON_RECEIPT | CX18_F_EWO_MB_STALE_WHILE_PROC) 340 341struct cx18_in_work_order { 342 struct work_struct work; 343 atomic_t pending; 344 struct cx18 *cx; 345 unsigned long flags; 346 int rpu; 347 struct cx18_mailbox mb; 348 struct cx18_mdl_ack mdl_ack[CX18_MAX_MDL_ACKS]; 349 char *str; 350}; 351 352#define CX18_INVALID_TASK_HANDLE 0xffffffff 353 354struct cx18_stream { 355 /* These first five fields are always set, even if the stream 356 is not actually created. */ 357 struct video_device video_dev; /* v4l2_dev is NULL when stream not created */ 358 struct cx18_dvb *dvb; /* DVB / Digital Transport */ 359 struct cx18 *cx; /* for ease of use */ 360 const char *name; /* name of the stream */ 361 int type; /* stream type */ 362 u32 handle; /* task handle */ 363 u32 v4l2_dev_caps; /* device capabilities */ 364 unsigned int mdl_base_idx; 365 366 u32 id; 367 unsigned long s_flags; /* status flags, see above */ 368 int dma; /* can be PCI_DMA_TODEVICE, 369 PCI_DMA_FROMDEVICE or 370 PCI_DMA_NONE */ 371 wait_queue_head_t waitq; 372 373 /* Buffers */ 374 struct list_head buf_pool; /* buffers not attached to an MDL */ 375 u32 buffers; /* total buffers owned by this stream */ 376 u32 buf_size; /* size in bytes of a single buffer */ 377 378 /* MDL sizes - all stream MDLs are the same size */ 379 u32 bufs_per_mdl; 380 u32 mdl_size; /* total bytes in all buffers in a mdl */ 381 382 /* MDL Queues */ 383 struct cx18_queue q_free; /* free - in rotation, not committed */ 384 struct cx18_queue q_busy; /* busy - in use by firmware */ 385 struct cx18_queue q_full; /* full - data for user apps */ 386 struct cx18_queue q_idle; /* idle - not in rotation */ 387 388 struct work_struct out_work_order; 389 390 /* Videobuf for YUV video */ 391 u32 pixelformat; 392 u32 vb_bytes_per_frame; 393 u32 vb_bytes_per_line; 394 struct list_head vb_capture; /* video capture queue */ 395 spinlock_t vb_lock; 396 struct timer_list vb_timeout; 397 u32 sequence; 398 399 struct vb2_queue vidq; 400 enum v4l2_buf_type vb_type; 401}; 402 403struct cx18_open_id { 404 struct v4l2_fh fh; 405 u32 open_id; 406 int type; 407 struct cx18 *cx; 408}; 409 410static inline struct cx18_open_id *fh2id(struct v4l2_fh *fh) 411{ 412 return container_of(fh, struct cx18_open_id, fh); 413} 414 415static inline struct cx18_open_id *file2id(struct file *file) 416{ 417 return fh2id(file_to_v4l2_fh(file)); 418} 419 420/* forward declaration of struct defined in cx18-cards.h */ 421struct cx18_card; 422 423/* 424 * A note about "sliced" VBI data as implemented in this driver: 425 * 426 * Currently we collect the sliced VBI in the form of Ancillary Data 427 * packets, inserted by the AV core decoder/digitizer/slicer in the 428 * horizontal blanking region of the VBI lines, in "raw" mode as far as 429 * the Encoder is concerned. We don't ever tell the Encoder itself 430 * to provide sliced VBI. (AV Core: sliced mode - Encoder: raw mode) 431 * 432 * We then process the ancillary data ourselves to send the sliced data 433 * to the user application directly or build up MPEG-2 private stream 1 434 * packets to splice into (only!) MPEG-2 PS streams for the user app. 435 * 436 * (That's how ivtv essentially does it.) 437 * 438 * The Encoder should be able to extract certain sliced VBI data for 439 * us and provide it in a separate stream or splice it into any type of 440 * MPEG PS or TS stream, but this isn't implemented yet. 441 */ 442 443/* 444 * Number of "raw" VBI samples per horizontal line we tell the Encoder to 445 * grab from the decoder/digitizer/slicer output for raw or sliced VBI. 446 * It depends on the pixel clock and the horiz rate: 447 * 448 * (1/Fh)*(2*Fp) = Samples/line 449 * = 4 bytes EAV + Anc data in hblank + 4 bytes SAV + active samples 450 * 451 * Sliced VBI data is sent as ancillary data during horizontal blanking 452 * Raw VBI is sent as active video samples during vertcal blanking 453 * 454 * We use a BT.656 pxiel clock of 13.5 MHz and a BT.656 active line 455 * length of 720 pixels @ 4:2:2 sampling. Thus... 456 * 457 * For systems that use a 15.734 kHz horizontal rate, such as 458 * NTSC-M, PAL-M, PAL-60, and other 60 Hz/525 line systems, we have: 459 * 460 * (1/15.734 kHz) * 2 * 13.5 MHz = 1716 samples/line = 461 * 4 bytes SAV + 268 bytes anc data + 4 bytes SAV + 1440 active samples 462 * 463 * For systems that use a 15.625 kHz horizontal rate, such as 464 * PAL-B/G/H, PAL-I, SECAM-L and other 50 Hz/625 line systems, we have: 465 * 466 * (1/15.625 kHz) * 2 * 13.5 MHz = 1728 samples/line = 467 * 4 bytes SAV + 280 bytes anc data + 4 bytes SAV + 1440 active samples 468 */ 469#define VBI_ACTIVE_SAMPLES 1444 /* 4 byte SAV + 720 Y + 720 U/V */ 470#define VBI_HBLANK_SAMPLES_60HZ 272 /* 4 byte EAV + 268 anc/fill */ 471#define VBI_HBLANK_SAMPLES_50HZ 284 /* 4 byte EAV + 280 anc/fill */ 472 473#define CX18_VBI_FRAMES 32 474 475struct vbi_info { 476 /* Current state of v4l2 VBI settings for this device */ 477 struct v4l2_format in; 478 struct v4l2_sliced_vbi_format *sliced_in; /* pointer to in.fmt.sliced */ 479 u32 count; /* Count of VBI data lines: 60 Hz: 12 or 50 Hz: 18 */ 480 u32 start[2]; /* First VBI data line per field: 10 & 273 or 6 & 318 */ 481 482 u32 frame; /* Count of VBI buffers/frames received from Encoder */ 483 484 /* 485 * Vars for creation and insertion of MPEG Private Stream 1 packets 486 * of sliced VBI data into an MPEG PS 487 */ 488 489 /* Boolean: create and insert Private Stream 1 packets into the PS */ 490 int insert_mpeg; 491 492 /* 493 * Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines. 494 * Used in cx18-vbi.c only for collecting sliced data, and as a source 495 * during conversion of sliced VBI data into MPEG Priv Stream 1 packets. 496 * We don't need to save state here, but the array may have been a bit 497 * too big (2304 bytes) to alloc from the stack. 498 */ 499 struct v4l2_sliced_vbi_data sliced_data[36]; 500 501 /* 502 * A ring buffer of driver-generated MPEG-2 PS 503 * Program Pack/Private Stream 1 packets for sliced VBI data insertion 504 * into the MPEG PS stream. 505 * 506 * In each sliced_mpeg_data[] buffer is: 507 * 16 byte MPEG-2 PS Program Pack Header 508 * 16 byte MPEG-2 Private Stream 1 PES Header 509 * 4 byte magic number: "itv0" or "ITV0" 510 * 4 byte first field line mask, if "itv0" 511 * 4 byte second field line mask, if "itv0" 512 * 36 lines, if "ITV0"; or <36 lines, if "itv0"; of sliced VBI data 513 * 514 * Each line in the payload is 515 * 1 byte line header derived from the SDID (WSS, CC, VPS, etc.) 516 * 42 bytes of line data 517 * 518 * That's a maximum 1552 bytes of payload in the Private Stream 1 packet 519 * which is the payload size a PVR-350 (CX23415) MPEG decoder will 520 * accept for VBI data. So, including the headers, it's a maximum 1584 521 * bytes total. 522 */ 523#define CX18_SLICED_MPEG_DATA_MAXSZ 1584 524 /* copy_vbi_buf() needs 8 temp bytes on the end for the worst case */ 525#define CX18_SLICED_MPEG_DATA_BUFSZ (CX18_SLICED_MPEG_DATA_MAXSZ+8) 526 u8 *sliced_mpeg_data[CX18_VBI_FRAMES]; 527 u32 sliced_mpeg_size[CX18_VBI_FRAMES]; 528 529 /* Count of Program Pack/Program Stream 1 packets inserted into PS */ 530 u32 inserted_frame; 531 532 /* 533 * A dummy driver stream transfer mdl & buffer with a copy of the next 534 * sliced_mpeg_data[] buffer for output to userland apps. 535 * Only used in cx18-fileops.c, but its state needs to persist at times. 536 */ 537 struct cx18_mdl sliced_mpeg_mdl; 538 struct cx18_buffer sliced_mpeg_buf; 539}; 540 541/* Per cx23418, per I2C bus private algo callback data */ 542struct cx18_i2c_algo_callback_data { 543 struct cx18 *cx; 544 int bus_index; /* 0 or 1 for the cx23418's 1st or 2nd I2C bus */ 545}; 546 547#define CX18_MAX_MMIO_WR_RETRIES 10 548 549/* Struct to hold info about cx18 cards */ 550struct cx18 { 551 int instance; 552 struct pci_dev *pci_dev; 553 struct v4l2_device v4l2_dev; 554 struct v4l2_subdev *sd_av; /* A/V decoder/digitizer sub-device */ 555 struct v4l2_subdev *sd_extmux; /* External multiplexer sub-dev */ 556 557 const struct cx18_card *card; /* card information */ 558 const char *card_name; /* full name of the card */ 559 const struct cx18_card_tuner_i2c *card_i2c; /* i2c addresses to probe for tuner */ 560 u8 is_50hz; 561 u8 is_60hz; 562 u8 nof_inputs; /* number of video inputs */ 563 u8 nof_audio_inputs; /* number of audio inputs */ 564 u32 v4l2_cap; /* V4L2 capabilities of card */ 565 u32 hw_flags; /* Hardware description of the board */ 566 unsigned int free_mdl_idx; 567 struct cx18_scb __iomem *scb; /* pointer to SCB */ 568 struct mutex epu2apu_mb_lock; /* protect driver to chip mailbox in SCB*/ 569 struct mutex epu2cpu_mb_lock; /* protect driver to chip mailbox in SCB*/ 570 571 struct cx18_av_state av_state; 572 573 /* codec settings */ 574 struct cx2341x_handler cxhdl; 575 u32 filter_mode; 576 u32 temporal_strength; 577 u32 spatial_strength; 578 579 /* dualwatch */ 580 unsigned long dualwatch_jiffies; 581 u32 dualwatch_stereo_mode; 582 583 struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */ 584 struct cx18_options options; /* User options */ 585 int stream_buffers[CX18_MAX_STREAMS]; /* # of buffers for each stream */ 586 int stream_buf_size[CX18_MAX_STREAMS]; /* Stream buffer size */ 587 struct cx18_stream streams[CX18_MAX_STREAMS]; /* Stream data */ 588 struct snd_cx18_card *alsa; /* ALSA interface for PCM capture stream */ 589 void (*pcm_announce_callback)(struct snd_cx18_card *card, u8 *pcm_data, 590 size_t num_bytes); 591 592 unsigned long i_flags; /* global cx18 flags */ 593 atomic_t ana_capturing; /* count number of active analog capture streams */ 594 atomic_t tot_capturing; /* total count number of active capture streams */ 595 int search_pack_header; 596 597 int open_id; /* incremented each time an open occurs, used as 598 unique ID. Starts at 1, so 0 can be used as 599 uninitialized value in the stream->id. */ 600 601 resource_size_t base_addr; 602 603 u8 card_rev; 604 void __iomem *enc_mem, *reg_mem; 605 606 struct vbi_info vbi; 607 608 u64 mpg_data_received; 609 u64 vbi_data_inserted; 610 611 wait_queue_head_t mb_apu_waitq; 612 wait_queue_head_t mb_cpu_waitq; 613 wait_queue_head_t cap_w; 614 /* when the current DMA is finished this queue is woken up */ 615 wait_queue_head_t dma_waitq; 616 617 u32 sw1_irq_mask; 618 u32 sw2_irq_mask; 619 u32 hw2_irq_mask; 620 621 struct workqueue_struct *in_work_queue; 622 char in_workq_name[39]; /* "cx18-NN-in" */ 623 struct cx18_in_work_order in_work_order[CX18_MAX_IN_WORK_ORDERS]; 624 char epu_debug_str[256]; /* CX18_EPU_DEBUG is rare: use shared space */ 625 626 /* i2c */ 627 struct i2c_adapter i2c_adap[2]; 628 struct i2c_algo_bit_data i2c_algo[2]; 629 struct cx18_i2c_algo_callback_data i2c_algo_cb_data[2]; 630 631 struct IR_i2c_init_data ir_i2c_init_data; 632 633 /* gpio */ 634 u32 gpio_dir; 635 u32 gpio_val; 636 struct mutex gpio_lock; 637 struct v4l2_subdev sd_gpiomux; 638 struct v4l2_subdev sd_resetctrl; 639 640 /* v4l2 and User settings */ 641 642 /* codec settings */ 643 u32 audio_input; 644 u32 active_input; 645 v4l2_std_id std; 646 v4l2_std_id tuner_std; /* The norm of the tuner (fixed) */ 647 648 /* Used for cx18-alsa module loading */ 649 struct work_struct request_module_wk; 650}; 651 652static inline struct cx18 *to_cx18(struct v4l2_device *v4l2_dev) 653{ 654 return container_of(v4l2_dev, struct cx18, v4l2_dev); 655} 656 657/* cx18 extensions to be loaded */ 658extern int (*cx18_ext_init)(struct cx18 *); 659 660/* Globals */ 661extern int cx18_first_minor; 662 663/*==============Prototypes==================*/ 664 665/* Return non-zero if a signal is pending */ 666int cx18_msleep_timeout(unsigned int msecs, int intr); 667 668/* Read Hauppauge eeprom */ 669struct tveeprom; /* forward reference */ 670void cx18_read_eeprom(struct cx18 *cx, struct tveeprom *tv); 671 672/* First-open initialization: load firmware, etc. */ 673int cx18_init_on_first_open(struct cx18 *cx); 674 675/* Test if the current VBI mode is raw (1) or sliced (0) */ 676static inline int cx18_raw_vbi(const struct cx18 *cx) 677{ 678 return cx->vbi.in.type == V4L2_BUF_TYPE_VBI_CAPTURE; 679} 680 681/* Call the specified callback for all subdevs with a grp_id bit matching the 682 * mask in hw (if 0, then match them all). Ignore any errors. */ 683#define cx18_call_hw(cx, hw, o, f, args...) \ 684 v4l2_device_mask_call_all(&(cx)->v4l2_dev, hw, o, f, ##args) 685 686#define cx18_call_all(cx, o, f, args...) cx18_call_hw(cx, 0, o, f , ##args) 687 688/* Call the specified callback for all subdevs with a grp_id bit matching the 689 * mask in hw (if 0, then match them all). If the callback returns an error 690 * other than 0 or -ENOIOCTLCMD, then return with that error code. */ 691#define cx18_call_hw_err(cx, hw, o, f, args...) \ 692 v4l2_device_mask_call_until_err(&(cx)->v4l2_dev, hw, o, f, ##args) 693 694#define cx18_call_all_err(cx, o, f, args...) \ 695 cx18_call_hw_err(cx, 0, o, f , ##args) 696 697#endif /* CX18_DRIVER_H */
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