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cx18-av-vbi.c

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linux-6.19.14/drivers/media/pci/cx18/cx18-av-vbi.c C
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 *  cx18 ADEC VBI functions
  4 *
  5 *  Derived from cx25840-vbi.c
  6 *
  7 *  Copyright (C) 2007  Hans Verkuil <hverkuil@kernel.org>
  8 */
  9
 10
 11#include <linux/bitops.h>
 12#include "cx18-driver.h"
 13
 14/*
 15 * For sliced VBI output, we set up to use VIP-1.1, 8-bit mode,
 16 * NN counts 1 byte Dwords, an IDID with the VBI line # in it.
 17 * Thus, according to the VIP-2 Spec, our VBI ancillary data lines
 18 * (should!) look like:
 19 *	4 byte EAV code:          0xff 0x00 0x00 0xRP
 20 *	unknown number of possible idle bytes
 21 *	3 byte Anc data preamble: 0x00 0xff 0xff
 22 *	1 byte data identifier:   ne010iii (parity bits, 010, DID bits)
 23 *	1 byte secondary data id: nessssss (parity bits, SDID bits)
 24 *	1 byte data word count:   necccccc (parity bits, NN Dword count)
 25 *	2 byte Internal DID:	  VBI-line-# 0x80
 26 *	NN data bytes
 27 *	1 byte checksum
 28 *	Fill bytes needed to fil out to 4*NN bytes of payload
 29 *
 30 * The RP codes for EAVs when in VIP-1.1 mode, not in raw mode, &
 31 * in the vertical blanking interval are:
 32 *	0xb0 (Task         0 VerticalBlank HorizontalBlank 0 0 0 0)
 33 *	0xf0 (Task EvenField VerticalBlank HorizontalBlank 0 0 0 0)
 34 *
 35 * Since the V bit is only allowed to toggle in the EAV RP code, just
 36 * before the first active region line and for active lines, they are:
 37 *	0x90 (Task         0 0 HorizontalBlank 0 0 0 0)
 38 *	0xd0 (Task EvenField 0 HorizontalBlank 0 0 0 0)
 39 *
 40 * The user application DID bytes we care about are:
 41 *	0x91 (1 0 010        0 !ActiveLine AncDataPresent)
 42 *	0x55 (0 1 010 2ndField !ActiveLine AncDataPresent)
 43 *
 44 */
 45static const u8 sliced_vbi_did[2] = { 0x91, 0x55 };
 46
 47struct vbi_anc_data {
 48	/* u8 eav[4]; */
 49	/* u8 idle[]; Variable number of idle bytes */
 50	u8 preamble[3];
 51	u8 did;
 52	u8 sdid;
 53	u8 data_count;
 54	u8 idid[2];
 55	u8 payload[]; /* data_count of payload */
 56	/* u8 checksum; */
 57	/* u8 fill[]; Variable number of fill bytes */
 58};
 59
 60static int decode_vps(u8 *dst, u8 *p)
 61{
 62	static const u8 biphase_tbl[] = {
 63		0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
 64		0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
 65		0xd2, 0x5a, 0x52, 0xd2, 0x96, 0x1e, 0x16, 0x96,
 66		0x92, 0x1a, 0x12, 0x92, 0xd2, 0x5a, 0x52, 0xd2,
 67		0xd0, 0x58, 0x50, 0xd0, 0x94, 0x1c, 0x14, 0x94,
 68		0x90, 0x18, 0x10, 0x90, 0xd0, 0x58, 0x50, 0xd0,
 69		0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
 70		0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
 71		0xe1, 0x69, 0x61, 0xe1, 0xa5, 0x2d, 0x25, 0xa5,
 72		0xa1, 0x29, 0x21, 0xa1, 0xe1, 0x69, 0x61, 0xe1,
 73		0xc3, 0x4b, 0x43, 0xc3, 0x87, 0x0f, 0x07, 0x87,
 74		0x83, 0x0b, 0x03, 0x83, 0xc3, 0x4b, 0x43, 0xc3,
 75		0xc1, 0x49, 0x41, 0xc1, 0x85, 0x0d, 0x05, 0x85,
 76		0x81, 0x09, 0x01, 0x81, 0xc1, 0x49, 0x41, 0xc1,
 77		0xe1, 0x69, 0x61, 0xe1, 0xa5, 0x2d, 0x25, 0xa5,
 78		0xa1, 0x29, 0x21, 0xa1, 0xe1, 0x69, 0x61, 0xe1,
 79		0xe0, 0x68, 0x60, 0xe0, 0xa4, 0x2c, 0x24, 0xa4,
 80		0xa0, 0x28, 0x20, 0xa0, 0xe0, 0x68, 0x60, 0xe0,
 81		0xc2, 0x4a, 0x42, 0xc2, 0x86, 0x0e, 0x06, 0x86,
 82		0x82, 0x0a, 0x02, 0x82, 0xc2, 0x4a, 0x42, 0xc2,
 83		0xc0, 0x48, 0x40, 0xc0, 0x84, 0x0c, 0x04, 0x84,
 84		0x80, 0x08, 0x00, 0x80, 0xc0, 0x48, 0x40, 0xc0,
 85		0xe0, 0x68, 0x60, 0xe0, 0xa4, 0x2c, 0x24, 0xa4,
 86		0xa0, 0x28, 0x20, 0xa0, 0xe0, 0x68, 0x60, 0xe0,
 87		0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
 88		0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
 89		0xd2, 0x5a, 0x52, 0xd2, 0x96, 0x1e, 0x16, 0x96,
 90		0x92, 0x1a, 0x12, 0x92, 0xd2, 0x5a, 0x52, 0xd2,
 91		0xd0, 0x58, 0x50, 0xd0, 0x94, 0x1c, 0x14, 0x94,
 92		0x90, 0x18, 0x10, 0x90, 0xd0, 0x58, 0x50, 0xd0,
 93		0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
 94		0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
 95	};
 96
 97	u8 c, err = 0;
 98	int i;
 99
100	for (i = 0; i < 2 * 13; i += 2) {
101		err |= biphase_tbl[p[i]] | biphase_tbl[p[i + 1]];
102		c = (biphase_tbl[p[i + 1]] & 0xf) |
103		    ((biphase_tbl[p[i]] & 0xf) << 4);
104		dst[i / 2] = c;
105	}
106
107	return err & 0xf0;
108}
109
110int cx18_av_g_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi)
111{
112	struct cx18 *cx = v4l2_get_subdevdata(sd);
113	struct cx18_av_state *state = &cx->av_state;
114	static const u16 lcr2vbi[] = {
115		0, V4L2_SLICED_TELETEXT_B, 0,	/* 1 */
116		0, V4L2_SLICED_WSS_625, 0,	/* 4 */
117		V4L2_SLICED_CAPTION_525,	/* 6 */
118		0, 0, V4L2_SLICED_VPS, 0, 0,	/* 9 */
119		0, 0, 0, 0
120	};
121	int is_pal = !(state->std & V4L2_STD_525_60);
122	int i;
123
124	memset(svbi->service_lines, 0, sizeof(svbi->service_lines));
125	svbi->service_set = 0;
126
127	/* we're done if raw VBI is active */
128	if ((cx18_av_read(cx, 0x404) & 0x10) == 0)
129		return 0;
130
131	if (is_pal) {
132		for (i = 7; i <= 23; i++) {
133			u8 v = cx18_av_read(cx, 0x424 + i - 7);
134
135			svbi->service_lines[0][i] = lcr2vbi[v >> 4];
136			svbi->service_lines[1][i] = lcr2vbi[v & 0xf];
137			svbi->service_set |= svbi->service_lines[0][i] |
138				svbi->service_lines[1][i];
139		}
140	} else {
141		for (i = 10; i <= 21; i++) {
142			u8 v = cx18_av_read(cx, 0x424 + i - 10);
143
144			svbi->service_lines[0][i] = lcr2vbi[v >> 4];
145			svbi->service_lines[1][i] = lcr2vbi[v & 0xf];
146			svbi->service_set |= svbi->service_lines[0][i] |
147				svbi->service_lines[1][i];
148		}
149	}
150	return 0;
151}
152
153int cx18_av_s_raw_fmt(struct v4l2_subdev *sd, struct v4l2_vbi_format *fmt)
154{
155	struct cx18 *cx = v4l2_get_subdevdata(sd);
156	struct cx18_av_state *state = &cx->av_state;
157
158	/* Setup standard */
159	cx18_av_std_setup(cx);
160
161	/* VBI Offset */
162	cx18_av_write(cx, 0x47f, state->slicer_line_delay);
163	cx18_av_write(cx, 0x404, 0x2e);
164	return 0;
165}
166
167int cx18_av_s_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi)
168{
169	struct cx18 *cx = v4l2_get_subdevdata(sd);
170	struct cx18_av_state *state = &cx->av_state;
171	int is_pal = !(state->std & V4L2_STD_525_60);
172	int i, x;
173	u8 lcr[24];
174
175	for (x = 0; x <= 23; x++)
176		lcr[x] = 0x00;
177
178	/* Setup standard */
179	cx18_av_std_setup(cx);
180
181	/* Sliced VBI */
182	cx18_av_write(cx, 0x404, 0x32);	/* Ancillary data */
183	cx18_av_write(cx, 0x406, 0x13);
184	cx18_av_write(cx, 0x47f, state->slicer_line_delay);
185
186	/* Force impossible lines to 0 */
187	if (is_pal) {
188		for (i = 0; i <= 6; i++)
189			svbi->service_lines[0][i] =
190				svbi->service_lines[1][i] = 0;
191	} else {
192		for (i = 0; i <= 9; i++)
193			svbi->service_lines[0][i] =
194				svbi->service_lines[1][i] = 0;
195
196		for (i = 22; i <= 23; i++)
197			svbi->service_lines[0][i] =
198				svbi->service_lines[1][i] = 0;
199	}
200
201	/* Build register values for requested service lines */
202	for (i = 7; i <= 23; i++) {
203		for (x = 0; x <= 1; x++) {
204			switch (svbi->service_lines[1-x][i]) {
205			case V4L2_SLICED_TELETEXT_B:
206				lcr[i] |= 1 << (4 * x);
207				break;
208			case V4L2_SLICED_WSS_625:
209				lcr[i] |= 4 << (4 * x);
210				break;
211			case V4L2_SLICED_CAPTION_525:
212				lcr[i] |= 6 << (4 * x);
213				break;
214			case V4L2_SLICED_VPS:
215				lcr[i] |= 9 << (4 * x);
216				break;
217			}
218		}
219	}
220
221	if (is_pal) {
222		for (x = 1, i = 0x424; i <= 0x434; i++, x++)
223			cx18_av_write(cx, i, lcr[6 + x]);
224	} else {
225		for (x = 1, i = 0x424; i <= 0x430; i++, x++)
226			cx18_av_write(cx, i, lcr[9 + x]);
227		for (i = 0x431; i <= 0x434; i++)
228			cx18_av_write(cx, i, 0);
229	}
230
231	cx18_av_write(cx, 0x43c, 0x16);
232	/* Should match vblank set in cx18_av_std_setup() */
233	cx18_av_write(cx, 0x474, is_pal ? 38 : 26);
234	return 0;
235}
236
237int cx18_av_decode_vbi_line(struct v4l2_subdev *sd,
238				   struct v4l2_decode_vbi_line *vbi)
239{
240	struct cx18 *cx = v4l2_get_subdevdata(sd);
241	struct cx18_av_state *state = &cx->av_state;
242	struct vbi_anc_data *anc = (struct vbi_anc_data *)vbi->p;
243	u8 *p;
244	int did, sdid, l, err = 0;
245
246	/*
247	 * Check for the ancillary data header for sliced VBI
248	 */
249	if (anc->preamble[0] ||
250			anc->preamble[1] != 0xff || anc->preamble[2] != 0xff ||
251			(anc->did != sliced_vbi_did[0] &&
252			 anc->did != sliced_vbi_did[1])) {
253		vbi->line = vbi->type = 0;
254		return 0;
255	}
256
257	did = anc->did;
258	sdid = anc->sdid & 0xf;
259	l = anc->idid[0] & 0x3f;
260	l += state->slicer_line_offset;
261	p = anc->payload;
262
263	/* Decode the SDID set by the slicer */
264	switch (sdid) {
265	case 1:
266		sdid = V4L2_SLICED_TELETEXT_B;
267		break;
268	case 4:
269		sdid = V4L2_SLICED_WSS_625;
270		break;
271	case 6:
272		sdid = V4L2_SLICED_CAPTION_525;
273		err = !parity8(p[0]) || !parity8(p[1]);
274		break;
275	case 9:
276		sdid = V4L2_SLICED_VPS;
277		if (decode_vps(p, p) != 0)
278			err = 1;
279		break;
280	default:
281		sdid = 0;
282		err = 1;
283		break;
284	}
285
286	vbi->type = err ? 0 : sdid;
287	vbi->line = err ? 0 : l;
288	vbi->is_second_field = err ? 0 : (did == sliced_vbi_did[1]);
289	vbi->p = p;
290	return 0;
291}
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