m00479_clk_loss_detector_memmap_package.h

 1/* SPDX-License-Identifier: GPL-2.0-only */
 2/*
 3 *  Copyright 2014-2015 Cisco Systems, Inc. and/or its affiliates.
 4 *  All rights reserved.
 5 */
 6
 7#ifndef M00479_CLK_LOSS_DETECTOR_MEMMAP_PACKAGE_H
 8#define M00479_CLK_LOSS_DETECTOR_MEMMAP_PACKAGE_H
 9
10/*******************************************************************
11 * Register Block
12 * M00479_CLK_LOSS_DETECTOR_MEMMAP_PACKAGE_VHD_REGMAP
13 *******************************************************************/
14struct m00479_clk_loss_detector_regmap {
15	/* Control module */
16	uint32_t ctrl;             /* Reg 0x0000, Default=0x0 */
17	uint32_t status;           /* Reg 0x0004 */
18	/* Number of ref clk cycles before checking the clock under test */
19	uint32_t ref_clk_cnt_val;  /* Reg 0x0008, Default=0xc4 */
20	/* Number of test clk cycles required in the ref_clk_cnt_val period
21	 * to ensure that the test clock is performing as expected */
22	uint32_t test_clk_cnt_val; /* Reg 0x000c, Default=0xa */
23};
24
25#define M00479_CLK_LOSS_DETECTOR_REG_CTRL_OFST 0
26#define M00479_CLK_LOSS_DETECTOR_REG_STATUS_OFST 4
27#define M00479_CLK_LOSS_DETECTOR_REG_REF_CLK_CNT_VAL_OFST 8
28#define M00479_CLK_LOSS_DETECTOR_REG_TEST_CLK_CNT_VAL_OFST 12
29
30/*******************************************************************
31 * Bit Mask for register
32 * M00479_CLK_LOSS_DETECTOR_MEMMAP_PACKAGE_VHD_BITMAP
33 *******************************************************************/
34/* ctrl [0:0] */
35#define M00479_CTRL_BITMAP_ENABLE_OFST          (0)
36#define M00479_CTRL_BITMAP_ENABLE_MSK           (0x1 << M00479_CTRL_BITMAP_ENABLE_OFST)
37/* status [0:0] */
38#define M00479_STATUS_BITMAP_CLOCK_MISSING_OFST (0)
39#define M00479_STATUS_BITMAP_CLOCK_MISSING_MSK  (0x1 << M00479_STATUS_BITMAP_CLOCK_MISSING_OFST)
40
41#endif /*M00479_CLK_LOSS_DETECTOR_MEMMAP_PACKAGE_H*/