ov5645.c

   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 * Driver for the OV5645 camera sensor.
   4 *
   5 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
   6 * Copyright (C) 2015 By Tech Design S.L. All Rights Reserved.
   7 * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
   8 *
   9 * Based on:
  10 * - the OV5645 driver from QC msm-3.10 kernel on codeaurora.org:
  11 *   https://us.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/
  12 *       media/platform/msm/camera_v2/sensor/ov5645.c?h=LA.BR.1.2.4_rb1.41
  13 * - the OV5640 driver posted on linux-media:
  14 *   https://www.mail-archive.com/linux-media%40vger.kernel.org/msg92671.html
  15 */
  16
  17#include <linux/bitops.h>
  18#include <linux/clk.h>
  19#include <linux/delay.h>
  20#include <linux/device.h>
  21#include <linux/gpio/consumer.h>
  22#include <linux/i2c.h>
  23#include <linux/init.h>
  24#include <linux/module.h>
  25#include <linux/of.h>
  26#include <linux/of_graph.h>
  27#include <linux/pm_runtime.h>
  28#include <linux/regulator/consumer.h>
  29#include <linux/slab.h>
  30#include <linux/types.h>
  31#include <media/v4l2-ctrls.h>
  32#include <media/v4l2-fwnode.h>
  33#include <media/v4l2-subdev.h>
  34
  35#define OV5645_SYSTEM_CTRL0		0x3008
  36#define		OV5645_SYSTEM_CTRL0_START	0x02
  37#define		OV5645_SYSTEM_CTRL0_STOP	0x42
  38#define OV5645_CHIP_ID_HIGH		0x300a
  39#define		OV5645_CHIP_ID_HIGH_BYTE	0x56
  40#define OV5645_CHIP_ID_LOW		0x300b
  41#define		OV5645_CHIP_ID_LOW_BYTE		0x45
  42#define OV5645_IO_MIPI_CTRL00		0x300e
  43#define OV5645_PAD_OUTPUT00		0x3019
  44#define OV5645_AWB_MANUAL_CONTROL	0x3406
  45#define		OV5645_AWB_MANUAL_ENABLE	BIT(0)
  46#define OV5645_AEC_PK_MANUAL		0x3503
  47#define		OV5645_AEC_MANUAL_ENABLE	BIT(0)
  48#define		OV5645_AGC_MANUAL_ENABLE	BIT(1)
  49#define OV5645_TIMING_TC_REG20		0x3820
  50#define		OV5645_SENSOR_VFLIP		BIT(1)
  51#define		OV5645_ISP_VFLIP		BIT(2)
  52#define OV5645_TIMING_TC_REG21		0x3821
  53#define		OV5645_SENSOR_MIRROR		BIT(1)
  54#define OV5645_MIPI_CTRL00		0x4800
  55#define OV5645_PRE_ISP_TEST_SETTING_1	0x503d
  56#define		OV5645_TEST_PATTERN_MASK	0x3
  57#define		OV5645_SET_TEST_PATTERN(x)	((x) & OV5645_TEST_PATTERN_MASK)
  58#define		OV5645_TEST_PATTERN_ENABLE	BIT(7)
  59#define OV5645_SDE_SAT_U		0x5583
  60#define OV5645_SDE_SAT_V		0x5584
  61
  62/* regulator supplies */
  63static const char * const ov5645_supply_name[] = {
  64	"vdddo", /* Digital I/O (1.8V) supply */
  65	"vdda",  /* Analog (2.8V) supply */
  66	"vddd",  /* Digital Core (1.5V) supply */
  67};
  68
  69#define OV5645_NUM_SUPPLIES ARRAY_SIZE(ov5645_supply_name)
  70
  71struct reg_value {
  72	u16 reg;
  73	u8 val;
  74};
  75
  76struct ov5645_mode_info {
  77	u32 width;
  78	u32 height;
  79	const struct reg_value *data;
  80	u32 data_size;
  81	u32 pixel_clock;
  82	u32 link_freq;
  83};
  84
  85struct ov5645 {
  86	struct i2c_client *i2c_client;
  87	struct device *dev;
  88	struct v4l2_subdev sd;
  89	struct media_pad pad;
  90	struct v4l2_fwnode_endpoint ep;
  91	struct v4l2_rect crop;
  92	struct clk *xclk;
  93
  94	struct regulator_bulk_data supplies[OV5645_NUM_SUPPLIES];
  95
  96	const struct ov5645_mode_info *current_mode;
  97
  98	struct v4l2_ctrl_handler ctrls;
  99	struct v4l2_ctrl *pixel_clock;
 100	struct v4l2_ctrl *link_freq;
 101
 102	/* Cached register values */
 103	u8 aec_pk_manual;
 104	u8 timing_tc_reg20;
 105	u8 timing_tc_reg21;
 106
 107	struct gpio_desc *enable_gpio;
 108	struct gpio_desc *rst_gpio;
 109};
 110
 111static inline struct ov5645 *to_ov5645(struct v4l2_subdev *sd)
 112{
 113	return container_of(sd, struct ov5645, sd);
 114}
 115
 116static const struct reg_value ov5645_global_init_setting[] = {
 117	{ 0x3103, 0x11 },
 118	{ 0x3008, 0x42 },
 119	{ 0x3103, 0x03 },
 120	{ 0x3503, 0x07 },
 121	{ 0x3002, 0x1c },
 122	{ 0x3006, 0xc3 },
 123	{ 0x3017, 0x00 },
 124	{ 0x3018, 0x00 },
 125	{ 0x302e, 0x0b },
 126	{ 0x3037, 0x13 },
 127	{ 0x3108, 0x01 },
 128	{ 0x3611, 0x06 },
 129	{ 0x3500, 0x00 },
 130	{ 0x3501, 0x01 },
 131	{ 0x3502, 0x00 },
 132	{ 0x350a, 0x00 },
 133	{ 0x350b, 0x3f },
 134	{ 0x3620, 0x33 },
 135	{ 0x3621, 0xe0 },
 136	{ 0x3622, 0x01 },
 137	{ 0x3630, 0x2e },
 138	{ 0x3631, 0x00 },
 139	{ 0x3632, 0x32 },
 140	{ 0x3633, 0x52 },
 141	{ 0x3634, 0x70 },
 142	{ 0x3635, 0x13 },
 143	{ 0x3636, 0x03 },
 144	{ 0x3703, 0x5a },
 145	{ 0x3704, 0xa0 },
 146	{ 0x3705, 0x1a },
 147	{ 0x3709, 0x12 },
 148	{ 0x370b, 0x61 },
 149	{ 0x370f, 0x10 },
 150	{ 0x3715, 0x78 },
 151	{ 0x3717, 0x01 },
 152	{ 0x371b, 0x20 },
 153	{ 0x3731, 0x12 },
 154	{ 0x3901, 0x0a },
 155	{ 0x3905, 0x02 },
 156	{ 0x3906, 0x10 },
 157	{ 0x3719, 0x86 },
 158	{ 0x3810, 0x00 },
 159	{ 0x3811, 0x10 },
 160	{ 0x3812, 0x00 },
 161	{ 0x3821, 0x01 },
 162	{ 0x3824, 0x01 },
 163	{ 0x3826, 0x03 },
 164	{ 0x3828, 0x08 },
 165	{ 0x3a19, 0xf8 },
 166	{ 0x3c01, 0x34 },
 167	{ 0x3c04, 0x28 },
 168	{ 0x3c05, 0x98 },
 169	{ 0x3c07, 0x07 },
 170	{ 0x3c09, 0xc2 },
 171	{ 0x3c0a, 0x9c },
 172	{ 0x3c0b, 0x40 },
 173	{ 0x3c01, 0x34 },
 174	{ 0x4001, 0x02 },
 175	{ 0x4514, 0x00 },
 176	{ 0x4520, 0xb0 },
 177	{ 0x460b, 0x37 },
 178	{ 0x460c, 0x20 },
 179	{ 0x4818, 0x01 },
 180	{ 0x481d, 0xf0 },
 181	{ 0x481f, 0x50 },
 182	{ 0x4823, 0x70 },
 183	{ 0x4831, 0x14 },
 184	{ 0x5000, 0xa7 },
 185	{ 0x5001, 0x83 },
 186	{ 0x501d, 0x00 },
 187	{ 0x501f, 0x00 },
 188	{ 0x503d, 0x00 },
 189	{ 0x505c, 0x30 },
 190	{ 0x5181, 0x59 },
 191	{ 0x5183, 0x00 },
 192	{ 0x5191, 0xf0 },
 193	{ 0x5192, 0x03 },
 194	{ 0x5684, 0x10 },
 195	{ 0x5685, 0xa0 },
 196	{ 0x5686, 0x0c },
 197	{ 0x5687, 0x78 },
 198	{ 0x5a00, 0x08 },
 199	{ 0x5a21, 0x00 },
 200	{ 0x5a24, 0x00 },
 201	{ 0x3008, 0x02 },
 202	{ 0x3503, 0x00 },
 203	{ 0x5180, 0xff },
 204	{ 0x5181, 0xf2 },
 205	{ 0x5182, 0x00 },
 206	{ 0x5183, 0x14 },
 207	{ 0x5184, 0x25 },
 208	{ 0x5185, 0x24 },
 209	{ 0x5186, 0x09 },
 210	{ 0x5187, 0x09 },
 211	{ 0x5188, 0x0a },
 212	{ 0x5189, 0x75 },
 213	{ 0x518a, 0x52 },
 214	{ 0x518b, 0xea },
 215	{ 0x518c, 0xa8 },
 216	{ 0x518d, 0x42 },
 217	{ 0x518e, 0x38 },
 218	{ 0x518f, 0x56 },
 219	{ 0x5190, 0x42 },
 220	{ 0x5191, 0xf8 },
 221	{ 0x5192, 0x04 },
 222	{ 0x5193, 0x70 },
 223	{ 0x5194, 0xf0 },
 224	{ 0x5195, 0xf0 },
 225	{ 0x5196, 0x03 },
 226	{ 0x5197, 0x01 },
 227	{ 0x5198, 0x04 },
 228	{ 0x5199, 0x12 },
 229	{ 0x519a, 0x04 },
 230	{ 0x519b, 0x00 },
 231	{ 0x519c, 0x06 },
 232	{ 0x519d, 0x82 },
 233	{ 0x519e, 0x38 },
 234	{ 0x5381, 0x1e },
 235	{ 0x5382, 0x5b },
 236	{ 0x5383, 0x08 },
 237	{ 0x5384, 0x0a },
 238	{ 0x5385, 0x7e },
 239	{ 0x5386, 0x88 },
 240	{ 0x5387, 0x7c },
 241	{ 0x5388, 0x6c },
 242	{ 0x5389, 0x10 },
 243	{ 0x538a, 0x01 },
 244	{ 0x538b, 0x98 },
 245	{ 0x5300, 0x08 },
 246	{ 0x5301, 0x30 },
 247	{ 0x5302, 0x10 },
 248	{ 0x5303, 0x00 },
 249	{ 0x5304, 0x08 },
 250	{ 0x5305, 0x30 },
 251	{ 0x5306, 0x08 },
 252	{ 0x5307, 0x16 },
 253	{ 0x5309, 0x08 },
 254	{ 0x530a, 0x30 },
 255	{ 0x530b, 0x04 },
 256	{ 0x530c, 0x06 },
 257	{ 0x5480, 0x01 },
 258	{ 0x5481, 0x08 },
 259	{ 0x5482, 0x14 },
 260	{ 0x5483, 0x28 },
 261	{ 0x5484, 0x51 },
 262	{ 0x5485, 0x65 },
 263	{ 0x5486, 0x71 },
 264	{ 0x5487, 0x7d },
 265	{ 0x5488, 0x87 },
 266	{ 0x5489, 0x91 },
 267	{ 0x548a, 0x9a },
 268	{ 0x548b, 0xaa },
 269	{ 0x548c, 0xb8 },
 270	{ 0x548d, 0xcd },
 271	{ 0x548e, 0xdd },
 272	{ 0x548f, 0xea },
 273	{ 0x5490, 0x1d },
 274	{ 0x5580, 0x02 },
 275	{ 0x5583, 0x40 },
 276	{ 0x5584, 0x10 },
 277	{ 0x5589, 0x10 },
 278	{ 0x558a, 0x00 },
 279	{ 0x558b, 0xf8 },
 280	{ 0x5800, 0x3f },
 281	{ 0x5801, 0x16 },
 282	{ 0x5802, 0x0e },
 283	{ 0x5803, 0x0d },
 284	{ 0x5804, 0x17 },
 285	{ 0x5805, 0x3f },
 286	{ 0x5806, 0x0b },
 287	{ 0x5807, 0x06 },
 288	{ 0x5808, 0x04 },
 289	{ 0x5809, 0x04 },
 290	{ 0x580a, 0x06 },
 291	{ 0x580b, 0x0b },
 292	{ 0x580c, 0x09 },
 293	{ 0x580d, 0x03 },
 294	{ 0x580e, 0x00 },
 295	{ 0x580f, 0x00 },
 296	{ 0x5810, 0x03 },
 297	{ 0x5811, 0x08 },
 298	{ 0x5812, 0x0a },
 299	{ 0x5813, 0x03 },
 300	{ 0x5814, 0x00 },
 301	{ 0x5815, 0x00 },
 302	{ 0x5816, 0x04 },
 303	{ 0x5817, 0x09 },
 304	{ 0x5818, 0x0f },
 305	{ 0x5819, 0x08 },
 306	{ 0x581a, 0x06 },
 307	{ 0x581b, 0x06 },
 308	{ 0x581c, 0x08 },
 309	{ 0x581d, 0x0c },
 310	{ 0x581e, 0x3f },
 311	{ 0x581f, 0x1e },
 312	{ 0x5820, 0x12 },
 313	{ 0x5821, 0x13 },
 314	{ 0x5822, 0x21 },
 315	{ 0x5823, 0x3f },
 316	{ 0x5824, 0x68 },
 317	{ 0x5825, 0x28 },
 318	{ 0x5826, 0x2c },
 319	{ 0x5827, 0x28 },
 320	{ 0x5828, 0x08 },
 321	{ 0x5829, 0x48 },
 322	{ 0x582a, 0x64 },
 323	{ 0x582b, 0x62 },
 324	{ 0x582c, 0x64 },
 325	{ 0x582d, 0x28 },
 326	{ 0x582e, 0x46 },
 327	{ 0x582f, 0x62 },
 328	{ 0x5830, 0x60 },
 329	{ 0x5831, 0x62 },
 330	{ 0x5832, 0x26 },
 331	{ 0x5833, 0x48 },
 332	{ 0x5834, 0x66 },
 333	{ 0x5835, 0x44 },
 334	{ 0x5836, 0x64 },
 335	{ 0x5837, 0x28 },
 336	{ 0x5838, 0x66 },
 337	{ 0x5839, 0x48 },
 338	{ 0x583a, 0x2c },
 339	{ 0x583b, 0x28 },
 340	{ 0x583c, 0x26 },
 341	{ 0x583d, 0xae },
 342	{ 0x5025, 0x00 },
 343	{ 0x3a0f, 0x30 },
 344	{ 0x3a10, 0x28 },
 345	{ 0x3a1b, 0x30 },
 346	{ 0x3a1e, 0x26 },
 347	{ 0x3a11, 0x60 },
 348	{ 0x3a1f, 0x14 },
 349	{ 0x0601, 0x02 },
 350	{ 0x3008, 0x42 },
 351	{ 0x3008, 0x02 },
 352	{ OV5645_IO_MIPI_CTRL00, 0x40 },
 353	{ OV5645_MIPI_CTRL00, 0x24 },
 354	{ OV5645_PAD_OUTPUT00, 0x70 }
 355};
 356
 357static const struct reg_value ov5645_setting_sxga[] = {
 358	{ 0x3612, 0xa9 },
 359	{ 0x3614, 0x50 },
 360	{ 0x3618, 0x00 },
 361	{ 0x3034, 0x18 },
 362	{ 0x3035, 0x21 },
 363	{ 0x3036, 0x70 },
 364	{ 0x3600, 0x09 },
 365	{ 0x3601, 0x43 },
 366	{ 0x3708, 0x66 },
 367	{ 0x370c, 0xc3 },
 368	{ 0x3800, 0x00 },
 369	{ 0x3801, 0x00 },
 370	{ 0x3802, 0x00 },
 371	{ 0x3803, 0x06 },
 372	{ 0x3804, 0x0a },
 373	{ 0x3805, 0x3f },
 374	{ 0x3806, 0x07 },
 375	{ 0x3807, 0x9d },
 376	{ 0x3808, 0x05 },
 377	{ 0x3809, 0x00 },
 378	{ 0x380a, 0x03 },
 379	{ 0x380b, 0xc0 },
 380	{ 0x380c, 0x07 },
 381	{ 0x380d, 0x68 },
 382	{ 0x380e, 0x03 },
 383	{ 0x380f, 0xd8 },
 384	{ 0x3813, 0x06 },
 385	{ 0x3814, 0x31 },
 386	{ 0x3815, 0x31 },
 387	{ 0x3820, 0x47 },
 388	{ 0x3a02, 0x03 },
 389	{ 0x3a03, 0xd8 },
 390	{ 0x3a08, 0x01 },
 391	{ 0x3a09, 0xf8 },
 392	{ 0x3a0a, 0x01 },
 393	{ 0x3a0b, 0xa4 },
 394	{ 0x3a0e, 0x02 },
 395	{ 0x3a0d, 0x02 },
 396	{ 0x3a14, 0x03 },
 397	{ 0x3a15, 0xd8 },
 398	{ 0x3a18, 0x00 },
 399	{ 0x4004, 0x02 },
 400	{ 0x4005, 0x18 },
 401	{ 0x4300, 0x32 },
 402	{ 0x4202, 0x00 }
 403};
 404
 405static const struct reg_value ov5645_setting_1080p[] = {
 406	{ 0x3612, 0xab },
 407	{ 0x3614, 0x50 },
 408	{ 0x3618, 0x04 },
 409	{ 0x3034, 0x18 },
 410	{ 0x3035, 0x11 },
 411	{ 0x3036, 0x54 },
 412	{ 0x3600, 0x08 },
 413	{ 0x3601, 0x33 },
 414	{ 0x3708, 0x63 },
 415	{ 0x370c, 0xc0 },
 416	{ 0x3800, 0x01 },
 417	{ 0x3801, 0x50 },
 418	{ 0x3802, 0x01 },
 419	{ 0x3803, 0xb2 },
 420	{ 0x3804, 0x08 },
 421	{ 0x3805, 0xef },
 422	{ 0x3806, 0x05 },
 423	{ 0x3807, 0xf1 },
 424	{ 0x3808, 0x07 },
 425	{ 0x3809, 0x80 },
 426	{ 0x380a, 0x04 },
 427	{ 0x380b, 0x38 },
 428	{ 0x380c, 0x09 },
 429	{ 0x380d, 0xc4 },
 430	{ 0x380e, 0x04 },
 431	{ 0x380f, 0x60 },
 432	{ 0x3813, 0x04 },
 433	{ 0x3814, 0x11 },
 434	{ 0x3815, 0x11 },
 435	{ 0x3820, 0x47 },
 436	{ 0x4514, 0x88 },
 437	{ 0x3a02, 0x04 },
 438	{ 0x3a03, 0x60 },
 439	{ 0x3a08, 0x01 },
 440	{ 0x3a09, 0x50 },
 441	{ 0x3a0a, 0x01 },
 442	{ 0x3a0b, 0x18 },
 443	{ 0x3a0e, 0x03 },
 444	{ 0x3a0d, 0x04 },
 445	{ 0x3a14, 0x04 },
 446	{ 0x3a15, 0x60 },
 447	{ 0x3a18, 0x00 },
 448	{ 0x4004, 0x06 },
 449	{ 0x4005, 0x18 },
 450	{ 0x4300, 0x32 },
 451	{ 0x4202, 0x00 },
 452	{ 0x4837, 0x0b }
 453};
 454
 455static const struct reg_value ov5645_setting_full[] = {
 456	{ 0x3612, 0xab },
 457	{ 0x3614, 0x50 },
 458	{ 0x3618, 0x04 },
 459	{ 0x3034, 0x18 },
 460	{ 0x3035, 0x11 },
 461	{ 0x3036, 0x54 },
 462	{ 0x3600, 0x08 },
 463	{ 0x3601, 0x33 },
 464	{ 0x3708, 0x63 },
 465	{ 0x370c, 0xc0 },
 466	{ 0x3800, 0x00 },
 467	{ 0x3801, 0x00 },
 468	{ 0x3802, 0x00 },
 469	{ 0x3803, 0x00 },
 470	{ 0x3804, 0x0a },
 471	{ 0x3805, 0x3f },
 472	{ 0x3806, 0x07 },
 473	{ 0x3807, 0x9f },
 474	{ 0x3808, 0x0a },
 475	{ 0x3809, 0x20 },
 476	{ 0x380a, 0x07 },
 477	{ 0x380b, 0x98 },
 478	{ 0x380c, 0x0b },
 479	{ 0x380d, 0x1c },
 480	{ 0x380e, 0x07 },
 481	{ 0x380f, 0xb0 },
 482	{ 0x3813, 0x06 },
 483	{ 0x3814, 0x11 },
 484	{ 0x3815, 0x11 },
 485	{ 0x3820, 0x47 },
 486	{ 0x4514, 0x88 },
 487	{ 0x3a02, 0x07 },
 488	{ 0x3a03, 0xb0 },
 489	{ 0x3a08, 0x01 },
 490	{ 0x3a09, 0x27 },
 491	{ 0x3a0a, 0x00 },
 492	{ 0x3a0b, 0xf6 },
 493	{ 0x3a0e, 0x06 },
 494	{ 0x3a0d, 0x08 },
 495	{ 0x3a14, 0x07 },
 496	{ 0x3a15, 0xb0 },
 497	{ 0x3a18, 0x01 },
 498	{ 0x4004, 0x06 },
 499	{ 0x4005, 0x18 },
 500	{ 0x4300, 0x32 },
 501	{ 0x4837, 0x0b },
 502	{ 0x4202, 0x00 }
 503};
 504
 505static const s64 link_freq[] = {
 506	224000000,
 507	336000000
 508};
 509
 510static const struct ov5645_mode_info ov5645_mode_info_data[] = {
 511	{
 512		.width = 1280,
 513		.height = 960,
 514		.data = ov5645_setting_sxga,
 515		.data_size = ARRAY_SIZE(ov5645_setting_sxga),
 516		.pixel_clock = 112000000,
 517		.link_freq = 0 /* an index in link_freq[] */
 518	},
 519	{
 520		.width = 1920,
 521		.height = 1080,
 522		.data = ov5645_setting_1080p,
 523		.data_size = ARRAY_SIZE(ov5645_setting_1080p),
 524		.pixel_clock = 168000000,
 525		.link_freq = 1 /* an index in link_freq[] */
 526	},
 527	{
 528		.width = 2592,
 529		.height = 1944,
 530		.data = ov5645_setting_full,
 531		.data_size = ARRAY_SIZE(ov5645_setting_full),
 532		.pixel_clock = 168000000,
 533		.link_freq = 1 /* an index in link_freq[] */
 534	},
 535};
 536
 537static int ov5645_write_reg(struct ov5645 *ov5645, u16 reg, u8 val)
 538{
 539	u8 regbuf[3];
 540	int ret;
 541
 542	regbuf[0] = reg >> 8;
 543	regbuf[1] = reg & 0xff;
 544	regbuf[2] = val;
 545
 546	ret = i2c_master_send(ov5645->i2c_client, regbuf, 3);
 547	if (ret < 0) {
 548		dev_err(ov5645->dev, "%s: write reg error %d: reg=%x, val=%x\n",
 549			__func__, ret, reg, val);
 550		return ret;
 551	}
 552
 553	return 0;
 554}
 555
 556static int ov5645_read_reg(struct ov5645 *ov5645, u16 reg, u8 *val)
 557{
 558	u8 regbuf[2];
 559	int ret;
 560
 561	regbuf[0] = reg >> 8;
 562	regbuf[1] = reg & 0xff;
 563
 564	ret = i2c_master_send(ov5645->i2c_client, regbuf, 2);
 565	if (ret < 0) {
 566		dev_err(ov5645->dev, "%s: write reg error %d: reg=%x\n",
 567			__func__, ret, reg);
 568		return ret;
 569	}
 570
 571	ret = i2c_master_recv(ov5645->i2c_client, val, 1);
 572	if (ret < 0) {
 573		dev_err(ov5645->dev, "%s: read reg error %d: reg=%x\n",
 574			__func__, ret, reg);
 575		return ret;
 576	}
 577
 578	return 0;
 579}
 580
 581static int ov5645_set_aec_mode(struct ov5645 *ov5645, u32 mode)
 582{
 583	u8 val = ov5645->aec_pk_manual;
 584	int ret;
 585
 586	if (mode == V4L2_EXPOSURE_AUTO)
 587		val &= ~OV5645_AEC_MANUAL_ENABLE;
 588	else /* V4L2_EXPOSURE_MANUAL */
 589		val |= OV5645_AEC_MANUAL_ENABLE;
 590
 591	ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
 592	if (!ret)
 593		ov5645->aec_pk_manual = val;
 594
 595	return ret;
 596}
 597
 598static int ov5645_set_agc_mode(struct ov5645 *ov5645, u32 enable)
 599{
 600	u8 val = ov5645->aec_pk_manual;
 601	int ret;
 602
 603	if (enable)
 604		val &= ~OV5645_AGC_MANUAL_ENABLE;
 605	else
 606		val |= OV5645_AGC_MANUAL_ENABLE;
 607
 608	ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
 609	if (!ret)
 610		ov5645->aec_pk_manual = val;
 611
 612	return ret;
 613}
 614
 615static int ov5645_set_register_array(struct ov5645 *ov5645,
 616				     const struct reg_value *settings,
 617				     unsigned int num_settings)
 618{
 619	unsigned int i;
 620	int ret;
 621
 622	for (i = 0; i < num_settings; ++i, ++settings) {
 623		ret = ov5645_write_reg(ov5645, settings->reg, settings->val);
 624		if (ret < 0)
 625			return ret;
 626
 627		if (settings->reg == OV5645_SYSTEM_CTRL0 &&
 628		    settings->val == OV5645_SYSTEM_CTRL0_START)
 629			usleep_range(1000, 2000);
 630	}
 631
 632	return 0;
 633}
 634
 635static void __ov5645_set_power_off(struct device *dev)
 636{
 637	struct v4l2_subdev *sd = dev_get_drvdata(dev);
 638	struct ov5645 *ov5645 = to_ov5645(sd);
 639
 640	ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x58);
 641	gpiod_set_value_cansleep(ov5645->rst_gpio, 1);
 642	gpiod_set_value_cansleep(ov5645->enable_gpio, 0);
 643	regulator_bulk_disable(OV5645_NUM_SUPPLIES, ov5645->supplies);
 644}
 645
 646static int ov5645_set_power_off(struct device *dev)
 647{
 648	struct v4l2_subdev *sd = dev_get_drvdata(dev);
 649	struct ov5645 *ov5645 = to_ov5645(sd);
 650
 651	__ov5645_set_power_off(dev);
 652	clk_disable_unprepare(ov5645->xclk);
 653
 654	return 0;
 655}
 656
 657static int ov5645_set_power_on(struct device *dev)
 658{
 659	struct v4l2_subdev *sd = dev_get_drvdata(dev);
 660	struct ov5645 *ov5645 = to_ov5645(sd);
 661	int ret;
 662
 663	ret = regulator_bulk_enable(OV5645_NUM_SUPPLIES, ov5645->supplies);
 664	if (ret < 0)
 665		return ret;
 666
 667	ret = clk_prepare_enable(ov5645->xclk);
 668	if (ret < 0) {
 669		dev_err(ov5645->dev, "clk prepare enable failed\n");
 670		regulator_bulk_disable(OV5645_NUM_SUPPLIES, ov5645->supplies);
 671		return ret;
 672	}
 673
 674	usleep_range(5000, 15000);
 675	gpiod_set_value_cansleep(ov5645->enable_gpio, 1);
 676
 677	usleep_range(1000, 2000);
 678	gpiod_set_value_cansleep(ov5645->rst_gpio, 0);
 679
 680	msleep(20);
 681
 682	ret = ov5645_set_register_array(ov5645, ov5645_global_init_setting,
 683					ARRAY_SIZE(ov5645_global_init_setting));
 684	if (ret < 0) {
 685		dev_err(ov5645->dev, "could not set init registers\n");
 686		goto exit;
 687	}
 688
 689	usleep_range(500, 1000);
 690
 691	return 0;
 692
 693exit:
 694	__ov5645_set_power_off(dev);
 695	clk_disable_unprepare(ov5645->xclk);
 696	return ret;
 697}
 698
 699static int ov5645_set_saturation(struct ov5645 *ov5645, s32 value)
 700{
 701	u32 reg_value = (value * 0x10) + 0x40;
 702	int ret;
 703
 704	ret = ov5645_write_reg(ov5645, OV5645_SDE_SAT_U, reg_value);
 705	if (ret < 0)
 706		return ret;
 707
 708	return ov5645_write_reg(ov5645, OV5645_SDE_SAT_V, reg_value);
 709}
 710
 711static int ov5645_set_hflip(struct ov5645 *ov5645, s32 value)
 712{
 713	u8 val = ov5645->timing_tc_reg21;
 714	int ret;
 715
 716	if (value == 0)
 717		val &= ~(OV5645_SENSOR_MIRROR);
 718	else
 719		val |= (OV5645_SENSOR_MIRROR);
 720
 721	ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG21, val);
 722	if (!ret)
 723		ov5645->timing_tc_reg21 = val;
 724
 725	return ret;
 726}
 727
 728static int ov5645_set_vflip(struct ov5645 *ov5645, s32 value)
 729{
 730	u8 val = ov5645->timing_tc_reg20;
 731	int ret;
 732
 733	if (value == 0)
 734		val |= (OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
 735	else
 736		val &= ~(OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
 737
 738	ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG20, val);
 739	if (!ret)
 740		ov5645->timing_tc_reg20 = val;
 741
 742	return ret;
 743}
 744
 745static int ov5645_set_test_pattern(struct ov5645 *ov5645, s32 value)
 746{
 747	u8 val = 0;
 748
 749	if (value) {
 750		val = OV5645_SET_TEST_PATTERN(value - 1);
 751		val |= OV5645_TEST_PATTERN_ENABLE;
 752	}
 753
 754	return ov5645_write_reg(ov5645, OV5645_PRE_ISP_TEST_SETTING_1, val);
 755}
 756
 757static const char * const ov5645_test_pattern_menu[] = {
 758	"Disabled",
 759	"Vertical Color Bars",
 760	"Pseudo-Random Data",
 761	"Color Square",
 762	"Black Image",
 763};
 764
 765static int ov5645_set_awb(struct ov5645 *ov5645, s32 enable_auto)
 766{
 767	u8 val = 0;
 768
 769	if (!enable_auto)
 770		val = OV5645_AWB_MANUAL_ENABLE;
 771
 772	return ov5645_write_reg(ov5645, OV5645_AWB_MANUAL_CONTROL, val);
 773}
 774
 775static int ov5645_s_ctrl(struct v4l2_ctrl *ctrl)
 776{
 777	struct ov5645 *ov5645 = container_of(ctrl->handler,
 778					     struct ov5645, ctrls);
 779	int ret;
 780
 781	if (!pm_runtime_get_if_in_use(ov5645->dev))
 782		return 0;
 783
 784	switch (ctrl->id) {
 785	case V4L2_CID_SATURATION:
 786		ret = ov5645_set_saturation(ov5645, ctrl->val);
 787		break;
 788	case V4L2_CID_AUTO_WHITE_BALANCE:
 789		ret = ov5645_set_awb(ov5645, ctrl->val);
 790		break;
 791	case V4L2_CID_AUTOGAIN:
 792		ret = ov5645_set_agc_mode(ov5645, ctrl->val);
 793		break;
 794	case V4L2_CID_EXPOSURE_AUTO:
 795		ret = ov5645_set_aec_mode(ov5645, ctrl->val);
 796		break;
 797	case V4L2_CID_TEST_PATTERN:
 798		ret = ov5645_set_test_pattern(ov5645, ctrl->val);
 799		break;
 800	case V4L2_CID_HFLIP:
 801		ret = ov5645_set_hflip(ov5645, ctrl->val);
 802		break;
 803	case V4L2_CID_VFLIP:
 804		ret = ov5645_set_vflip(ov5645, ctrl->val);
 805		break;
 806	default:
 807		ret = -EINVAL;
 808		break;
 809	}
 810
 811	pm_runtime_put_autosuspend(ov5645->dev);
 812
 813	return ret;
 814}
 815
 816static const struct v4l2_ctrl_ops ov5645_ctrl_ops = {
 817	.s_ctrl = ov5645_s_ctrl,
 818};
 819
 820static int ov5645_enum_mbus_code(struct v4l2_subdev *sd,
 821				 struct v4l2_subdev_state *sd_state,
 822				 struct v4l2_subdev_mbus_code_enum *code)
 823{
 824	if (code->index > 0)
 825		return -EINVAL;
 826
 827	code->code = MEDIA_BUS_FMT_UYVY8_1X16;
 828
 829	return 0;
 830}
 831
 832static int ov5645_enum_frame_size(struct v4l2_subdev *subdev,
 833				  struct v4l2_subdev_state *sd_state,
 834				  struct v4l2_subdev_frame_size_enum *fse)
 835{
 836	if (fse->code != MEDIA_BUS_FMT_UYVY8_1X16)
 837		return -EINVAL;
 838
 839	if (fse->index >= ARRAY_SIZE(ov5645_mode_info_data))
 840		return -EINVAL;
 841
 842	fse->min_width = ov5645_mode_info_data[fse->index].width;
 843	fse->max_width = ov5645_mode_info_data[fse->index].width;
 844	fse->min_height = ov5645_mode_info_data[fse->index].height;
 845	fse->max_height = ov5645_mode_info_data[fse->index].height;
 846
 847	return 0;
 848}
 849
 850static int ov5645_set_format(struct v4l2_subdev *sd,
 851			     struct v4l2_subdev_state *sd_state,
 852			     struct v4l2_subdev_format *format)
 853{
 854	struct ov5645 *ov5645 = to_ov5645(sd);
 855	struct v4l2_mbus_framefmt *__format;
 856	struct v4l2_rect *__crop;
 857	const struct ov5645_mode_info *new_mode;
 858	int ret;
 859
 860	__crop = v4l2_subdev_state_get_crop(sd_state, 0);
 861	new_mode = v4l2_find_nearest_size(ov5645_mode_info_data,
 862					  ARRAY_SIZE(ov5645_mode_info_data),
 863					  width, height, format->format.width,
 864					  format->format.height);
 865
 866	__crop->width = new_mode->width;
 867	__crop->height = new_mode->height;
 868
 869	if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
 870		ret = __v4l2_ctrl_s_ctrl_int64(ov5645->pixel_clock,
 871					       new_mode->pixel_clock);
 872		if (ret < 0)
 873			return ret;
 874
 875		ret = __v4l2_ctrl_s_ctrl(ov5645->link_freq,
 876					 new_mode->link_freq);
 877		if (ret < 0)
 878			return ret;
 879
 880		ov5645->current_mode = new_mode;
 881	}
 882
 883	__format = v4l2_subdev_state_get_format(sd_state, 0);
 884	__format->width = __crop->width;
 885	__format->height = __crop->height;
 886	__format->code = MEDIA_BUS_FMT_UYVY8_1X16;
 887	__format->field = V4L2_FIELD_NONE;
 888	__format->colorspace = V4L2_COLORSPACE_SRGB;
 889
 890	format->format = *__format;
 891
 892	return 0;
 893}
 894
 895static int ov5645_init_state(struct v4l2_subdev *subdev,
 896			     struct v4l2_subdev_state *sd_state)
 897{
 898	struct v4l2_subdev_format fmt = {
 899		.which = V4L2_SUBDEV_FORMAT_TRY,
 900		.pad = 0,
 901		.format = {
 902			.code = MEDIA_BUS_FMT_UYVY8_1X16,
 903			.width = ov5645_mode_info_data[1].width,
 904			.height = ov5645_mode_info_data[1].height,
 905		},
 906	};
 907
 908	ov5645_set_format(subdev, sd_state, &fmt);
 909
 910	return 0;
 911}
 912
 913static int ov5645_get_selection(struct v4l2_subdev *sd,
 914			   struct v4l2_subdev_state *sd_state,
 915			   struct v4l2_subdev_selection *sel)
 916{
 917	if (sel->target != V4L2_SEL_TGT_CROP)
 918		return -EINVAL;
 919
 920	sel->r = *v4l2_subdev_state_get_crop(sd_state, 0);
 921	return 0;
 922}
 923
 924static int ov5645_enable_streams(struct v4l2_subdev *sd,
 925				 struct v4l2_subdev_state *state, u32 pad,
 926				 u64 streams_mask)
 927{
 928	struct ov5645 *ov5645 = to_ov5645(sd);
 929	int ret;
 930
 931	ret = pm_runtime_resume_and_get(ov5645->dev);
 932	if (ret < 0)
 933		return ret;
 934
 935	ret = ov5645_set_register_array(ov5645,
 936					ov5645->current_mode->data,
 937					ov5645->current_mode->data_size);
 938	if (ret < 0) {
 939		dev_err(ov5645->dev, "could not set mode %dx%d\n",
 940			ov5645->current_mode->width,
 941			ov5645->current_mode->height);
 942		goto err_rpm_put;
 943	}
 944	ret = __v4l2_ctrl_handler_setup(&ov5645->ctrls);
 945	if (ret < 0) {
 946		dev_err(ov5645->dev, "could not sync v4l2 controls\n");
 947		goto err_rpm_put;
 948	}
 949
 950	ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x45);
 951	if (ret < 0)
 952		goto err_rpm_put;
 953
 954	ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
 955			       OV5645_SYSTEM_CTRL0_START);
 956	if (ret < 0)
 957		goto err_rpm_put;
 958
 959	return 0;
 960
 961err_rpm_put:
 962	pm_runtime_put_sync(ov5645->dev);
 963	return ret;
 964}
 965
 966static int ov5645_disable_streams(struct v4l2_subdev *sd,
 967				  struct v4l2_subdev_state *state, u32 pad,
 968				  u64 streams_mask)
 969{
 970	struct ov5645 *ov5645 = to_ov5645(sd);
 971	int ret;
 972
 973	ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x40);
 974	if (ret < 0)
 975		goto rpm_put;
 976
 977	ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
 978			       OV5645_SYSTEM_CTRL0_STOP);
 979
 980rpm_put:
 981	pm_runtime_put_autosuspend(ov5645->dev);
 982
 983	return ret;
 984}
 985
 986static const struct v4l2_subdev_video_ops ov5645_video_ops = {
 987	.s_stream = v4l2_subdev_s_stream_helper,
 988};
 989
 990static const struct v4l2_subdev_pad_ops ov5645_subdev_pad_ops = {
 991	.enum_mbus_code = ov5645_enum_mbus_code,
 992	.enum_frame_size = ov5645_enum_frame_size,
 993	.get_fmt = v4l2_subdev_get_fmt,
 994	.set_fmt = ov5645_set_format,
 995	.get_selection = ov5645_get_selection,
 996	.enable_streams = ov5645_enable_streams,
 997	.disable_streams = ov5645_disable_streams,
 998};
 999
1000static const struct v4l2_subdev_ops ov5645_subdev_ops = {
1001	.video = &ov5645_video_ops,
1002	.pad = &ov5645_subdev_pad_ops,
1003};
1004
1005static const struct v4l2_subdev_internal_ops ov5645_internal_ops = {
1006	.init_state = ov5645_init_state,
1007};
1008
1009static int ov5645_probe(struct i2c_client *client)
1010{
1011	struct device *dev = &client->dev;
1012	struct device_node *endpoint;
1013	struct ov5645 *ov5645;
1014	u8 chip_id_high, chip_id_low;
1015	unsigned int i;
1016	u32 xclk_freq;
1017	int ret;
1018
1019	ov5645 = devm_kzalloc(dev, sizeof(struct ov5645), GFP_KERNEL);
1020	if (!ov5645)
1021		return -ENOMEM;
1022
1023	ov5645->i2c_client = client;
1024	ov5645->dev = dev;
1025
1026	endpoint = of_graph_get_endpoint_by_regs(dev->of_node, 0, -1);
1027	if (!endpoint)
1028		return dev_err_probe(dev, -EINVAL,
1029				     "endpoint node not found\n");
1030
1031	ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint),
1032					 &ov5645->ep);
1033
1034	of_node_put(endpoint);
1035
1036	if (ret < 0)
1037		return dev_err_probe(dev, ret,
1038				     "parsing endpoint node failed\n");
1039
1040	if (ov5645->ep.bus_type != V4L2_MBUS_CSI2_DPHY)
1041		return dev_err_probe(dev, -EINVAL,
1042				     "invalid bus type, must be CSI2\n");
1043
1044	/* get system clock (xclk) */
1045	ov5645->xclk = devm_v4l2_sensor_clk_get_legacy(dev, NULL, false, 0);
1046	if (IS_ERR(ov5645->xclk))
1047		return dev_err_probe(dev, PTR_ERR(ov5645->xclk),
1048				     "could not get xclk");
1049
1050	/* external clock must be 24MHz, allow 1% tolerance */
1051	xclk_freq = clk_get_rate(ov5645->xclk);
1052	if (xclk_freq < 23760000 || xclk_freq > 24240000)
1053		return dev_err_probe(dev, -EINVAL,
1054				     "unsupported xclk frequency %u\n",
1055				     xclk_freq);
1056
1057	for (i = 0; i < OV5645_NUM_SUPPLIES; i++)
1058		ov5645->supplies[i].supply = ov5645_supply_name[i];
1059
1060	ret = devm_regulator_bulk_get(dev, OV5645_NUM_SUPPLIES,
1061				      ov5645->supplies);
1062	if (ret < 0)
1063		return ret;
1064
1065	ov5645->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_HIGH);
1066	if (IS_ERR(ov5645->enable_gpio))
1067		return dev_err_probe(dev, PTR_ERR(ov5645->enable_gpio),
1068				     "cannot get enable gpio\n");
1069
1070	ov5645->rst_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
1071	if (IS_ERR(ov5645->rst_gpio))
1072		return dev_err_probe(dev, PTR_ERR(ov5645->rst_gpio),
1073				     "cannot get reset gpio\n");
1074
1075	v4l2_ctrl_handler_init(&ov5645->ctrls, 9);
1076	v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1077			  V4L2_CID_SATURATION, -4, 4, 1, 0);
1078	v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1079			  V4L2_CID_HFLIP, 0, 1, 1, 0);
1080	v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1081			  V4L2_CID_VFLIP, 0, 1, 1, 0);
1082	v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1083			  V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
1084	v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1085			  V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
1086	v4l2_ctrl_new_std_menu(&ov5645->ctrls, &ov5645_ctrl_ops,
1087			       V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL,
1088			       0, V4L2_EXPOSURE_AUTO);
1089	v4l2_ctrl_new_std_menu_items(&ov5645->ctrls, &ov5645_ctrl_ops,
1090				     V4L2_CID_TEST_PATTERN,
1091				     ARRAY_SIZE(ov5645_test_pattern_menu) - 1,
1092				     0, 0, ov5645_test_pattern_menu);
1093	ov5645->pixel_clock = v4l2_ctrl_new_std(&ov5645->ctrls,
1094						&ov5645_ctrl_ops,
1095						V4L2_CID_PIXEL_RATE,
1096						1, INT_MAX, 1, 1);
1097	ov5645->link_freq = v4l2_ctrl_new_int_menu(&ov5645->ctrls,
1098						   &ov5645_ctrl_ops,
1099						   V4L2_CID_LINK_FREQ,
1100						   ARRAY_SIZE(link_freq) - 1,
1101						   0, link_freq);
1102	if (ov5645->link_freq)
1103		ov5645->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1104
1105	ov5645->sd.ctrl_handler = &ov5645->ctrls;
1106
1107	if (ov5645->ctrls.error) {
1108		ret = ov5645->ctrls.error;
1109		dev_err_probe(dev, ret, "failed to add controls\n");
1110		goto free_ctrl;
1111	}
1112
1113	v4l2_i2c_subdev_init(&ov5645->sd, client, &ov5645_subdev_ops);
1114	ov5645->sd.internal_ops = &ov5645_internal_ops;
1115	ov5645->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1116	ov5645->pad.flags = MEDIA_PAD_FL_SOURCE;
1117	ov5645->sd.dev = dev;
1118	ov5645->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1119
1120	ret = media_entity_pads_init(&ov5645->sd.entity, 1, &ov5645->pad);
1121	if (ret < 0) {
1122		dev_err_probe(dev, ret, "could not register media entity\n");
1123		goto free_ctrl;
1124	}
1125
1126	ret = ov5645_set_power_on(dev);
1127	if (ret)
1128		goto free_entity;
1129
1130	ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_HIGH, &chip_id_high);
1131	if (ret < 0 || chip_id_high != OV5645_CHIP_ID_HIGH_BYTE) {
1132		ret = -ENODEV;
1133		dev_err_probe(dev, ret, "could not read ID high\n");
1134		goto power_down;
1135	}
1136	ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_LOW, &chip_id_low);
1137	if (ret < 0 || chip_id_low != OV5645_CHIP_ID_LOW_BYTE) {
1138		ret = -ENODEV;
1139		dev_err_probe(dev, ret, "could not read ID low\n");
1140		goto power_down;
1141	}
1142
1143	dev_info(dev, "OV5645 detected at address 0x%02x\n", client->addr);
1144
1145	ret = ov5645_read_reg(ov5645, OV5645_AEC_PK_MANUAL,
1146			      &ov5645->aec_pk_manual);
1147	if (ret < 0) {
1148		ret = -ENODEV;
1149		dev_err_probe(dev, ret, "could not read AEC/AGC mode\n");
1150		goto power_down;
1151	}
1152
1153	ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG20,
1154			      &ov5645->timing_tc_reg20);
1155	if (ret < 0) {
1156		ret = -ENODEV;
1157		dev_err_probe(dev, ret, "could not read vflip value\n");
1158		goto power_down;
1159	}
1160
1161	ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG21,
1162			      &ov5645->timing_tc_reg21);
1163	if (ret < 0) {
1164		ret = -ENODEV;
1165		dev_err_probe(dev, ret, "could not read hflip value\n");
1166		goto power_down;
1167	}
1168
1169	ov5645->sd.state_lock = ov5645->ctrls.lock;
1170	ret = v4l2_subdev_init_finalize(&ov5645->sd);
1171	if (ret < 0) {
1172		dev_err_probe(dev, ret, "subdev init error\n");
1173		goto power_down;
1174	}
1175
1176	pm_runtime_set_active(dev);
1177	pm_runtime_get_noresume(dev);
1178	pm_runtime_enable(dev);
1179
1180	ret = v4l2_async_register_subdev_sensor(&ov5645->sd);
1181	if (ret < 0) {
1182		dev_err_probe(dev, ret, "could not register v4l2 device\n");
1183		goto err_pm_runtime;
1184	}
1185
1186	pm_runtime_set_autosuspend_delay(dev, 1000);
1187	pm_runtime_use_autosuspend(dev);
1188	pm_runtime_put_autosuspend(dev);
1189
1190	return 0;
1191
1192err_pm_runtime:
1193	pm_runtime_disable(dev);
1194	pm_runtime_put_noidle(dev);
1195	v4l2_subdev_cleanup(&ov5645->sd);
1196power_down:
1197	ov5645_set_power_off(dev);
1198free_entity:
1199	media_entity_cleanup(&ov5645->sd.entity);
1200free_ctrl:
1201	v4l2_ctrl_handler_free(&ov5645->ctrls);
1202
1203	return ret;
1204}
1205
1206static void ov5645_remove(struct i2c_client *client)
1207{
1208	struct v4l2_subdev *sd = i2c_get_clientdata(client);
1209	struct ov5645 *ov5645 = to_ov5645(sd);
1210
1211	v4l2_async_unregister_subdev(&ov5645->sd);
1212	v4l2_subdev_cleanup(sd);
1213	media_entity_cleanup(&ov5645->sd.entity);
1214	v4l2_ctrl_handler_free(&ov5645->ctrls);
1215	pm_runtime_disable(ov5645->dev);
1216	if (!pm_runtime_status_suspended(ov5645->dev))
1217		ov5645_set_power_off(ov5645->dev);
1218	pm_runtime_set_suspended(ov5645->dev);
1219}
1220
1221static const struct i2c_device_id ov5645_id[] = {
1222	{ "ov5645" },
1223	{}
1224};
1225MODULE_DEVICE_TABLE(i2c, ov5645_id);
1226
1227static const struct of_device_id ov5645_of_match[] = {
1228	{ .compatible = "ovti,ov5645" },
1229	{ /* sentinel */ }
1230};
1231MODULE_DEVICE_TABLE(of, ov5645_of_match);
1232
1233static const struct dev_pm_ops ov5645_pm_ops = {
1234	SET_RUNTIME_PM_OPS(ov5645_set_power_off, ov5645_set_power_on, NULL)
1235};
1236
1237static struct i2c_driver ov5645_i2c_driver = {
1238	.driver = {
1239		.of_match_table = ov5645_of_match,
1240		.name  = "ov5645",
1241		.pm = &ov5645_pm_ops,
1242	},
1243	.probe = ov5645_probe,
1244	.remove = ov5645_remove,
1245	.id_table = ov5645_id,
1246};
1247
1248module_i2c_driver(ov5645_i2c_driver);
1249
1250MODULE_DESCRIPTION("Omnivision OV5645 Camera Driver");
1251MODULE_AUTHOR("Todor Tomov <todor.tomov@linaro.org>");
1252MODULE_LICENSE("GPL v2");