ov02a10.c

   1// SPDX-License-Identifier: GPL-2.0
   2// Copyright (c) 2020 MediaTek Inc.
   3
   4#include <linux/clk.h>
   5#include <linux/delay.h>
   6#include <linux/device.h>
   7#include <linux/gpio/consumer.h>
   8#include <linux/i2c.h>
   9#include <linux/module.h>
  10#include <linux/pm_runtime.h>
  11#include <linux/regulator/consumer.h>
  12#include <linux/units.h>
  13#include <media/media-entity.h>
  14#include <media/v4l2-async.h>
  15#include <media/v4l2-ctrls.h>
  16#include <media/v4l2-fwnode.h>
  17#include <media/v4l2-subdev.h>
  18
  19#define OV02A10_ID					0x2509
  20#define OV02A10_ID_MASK					GENMASK(15, 0)
  21
  22#define OV02A10_REG_CHIP_ID				0x02
  23
  24/* Bit[1] vertical upside down */
  25/* Bit[0] horizontal mirror */
  26#define REG_MIRROR_FLIP_CONTROL				0x3f
  27
  28/* Orientation */
  29#define REG_MIRROR_FLIP_ENABLE				0x03
  30
  31/* Bit[2:0] MIPI transmission speed select */
  32#define TX_SPEED_AREA_SEL				0xa1
  33#define OV02A10_MIPI_TX_SPEED_DEFAULT			0x04
  34
  35#define REG_PAGE_SWITCH					0xfd
  36#define REG_GLOBAL_EFFECTIVE				0x01
  37#define REG_ENABLE					BIT(0)
  38
  39#define REG_SC_CTRL_MODE				0xac
  40#define SC_CTRL_MODE_STANDBY				0x00
  41#define SC_CTRL_MODE_STREAMING				0x01
  42
  43/* Exposure control */
  44#define OV02A10_EXP_SHIFT				8
  45#define OV02A10_REG_EXPOSURE_H				0x03
  46#define OV02A10_REG_EXPOSURE_L				0x04
  47#define	OV02A10_EXPOSURE_MIN				4
  48#define OV02A10_EXPOSURE_MAX_MARGIN			4
  49#define	OV02A10_EXPOSURE_STEP				1
  50
  51/* Vblanking control */
  52#define OV02A10_VTS_SHIFT				8
  53#define OV02A10_REG_VTS_H				0x05
  54#define OV02A10_REG_VTS_L				0x06
  55#define OV02A10_VTS_MAX					0x209f
  56#define OV02A10_BASE_LINES				1224
  57
  58/* Analog gain control */
  59#define OV02A10_REG_GAIN				0x24
  60#define OV02A10_GAIN_MIN				0x10
  61#define OV02A10_GAIN_MAX				0xf8
  62#define OV02A10_GAIN_STEP				0x01
  63#define OV02A10_GAIN_DEFAULT				0x40
  64
  65/* Test pattern control */
  66#define OV02A10_REG_TEST_PATTERN			0xb6
  67
  68#define OV02A10_LINK_FREQ_390MHZ			(390 * HZ_PER_MHZ)
  69#define OV02A10_ECLK_FREQ				(24 * HZ_PER_MHZ)
  70
  71/* Number of lanes supported by this driver */
  72#define OV02A10_DATA_LANES				1
  73
  74/* Bits per sample of sensor output */
  75#define OV02A10_BITS_PER_SAMPLE				10
  76
  77static const char * const ov02a10_supply_names[] = {
  78	"dovdd",	/* Digital I/O power */
  79	"avdd",		/* Analog power */
  80	"dvdd",		/* Digital core power */
  81};
  82
  83struct ov02a10_reg {
  84	u8 addr;
  85	u8 val;
  86};
  87
  88struct ov02a10_reg_list {
  89	u32 num_of_regs;
  90	const struct ov02a10_reg *regs;
  91};
  92
  93struct ov02a10_mode {
  94	u32 width;
  95	u32 height;
  96	u32 exp_def;
  97	u32 hts_def;
  98	u32 vts_def;
  99	const struct ov02a10_reg_list reg_list;
 100};
 101
 102struct ov02a10 {
 103	struct device *dev;
 104
 105	/* Indication of MIPI transmission speed select */
 106	u32 mipi_clock_voltage;
 107
 108	struct clk *eclk;
 109	struct gpio_desc *pd_gpio;
 110	struct gpio_desc *rst_gpio;
 111	struct regulator_bulk_data supplies[ARRAY_SIZE(ov02a10_supply_names)];
 112
 113	bool streaming;
 114	bool upside_down;
 115
 116	/*
 117	 * Serialize control access, get/set format, get selection
 118	 * and start streaming.
 119	 */
 120	struct mutex mutex;
 121	struct v4l2_subdev subdev;
 122	struct media_pad pad;
 123	struct v4l2_mbus_framefmt fmt;
 124	struct v4l2_ctrl_handler ctrl_handler;
 125	struct v4l2_ctrl *exposure;
 126
 127	const struct ov02a10_mode *cur_mode;
 128};
 129
 130static inline struct ov02a10 *to_ov02a10(struct v4l2_subdev *sd)
 131{
 132	return container_of(sd, struct ov02a10, subdev);
 133}
 134
 135/*
 136 * eclk 24Mhz
 137 * pclk 39Mhz
 138 * linelength 934(0x3a6)
 139 * framelength 1390(0x56E)
 140 * grabwindow_width 1600
 141 * grabwindow_height 1200
 142 * max_framerate 30fps
 143 * mipi_datarate per lane 780Mbps
 144 */
 145static const struct ov02a10_reg ov02a10_1600x1200_regs[] = {
 146	{0xfd, 0x01},
 147	{0xac, 0x00},
 148	{0xfd, 0x00},
 149	{0x2f, 0x29},
 150	{0x34, 0x00},
 151	{0x35, 0x21},
 152	{0x30, 0x15},
 153	{0x33, 0x01},
 154	{0xfd, 0x01},
 155	{0x44, 0x00},
 156	{0x2a, 0x4c},
 157	{0x2b, 0x1e},
 158	{0x2c, 0x60},
 159	{0x25, 0x11},
 160	{0x03, 0x01},
 161	{0x04, 0xae},
 162	{0x09, 0x00},
 163	{0x0a, 0x02},
 164	{0x06, 0xa6},
 165	{0x31, 0x00},
 166	{0x24, 0x40},
 167	{0x01, 0x01},
 168	{0xfb, 0x73},
 169	{0xfd, 0x01},
 170	{0x16, 0x04},
 171	{0x1c, 0x09},
 172	{0x21, 0x42},
 173	{0x12, 0x04},
 174	{0x13, 0x10},
 175	{0x11, 0x40},
 176	{0x33, 0x81},
 177	{0xd0, 0x00},
 178	{0xd1, 0x01},
 179	{0xd2, 0x00},
 180	{0x50, 0x10},
 181	{0x51, 0x23},
 182	{0x52, 0x20},
 183	{0x53, 0x10},
 184	{0x54, 0x02},
 185	{0x55, 0x20},
 186	{0x56, 0x02},
 187	{0x58, 0x48},
 188	{0x5d, 0x15},
 189	{0x5e, 0x05},
 190	{0x66, 0x66},
 191	{0x68, 0x68},
 192	{0x6b, 0x00},
 193	{0x6c, 0x00},
 194	{0x6f, 0x40},
 195	{0x70, 0x40},
 196	{0x71, 0x0a},
 197	{0x72, 0xf0},
 198	{0x73, 0x10},
 199	{0x75, 0x80},
 200	{0x76, 0x10},
 201	{0x84, 0x00},
 202	{0x85, 0x10},
 203	{0x86, 0x10},
 204	{0x87, 0x00},
 205	{0x8a, 0x22},
 206	{0x8b, 0x22},
 207	{0x19, 0xf1},
 208	{0x29, 0x01},
 209	{0xfd, 0x01},
 210	{0x9d, 0x16},
 211	{0xa0, 0x29},
 212	{0xa1, 0x04},
 213	{0xad, 0x62},
 214	{0xae, 0x00},
 215	{0xaf, 0x85},
 216	{0xb1, 0x01},
 217	{0x8e, 0x06},
 218	{0x8f, 0x40},
 219	{0x90, 0x04},
 220	{0x91, 0xb0},
 221	{0x45, 0x01},
 222	{0x46, 0x00},
 223	{0x47, 0x6c},
 224	{0x48, 0x03},
 225	{0x49, 0x8b},
 226	{0x4a, 0x00},
 227	{0x4b, 0x07},
 228	{0x4c, 0x04},
 229	{0x4d, 0xb7},
 230	{0xf0, 0x40},
 231	{0xf1, 0x40},
 232	{0xf2, 0x40},
 233	{0xf3, 0x40},
 234	{0x3f, 0x00},
 235	{0xfd, 0x01},
 236	{0x05, 0x00},
 237	{0x06, 0xa6},
 238	{0xfd, 0x01},
 239};
 240
 241static const char * const ov02a10_test_pattern_menu[] = {
 242	"Disabled",
 243	"Eight Vertical Colour Bars",
 244};
 245
 246static const s64 link_freq_menu_items[] = {
 247	OV02A10_LINK_FREQ_390MHZ,
 248};
 249
 250static u64 to_pixel_rate(u32 f_index)
 251{
 252	u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV02A10_DATA_LANES;
 253
 254	do_div(pixel_rate, OV02A10_BITS_PER_SAMPLE);
 255
 256	return pixel_rate;
 257}
 258
 259static const struct ov02a10_mode supported_modes[] = {
 260	{
 261		.width = 1600,
 262		.height = 1200,
 263		.exp_def = 0x01ae,
 264		.hts_def = 0x03a6,
 265		.vts_def = 0x056e,
 266		.reg_list = {
 267			.num_of_regs = ARRAY_SIZE(ov02a10_1600x1200_regs),
 268			.regs = ov02a10_1600x1200_regs,
 269		},
 270	},
 271};
 272
 273static int ov02a10_write_array(struct ov02a10 *ov02a10,
 274			       const struct ov02a10_reg_list *r_list)
 275{
 276	struct i2c_client *client = v4l2_get_subdevdata(&ov02a10->subdev);
 277	unsigned int i;
 278	int ret;
 279
 280	for (i = 0; i < r_list->num_of_regs; i++) {
 281		ret = i2c_smbus_write_byte_data(client, r_list->regs[i].addr,
 282						r_list->regs[i].val);
 283		if (ret < 0)
 284			return ret;
 285	}
 286
 287	return 0;
 288}
 289
 290static void ov02a10_fill_fmt(const struct ov02a10_mode *mode,
 291			     struct v4l2_mbus_framefmt *fmt)
 292{
 293	fmt->width = mode->width;
 294	fmt->height = mode->height;
 295	fmt->field = V4L2_FIELD_NONE;
 296}
 297
 298static int ov02a10_set_fmt(struct v4l2_subdev *sd,
 299			   struct v4l2_subdev_state *sd_state,
 300			   struct v4l2_subdev_format *fmt)
 301{
 302	struct ov02a10 *ov02a10 = to_ov02a10(sd);
 303	struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format;
 304	struct v4l2_mbus_framefmt *frame_fmt;
 305	int ret = 0;
 306
 307	mutex_lock(&ov02a10->mutex);
 308
 309	if (ov02a10->streaming && fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
 310		ret = -EBUSY;
 311		goto out_unlock;
 312	}
 313
 314	/* Only one sensor mode supported */
 315	mbus_fmt->code = ov02a10->fmt.code;
 316	ov02a10_fill_fmt(ov02a10->cur_mode, mbus_fmt);
 317
 318	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
 319		frame_fmt = v4l2_subdev_state_get_format(sd_state, 0);
 320	else
 321		frame_fmt = &ov02a10->fmt;
 322
 323	*frame_fmt = *mbus_fmt;
 324
 325out_unlock:
 326	mutex_unlock(&ov02a10->mutex);
 327	return ret;
 328}
 329
 330static int ov02a10_get_fmt(struct v4l2_subdev *sd,
 331			   struct v4l2_subdev_state *sd_state,
 332			   struct v4l2_subdev_format *fmt)
 333{
 334	struct ov02a10 *ov02a10 = to_ov02a10(sd);
 335	struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format;
 336
 337	mutex_lock(&ov02a10->mutex);
 338
 339	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
 340		fmt->format = *v4l2_subdev_state_get_format(sd_state,
 341							    fmt->pad);
 342	} else {
 343		fmt->format = ov02a10->fmt;
 344		mbus_fmt->code = ov02a10->fmt.code;
 345		ov02a10_fill_fmt(ov02a10->cur_mode, mbus_fmt);
 346	}
 347
 348	mutex_unlock(&ov02a10->mutex);
 349
 350	return 0;
 351}
 352
 353static int ov02a10_enum_mbus_code(struct v4l2_subdev *sd,
 354				  struct v4l2_subdev_state *sd_state,
 355				  struct v4l2_subdev_mbus_code_enum *code)
 356{
 357	struct ov02a10 *ov02a10 = to_ov02a10(sd);
 358
 359	if (code->index != 0)
 360		return -EINVAL;
 361
 362	code->code = ov02a10->fmt.code;
 363
 364	return 0;
 365}
 366
 367static int ov02a10_enum_frame_sizes(struct v4l2_subdev *sd,
 368				    struct v4l2_subdev_state *sd_state,
 369				    struct v4l2_subdev_frame_size_enum *fse)
 370{
 371	if (fse->index >= ARRAY_SIZE(supported_modes))
 372		return -EINVAL;
 373
 374	fse->min_width  = supported_modes[fse->index].width;
 375	fse->max_width  = supported_modes[fse->index].width;
 376	fse->max_height = supported_modes[fse->index].height;
 377	fse->min_height = supported_modes[fse->index].height;
 378
 379	return 0;
 380}
 381
 382static int ov02a10_check_sensor_id(struct ov02a10 *ov02a10)
 383{
 384	struct i2c_client *client = v4l2_get_subdevdata(&ov02a10->subdev);
 385	u16 chip_id;
 386	int ret;
 387
 388	/* Validate the chip ID */
 389	ret = i2c_smbus_read_word_swapped(client, OV02A10_REG_CHIP_ID);
 390	if (ret < 0)
 391		return ret;
 392
 393	chip_id = le16_to_cpu((__force __le16)ret);
 394
 395	if ((chip_id & OV02A10_ID_MASK) != OV02A10_ID) {
 396		dev_err(ov02a10->dev, "unexpected sensor id(0x%04x)\n", chip_id);
 397		return -EINVAL;
 398	}
 399
 400	return 0;
 401}
 402
 403static int ov02a10_power_on(struct device *dev)
 404{
 405	struct i2c_client *client = to_i2c_client(dev);
 406	struct v4l2_subdev *sd = i2c_get_clientdata(client);
 407	struct ov02a10 *ov02a10 = to_ov02a10(sd);
 408	int ret;
 409
 410	gpiod_set_value_cansleep(ov02a10->rst_gpio, 1);
 411	gpiod_set_value_cansleep(ov02a10->pd_gpio, 1);
 412
 413	ret = clk_prepare_enable(ov02a10->eclk);
 414	if (ret < 0) {
 415		dev_err(dev, "failed to enable eclk\n");
 416		return ret;
 417	}
 418
 419	ret = regulator_bulk_enable(ARRAY_SIZE(ov02a10_supply_names),
 420				    ov02a10->supplies);
 421	if (ret < 0) {
 422		dev_err(dev, "failed to enable regulators\n");
 423		goto disable_clk;
 424	}
 425	usleep_range(5000, 6000);
 426
 427	gpiod_set_value_cansleep(ov02a10->pd_gpio, 0);
 428	usleep_range(5000, 6000);
 429
 430	gpiod_set_value_cansleep(ov02a10->rst_gpio, 0);
 431	usleep_range(5000, 6000);
 432
 433	ret = ov02a10_check_sensor_id(ov02a10);
 434	if (ret)
 435		goto disable_regulator;
 436
 437	return 0;
 438
 439disable_regulator:
 440	regulator_bulk_disable(ARRAY_SIZE(ov02a10_supply_names),
 441			       ov02a10->supplies);
 442disable_clk:
 443	clk_disable_unprepare(ov02a10->eclk);
 444
 445	return ret;
 446}
 447
 448static int ov02a10_power_off(struct device *dev)
 449{
 450	struct i2c_client *client = to_i2c_client(dev);
 451	struct v4l2_subdev *sd = i2c_get_clientdata(client);
 452	struct ov02a10 *ov02a10 = to_ov02a10(sd);
 453
 454	gpiod_set_value_cansleep(ov02a10->rst_gpio, 1);
 455	clk_disable_unprepare(ov02a10->eclk);
 456	gpiod_set_value_cansleep(ov02a10->pd_gpio, 1);
 457	regulator_bulk_disable(ARRAY_SIZE(ov02a10_supply_names),
 458			       ov02a10->supplies);
 459
 460	return 0;
 461}
 462
 463static int __ov02a10_start_stream(struct ov02a10 *ov02a10)
 464{
 465	struct i2c_client *client = v4l2_get_subdevdata(&ov02a10->subdev);
 466	const struct ov02a10_reg_list *reg_list;
 467	int ret;
 468
 469	/* Apply default values of current mode */
 470	reg_list = &ov02a10->cur_mode->reg_list;
 471	ret = ov02a10_write_array(ov02a10, reg_list);
 472	if (ret)
 473		return ret;
 474
 475	/* Apply customized values from user */
 476	ret = __v4l2_ctrl_handler_setup(ov02a10->subdev.ctrl_handler);
 477	if (ret)
 478		return ret;
 479
 480	/* Set orientation to 180 degree */
 481	if (ov02a10->upside_down) {
 482		ret = i2c_smbus_write_byte_data(client, REG_MIRROR_FLIP_CONTROL,
 483						REG_MIRROR_FLIP_ENABLE);
 484		if (ret < 0) {
 485			dev_err(ov02a10->dev, "failed to set orientation\n");
 486			return ret;
 487		}
 488		ret = i2c_smbus_write_byte_data(client, REG_GLOBAL_EFFECTIVE,
 489						REG_ENABLE);
 490		if (ret < 0)
 491			return ret;
 492	}
 493
 494	/* Set MIPI TX speed according to DT property */
 495	if (ov02a10->mipi_clock_voltage != OV02A10_MIPI_TX_SPEED_DEFAULT) {
 496		ret = i2c_smbus_write_byte_data(client, TX_SPEED_AREA_SEL,
 497						ov02a10->mipi_clock_voltage);
 498		if (ret < 0)
 499			return ret;
 500	}
 501
 502	/* Set stream on register */
 503	return i2c_smbus_write_byte_data(client, REG_SC_CTRL_MODE,
 504					 SC_CTRL_MODE_STREAMING);
 505}
 506
 507static int __ov02a10_stop_stream(struct ov02a10 *ov02a10)
 508{
 509	struct i2c_client *client = v4l2_get_subdevdata(&ov02a10->subdev);
 510
 511	return i2c_smbus_write_byte_data(client, REG_SC_CTRL_MODE,
 512					 SC_CTRL_MODE_STANDBY);
 513}
 514
 515static int ov02a10_init_state(struct v4l2_subdev *sd,
 516			      struct v4l2_subdev_state *sd_state)
 517{
 518	struct v4l2_subdev_format fmt = {
 519		.which = V4L2_SUBDEV_FORMAT_TRY,
 520		.format = {
 521			.width = 1600,
 522			.height = 1200,
 523		}
 524	};
 525
 526	ov02a10_set_fmt(sd, sd_state, &fmt);
 527
 528	return 0;
 529}
 530
 531static int ov02a10_s_stream(struct v4l2_subdev *sd, int on)
 532{
 533	struct ov02a10 *ov02a10 = to_ov02a10(sd);
 534	int ret;
 535
 536	mutex_lock(&ov02a10->mutex);
 537
 538	if (ov02a10->streaming == on) {
 539		ret = 0;
 540		goto unlock_and_return;
 541	}
 542
 543	if (on) {
 544		ret = pm_runtime_resume_and_get(ov02a10->dev);
 545		if (ret < 0)
 546			goto unlock_and_return;
 547
 548		ret = __ov02a10_start_stream(ov02a10);
 549		if (ret) {
 550			__ov02a10_stop_stream(ov02a10);
 551			ov02a10->streaming = !on;
 552			goto err_rpm_put;
 553		}
 554	} else {
 555		__ov02a10_stop_stream(ov02a10);
 556		pm_runtime_put(ov02a10->dev);
 557	}
 558
 559	ov02a10->streaming = on;
 560	mutex_unlock(&ov02a10->mutex);
 561
 562	return 0;
 563
 564err_rpm_put:
 565	pm_runtime_put(ov02a10->dev);
 566unlock_and_return:
 567	mutex_unlock(&ov02a10->mutex);
 568
 569	return ret;
 570}
 571
 572static const struct dev_pm_ops ov02a10_pm_ops = {
 573	SET_RUNTIME_PM_OPS(ov02a10_power_off, ov02a10_power_on, NULL)
 574};
 575
 576static int ov02a10_set_exposure(struct ov02a10 *ov02a10, int val)
 577{
 578	struct i2c_client *client = v4l2_get_subdevdata(&ov02a10->subdev);
 579	int ret;
 580
 581	ret = i2c_smbus_write_byte_data(client, REG_PAGE_SWITCH, REG_ENABLE);
 582	if (ret < 0)
 583		return ret;
 584
 585	ret = i2c_smbus_write_byte_data(client, OV02A10_REG_EXPOSURE_H,
 586					val >> OV02A10_EXP_SHIFT);
 587	if (ret < 0)
 588		return ret;
 589
 590	ret = i2c_smbus_write_byte_data(client, OV02A10_REG_EXPOSURE_L, val);
 591	if (ret < 0)
 592		return ret;
 593
 594	return i2c_smbus_write_byte_data(client, REG_GLOBAL_EFFECTIVE,
 595					 REG_ENABLE);
 596}
 597
 598static int ov02a10_set_gain(struct ov02a10 *ov02a10, int val)
 599{
 600	struct i2c_client *client = v4l2_get_subdevdata(&ov02a10->subdev);
 601	int ret;
 602
 603	ret = i2c_smbus_write_byte_data(client, REG_PAGE_SWITCH, REG_ENABLE);
 604	if (ret < 0)
 605		return ret;
 606
 607	ret = i2c_smbus_write_byte_data(client, OV02A10_REG_GAIN, val);
 608	if (ret < 0)
 609		return ret;
 610
 611	return i2c_smbus_write_byte_data(client, REG_GLOBAL_EFFECTIVE,
 612					 REG_ENABLE);
 613}
 614
 615static int ov02a10_set_vblank(struct ov02a10 *ov02a10, int val)
 616{
 617	struct i2c_client *client = v4l2_get_subdevdata(&ov02a10->subdev);
 618	u32 vts = val + ov02a10->cur_mode->height - OV02A10_BASE_LINES;
 619	int ret;
 620
 621	ret = i2c_smbus_write_byte_data(client, REG_PAGE_SWITCH, REG_ENABLE);
 622	if (ret < 0)
 623		return ret;
 624
 625	ret = i2c_smbus_write_byte_data(client, OV02A10_REG_VTS_H,
 626					vts >> OV02A10_VTS_SHIFT);
 627	if (ret < 0)
 628		return ret;
 629
 630	ret = i2c_smbus_write_byte_data(client, OV02A10_REG_VTS_L, vts);
 631	if (ret < 0)
 632		return ret;
 633
 634	return i2c_smbus_write_byte_data(client, REG_GLOBAL_EFFECTIVE,
 635					 REG_ENABLE);
 636}
 637
 638static int ov02a10_set_test_pattern(struct ov02a10 *ov02a10, int pattern)
 639{
 640	struct i2c_client *client = v4l2_get_subdevdata(&ov02a10->subdev);
 641	int ret;
 642
 643	ret = i2c_smbus_write_byte_data(client, REG_PAGE_SWITCH, REG_ENABLE);
 644	if (ret < 0)
 645		return ret;
 646
 647	ret = i2c_smbus_write_byte_data(client, OV02A10_REG_TEST_PATTERN,
 648					pattern);
 649	if (ret < 0)
 650		return ret;
 651
 652	ret = i2c_smbus_write_byte_data(client, REG_GLOBAL_EFFECTIVE,
 653					REG_ENABLE);
 654	if (ret < 0)
 655		return ret;
 656
 657	return i2c_smbus_write_byte_data(client, REG_SC_CTRL_MODE,
 658					 SC_CTRL_MODE_STREAMING);
 659}
 660
 661static int ov02a10_set_ctrl(struct v4l2_ctrl *ctrl)
 662{
 663	struct ov02a10 *ov02a10 = container_of(ctrl->handler,
 664					       struct ov02a10, ctrl_handler);
 665	s64 max_expo;
 666	int ret;
 667
 668	/* Propagate change of current control to all related controls */
 669	if (ctrl->id == V4L2_CID_VBLANK) {
 670		/* Update max exposure while meeting expected vblanking */
 671		max_expo = ov02a10->cur_mode->height + ctrl->val -
 672			   OV02A10_EXPOSURE_MAX_MARGIN;
 673		__v4l2_ctrl_modify_range(ov02a10->exposure,
 674					 ov02a10->exposure->minimum, max_expo,
 675					 ov02a10->exposure->step,
 676					 ov02a10->exposure->default_value);
 677	}
 678
 679	/* V4L2 controls values will be applied only when power is already up */
 680	if (!pm_runtime_get_if_in_use(ov02a10->dev))
 681		return 0;
 682
 683	switch (ctrl->id) {
 684	case V4L2_CID_EXPOSURE:
 685		ret = ov02a10_set_exposure(ov02a10, ctrl->val);
 686		break;
 687	case V4L2_CID_ANALOGUE_GAIN:
 688		ret = ov02a10_set_gain(ov02a10, ctrl->val);
 689		break;
 690	case V4L2_CID_VBLANK:
 691		ret = ov02a10_set_vblank(ov02a10, ctrl->val);
 692		break;
 693	case V4L2_CID_TEST_PATTERN:
 694		ret = ov02a10_set_test_pattern(ov02a10, ctrl->val);
 695		break;
 696	default:
 697		ret = -EINVAL;
 698		break;
 699	}
 700
 701	pm_runtime_put(ov02a10->dev);
 702
 703	return ret;
 704}
 705
 706static const struct v4l2_subdev_video_ops ov02a10_video_ops = {
 707	.s_stream = ov02a10_s_stream,
 708};
 709
 710static const struct v4l2_subdev_pad_ops ov02a10_pad_ops = {
 711	.enum_mbus_code = ov02a10_enum_mbus_code,
 712	.enum_frame_size = ov02a10_enum_frame_sizes,
 713	.get_fmt = ov02a10_get_fmt,
 714	.set_fmt = ov02a10_set_fmt,
 715};
 716
 717static const struct v4l2_subdev_ops ov02a10_subdev_ops = {
 718	.video	= &ov02a10_video_ops,
 719	.pad	= &ov02a10_pad_ops,
 720};
 721
 722static const struct v4l2_subdev_internal_ops ov02a10_internal_ops = {
 723	.init_state = ov02a10_init_state,
 724};
 725
 726static const struct media_entity_operations ov02a10_subdev_entity_ops = {
 727	.link_validate = v4l2_subdev_link_validate,
 728};
 729
 730static const struct v4l2_ctrl_ops ov02a10_ctrl_ops = {
 731	.s_ctrl = ov02a10_set_ctrl,
 732};
 733
 734static int ov02a10_initialize_controls(struct ov02a10 *ov02a10)
 735{
 736	const struct ov02a10_mode *mode;
 737	struct v4l2_ctrl_handler *handler;
 738	struct v4l2_ctrl *ctrl;
 739	s64 exposure_max;
 740	s64 vblank_def;
 741	s64 pixel_rate;
 742	s64 h_blank;
 743	int ret;
 744
 745	handler = &ov02a10->ctrl_handler;
 746	mode = ov02a10->cur_mode;
 747	ret = v4l2_ctrl_handler_init(handler, 7);
 748	if (ret)
 749		return ret;
 750
 751	handler->lock = &ov02a10->mutex;
 752
 753	ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ, 0, 0,
 754				      link_freq_menu_items);
 755	if (ctrl)
 756		ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
 757
 758	pixel_rate = to_pixel_rate(0);
 759	v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE, 0, pixel_rate, 1,
 760			  pixel_rate);
 761
 762	h_blank = mode->hts_def - mode->width;
 763	v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK, h_blank, h_blank, 1,
 764			  h_blank);
 765
 766	vblank_def = mode->vts_def - mode->height;
 767	v4l2_ctrl_new_std(handler, &ov02a10_ctrl_ops, V4L2_CID_VBLANK,
 768			  vblank_def, OV02A10_VTS_MAX - mode->height, 1,
 769			  vblank_def);
 770
 771	exposure_max = mode->vts_def - 4;
 772	ov02a10->exposure = v4l2_ctrl_new_std(handler, &ov02a10_ctrl_ops,
 773					      V4L2_CID_EXPOSURE,
 774					      OV02A10_EXPOSURE_MIN,
 775					      exposure_max,
 776					      OV02A10_EXPOSURE_STEP,
 777					      mode->exp_def);
 778
 779	v4l2_ctrl_new_std(handler, &ov02a10_ctrl_ops,
 780			  V4L2_CID_ANALOGUE_GAIN, OV02A10_GAIN_MIN,
 781			  OV02A10_GAIN_MAX, OV02A10_GAIN_STEP,
 782			  OV02A10_GAIN_DEFAULT);
 783
 784	v4l2_ctrl_new_std_menu_items(handler, &ov02a10_ctrl_ops,
 785				     V4L2_CID_TEST_PATTERN,
 786				     ARRAY_SIZE(ov02a10_test_pattern_menu) - 1,
 787				     0, 0, ov02a10_test_pattern_menu);
 788
 789	if (handler->error) {
 790		ret = handler->error;
 791		dev_err(ov02a10->dev, "failed to init controls(%d)\n", ret);
 792		goto err_free_handler;
 793	}
 794
 795	ov02a10->subdev.ctrl_handler = handler;
 796
 797	return 0;
 798
 799err_free_handler:
 800	v4l2_ctrl_handler_free(handler);
 801
 802	return ret;
 803}
 804
 805static int ov02a10_check_hwcfg(struct device *dev, struct ov02a10 *ov02a10)
 806{
 807	struct fwnode_handle *ep;
 808	struct fwnode_handle *fwnode = dev_fwnode(dev);
 809	struct v4l2_fwnode_endpoint bus_cfg = {
 810		.bus_type = V4L2_MBUS_CSI2_DPHY,
 811	};
 812	unsigned int i, j;
 813	u32 clk_volt;
 814	int ret;
 815
 816	if (!fwnode)
 817		return -EINVAL;
 818
 819	ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
 820	if (!ep)
 821		return -ENXIO;
 822
 823	ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
 824	fwnode_handle_put(ep);
 825	if (ret)
 826		return ret;
 827
 828	/* Optional indication of MIPI clock voltage unit */
 829	ret = fwnode_property_read_u32(ep, "ovti,mipi-clock-voltage",
 830				       &clk_volt);
 831
 832	if (!ret)
 833		ov02a10->mipi_clock_voltage = clk_volt;
 834
 835	for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) {
 836		for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
 837			if (link_freq_menu_items[i] ==
 838				bus_cfg.link_frequencies[j])
 839				break;
 840		}
 841
 842		if (j == bus_cfg.nr_of_link_frequencies) {
 843			dev_err(dev, "no link frequency %lld supported\n",
 844				link_freq_menu_items[i]);
 845			ret = -EINVAL;
 846			break;
 847		}
 848	}
 849
 850	v4l2_fwnode_endpoint_free(&bus_cfg);
 851
 852	return ret;
 853}
 854
 855static int ov02a10_probe(struct i2c_client *client)
 856{
 857	struct device *dev = &client->dev;
 858	struct ov02a10 *ov02a10;
 859	unsigned int i;
 860	unsigned int rotation;
 861	int ret;
 862
 863	ov02a10 = devm_kzalloc(dev, sizeof(*ov02a10), GFP_KERNEL);
 864	if (!ov02a10)
 865		return -ENOMEM;
 866
 867	ov02a10->dev = dev;
 868
 869	ret = ov02a10_check_hwcfg(dev, ov02a10);
 870	if (ret)
 871		return dev_err_probe(dev, ret,
 872				     "failed to check HW configuration\n");
 873
 874	v4l2_i2c_subdev_init(&ov02a10->subdev, client, &ov02a10_subdev_ops);
 875	ov02a10->subdev.internal_ops = &ov02a10_internal_ops;
 876
 877	ov02a10->mipi_clock_voltage = OV02A10_MIPI_TX_SPEED_DEFAULT;
 878	ov02a10->fmt.code = MEDIA_BUS_FMT_SBGGR10_1X10;
 879
 880	/* Optional indication of physical rotation of sensor */
 881	rotation = 0;
 882	device_property_read_u32(dev, "rotation", &rotation);
 883	if (rotation == 180) {
 884		ov02a10->upside_down = true;
 885		ov02a10->fmt.code = MEDIA_BUS_FMT_SRGGB10_1X10;
 886	}
 887
 888	ov02a10->eclk = devm_v4l2_sensor_clk_get_legacy(dev, "eclk", false, 0);
 889	if (IS_ERR(ov02a10->eclk))
 890		return dev_err_probe(dev, PTR_ERR(ov02a10->eclk),
 891				     "failed to get eclk\n");
 892
 893	if (clk_get_rate(ov02a10->eclk) != OV02A10_ECLK_FREQ)
 894		dev_warn(dev, "eclk mismatched, mode is based on 24MHz\n");
 895
 896	ov02a10->pd_gpio = devm_gpiod_get(dev, "powerdown", GPIOD_OUT_HIGH);
 897	if (IS_ERR(ov02a10->pd_gpio))
 898		return dev_err_probe(dev, PTR_ERR(ov02a10->pd_gpio),
 899				     "failed to get powerdown-gpios\n");
 900
 901	ov02a10->rst_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
 902	if (IS_ERR(ov02a10->rst_gpio))
 903		return dev_err_probe(dev, PTR_ERR(ov02a10->rst_gpio),
 904				     "failed to get reset-gpios\n");
 905
 906	for (i = 0; i < ARRAY_SIZE(ov02a10_supply_names); i++)
 907		ov02a10->supplies[i].supply = ov02a10_supply_names[i];
 908
 909	ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ov02a10_supply_names),
 910				      ov02a10->supplies);
 911	if (ret)
 912		return dev_err_probe(dev, ret, "failed to get regulators\n");
 913
 914	mutex_init(&ov02a10->mutex);
 915
 916	/* Set default mode */
 917	ov02a10->cur_mode = &supported_modes[0];
 918
 919	ret = ov02a10_initialize_controls(ov02a10);
 920	if (ret) {
 921		dev_err_probe(dev, ret, "failed to initialize controls\n");
 922		goto err_destroy_mutex;
 923	}
 924
 925	/* Initialize subdev */
 926	ov02a10->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 927	ov02a10->subdev.entity.ops = &ov02a10_subdev_entity_ops;
 928	ov02a10->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR;
 929	ov02a10->pad.flags = MEDIA_PAD_FL_SOURCE;
 930
 931	ret = media_entity_pads_init(&ov02a10->subdev.entity, 1, &ov02a10->pad);
 932	if (ret < 0) {
 933		dev_err_probe(dev, ret, "failed to initialize entity pads\n");
 934		goto err_free_handler;
 935	}
 936
 937	pm_runtime_enable(dev);
 938	if (!pm_runtime_enabled(dev)) {
 939		ret = ov02a10_power_on(dev);
 940		if (ret < 0) {
 941			dev_err_probe(dev, ret, "failed to power on\n");
 942			goto err_clean_entity;
 943		}
 944	}
 945
 946	ret = v4l2_async_register_subdev(&ov02a10->subdev);
 947	if (ret) {
 948		dev_err_probe(dev, ret, "failed to register V4L2 subdev\n");
 949		goto err_power_off;
 950	}
 951
 952	return 0;
 953
 954err_power_off:
 955	if (pm_runtime_enabled(dev))
 956		pm_runtime_disable(dev);
 957	else
 958		ov02a10_power_off(dev);
 959err_clean_entity:
 960	media_entity_cleanup(&ov02a10->subdev.entity);
 961err_free_handler:
 962	v4l2_ctrl_handler_free(ov02a10->subdev.ctrl_handler);
 963err_destroy_mutex:
 964	mutex_destroy(&ov02a10->mutex);
 965
 966	return ret;
 967}
 968
 969static void ov02a10_remove(struct i2c_client *client)
 970{
 971	struct v4l2_subdev *sd = i2c_get_clientdata(client);
 972	struct ov02a10 *ov02a10 = to_ov02a10(sd);
 973
 974	v4l2_async_unregister_subdev(sd);
 975	media_entity_cleanup(&sd->entity);
 976	v4l2_ctrl_handler_free(sd->ctrl_handler);
 977	pm_runtime_disable(ov02a10->dev);
 978	if (!pm_runtime_status_suspended(ov02a10->dev))
 979		ov02a10_power_off(ov02a10->dev);
 980	pm_runtime_set_suspended(ov02a10->dev);
 981	mutex_destroy(&ov02a10->mutex);
 982}
 983
 984static const struct of_device_id ov02a10_of_match[] = {
 985	{ .compatible = "ovti,ov02a10" },
 986	{}
 987};
 988MODULE_DEVICE_TABLE(of, ov02a10_of_match);
 989
 990static struct i2c_driver ov02a10_i2c_driver = {
 991	.driver = {
 992		.name = "ov02a10",
 993		.pm = &ov02a10_pm_ops,
 994		.of_match_table = ov02a10_of_match,
 995	},
 996	.probe		= ov02a10_probe,
 997	.remove		= ov02a10_remove,
 998};
 999module_i2c_driver(ov02a10_i2c_driver);
1000
1001MODULE_AUTHOR("Dongchun Zhu <dongchun.zhu@mediatek.com>");
1002MODULE_DESCRIPTION("OmniVision OV02A10 sensor driver");
1003MODULE_LICENSE("GPL v2");