imx334.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Sony imx334 sensor driver
   4 *
   5 * Copyright (C) 2021 Intel Corporation
   6 */
   7#include <linux/unaligned.h>
   8
   9#include <linux/clk.h>
  10#include <linux/delay.h>
  11#include <linux/i2c.h>
  12#include <linux/module.h>
  13#include <linux/pm_runtime.h>
  14
  15#include <media/v4l2-cci.h>
  16#include <media/v4l2-ctrls.h>
  17#include <media/v4l2-fwnode.h>
  18#include <media/v4l2-subdev.h>
  19
  20/* Streaming Mode */
  21#define IMX334_REG_MODE_SELECT		CCI_REG8(0x3000)
  22#define IMX334_MODE_STANDBY		0x01
  23#define IMX334_MODE_STREAMING		0x00
  24
  25/* Lines per frame */
  26#define IMX334_REG_VMAX			CCI_REG24_LE(0x3030)
  27
  28#define IMX334_REG_HMAX			CCI_REG16_LE(0x3034)
  29
  30#define IMX334_REG_OPB_SIZE_V		CCI_REG8(0x304c)
  31#define IMX334_REG_ADBIT		CCI_REG8(0x3050)
  32#define IMX334_REG_MDBIT		CCI_REG8(0x319d)
  33#define IMX334_REG_ADBIT1		CCI_REG16_LE(0x341c)
  34#define IMX334_REG_Y_OUT_SIZE		CCI_REG16_LE(0x3308)
  35#define IMX334_REG_XVS_XHS_OUTSEL	CCI_REG8(0x31a0)
  36#define IMX334_REG_XVS_XHS_DRV		CCI_REG8(0x31a1)
  37
  38/* Chip ID */
  39#define IMX334_REG_ID			CCI_REG8(0x3044)
  40#define IMX334_ID			0x1e
  41
  42/* Exposure control */
  43#define IMX334_REG_SHUTTER		CCI_REG24_LE(0x3058)
  44#define IMX334_EXPOSURE_MIN		1
  45#define IMX334_EXPOSURE_OFFSET		5
  46#define IMX334_EXPOSURE_STEP		1
  47#define IMX334_EXPOSURE_DEFAULT		0x0648
  48
  49#define IMX334_REG_LANEMODE		CCI_REG8(0x3a01)
  50#define IMX334_CSI_4_LANE_MODE		3
  51#define IMX334_CSI_8_LANE_MODE		7
  52
  53/* Window cropping Settings */
  54#define IMX334_REG_AREA3_ST_ADR_1	CCI_REG16_LE(0x3074)
  55#define IMX334_REG_AREA3_ST_ADR_2	CCI_REG16_LE(0x308e)
  56#define IMX334_REG_UNREAD_PARAM5	CCI_REG16_LE(0x30b6)
  57#define IMX334_REG_AREA3_WIDTH_1	CCI_REG16_LE(0x3076)
  58#define IMX334_REG_AREA3_WIDTH_2	CCI_REG16_LE(0x3090)
  59#define IMX334_REG_BLACK_OFSET_ADR	CCI_REG16_LE(0x30c6)
  60#define IMX334_REG_UNRD_LINE_MAX	CCI_REG16_LE(0x30ce)
  61#define IMX334_REG_UNREAD_ED_ADR	CCI_REG16_LE(0x30d8)
  62#define IMX334_REG_UNREAD_PARAM6	CCI_REG16_LE(0x3116)
  63
  64#define IMX334_REG_VREVERSE		CCI_REG8(0x304f)
  65#define IMX334_REG_HREVERSE		CCI_REG8(0x304e)
  66
  67/* Binning Settings */
  68#define IMX334_REG_HADD_VADD		CCI_REG8(0x3199)
  69#define IMX334_REG_VALID_EXPAND		CCI_REG8(0x31dd)
  70#define IMX334_REG_TCYCLE		CCI_REG8(0x3300)
  71
  72/* Analog gain control */
  73#define IMX334_REG_AGAIN		CCI_REG16_LE(0x30e8)
  74#define IMX334_AGAIN_MIN		0
  75#define IMX334_AGAIN_MAX		240
  76#define IMX334_AGAIN_STEP		1
  77#define IMX334_AGAIN_DEFAULT		0
  78
  79/* Group hold register */
  80#define IMX334_REG_HOLD			CCI_REG8(0x3001)
  81
  82#define IMX334_REG_MASTER_MODE		CCI_REG8(0x3002)
  83#define IMX334_REG_WINMODE		CCI_REG8(0x3018)
  84#define IMX334_REG_HTRIMMING_START	CCI_REG16_LE(0x302c)
  85#define IMX334_REG_HNUM			CCI_REG16_LE(0x302e)
  86
  87/* Input clock rate */
  88#define IMX334_INCLK_RATE		24000000
  89
  90/* INCK Setting Register */
  91#define IMX334_REG_BCWAIT_TIME		CCI_REG8(0x300c)
  92#define IMX334_REG_CPWAIT_TIME		CCI_REG8(0x300d)
  93#define IMX334_REG_INCKSEL1		CCI_REG16_LE(0x314c)
  94#define IMX334_REG_INCKSEL2		CCI_REG8(0x315a)
  95#define IMX334_REG_INCKSEL3		CCI_REG8(0x3168)
  96#define IMX334_REG_INCKSEL4		CCI_REG8(0x316a)
  97#define IMX334_REG_SYS_MODE		CCI_REG8(0x319e)
  98
  99#define IMX334_REG_TCLKPOST		CCI_REG16_LE(0x3a18)
 100#define IMX334_REG_TCLKPREPARE		CCI_REG16_LE(0x3a1a)
 101#define IMX334_REG_TCLKTRAIL		CCI_REG16_LE(0x3a1c)
 102#define IMX334_REG_TCLKZERO		CCI_REG16_LE(0x3a1e)
 103#define IMX334_REG_THSPREPARE		CCI_REG16_LE(0x3a20)
 104#define IMX334_REG_THSZERO		CCI_REG16_LE(0x3a22)
 105#define IMX334_REG_THSTRAIL		CCI_REG16_LE(0x3a24)
 106#define IMX334_REG_THSEXIT		CCI_REG16_LE(0x3a26)
 107#define IMX334_REG_TPLX			CCI_REG16_LE(0x3a28)
 108
 109/* CSI2 HW configuration */
 110#define IMX334_LINK_FREQ_891M		891000000
 111#define IMX334_LINK_FREQ_445M		445500000
 112#define IMX334_NUM_DATA_LANES		4
 113
 114#define IMX334_REG_MIN			0x00
 115#define IMX334_REG_MAX			0xfffff
 116
 117/* Test Pattern Control */
 118#define IMX334_REG_TP			CCI_REG8(0x329e)
 119#define IMX334_TP_COLOR_HBARS		0xa
 120#define IMX334_TP_COLOR_VBARS		0xb
 121#define IMX334_TP_BLACK			0x0
 122#define IMX334_TP_WHITE			0x1
 123#define IMX334_TP_BLACK_GREY		0xc
 124
 125#define IMX334_TPG_EN_DOUT		CCI_REG8(0x329c)
 126#define IMX334_TP_ENABLE		0x1
 127#define IMX334_TP_DISABLE		0x0
 128
 129#define IMX334_TPG_COLORW		CCI_REG8(0x32a0)
 130#define IMX334_TPG_COLORW_120P		0x13
 131
 132#define IMX334_TP_CLK_EN		CCI_REG8(0x3148)
 133#define IMX334_TP_CLK_EN_VAL		0x10
 134#define IMX334_TP_CLK_DIS_VAL		0x0
 135
 136#define IMX334_DIG_CLP_MODE		CCI_REG8(0x3280)
 137
 138/**
 139 * struct imx334_reg_list - imx334 sensor register list
 140 * @num_of_regs: Number of registers in the list
 141 * @regs: Pointer to register list
 142 */
 143struct imx334_reg_list {
 144	u32 num_of_regs;
 145	const struct cci_reg_sequence *regs;
 146};
 147
 148/**
 149 * struct imx334_mode - imx334 sensor mode structure
 150 * @width: Frame width
 151 * @height: Frame height
 152 * @hblank: Horizontal blanking in lines
 153 * @vblank: Vertical blanking in lines
 154 * @vblank_min: Minimal vertical blanking in lines
 155 * @vblank_max: Maximum vertical blanking in lines
 156 * @pclk: Sensor pixel clock
 157 * @link_freq_idx: Link frequency index
 158 * @reg_list: Register list for sensor mode
 159 */
 160struct imx334_mode {
 161	u32 width;
 162	u32 height;
 163	u32 hblank;
 164	u32 vblank;
 165	u32 vblank_min;
 166	u32 vblank_max;
 167	u64 pclk;
 168	u32 link_freq_idx;
 169	struct imx334_reg_list reg_list;
 170};
 171
 172/**
 173 * struct imx334 - imx334 sensor device structure
 174 * @dev: Pointer to generic device
 175 * @cci: CCI register map
 176 * @client: Pointer to i2c client
 177 * @sd: V4L2 sub-device
 178 * @pad: Media pad. Only one pad supported
 179 * @reset_gpio: Sensor reset gpio
 180 * @inclk: Sensor input clock
 181 * @ctrl_handler: V4L2 control handler
 182 * @link_freq_ctrl: Pointer to link frequency control
 183 * @pclk_ctrl: Pointer to pixel clock control
 184 * @hblank_ctrl: Pointer to horizontal blanking control
 185 * @vblank_ctrl: Pointer to vertical blanking control
 186 * @exp_ctrl: Pointer to exposure control
 187 * @again_ctrl: Pointer to analog gain control
 188 * @vblank: Vertical blanking in lines
 189 * @cur_mode: Pointer to current selected sensor mode
 190 * @link_freq_bitmap: Menu bitmap for link_freq_ctrl
 191 * @cur_code: current selected format code
 192 */
 193struct imx334 {
 194	struct device *dev;
 195	struct regmap *cci;
 196	struct i2c_client *client;
 197	struct v4l2_subdev sd;
 198	struct media_pad pad;
 199	struct gpio_desc *reset_gpio;
 200	struct clk *inclk;
 201	struct v4l2_ctrl_handler ctrl_handler;
 202	struct v4l2_ctrl *link_freq_ctrl;
 203	struct v4l2_ctrl *pclk_ctrl;
 204	struct v4l2_ctrl *hblank_ctrl;
 205	struct v4l2_ctrl *vblank_ctrl;
 206	struct {
 207		struct v4l2_ctrl *exp_ctrl;
 208		struct v4l2_ctrl *again_ctrl;
 209	};
 210	u32 vblank;
 211	const struct imx334_mode *cur_mode;
 212	unsigned long link_freq_bitmap;
 213	u32 cur_code;
 214};
 215
 216static const s64 link_freq[] = {
 217	IMX334_LINK_FREQ_891M,
 218	IMX334_LINK_FREQ_445M,
 219};
 220
 221/* Sensor common mode registers values */
 222static const struct cci_reg_sequence common_mode_regs[] = {
 223	{ IMX334_REG_MODE_SELECT, IMX334_MODE_STANDBY },
 224	{ IMX334_REG_WINMODE,		0x04 },
 225	{ IMX334_REG_VMAX,		0x0008ca },
 226	{ IMX334_REG_HMAX,		0x044c },
 227	{ IMX334_REG_BLACK_OFSET_ADR,	0x0000 },
 228	{ IMX334_REG_UNRD_LINE_MAX,	0x0000 },
 229	{ IMX334_REG_OPB_SIZE_V,	0x00 },
 230	{ IMX334_REG_HREVERSE,		0x00 },
 231	{ IMX334_REG_VREVERSE,		0x00 },
 232	{ IMX334_REG_UNREAD_PARAM5,	0x0000 },
 233	{ IMX334_REG_UNREAD_PARAM6,	0x0008 },
 234	{ IMX334_REG_XVS_XHS_OUTSEL,	0x20 },
 235	{ IMX334_REG_XVS_XHS_DRV,	0x0f },
 236	{ IMX334_REG_BCWAIT_TIME,	0x3b },
 237	{ IMX334_REG_CPWAIT_TIME,	0x2a },
 238	{ IMX334_REG_INCKSEL1,		0x0129 },
 239	{ IMX334_REG_INCKSEL2,		0x06 },
 240	{ IMX334_REG_INCKSEL3,		0xa0 },
 241	{ IMX334_REG_INCKSEL4,		0x7e },
 242	{ IMX334_REG_SYS_MODE,		0x02 },
 243	{ IMX334_REG_HADD_VADD,		0x00 },
 244	{ IMX334_REG_VALID_EXPAND,	0x03 },
 245	{ IMX334_REG_TCYCLE,		0x00 },
 246	{ IMX334_REG_TCLKPOST,		0x007f },
 247	{ IMX334_REG_TCLKPREPARE,	0x0037 },
 248	{ IMX334_REG_TCLKTRAIL,		0x0037 },
 249	{ IMX334_REG_TCLKZERO,		0xf7 },
 250	{ IMX334_REG_THSPREPARE,	0x002f },
 251	{ CCI_REG8(0x3078), 0x02 },
 252	{ CCI_REG8(0x3079), 0x00 },
 253	{ CCI_REG8(0x307a), 0x00 },
 254	{ CCI_REG8(0x307b), 0x00 },
 255	{ CCI_REG8(0x3080), 0x02 },
 256	{ CCI_REG8(0x3081), 0x00 },
 257	{ CCI_REG8(0x3082), 0x00 },
 258	{ CCI_REG8(0x3083), 0x00 },
 259	{ CCI_REG8(0x3088), 0x02 },
 260	{ CCI_REG8(0x3094), 0x00 },
 261	{ CCI_REG8(0x3095), 0x00 },
 262	{ CCI_REG8(0x3096), 0x00 },
 263	{ CCI_REG8(0x309b), 0x02 },
 264	{ CCI_REG8(0x309c), 0x00 },
 265	{ CCI_REG8(0x309d), 0x00 },
 266	{ CCI_REG8(0x309e), 0x00 },
 267	{ CCI_REG8(0x30a4), 0x00 },
 268	{ CCI_REG8(0x30a5), 0x00 },
 269	{ CCI_REG8(0x3288), 0x21 },
 270	{ CCI_REG8(0x328a), 0x02 },
 271	{ CCI_REG8(0x3414), 0x05 },
 272	{ CCI_REG8(0x3416), 0x18 },
 273	{ CCI_REG8(0x35Ac), 0x0e },
 274	{ CCI_REG8(0x3648), 0x01 },
 275	{ CCI_REG8(0x364a), 0x04 },
 276	{ CCI_REG8(0x364c), 0x04 },
 277	{ CCI_REG8(0x3678), 0x01 },
 278	{ CCI_REG8(0x367c), 0x31 },
 279	{ CCI_REG8(0x367e), 0x31 },
 280	{ CCI_REG8(0x3708), 0x02 },
 281	{ CCI_REG8(0x3714), 0x01 },
 282	{ CCI_REG8(0x3715), 0x02 },
 283	{ CCI_REG8(0x3716), 0x02 },
 284	{ CCI_REG8(0x3717), 0x02 },
 285	{ CCI_REG8(0x371c), 0x3d },
 286	{ CCI_REG8(0x371d), 0x3f },
 287	{ CCI_REG8(0x372c), 0x00 },
 288	{ CCI_REG8(0x372d), 0x00 },
 289	{ CCI_REG8(0x372e), 0x46 },
 290	{ CCI_REG8(0x372f), 0x00 },
 291	{ CCI_REG8(0x3730), 0x89 },
 292	{ CCI_REG8(0x3731), 0x00 },
 293	{ CCI_REG8(0x3732), 0x08 },
 294	{ CCI_REG8(0x3733), 0x01 },
 295	{ CCI_REG8(0x3734), 0xfe },
 296	{ CCI_REG8(0x3735), 0x05 },
 297	{ CCI_REG8(0x375d), 0x00 },
 298	{ CCI_REG8(0x375e), 0x00 },
 299	{ CCI_REG8(0x375f), 0x61 },
 300	{ CCI_REG8(0x3760), 0x06 },
 301	{ CCI_REG8(0x3768), 0x1b },
 302	{ CCI_REG8(0x3769), 0x1b },
 303	{ CCI_REG8(0x376a), 0x1a },
 304	{ CCI_REG8(0x376b), 0x19 },
 305	{ CCI_REG8(0x376c), 0x18 },
 306	{ CCI_REG8(0x376d), 0x14 },
 307	{ CCI_REG8(0x376e), 0x0f },
 308	{ CCI_REG8(0x3776), 0x00 },
 309	{ CCI_REG8(0x3777), 0x00 },
 310	{ CCI_REG8(0x3778), 0x46 },
 311	{ CCI_REG8(0x3779), 0x00 },
 312	{ CCI_REG8(0x377a), 0x08 },
 313	{ CCI_REG8(0x377b), 0x01 },
 314	{ CCI_REG8(0x377c), 0x45 },
 315	{ CCI_REG8(0x377d), 0x01 },
 316	{ CCI_REG8(0x377e), 0x23 },
 317	{ CCI_REG8(0x377f), 0x02 },
 318	{ CCI_REG8(0x3780), 0xd9 },
 319	{ CCI_REG8(0x3781), 0x03 },
 320	{ CCI_REG8(0x3782), 0xf5 },
 321	{ CCI_REG8(0x3783), 0x06 },
 322	{ CCI_REG8(0x3784), 0xa5 },
 323	{ CCI_REG8(0x3788), 0x0f },
 324	{ CCI_REG8(0x378a), 0xd9 },
 325	{ CCI_REG8(0x378b), 0x03 },
 326	{ CCI_REG8(0x378c), 0xeb },
 327	{ CCI_REG8(0x378d), 0x05 },
 328	{ CCI_REG8(0x378e), 0x87 },
 329	{ CCI_REG8(0x378f), 0x06 },
 330	{ CCI_REG8(0x3790), 0xf5 },
 331	{ CCI_REG8(0x3792), 0x43 },
 332	{ CCI_REG8(0x3794), 0x7a },
 333	{ CCI_REG8(0x3796), 0xa1 },
 334	{ CCI_REG8(0x37b0), 0x37 },
 335	{ CCI_REG8(0x3e04), 0x0e },
 336	{ IMX334_REG_AGAIN, 0x0050 },
 337	{ IMX334_REG_MASTER_MODE, 0x00 },
 338};
 339
 340/* Sensor mode registers for 640x480@30fps */
 341static const struct cci_reg_sequence mode_640x480_regs[] = {
 342	{ IMX334_REG_HTRIMMING_START,	0x0670 },
 343	{ IMX334_REG_HNUM,		0x0280 },
 344	{ IMX334_REG_AREA3_ST_ADR_1,	0x0748 },
 345	{ IMX334_REG_AREA3_ST_ADR_2,	0x0749 },
 346	{ IMX334_REG_AREA3_WIDTH_1,	0x01e0 },
 347	{ IMX334_REG_AREA3_WIDTH_2,	0x01e0 },
 348	{ IMX334_REG_Y_OUT_SIZE,	0x01e0 },
 349	{ IMX334_REG_UNREAD_ED_ADR,	0x0b30 },
 350};
 351
 352/* Sensor mode registers for 1280x720@30fps */
 353static const struct cci_reg_sequence mode_1280x720_regs[] = {
 354	{ IMX334_REG_HTRIMMING_START,	0x0530 },
 355	{ IMX334_REG_HNUM,		0x0500 },
 356	{ IMX334_REG_AREA3_ST_ADR_1,	0x0384 },
 357	{ IMX334_REG_AREA3_ST_ADR_2,	0x0385 },
 358	{ IMX334_REG_AREA3_WIDTH_1,	0x02d0 },
 359	{ IMX334_REG_AREA3_WIDTH_2,	0x02d0 },
 360	{ IMX334_REG_Y_OUT_SIZE,	0x02d0 },
 361	{ IMX334_REG_UNREAD_ED_ADR,	0x0b30 },
 362};
 363
 364/* Sensor mode registers for 1920x1080@30fps */
 365static const struct cci_reg_sequence mode_1920x1080_regs[] = {
 366	{ IMX334_REG_HTRIMMING_START,	0x03f0 },
 367	{ IMX334_REG_HNUM,		0x0780 },
 368	{ IMX334_REG_AREA3_ST_ADR_1,	0x02cc },
 369	{ IMX334_REG_AREA3_ST_ADR_2,	0x02cd },
 370	{ IMX334_REG_AREA3_WIDTH_1,	0x0438 },
 371	{ IMX334_REG_AREA3_WIDTH_2,	0x0438 },
 372	{ IMX334_REG_Y_OUT_SIZE,	0x0438 },
 373	{ IMX334_REG_UNREAD_ED_ADR,	0x0a18 },
 374};
 375
 376/* Sensor mode registers for 3840x2160@30fps */
 377static const struct cci_reg_sequence mode_3840x2160_regs[] = {
 378	{ IMX334_REG_HMAX,		0x0226 },
 379	{ IMX334_REG_INCKSEL2,		0x02 },
 380	{ IMX334_REG_HTRIMMING_START,	0x003c },
 381	{ IMX334_REG_HNUM,		0x0f00 },
 382	{ IMX334_REG_AREA3_ST_ADR_1,	0x00b0 },
 383	{ IMX334_REG_AREA3_ST_ADR_2,	0x00b1 },
 384	{ IMX334_REG_UNREAD_ED_ADR,	0x1220 },
 385	{ IMX334_REG_AREA3_WIDTH_1,	0x0870 },
 386	{ IMX334_REG_AREA3_WIDTH_2,	0x0870 },
 387	{ IMX334_REG_Y_OUT_SIZE,	0x0870 },
 388	{ IMX334_REG_SYS_MODE,		0x0100 },
 389	{ IMX334_REG_TCLKPOST,		0x00bf },
 390	{ IMX334_REG_TCLKPREPARE,	0x0067 },
 391	{ IMX334_REG_TCLKTRAIL,		0x006f },
 392	{ IMX334_REG_TCLKZERO,		0x1d7 },
 393	{ IMX334_REG_THSPREPARE,	0x006f },
 394	{ IMX334_REG_THSZERO,		0x00cf },
 395	{ IMX334_REG_THSTRAIL,		0x006f },
 396	{ IMX334_REG_THSEXIT,		0x00b7 },
 397	{ IMX334_REG_TPLX,		0x005f },
 398};
 399
 400static const char * const imx334_test_pattern_menu[] = {
 401	"Disabled",
 402	"Vertical Color Bars",
 403	"Horizontal Color Bars",
 404	"Black and Grey Bars",
 405	"Black Color",
 406	"White Color",
 407};
 408
 409static const int imx334_test_pattern_val[] = {
 410	IMX334_TP_DISABLE,
 411	IMX334_TP_COLOR_HBARS,
 412	IMX334_TP_COLOR_VBARS,
 413	IMX334_TP_BLACK_GREY,
 414	IMX334_TP_BLACK,
 415	IMX334_TP_WHITE,
 416};
 417
 418static const struct cci_reg_sequence raw10_framefmt_regs[] = {
 419	{ IMX334_REG_ADBIT,  0x00 },
 420	{ IMX334_REG_MDBIT,  0x00 },
 421	{ IMX334_REG_ADBIT1, 0x01ff },
 422};
 423
 424static const struct cci_reg_sequence raw12_framefmt_regs[] = {
 425	{ IMX334_REG_ADBIT,  0x01 },
 426	{ IMX334_REG_MDBIT,  0x01 },
 427	{ IMX334_REG_ADBIT1, 0x0047 },
 428};
 429
 430static const u32 imx334_mbus_codes[] = {
 431	MEDIA_BUS_FMT_SRGGB12_1X12,
 432	MEDIA_BUS_FMT_SRGGB10_1X10,
 433};
 434
 435/* Supported sensor mode configurations */
 436static const struct imx334_mode supported_modes[] = {
 437	{
 438		.width = 3840,
 439		.height = 2160,
 440		.hblank = 560,
 441		.vblank = 2340,
 442		.vblank_min = 90,
 443		.vblank_max = 132840,
 444		.pclk = 594000000,
 445		.link_freq_idx = 0,
 446		.reg_list = {
 447			.num_of_regs = ARRAY_SIZE(mode_3840x2160_regs),
 448			.regs = mode_3840x2160_regs,
 449		},
 450	}, {
 451		.width = 1920,
 452		.height = 1080,
 453		.hblank = 2480,
 454		.vblank = 1170,
 455		.vblank_min = 45,
 456		.vblank_max = 132840,
 457		.pclk = 297000000,
 458		.link_freq_idx = 1,
 459		.reg_list = {
 460			.num_of_regs = ARRAY_SIZE(mode_1920x1080_regs),
 461			.regs = mode_1920x1080_regs,
 462		},
 463	}, {
 464		.width = 1280,
 465		.height = 720,
 466		.hblank = 2480,
 467		.vblank = 1170,
 468		.vblank_min = 45,
 469		.vblank_max = 132840,
 470		.pclk = 297000000,
 471		.link_freq_idx = 1,
 472		.reg_list = {
 473			.num_of_regs = ARRAY_SIZE(mode_1280x720_regs),
 474			.regs = mode_1280x720_regs,
 475		},
 476	}, {
 477		.width = 640,
 478		.height = 480,
 479		.hblank = 2480,
 480		.vblank = 1170,
 481		.vblank_min = 45,
 482		.vblank_max = 132840,
 483		.pclk = 297000000,
 484		.link_freq_idx = 1,
 485		.reg_list = {
 486			.num_of_regs = ARRAY_SIZE(mode_640x480_regs),
 487			.regs = mode_640x480_regs,
 488		},
 489	},
 490};
 491
 492/**
 493 * to_imx334() - imv334 V4L2 sub-device to imx334 device.
 494 * @subdev: pointer to imx334 V4L2 sub-device
 495 *
 496 * Return: pointer to imx334 device
 497 */
 498static inline struct imx334 *to_imx334(struct v4l2_subdev *subdev)
 499{
 500	return container_of(subdev, struct imx334, sd);
 501}
 502
 503/**
 504 * imx334_update_controls() - Update control ranges based on streaming mode
 505 * @imx334: pointer to imx334 device
 506 * @mode: pointer to imx334_mode sensor mode
 507 *
 508 * Return: 0 if successful, error code otherwise.
 509 */
 510static int imx334_update_controls(struct imx334 *imx334,
 511				  const struct imx334_mode *mode)
 512{
 513	int ret;
 514
 515	ret = __v4l2_ctrl_s_ctrl(imx334->link_freq_ctrl, mode->link_freq_idx);
 516	if (ret)
 517		return ret;
 518
 519	ret = __v4l2_ctrl_modify_range(imx334->pclk_ctrl, mode->pclk,
 520				       mode->pclk, 1, mode->pclk);
 521	if (ret)
 522		return ret;
 523
 524	ret = __v4l2_ctrl_modify_range(imx334->hblank_ctrl, mode->hblank,
 525				       mode->hblank, 1, mode->hblank);
 526	if (ret)
 527		return ret;
 528
 529	ret =  __v4l2_ctrl_modify_range(imx334->vblank_ctrl, mode->vblank_min,
 530					mode->vblank_max, 1, mode->vblank);
 531	if (ret)
 532		return ret;
 533
 534	return __v4l2_ctrl_s_ctrl(imx334->vblank_ctrl, mode->vblank);
 535}
 536
 537/**
 538 * imx334_update_exp_gain() - Set updated exposure and gain
 539 * @imx334: pointer to imx334 device
 540 * @exposure: updated exposure value
 541 * @gain: updated analog gain value
 542 *
 543 * Return: 0 if successful, error code otherwise.
 544 */
 545static int imx334_update_exp_gain(struct imx334 *imx334, u32 exposure, u32 gain)
 546{
 547	u32 lpfr, shutter;
 548	int ret_hold;
 549	int ret = 0;
 550
 551	lpfr = imx334->vblank + imx334->cur_mode->height;
 552	shutter = lpfr - exposure;
 553
 554	dev_dbg(imx334->dev, "Set long exp %u analog gain %u sh0 %u lpfr %u\n",
 555		exposure, gain, shutter, lpfr);
 556
 557	cci_write(imx334->cci, IMX334_REG_HOLD, 1, &ret);
 558	cci_write(imx334->cci, IMX334_REG_VMAX, lpfr, &ret);
 559	cci_write(imx334->cci, IMX334_REG_SHUTTER, shutter, &ret);
 560	cci_write(imx334->cci, IMX334_REG_AGAIN, gain, &ret);
 561
 562	ret_hold = cci_write(imx334->cci, IMX334_REG_HOLD, 0, NULL);
 563	if (ret_hold)
 564		return ret_hold;
 565
 566	return ret;
 567}
 568
 569/**
 570 * imx334_set_ctrl() - Set subdevice control
 571 * @ctrl: pointer to v4l2_ctrl structure
 572 *
 573 * Supported controls:
 574 * - V4L2_CID_VBLANK
 575 * - cluster controls:
 576 *   - V4L2_CID_ANALOGUE_GAIN
 577 *   - V4L2_CID_EXPOSURE
 578 *
 579 * Return: 0 if successful, error code otherwise.
 580 */
 581static int imx334_set_ctrl(struct v4l2_ctrl *ctrl)
 582{
 583	struct imx334 *imx334 =
 584		container_of(ctrl->handler, struct imx334, ctrl_handler);
 585	u32 analog_gain;
 586	u32 exposure;
 587	int ret;
 588
 589	if (ctrl->id == V4L2_CID_VBLANK) {
 590		imx334->vblank = imx334->vblank_ctrl->val;
 591
 592		dev_dbg(imx334->dev, "Received vblank %u, new lpfr %u\n",
 593			imx334->vblank,
 594			imx334->vblank + imx334->cur_mode->height);
 595
 596		ret = __v4l2_ctrl_modify_range(imx334->exp_ctrl,
 597					       IMX334_EXPOSURE_MIN,
 598					       imx334->vblank +
 599					       imx334->cur_mode->height -
 600					       IMX334_EXPOSURE_OFFSET,
 601					       1, IMX334_EXPOSURE_DEFAULT);
 602		if (ret)
 603			return ret;
 604	}
 605
 606	/* Set controls only if sensor is in power on state */
 607	if (!pm_runtime_get_if_in_use(imx334->dev))
 608		return 0;
 609
 610	switch (ctrl->id) {
 611	case V4L2_CID_VBLANK:
 612		exposure = imx334->exp_ctrl->val;
 613		analog_gain = imx334->again_ctrl->val;
 614
 615		ret = imx334_update_exp_gain(imx334, exposure, analog_gain);
 616
 617		break;
 618	case V4L2_CID_EXPOSURE:
 619
 620		exposure = ctrl->val;
 621		analog_gain = imx334->again_ctrl->val;
 622
 623		dev_dbg(imx334->dev, "Received exp %u analog gain %u\n",
 624			exposure, analog_gain);
 625
 626		ret = imx334_update_exp_gain(imx334, exposure, analog_gain);
 627
 628		break;
 629	case V4L2_CID_PIXEL_RATE:
 630	case V4L2_CID_LINK_FREQ:
 631	case V4L2_CID_HBLANK:
 632		ret = 0;
 633		break;
 634	case V4L2_CID_TEST_PATTERN:
 635		if (ctrl->val) {
 636			cci_write(imx334->cci, IMX334_TP_CLK_EN,
 637				  IMX334_TP_CLK_EN_VAL, NULL);
 638			cci_write(imx334->cci, IMX334_DIG_CLP_MODE, 0x0, NULL);
 639			cci_write(imx334->cci, IMX334_TPG_COLORW,
 640				  IMX334_TPG_COLORW_120P, NULL);
 641			cci_write(imx334->cci, IMX334_REG_TP,
 642				  imx334_test_pattern_val[ctrl->val], NULL);
 643			cci_write(imx334->cci, IMX334_TPG_EN_DOUT,
 644				  IMX334_TP_ENABLE, NULL);
 645		} else {
 646			cci_write(imx334->cci, IMX334_DIG_CLP_MODE, 0x1, NULL);
 647			cci_write(imx334->cci, IMX334_TP_CLK_EN,
 648				  IMX334_TP_CLK_DIS_VAL, NULL);
 649			cci_write(imx334->cci, IMX334_TPG_EN_DOUT,
 650				  IMX334_TP_DISABLE, NULL);
 651		}
 652		ret = 0;
 653		break;
 654	default:
 655		dev_err(imx334->dev, "Invalid control %d\n", ctrl->id);
 656		ret = -EINVAL;
 657	}
 658
 659	pm_runtime_put(imx334->dev);
 660
 661	return ret;
 662}
 663
 664/* V4l2 subdevice control ops*/
 665static const struct v4l2_ctrl_ops imx334_ctrl_ops = {
 666	.s_ctrl = imx334_set_ctrl,
 667};
 668
 669static int imx334_get_format_code(struct imx334 *imx334, u32 code)
 670{
 671	unsigned int i;
 672
 673	for (i = 0; i < ARRAY_SIZE(imx334_mbus_codes); i++) {
 674		if (imx334_mbus_codes[i] == code)
 675			return imx334_mbus_codes[i];
 676	}
 677
 678	return imx334_mbus_codes[0];
 679}
 680
 681/**
 682 * imx334_enum_mbus_code() - Enumerate V4L2 sub-device mbus codes
 683 * @sd: pointer to imx334 V4L2 sub-device structure
 684 * @sd_state: V4L2 sub-device state
 685 * @code: V4L2 sub-device code enumeration need to be filled
 686 *
 687 * Return: 0 if successful, error code otherwise.
 688 */
 689static int imx334_enum_mbus_code(struct v4l2_subdev *sd,
 690				 struct v4l2_subdev_state *sd_state,
 691				 struct v4l2_subdev_mbus_code_enum *code)
 692{
 693	if (code->index >= ARRAY_SIZE(imx334_mbus_codes))
 694		return -EINVAL;
 695
 696	code->code = imx334_mbus_codes[code->index];
 697
 698	return 0;
 699}
 700
 701/**
 702 * imx334_enum_frame_size() - Enumerate V4L2 sub-device frame sizes
 703 * @sd: pointer to imx334 V4L2 sub-device structure
 704 * @sd_state: V4L2 sub-device state
 705 * @fsize: V4L2 sub-device size enumeration need to be filled
 706 *
 707 * Return: 0 if successful, error code otherwise.
 708 */
 709static int imx334_enum_frame_size(struct v4l2_subdev *sd,
 710				  struct v4l2_subdev_state *sd_state,
 711				  struct v4l2_subdev_frame_size_enum *fsize)
 712{
 713	struct imx334 *imx334 = to_imx334(sd);
 714	u32 code;
 715
 716	if (fsize->index >= ARRAY_SIZE(supported_modes))
 717		return -EINVAL;
 718
 719	code = imx334_get_format_code(imx334, fsize->code);
 720
 721	if (fsize->code != code)
 722		return -EINVAL;
 723
 724	fsize->min_width = supported_modes[fsize->index].width;
 725	fsize->max_width = fsize->min_width;
 726	fsize->min_height = supported_modes[fsize->index].height;
 727	fsize->max_height = fsize->min_height;
 728
 729	return 0;
 730}
 731
 732/**
 733 * imx334_fill_pad_format() - Fill subdevice pad format
 734 *                            from selected sensor mode
 735 * @imx334: pointer to imx334 device
 736 * @mode: pointer to imx334_mode sensor mode
 737 * @fmt: V4L2 sub-device format need to be filled
 738 */
 739static void imx334_fill_pad_format(struct imx334 *imx334,
 740				   const struct imx334_mode *mode,
 741				   struct v4l2_subdev_format *fmt)
 742{
 743	fmt->format.width = mode->width;
 744	fmt->format.height = mode->height;
 745	fmt->format.field = V4L2_FIELD_NONE;
 746	fmt->format.colorspace = V4L2_COLORSPACE_RAW;
 747	fmt->format.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
 748	fmt->format.quantization = V4L2_QUANTIZATION_DEFAULT;
 749	fmt->format.xfer_func = V4L2_XFER_FUNC_NONE;
 750}
 751
 752/**
 753 * imx334_get_pad_format() - Get subdevice pad format
 754 * @sd: pointer to imx334 V4L2 sub-device structure
 755 * @sd_state: V4L2 sub-device state
 756 * @fmt: V4L2 sub-device format need to be set
 757 *
 758 * Return: 0 if successful, error code otherwise.
 759 */
 760static int imx334_get_pad_format(struct v4l2_subdev *sd,
 761				 struct v4l2_subdev_state *sd_state,
 762				 struct v4l2_subdev_format *fmt)
 763{
 764	struct imx334 *imx334 = to_imx334(sd);
 765
 766	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
 767		struct v4l2_mbus_framefmt *framefmt;
 768
 769		framefmt = v4l2_subdev_state_get_format(sd_state, fmt->pad);
 770		fmt->format = *framefmt;
 771	} else {
 772		fmt->format.code = imx334->cur_code;
 773		imx334_fill_pad_format(imx334, imx334->cur_mode, fmt);
 774	}
 775
 776	return 0;
 777}
 778
 779/**
 780 * imx334_set_pad_format() - Set subdevice pad format
 781 * @sd: pointer to imx334 V4L2 sub-device structure
 782 * @sd_state: V4L2 sub-device state
 783 * @fmt: V4L2 sub-device format need to be set
 784 *
 785 * Return: 0 if successful, error code otherwise.
 786 */
 787static int imx334_set_pad_format(struct v4l2_subdev *sd,
 788				 struct v4l2_subdev_state *sd_state,
 789				 struct v4l2_subdev_format *fmt)
 790{
 791	struct imx334 *imx334 = to_imx334(sd);
 792	const struct imx334_mode *mode;
 793	int ret = 0;
 794
 795	mode = v4l2_find_nearest_size(supported_modes,
 796				      ARRAY_SIZE(supported_modes),
 797				      width, height,
 798				      fmt->format.width, fmt->format.height);
 799
 800	imx334_fill_pad_format(imx334, mode, fmt);
 801	fmt->format.code = imx334_get_format_code(imx334, fmt->format.code);
 802
 803	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
 804		struct v4l2_mbus_framefmt *framefmt;
 805
 806		framefmt = v4l2_subdev_state_get_format(sd_state, fmt->pad);
 807		*framefmt = fmt->format;
 808	} else if (imx334->cur_mode != mode || imx334->cur_code != fmt->format.code) {
 809		imx334->cur_code = fmt->format.code;
 810		ret = imx334_update_controls(imx334, mode);
 811		if (!ret)
 812			imx334->cur_mode = mode;
 813	}
 814
 815	return ret;
 816}
 817
 818/**
 819 * imx334_init_state() - Initialize sub-device state
 820 * @sd: pointer to imx334 V4L2 sub-device structure
 821 * @sd_state: V4L2 sub-device state
 822 *
 823 * Return: 0 if successful, error code otherwise.
 824 */
 825static int imx334_init_state(struct v4l2_subdev *sd,
 826			     struct v4l2_subdev_state *sd_state)
 827{
 828	struct imx334 *imx334 = to_imx334(sd);
 829	struct v4l2_subdev_format fmt = { 0 };
 830
 831	fmt.which = sd_state ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
 832
 833	imx334_fill_pad_format(imx334, imx334->cur_mode, &fmt);
 834
 835	__v4l2_ctrl_modify_range(imx334->link_freq_ctrl, 0,
 836				 __fls(imx334->link_freq_bitmap),
 837				 ~(imx334->link_freq_bitmap),
 838				 __ffs(imx334->link_freq_bitmap));
 839
 840	return imx334_set_pad_format(sd, sd_state, &fmt);
 841}
 842
 843static int imx334_set_framefmt(struct imx334 *imx334)
 844{
 845	switch (imx334->cur_code) {
 846	case MEDIA_BUS_FMT_SRGGB10_1X10:
 847		return cci_multi_reg_write(imx334->cci, raw10_framefmt_regs,
 848					ARRAY_SIZE(raw10_framefmt_regs), NULL);
 849
 850
 851	case MEDIA_BUS_FMT_SRGGB12_1X12:
 852		return cci_multi_reg_write(imx334->cci, raw12_framefmt_regs,
 853					ARRAY_SIZE(raw12_framefmt_regs), NULL);
 854	}
 855
 856	return -EINVAL;
 857}
 858
 859/**
 860 * imx334_enable_streams() - Enable specified streams for the sensor
 861 * @sd: pointer to the V4L2 subdevice
 862 * @state: pointer to the subdevice state
 863 * @pad: pad number for which streams are enabled
 864 * @streams_mask: bitmask specifying the streams to enable
 865 *
 866 * Return: 0 if successful, error code otherwise.
 867 */
 868static int imx334_enable_streams(struct v4l2_subdev *sd,
 869				 struct v4l2_subdev_state *state, u32 pad,
 870				 u64 streams_mask)
 871{
 872	struct imx334 *imx334 = to_imx334(sd);
 873	const struct imx334_reg_list *reg_list;
 874	int ret;
 875
 876	ret = pm_runtime_resume_and_get(imx334->dev);
 877	if (ret < 0)
 878		return ret;
 879
 880	ret = cci_multi_reg_write(imx334->cci, common_mode_regs,
 881				  ARRAY_SIZE(common_mode_regs), NULL);
 882	if (ret) {
 883		dev_err(imx334->dev, "fail to write common registers\n");
 884		goto err_rpm_put;
 885	}
 886
 887	/* Write sensor mode registers */
 888	reg_list = &imx334->cur_mode->reg_list;
 889	ret = cci_multi_reg_write(imx334->cci, reg_list->regs,
 890				  reg_list->num_of_regs, NULL);
 891	if (ret) {
 892		dev_err(imx334->dev, "fail to write initial registers\n");
 893		goto err_rpm_put;
 894	}
 895
 896	ret = cci_write(imx334->cci, IMX334_REG_LANEMODE,
 897			IMX334_CSI_4_LANE_MODE, NULL);
 898	if (ret) {
 899		dev_err(imx334->dev, "failed to configure lanes\n");
 900		goto err_rpm_put;
 901	}
 902
 903	ret = imx334_set_framefmt(imx334);
 904	if (ret) {
 905		dev_err(imx334->dev, "%s failed to set frame format: %d\n",
 906			__func__, ret);
 907		goto err_rpm_put;
 908	}
 909
 910	/* Setup handler will write actual exposure and gain */
 911	ret =  __v4l2_ctrl_handler_setup(imx334->sd.ctrl_handler);
 912	if (ret) {
 913		dev_err(imx334->dev, "fail to setup handler\n");
 914		goto err_rpm_put;
 915	}
 916
 917	/* Start streaming */
 918	ret = cci_write(imx334->cci, IMX334_REG_MODE_SELECT,
 919			IMX334_MODE_STREAMING, NULL);
 920	if (ret) {
 921		dev_err(imx334->dev, "fail to start streaming\n");
 922		goto err_rpm_put;
 923	}
 924
 925	return 0;
 926
 927err_rpm_put:
 928	pm_runtime_put(imx334->dev);
 929	return ret;
 930}
 931
 932/**
 933 * imx334_disable_streams() - Enable specified streams for the sensor
 934 * @sd: pointer to the V4L2 subdevice
 935 * @state: pointer to the subdevice state
 936 * @pad: pad number for which streams are disabled
 937 * @streams_mask: bitmask specifying the streams to disable
 938 *
 939 * Return: 0 if successful, error code otherwise.
 940 */
 941static int imx334_disable_streams(struct v4l2_subdev *sd,
 942				  struct v4l2_subdev_state *state, u32 pad,
 943				  u64 streams_mask)
 944{
 945	struct imx334 *imx334 = to_imx334(sd);
 946	int ret;
 947
 948	ret = cci_write(imx334->cci, IMX334_REG_MODE_SELECT,
 949			IMX334_MODE_STANDBY, NULL);
 950	if (ret)
 951		dev_err(imx334->dev, "%s failed to stop stream\n", __func__);
 952
 953	pm_runtime_put(imx334->dev);
 954
 955	return ret;
 956}
 957
 958/**
 959 * imx334_detect() - Detect imx334 sensor
 960 * @imx334: pointer to imx334 device
 961 *
 962 * Return: 0 if successful, -EIO if sensor id does not match
 963 */
 964static int imx334_detect(struct imx334 *imx334)
 965{
 966	int ret;
 967	u64 val;
 968
 969	ret = cci_read(imx334->cci, IMX334_REG_ID, &val, NULL);
 970	if (ret)
 971		return ret;
 972
 973	if (val != IMX334_ID) {
 974		dev_err(imx334->dev, "chip id mismatch: %x!=%llx\n",
 975			IMX334_ID, val);
 976		return -ENXIO;
 977	}
 978
 979	return 0;
 980}
 981
 982/**
 983 * imx334_parse_hw_config() - Parse HW configuration and check if supported
 984 * @imx334: pointer to imx334 device
 985 *
 986 * Return: 0 if successful, error code otherwise.
 987 */
 988static int imx334_parse_hw_config(struct imx334 *imx334)
 989{
 990	struct fwnode_handle *fwnode = dev_fwnode(imx334->dev);
 991	struct v4l2_fwnode_endpoint bus_cfg = {
 992		.bus_type = V4L2_MBUS_CSI2_DPHY
 993	};
 994	struct fwnode_handle *ep;
 995	unsigned long rate;
 996	int ret;
 997
 998	if (!fwnode)
 999		return -ENXIO;
1000
1001	/* Request optional reset pin */
1002	imx334->reset_gpio = devm_gpiod_get_optional(imx334->dev, "reset",
1003						     GPIOD_OUT_LOW);
1004	if (IS_ERR(imx334->reset_gpio))
1005		return dev_err_probe(imx334->dev, PTR_ERR(imx334->reset_gpio),
1006				     "failed to get reset gpio\n");
1007
1008	/* Get sensor input clock */
1009	imx334->inclk = devm_v4l2_sensor_clk_get(imx334->dev, NULL);
1010	if (IS_ERR(imx334->inclk))
1011		return dev_err_probe(imx334->dev, PTR_ERR(imx334->inclk),
1012					 "could not get inclk\n");
1013
1014	rate = clk_get_rate(imx334->inclk);
1015	if (rate != IMX334_INCLK_RATE)
1016		return dev_err_probe(imx334->dev, -EINVAL,
1017					 "inclk frequency mismatch\n");
1018
1019	ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
1020	if (!ep)
1021		return -ENXIO;
1022
1023	ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
1024	fwnode_handle_put(ep);
1025	if (ret)
1026		return ret;
1027
1028	if (bus_cfg.bus.mipi_csi2.num_data_lanes != IMX334_NUM_DATA_LANES) {
1029		dev_err(imx334->dev,
1030			"number of CSI2 data lanes %d is not supported\n",
1031			bus_cfg.bus.mipi_csi2.num_data_lanes);
1032		ret = -EINVAL;
1033		goto done_endpoint_free;
1034	}
1035
1036	ret = v4l2_link_freq_to_bitmap(imx334->dev, bus_cfg.link_frequencies,
1037				       bus_cfg.nr_of_link_frequencies,
1038				       link_freq, ARRAY_SIZE(link_freq),
1039				       &imx334->link_freq_bitmap);
1040
1041done_endpoint_free:
1042	v4l2_fwnode_endpoint_free(&bus_cfg);
1043
1044	return ret;
1045}
1046
1047/* V4l2 subdevice ops */
1048static const struct v4l2_subdev_video_ops imx334_video_ops = {
1049	.s_stream = v4l2_subdev_s_stream_helper,
1050};
1051
1052static const struct v4l2_subdev_pad_ops imx334_pad_ops = {
1053	.enum_mbus_code = imx334_enum_mbus_code,
1054	.enum_frame_size = imx334_enum_frame_size,
1055	.get_fmt = imx334_get_pad_format,
1056	.set_fmt = imx334_set_pad_format,
1057	.enable_streams = imx334_enable_streams,
1058	.disable_streams = imx334_disable_streams,
1059};
1060
1061static const struct v4l2_subdev_ops imx334_subdev_ops = {
1062	.video = &imx334_video_ops,
1063	.pad = &imx334_pad_ops,
1064};
1065
1066static const struct v4l2_subdev_internal_ops imx334_internal_ops = {
1067	.init_state = imx334_init_state,
1068};
1069
1070/**
1071 * imx334_power_on() - Sensor power on sequence
1072 * @dev: pointer to i2c device
1073 *
1074 * Return: 0 if successful, error code otherwise.
1075 */
1076static int imx334_power_on(struct device *dev)
1077{
1078	struct v4l2_subdev *sd = dev_get_drvdata(dev);
1079	struct imx334 *imx334 = to_imx334(sd);
1080	int ret;
1081
1082	/*
1083	 * Note: Misinterpretation of reset assertion - do not re-use this code.
1084	 * XCLR pin is using incorrect (for reset signal) logical level.
1085	 */
1086	gpiod_set_value_cansleep(imx334->reset_gpio, 1);
1087
1088	ret = clk_prepare_enable(imx334->inclk);
1089	if (ret) {
1090		dev_err(imx334->dev, "fail to enable inclk\n");
1091		goto error_reset;
1092	}
1093
1094	usleep_range(18000, 20000);
1095
1096	return 0;
1097
1098error_reset:
1099	gpiod_set_value_cansleep(imx334->reset_gpio, 0);
1100
1101	return ret;
1102}
1103
1104/**
1105 * imx334_power_off() - Sensor power off sequence
1106 * @dev: pointer to i2c device
1107 *
1108 * Return: 0 if successful, error code otherwise.
1109 */
1110static int imx334_power_off(struct device *dev)
1111{
1112	struct v4l2_subdev *sd = dev_get_drvdata(dev);
1113	struct imx334 *imx334 = to_imx334(sd);
1114
1115	gpiod_set_value_cansleep(imx334->reset_gpio, 0);
1116
1117	clk_disable_unprepare(imx334->inclk);
1118
1119	return 0;
1120}
1121
1122/**
1123 * imx334_init_controls() - Initialize sensor subdevice controls
1124 * @imx334: pointer to imx334 device
1125 *
1126 * Return: 0 if successful, error code otherwise.
1127 */
1128static int imx334_init_controls(struct imx334 *imx334)
1129{
1130	struct v4l2_ctrl_handler *ctrl_hdlr = &imx334->ctrl_handler;
1131	const struct imx334_mode *mode = imx334->cur_mode;
1132	u32 lpfr;
1133	int ret;
1134
1135	ret = v4l2_ctrl_handler_init(ctrl_hdlr, 7);
1136	if (ret)
1137		return ret;
1138
1139	/* Initialize exposure and gain */
1140	lpfr = mode->vblank + mode->height;
1141	imx334->exp_ctrl = v4l2_ctrl_new_std(ctrl_hdlr,
1142					     &imx334_ctrl_ops,
1143					     V4L2_CID_EXPOSURE,
1144					     IMX334_EXPOSURE_MIN,
1145					     lpfr - IMX334_EXPOSURE_OFFSET,
1146					     IMX334_EXPOSURE_STEP,
1147					     IMX334_EXPOSURE_DEFAULT);
1148
1149	imx334->again_ctrl = v4l2_ctrl_new_std(ctrl_hdlr,
1150					       &imx334_ctrl_ops,
1151					       V4L2_CID_ANALOGUE_GAIN,
1152					       IMX334_AGAIN_MIN,
1153					       IMX334_AGAIN_MAX,
1154					       IMX334_AGAIN_STEP,
1155					       IMX334_AGAIN_DEFAULT);
1156
1157	v4l2_ctrl_cluster(2, &imx334->exp_ctrl);
1158
1159	imx334->vblank_ctrl = v4l2_ctrl_new_std(ctrl_hdlr,
1160						&imx334_ctrl_ops,
1161						V4L2_CID_VBLANK,
1162						mode->vblank_min,
1163						mode->vblank_max,
1164						1, mode->vblank);
1165
1166	/* Read only controls */
1167	imx334->pclk_ctrl = v4l2_ctrl_new_std(ctrl_hdlr,
1168					      &imx334_ctrl_ops,
1169					      V4L2_CID_PIXEL_RATE,
1170					      mode->pclk, mode->pclk,
1171					      1, mode->pclk);
1172
1173	imx334->link_freq_ctrl = v4l2_ctrl_new_int_menu(ctrl_hdlr,
1174							&imx334_ctrl_ops,
1175							V4L2_CID_LINK_FREQ,
1176							__fls(imx334->link_freq_bitmap),
1177							__ffs(imx334->link_freq_bitmap),
1178							link_freq);
1179
1180	if (imx334->link_freq_ctrl)
1181		imx334->link_freq_ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1182
1183	imx334->hblank_ctrl = v4l2_ctrl_new_std(ctrl_hdlr,
1184						&imx334_ctrl_ops,
1185						V4L2_CID_HBLANK,
1186						IMX334_REG_MIN,
1187						IMX334_REG_MAX,
1188						1, mode->hblank);
1189	if (imx334->hblank_ctrl)
1190		imx334->hblank_ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1191
1192	v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx334_ctrl_ops,
1193				     V4L2_CID_TEST_PATTERN,
1194				     ARRAY_SIZE(imx334_test_pattern_menu) - 1,
1195				     0, 0, imx334_test_pattern_menu);
1196
1197	if (ctrl_hdlr->error) {
1198		dev_err(imx334->dev, "control init failed: %d",
1199			ctrl_hdlr->error);
1200		v4l2_ctrl_handler_free(ctrl_hdlr);
1201		return ctrl_hdlr->error;
1202	}
1203
1204	imx334->sd.ctrl_handler = ctrl_hdlr;
1205
1206	return 0;
1207}
1208
1209/**
1210 * imx334_probe() - I2C client device binding
1211 * @client: pointer to i2c client device
1212 *
1213 * Return: 0 if successful, error code otherwise.
1214 */
1215static int imx334_probe(struct i2c_client *client)
1216{
1217	struct imx334 *imx334;
1218	int ret;
1219
1220	imx334 = devm_kzalloc(&client->dev, sizeof(*imx334), GFP_KERNEL);
1221	if (!imx334)
1222		return -ENOMEM;
1223
1224	imx334->dev = &client->dev;
1225	imx334->cci = devm_cci_regmap_init_i2c(client, 16);
1226	if (IS_ERR(imx334->cci)) {
1227		dev_err(imx334->dev, "Unable to initialize I2C\n");
1228		return -ENODEV;
1229	}
1230
1231	/* Initialize subdev */
1232	v4l2_i2c_subdev_init(&imx334->sd, client, &imx334_subdev_ops);
1233	imx334->sd.internal_ops = &imx334_internal_ops;
1234
1235	ret = imx334_parse_hw_config(imx334);
1236	if (ret)
1237		return dev_err_probe(imx334->dev, ret,
1238					"HW configuration is not supported\n");
1239
1240	ret = imx334_power_on(imx334->dev);
1241	if (ret) {
1242		dev_err_probe(imx334->dev, ret, "failed to power-on the sensor\n");
1243		return ret;
1244	}
1245
1246	/* Check module identity */
1247	ret = imx334_detect(imx334);
1248	if (ret) {
1249		dev_err(imx334->dev, "failed to find sensor: %d\n", ret);
1250		goto error_power_off;
1251	}
1252
1253	/* Set default mode to max resolution */
1254	imx334->cur_mode = &supported_modes[__ffs(imx334->link_freq_bitmap)];
1255	imx334->cur_code = imx334_mbus_codes[0];
1256	imx334->vblank = imx334->cur_mode->vblank;
1257
1258	ret = imx334_init_controls(imx334);
1259	if (ret) {
1260		dev_err(imx334->dev, "failed to init controls: %d\n", ret);
1261		goto error_power_off;
1262	}
1263
1264	/* Initialize subdev */
1265	imx334->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1266	imx334->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1267
1268	/* Initialize source pad */
1269	imx334->pad.flags = MEDIA_PAD_FL_SOURCE;
1270	ret = media_entity_pads_init(&imx334->sd.entity, 1, &imx334->pad);
1271	if (ret) {
1272		dev_err(imx334->dev, "failed to init entity pads: %d\n", ret);
1273		goto error_handler_free;
1274	}
1275
1276	imx334->sd.state_lock = imx334->ctrl_handler.lock;
1277	ret = v4l2_subdev_init_finalize(&imx334->sd);
1278	if (ret < 0) {
1279		dev_err(imx334->dev, "subdev init error: %d\n", ret);
1280		goto error_media_entity;
1281	}
1282
1283	pm_runtime_set_active(imx334->dev);
1284	pm_runtime_enable(imx334->dev);
1285
1286	ret = v4l2_async_register_subdev_sensor(&imx334->sd);
1287	if (ret < 0) {
1288		dev_err(imx334->dev,
1289			"failed to register async subdev: %d\n", ret);
1290		goto error_subdev_cleanup;
1291	}
1292
1293	pm_runtime_idle(imx334->dev);
1294
1295	return 0;
1296
1297error_subdev_cleanup:
1298	v4l2_subdev_cleanup(&imx334->sd);
1299	pm_runtime_disable(imx334->dev);
1300	pm_runtime_set_suspended(imx334->dev);
1301
1302error_media_entity:
1303	media_entity_cleanup(&imx334->sd.entity);
1304
1305error_handler_free:
1306	v4l2_ctrl_handler_free(imx334->sd.ctrl_handler);
1307
1308error_power_off:
1309	imx334_power_off(imx334->dev);
1310
1311	return ret;
1312}
1313
1314/**
1315 * imx334_remove() - I2C client device unbinding
1316 * @client: pointer to I2C client device
1317 *
1318 * Return: 0 if successful, error code otherwise.
1319 */
1320static void imx334_remove(struct i2c_client *client)
1321{
1322	struct v4l2_subdev *sd = i2c_get_clientdata(client);
1323
1324	v4l2_async_unregister_subdev(sd);
1325	v4l2_subdev_cleanup(sd);
1326	media_entity_cleanup(&sd->entity);
1327	v4l2_ctrl_handler_free(sd->ctrl_handler);
1328
1329	pm_runtime_disable(&client->dev);
1330	if (!pm_runtime_status_suspended(&client->dev)) {
1331		imx334_power_off(&client->dev);
1332		pm_runtime_set_suspended(&client->dev);
1333	}
1334}
1335
1336static const struct dev_pm_ops imx334_pm_ops = {
1337	SET_RUNTIME_PM_OPS(imx334_power_off, imx334_power_on, NULL)
1338};
1339
1340static const struct of_device_id imx334_of_match[] = {
1341	{ .compatible = "sony,imx334" },
1342	{ }
1343};
1344
1345MODULE_DEVICE_TABLE(of, imx334_of_match);
1346
1347static struct i2c_driver imx334_driver = {
1348	.probe = imx334_probe,
1349	.remove = imx334_remove,
1350	.driver = {
1351		.name = "imx334",
1352		.pm = &imx334_pm_ops,
1353		.of_match_table = imx334_of_match,
1354	},
1355};
1356
1357module_i2c_driver(imx334_driver);
1358
1359MODULE_DESCRIPTION("Sony imx334 sensor driver");
1360MODULE_LICENSE("GPL");