gc0310.c

  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Support for GalaxyCore GC0310 VGA camera sensor.
  4 *
  5 * Copyright (c) 2013 Intel Corporation. All Rights Reserved.
  6 * Copyright (c) 2023-2025 Hans de Goede <hansg@kernel.org>
  7 */
  8
  9#include <linux/delay.h>
 10#include <linux/errno.h>
 11#include <linux/gpio/consumer.h>
 12#include <linux/i2c.h>
 13#include <linux/kernel.h>
 14#include <linux/module.h>
 15#include <linux/pm_runtime.h>
 16#include <linux/regmap.h>
 17#include <linux/string.h>
 18#include <linux/types.h>
 19
 20#include <media/v4l2-cci.h>
 21#include <media/v4l2-ctrls.h>
 22#include <media/v4l2-device.h>
 23#include <media/v4l2-fwnode.h>
 24
 25#define GC0310_NATIVE_WIDTH			656
 26#define GC0310_NATIVE_HEIGHT			496
 27
 28/*
 29 * The actual PLL output rate is unknown, the datasheet
 30 * says that the formula for the frame-time in pixels is:
 31 * rowtime = win-width + hblank + sh-delay + 4
 32 * frametime = rowtime * (win-height + vblank)
 33 * Filling this in and multiplying by 30 fps gives:
 34 * pixelrate = (660 + 178 + 42 + 4) * (498 + 27) * 30 = 13923000
 35 */
 36#define GC0310_PIXELRATE			13923000
 37/* single lane, bus-format is 8 bpp, CSI-2 is double data rate */
 38#define GC0310_LINK_FREQ			(GC0310_PIXELRATE * 8 / 2)
 39#define GC0310_MCLK_FREQ			19200000
 40#define GC0310_FPS				30
 41#define GC0310_SKIP_FRAMES			3
 42
 43#define GC0310_ID				0xa310
 44
 45#define GC0310_RESET_RELATED_REG		CCI_REG8(0xfe)
 46#define GC0310_REGISTER_PAGE_0			0x0
 47#define GC0310_REGISTER_PAGE_3			0x3
 48
 49/*
 50 * GC0310 System control registers
 51 */
 52#define GC0310_SW_STREAM_REG			CCI_REG8(0x10)
 53
 54#define GC0310_START_STREAMING			0x94 /* 8-bit enable */
 55#define GC0310_STOP_STREAMING			0x0 /* 8-bit disable */
 56
 57#define GC0310_SC_CMMN_CHIP_ID_REG		CCI_REG16(0xf0)
 58
 59#define GC0310_AEC_PK_EXPO_REG			CCI_REG16(0x03)
 60#define GC0310_AGC_ADJ_REG			CCI_REG8(0x48)
 61#define GC0310_DGC_ADJ_REG			CCI_REG8(0x71)
 62
 63#define GC0310_H_CROP_START_REG			CCI_REG16(0x09)
 64#define GC0310_V_CROP_START_REG			CCI_REG16(0x0b)
 65#define GC0310_H_OUTSIZE_REG			CCI_REG16(0x0f)
 66#define GC0310_V_OUTSIZE_REG			CCI_REG16(0x0d)
 67
 68#define GC0310_H_BLANKING_REG			CCI_REG16(0x05)
 69/* Hblank-register + sh-delay + H-crop + 4 (from hw) */
 70#define GC0310_H_BLANK_DEFAULT			(178 + 42 + 4 + 4)
 71
 72#define GC0310_V_BLANKING_REG			CCI_REG16(0x07)
 73/* Vblank needs an offset compensate for the small V-crop done */
 74#define GC0310_V_BLANK_OFFSET			2
 75/* Vsync start time + 1 row vsync + vsync end time + offset */
 76#define GC0310_V_BLANK_MIN			(9 + 1 + 4 + GC0310_V_BLANK_OFFSET)
 77#define GC0310_V_BLANK_DEFAULT			(27 + GC0310_V_BLANK_OFFSET)
 78#define GC0310_V_BLANK_MAX			(4095 - GC0310_NATIVE_HEIGHT)
 79
 80#define GC0310_SH_DELAY_REG			CCI_REG8(0x11)
 81#define GC0310_VS_START_TIME_REG		CCI_REG8(0x12)
 82#define GC0310_VS_END_TIME_REG			CCI_REG8(0x13)
 83
 84#define to_gc0310_sensor(x) container_of(x, struct gc0310_device, sd)
 85
 86struct gc0310_device {
 87	struct v4l2_subdev sd;
 88	struct media_pad pad;
 89
 90	struct regmap *regmap;
 91	struct gpio_desc *reset;
 92	struct gpio_desc *powerdown;
 93
 94	struct gc0310_ctrls {
 95		struct v4l2_ctrl_handler handler;
 96		struct v4l2_ctrl *exposure;
 97		struct v4l2_ctrl *gain;
 98		struct v4l2_ctrl *link_freq;
 99		struct v4l2_ctrl *pixel_rate;
100		struct v4l2_ctrl *vblank;
101		struct v4l2_ctrl *hblank;
102	} ctrls;
103};
104
105struct gc0310_reg {
106	u8 reg;
107	u8 val;
108};
109
110static const struct reg_sequence gc0310_reset_register[] = {
111	/* System registers */
112	{ 0xfe, 0xf0 },
113	{ 0xfe, 0xf0 },
114	{ 0xfe, 0x00 },
115
116	{ 0xfc, 0x0e }, /* 4e */
117	{ 0xfc, 0x0e }, /* 16//4e // [0]apwd [6]regf_clk_gate */
118	{ 0xf2, 0x80 }, /* sync output */
119	{ 0xf3, 0x00 }, /* 1f//01 data output */
120	{ 0xf7, 0x33 }, /* f9 */
121	{ 0xf8, 0x05 }, /* 00 */
122	{ 0xf9, 0x0e }, /* 0x8e //0f */
123	{ 0xfa, 0x11 },
124
125	/* MIPI */
126	{ 0xfe, 0x03 },
127	{ 0x01, 0x03 }, /* mipi 1lane */
128	{ 0x02, 0x22 }, /* 0x33 */
129	{ 0x03, 0x94 },
130	{ 0x04, 0x01 }, /* fifo_prog */
131	{ 0x05, 0x00 }, /* fifo_prog */
132	{ 0x06, 0x80 }, /* b0  //YUV ISP data */
133	{ 0x11, 0x2a }, /* 1e //LDI set YUV422 */
134	{ 0x12, 0x90 }, /* 00 //04 //00 //04//00 //LWC[7:0] */
135	{ 0x13, 0x02 }, /* 05 //05 //LWC[15:8] */
136	{ 0x15, 0x12 }, /* 0x10 //DPHYY_MODE read_ready */
137	{ 0x17, 0x01 },
138	{ 0x40, 0x08 },
139	{ 0x41, 0x00 },
140	{ 0x42, 0x00 },
141	{ 0x43, 0x00 },
142	{ 0x21, 0x02 }, /* 0x01 */
143	{ 0x22, 0x02 }, /* 0x01 */
144	{ 0x23, 0x01 }, /* 0x05 //Nor:0x05 DOU:0x06 */
145	{ 0x29, 0x00 },
146	{ 0x2A, 0x25 }, /* 0x05 //data zero 0x7a de */
147	{ 0x2B, 0x02 },
148
149	{ 0xfe, 0x00 },
150
151	/* CISCTL */
152	{ 0x00, 0x2f }, /* 2f//0f//02//01 */
153	{ 0x01, 0x0f }, /* 06 */
154	{ 0x02, 0x04 },
155	{ 0x4f, 0x00 }, /* AEC 0FF */
156	{ 0x03, 0x01 }, /* 0x03 //04 */
157	{ 0x04, 0xc0 }, /* 0xe8 //58 */
158	{ 0x05, 0x00 },
159	{ 0x06, 0xb2 }, /* 0x0a //HB */
160	/* Vblank (reg 0x07 + 0x08) gets set by the vblank ctrl */
161	{ 0x09, 0x00 }, /* row start */
162	{ 0x0a, 0x00 },
163	{ 0x0b, 0x00 }, /* col start */
164	{ 0x0c, 0x00 },
165	{ 0x0d, 0x01 }, /* height */
166	{ 0x0e, 0xf2 }, /* 0xf7 //height */
167	{ 0x0f, 0x02 }, /* width */
168	{ 0x10, 0x94 }, /* 0xa0 //height */
169	{ 0x17, 0x14 },
170	{ 0x18, 0x1a }, /* 0a//[4]double reset */
171	{ 0x19, 0x14 }, /* AD pipeline */
172	{ 0x1b, 0x48 },
173	{ 0x1e, 0x6b }, /* 3b//col bias */
174	{ 0x1f, 0x28 }, /* 20//00//08//txlow */
175	{ 0x20, 0x89 }, /* 88//0c//[3:2]DA15 */
176	{ 0x21, 0x49 }, /* 48//[3] txhigh */
177	{ 0x22, 0xb0 },
178	{ 0x23, 0x04 }, /* [1:0]vcm_r */
179	{ 0x24, 0x16 }, /* 15 */
180	{ 0x34, 0x20 }, /* [6:4] rsg high//range */
181
182	/* BLK */
183	{ 0x26, 0x23 }, /* [1]dark_current_en [0]offset_en */
184	{ 0x28, 0xff }, /* BLK_limie_value */
185	{ 0x29, 0x00 }, /* global offset */
186	{ 0x33, 0x18 }, /* offset_ratio */
187	{ 0x37, 0x20 }, /* dark_current_ratio */
188	{ 0x2a, 0x00 },
189	{ 0x2b, 0x00 },
190	{ 0x2c, 0x00 },
191	{ 0x2d, 0x00 },
192	{ 0x2e, 0x00 },
193	{ 0x2f, 0x00 },
194	{ 0x30, 0x00 },
195	{ 0x31, 0x00 },
196	{ 0x47, 0x80 }, /* a7 */
197	{ 0x4e, 0x66 }, /* select_row */
198	{ 0xa8, 0x02 }, /* win_width_dark, same with crop_win_width */
199	{ 0xa9, 0x80 },
200
201	/* ISP */
202	{ 0x40, 0x06 }, /* 0xff //ff //48 */
203	{ 0x41, 0x00 }, /* 0x21 //00//[0]curve_en */
204	{ 0x42, 0x04 }, /* 0xcf //0a//[1]awn_en */
205	{ 0x44, 0x18 }, /* 0x18 //02 */
206	{ 0x46, 0x02 }, /* 0x03 //sync */
207	{ 0x49, 0x03 },
208	{ 0x4c, 0x20 }, /* 00[5]pretect exp */
209	{ 0x50, 0x01 }, /* crop enable */
210	{ 0x51, 0x00 },
211	{ 0x52, 0x00 },
212	{ 0x53, 0x00 },
213	{ 0x54, 0x01 },
214	{ 0x55, 0x01 }, /* crop window height */
215	{ 0x56, 0xf0 },
216	{ 0x57, 0x02 }, /* crop window width */
217	{ 0x58, 0x90 },
218
219	/* Gain */
220	{ 0x70, 0x70 }, /* 70 //80//global gain */
221	{ 0x71, 0x20 }, /* pregain gain */
222	{ 0x72, 0x40 }, /* post gain */
223	{ 0x5a, 0x84 }, /* 84//analog gain 0  */
224	{ 0x5b, 0xc9 }, /* c9 */
225	{ 0x5c, 0xed }, /* ed//not use pga gain highest level */
226	{ 0x77, 0x40 }, /* R gain 0x74 //awb gain */
227	{ 0x78, 0x40 }, /* G gain */
228	{ 0x79, 0x40 }, /* B gain 0x5f */
229
230	{ 0x48, 0x00 },
231	{ 0xfe, 0x01 },
232	{ 0x0a, 0x45 }, /* [7]col gain mode */
233
234	{ 0x3e, 0x40 },
235	{ 0x3f, 0x5c },
236	{ 0x40, 0x7b },
237	{ 0x41, 0xbd },
238	{ 0x42, 0xf6 },
239	{ 0x43, 0x63 },
240	{ 0x03, 0x60 },
241	{ 0x44, 0x03 },
242
243	/* Dark / Sun mode related */
244	{ 0xfe, 0x01 },
245	{ 0x45, 0xa4 }, /* 0xf7 */
246	{ 0x46, 0xf0 }, /* 0xff //f0//sun value th */
247	{ 0x48, 0x03 }, /* sun mode */
248	{ 0x4f, 0x60 }, /* sun_clamp */
249	{ 0xfe, 0x00 },
250};
251
252static const struct reg_sequence gc0310_VGA_30fps[] = {
253	{ 0xfe, 0x00 },
254	{ 0x0d, 0x01 }, /* height */
255	{ 0x0e, 0xf2 }, /* 0xf7 //height */
256	{ 0x0f, 0x02 }, /* width */
257	{ 0x10, 0x94 }, /* 0xa0 //height */
258
259	{ 0x50, 0x01 }, /* crop enable */
260	{ 0x51, 0x00 },
261	{ 0x52, 0x00 },
262	{ 0x53, 0x00 },
263	{ 0x54, 0x01 },
264	{ 0x55, 0x01 }, /* crop window height */
265	{ 0x56, 0xf0 },
266	{ 0x57, 0x02 }, /* crop window width */
267	{ 0x58, 0x90 },
268
269	{ 0xfe, 0x03 },
270	{ 0x12, 0x90 }, /* 00 //04 //00 //04//00 //LWC[7:0]  */
271	{ 0x13, 0x02 }, /* 05 //05 //LWC[15:8] */
272
273	{ 0xfe, 0x00 },
274};
275
276static const s64 link_freq_menu_items[] = {
277	GC0310_LINK_FREQ,
278};
279
280static int gc0310_gain_set(struct gc0310_device *sensor, u32 gain)
281{
282	u8 again, dgain;
283	int ret = 0;
284
285	/* Taken from original driver, this never sets dgain lower then 32? */
286
287	/* Change 0 - 95 to 32 - 127 */
288	gain += 32;
289
290	if (gain < 64) {
291		again = 0x0; /* sqrt(2) */
292		dgain = gain;
293	} else {
294		again = 0x2; /* 2 * sqrt(2) */
295		dgain = gain / 2;
296	}
297
298	cci_write(sensor->regmap, GC0310_AGC_ADJ_REG, again, &ret);
299	cci_write(sensor->regmap, GC0310_DGC_ADJ_REG, dgain, &ret);
300	return ret;
301}
302
303static int gc0310_exposure_update_range(struct gc0310_device *sensor)
304{
305	int exp_max = GC0310_NATIVE_HEIGHT + sensor->ctrls.vblank->val;
306
307	return __v4l2_ctrl_modify_range(sensor->ctrls.exposure, 0, exp_max,
308					1, exp_max);
309}
310
311static int gc0310_s_ctrl(struct v4l2_ctrl *ctrl)
312{
313	struct gc0310_device *sensor =
314		container_of(ctrl->handler, struct gc0310_device, ctrls.handler);
315	int ret;
316
317	/* Update exposure range on vblank changes */
318	if (ctrl->id == V4L2_CID_VBLANK) {
319		ret = gc0310_exposure_update_range(sensor);
320		if (ret)
321			return ret;
322	}
323
324	/* Only apply changes to the controls if the device is powered up */
325	if (!pm_runtime_get_if_in_use(sensor->sd.dev))
326		return 0;
327
328	switch (ctrl->id) {
329	case V4L2_CID_EXPOSURE:
330		ret = cci_write(sensor->regmap, GC0310_AEC_PK_EXPO_REG,
331				ctrl->val, NULL);
332		break;
333	case V4L2_CID_ANALOGUE_GAIN:
334		ret = gc0310_gain_set(sensor, ctrl->val);
335		break;
336	case V4L2_CID_VBLANK:
337		ret = cci_write(sensor->regmap, GC0310_V_BLANKING_REG,
338				ctrl->val - GC0310_V_BLANK_OFFSET,
339				NULL);
340		break;
341	default:
342		ret = -EINVAL;
343		break;
344	}
345
346	pm_runtime_put(sensor->sd.dev);
347	return ret;
348}
349
350static const struct v4l2_ctrl_ops ctrl_ops = {
351	.s_ctrl = gc0310_s_ctrl,
352};
353
354/* The GC0310 currently only supports 1 fixed fmt */
355static void gc0310_fill_format(struct v4l2_mbus_framefmt *fmt)
356{
357	memset(fmt, 0, sizeof(*fmt));
358	fmt->width = GC0310_NATIVE_WIDTH;
359	fmt->height = GC0310_NATIVE_HEIGHT;
360	fmt->field = V4L2_FIELD_NONE;
361	fmt->code = MEDIA_BUS_FMT_SGRBG8_1X8;
362}
363
364static int gc0310_get_selection(struct v4l2_subdev *sd,
365				struct v4l2_subdev_state *state,
366				struct v4l2_subdev_selection *sel)
367{
368	/* Only the single fixed 656x496 mode is supported, without croping */
369	switch (sel->target) {
370	case V4L2_SEL_TGT_CROP:
371	case V4L2_SEL_TGT_CROP_BOUNDS:
372	case V4L2_SEL_TGT_CROP_DEFAULT:
373	case V4L2_SEL_TGT_NATIVE_SIZE:
374		sel->r.top = 0;
375		sel->r.left = 0;
376		sel->r.width = GC0310_NATIVE_WIDTH;
377		sel->r.height = GC0310_NATIVE_HEIGHT;
378		break;
379	default:
380		return -EINVAL;
381	}
382
383	return 0;
384}
385
386static int gc0310_power_off(struct device *dev)
387{
388	struct v4l2_subdev *sd = dev_get_drvdata(dev);
389	struct gc0310_device *sensor = to_gc0310_sensor(sd);
390
391	gpiod_set_value_cansleep(sensor->powerdown, 1);
392	gpiod_set_value_cansleep(sensor->reset, 1);
393	return 0;
394}
395
396static int gc0310_power_on(struct device *dev)
397{
398	struct v4l2_subdev *sd = dev_get_drvdata(dev);
399	struct gc0310_device *sensor = to_gc0310_sensor(sd);
400
401	fsleep(10 * USEC_PER_MSEC);
402	gpiod_set_value_cansleep(sensor->reset, 0);
403	fsleep(10 * USEC_PER_MSEC);
404	gpiod_set_value_cansleep(sensor->powerdown, 0);
405	fsleep(10 * USEC_PER_MSEC);
406
407	return 0;
408}
409
410static int gc0310_detect(struct gc0310_device *sensor)
411{
412	struct i2c_client *client = v4l2_get_subdevdata(&sensor->sd);
413	u64 val;
414	int ret;
415
416	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
417		return -ENODEV;
418
419	ret = cci_read(sensor->regmap, GC0310_SC_CMMN_CHIP_ID_REG, &val, NULL);
420	if (ret < 0) {
421		dev_err(&client->dev, "read sensor_id failed: %d\n", ret);
422		return -ENODEV;
423	}
424
425	dev_dbg(&client->dev, "sensor ID = 0x%llx\n", val);
426
427	if (val != GC0310_ID) {
428		dev_err(&client->dev, "sensor ID error, read id = 0x%llx, target id = 0x%x\n",
429			val, GC0310_ID);
430		return -ENODEV;
431	}
432
433	dev_dbg(&client->dev, "detect gc0310 success\n");
434
435	return 0;
436}
437
438static int gc0310_enable_streams(struct v4l2_subdev *sd,
439				 struct v4l2_subdev_state *state,
440				 u32 pad, u64 streams_mask)
441{
442	struct gc0310_device *sensor = to_gc0310_sensor(sd);
443	struct i2c_client *client = v4l2_get_subdevdata(sd);
444	int ret;
445
446	ret = pm_runtime_resume_and_get(&client->dev);
447	if (ret)
448		return ret;
449
450	ret = regmap_multi_reg_write(sensor->regmap,
451				     gc0310_reset_register,
452				     ARRAY_SIZE(gc0310_reset_register));
453	if (ret)
454		goto error_power_down;
455
456	ret = regmap_multi_reg_write(sensor->regmap,
457				     gc0310_VGA_30fps,
458				     ARRAY_SIZE(gc0310_VGA_30fps));
459	if (ret)
460		goto error_power_down;
461
462	/* restore value of all ctrls */
463	ret = __v4l2_ctrl_handler_setup(&sensor->ctrls.handler);
464
465	/* enable per frame MIPI and sensor ctrl reset  */
466	cci_write(sensor->regmap, GC0310_RESET_RELATED_REG, 0x30, &ret);
467
468	cci_write(sensor->regmap, GC0310_RESET_RELATED_REG,
469		  GC0310_REGISTER_PAGE_3, &ret);
470	cci_write(sensor->regmap, GC0310_SW_STREAM_REG,
471		  GC0310_START_STREAMING, &ret);
472	cci_write(sensor->regmap, GC0310_RESET_RELATED_REG,
473		  GC0310_REGISTER_PAGE_0, &ret);
474
475error_power_down:
476	if (ret)
477		pm_runtime_put(&client->dev);
478
479	return ret;
480}
481
482static int gc0310_disable_streams(struct v4l2_subdev *sd,
483				  struct v4l2_subdev_state *state,
484				  u32 pad, u64 streams_mask)
485{
486	struct gc0310_device *sensor = to_gc0310_sensor(sd);
487	struct i2c_client *client = v4l2_get_subdevdata(sd);
488	int ret = 0;
489
490	cci_write(sensor->regmap, GC0310_RESET_RELATED_REG,
491		  GC0310_REGISTER_PAGE_3, &ret);
492	cci_write(sensor->regmap, GC0310_SW_STREAM_REG,
493		  GC0310_STOP_STREAMING, &ret);
494	cci_write(sensor->regmap, GC0310_RESET_RELATED_REG,
495		  GC0310_REGISTER_PAGE_0, &ret);
496
497	pm_runtime_put(&client->dev);
498	return ret;
499}
500
501static int gc0310_enum_mbus_code(struct v4l2_subdev *sd,
502				 struct v4l2_subdev_state *sd_state,
503				 struct v4l2_subdev_mbus_code_enum *code)
504{
505	/* We support only a single format */
506	if (code->index)
507		return -EINVAL;
508
509	code->code = MEDIA_BUS_FMT_SGRBG8_1X8;
510	return 0;
511}
512
513static int gc0310_enum_frame_size(struct v4l2_subdev *sd,
514				  struct v4l2_subdev_state *sd_state,
515				  struct v4l2_subdev_frame_size_enum *fse)
516{
517	/* We support only a single resolution */
518	if (fse->index)
519		return -EINVAL;
520
521	fse->min_width = GC0310_NATIVE_WIDTH;
522	fse->max_width = GC0310_NATIVE_WIDTH;
523	fse->min_height = GC0310_NATIVE_HEIGHT;
524	fse->max_height = GC0310_NATIVE_HEIGHT;
525
526	return 0;
527}
528
529static const struct v4l2_subdev_video_ops gc0310_video_ops = {
530	.s_stream = v4l2_subdev_s_stream_helper,
531};
532
533static const struct v4l2_subdev_pad_ops gc0310_pad_ops = {
534	.enum_mbus_code = gc0310_enum_mbus_code,
535	.enum_frame_size = gc0310_enum_frame_size,
536	.get_fmt = v4l2_subdev_get_fmt,
537	.set_fmt = v4l2_subdev_get_fmt, /* Only 1 fixed mode supported */
538	.get_selection = gc0310_get_selection,
539	.set_selection = gc0310_get_selection,
540	.enable_streams = gc0310_enable_streams,
541	.disable_streams = gc0310_disable_streams,
542};
543
544static const struct v4l2_subdev_ops gc0310_ops = {
545	.video = &gc0310_video_ops,
546	.pad = &gc0310_pad_ops,
547};
548
549static int gc0310_init_state(struct v4l2_subdev *sd,
550			     struct v4l2_subdev_state *sd_state)
551{
552	gc0310_fill_format(v4l2_subdev_state_get_format(sd_state, 0));
553	return 0;
554}
555
556static const struct v4l2_subdev_internal_ops gc0310_internal_ops = {
557	.init_state = gc0310_init_state,
558};
559
560static int gc0310_init_controls(struct gc0310_device *sensor)
561{
562	struct i2c_client *client = v4l2_get_subdevdata(&sensor->sd);
563	struct v4l2_ctrl_handler *hdl = &sensor->ctrls.handler;
564	struct v4l2_fwnode_device_properties props;
565	int exp_max, ret;
566
567	v4l2_ctrl_handler_init(hdl, 8);
568
569	/* Use the same lock for controls as for everything else */
570	sensor->sd.ctrl_handler = hdl;
571
572	exp_max = GC0310_NATIVE_HEIGHT + GC0310_V_BLANK_DEFAULT;
573	sensor->ctrls.exposure =
574		v4l2_ctrl_new_std(hdl, &ctrl_ops, V4L2_CID_EXPOSURE, 0,
575				  exp_max, 1, exp_max);
576
577	/* 32 steps at base gain 1 + 64 half steps at base gain 2 */
578	sensor->ctrls.gain =
579		v4l2_ctrl_new_std(hdl, &ctrl_ops, V4L2_CID_ANALOGUE_GAIN, 0, 95, 1, 31);
580
581	sensor->ctrls.link_freq =
582		v4l2_ctrl_new_int_menu(hdl, NULL, V4L2_CID_LINK_FREQ,
583				       0, 0, link_freq_menu_items);
584	sensor->ctrls.pixel_rate =
585		v4l2_ctrl_new_std(hdl, NULL, V4L2_CID_PIXEL_RATE, 0,
586				  GC0310_PIXELRATE, 1, GC0310_PIXELRATE);
587
588	sensor->ctrls.vblank =
589		v4l2_ctrl_new_std(hdl, &ctrl_ops, V4L2_CID_VBLANK,
590				  GC0310_V_BLANK_MIN,
591				  GC0310_V_BLANK_MAX, 1,
592				  GC0310_V_BLANK_DEFAULT);
593
594	sensor->ctrls.hblank =
595		v4l2_ctrl_new_std(hdl, NULL, V4L2_CID_HBLANK,
596				  GC0310_H_BLANK_DEFAULT,
597				  GC0310_H_BLANK_DEFAULT, 1,
598				  GC0310_H_BLANK_DEFAULT);
599
600	ret = v4l2_fwnode_device_parse(&client->dev, &props);
601	if (ret)
602		return ret;
603
604	v4l2_ctrl_new_fwnode_properties(hdl, &ctrl_ops, &props);
605
606	if (hdl->error)
607		return hdl->error;
608
609	sensor->ctrls.pixel_rate->flags |= V4L2_CTRL_FLAG_READ_ONLY;
610	sensor->ctrls.link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
611	sensor->ctrls.hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
612	return 0;
613}
614
615static void gc0310_remove(struct i2c_client *client)
616{
617	struct v4l2_subdev *sd = i2c_get_clientdata(client);
618	struct gc0310_device *sensor = to_gc0310_sensor(sd);
619
620	v4l2_async_unregister_subdev(sd);
621	v4l2_subdev_cleanup(sd);
622	media_entity_cleanup(&sensor->sd.entity);
623	v4l2_ctrl_handler_free(&sensor->ctrls.handler);
624	pm_runtime_disable(&client->dev);
625	if (!pm_runtime_status_suspended(&client->dev)) {
626		gc0310_power_off(&client->dev);
627		pm_runtime_set_suspended(&client->dev);
628	}
629}
630
631static int gc0310_check_hwcfg(struct device *dev)
632{
633	struct v4l2_fwnode_endpoint bus_cfg = {
634		.bus_type = V4L2_MBUS_CSI2_DPHY,
635	};
636	struct fwnode_handle *ep_fwnode;
637	unsigned long link_freq_bitmap;
638	u32 mclk;
639	int ret;
640
641	/*
642	 * Sometimes the fwnode graph is initialized by the bridge driver.
643	 * Bridge drivers doing this may also add GPIO mappings, wait for this.
644	 */
645	ep_fwnode = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 0, 0, 0);
646	if (!ep_fwnode)
647		return dev_err_probe(dev, -EPROBE_DEFER,
648				     "waiting for fwnode graph endpoint\n");
649
650	ret = fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency",
651				       &mclk);
652	if (ret) {
653		fwnode_handle_put(ep_fwnode);
654		return dev_err_probe(dev, ret,
655				     "reading clock-frequency property\n");
656	}
657
658	if (mclk != GC0310_MCLK_FREQ) {
659		fwnode_handle_put(ep_fwnode);
660		return dev_err_probe(dev, -EINVAL,
661				     "external clock %u is not supported\n",
662				     mclk);
663	}
664
665	ret = v4l2_fwnode_endpoint_alloc_parse(ep_fwnode, &bus_cfg);
666	fwnode_handle_put(ep_fwnode);
667	if (ret)
668		return dev_err_probe(dev, ret, "parsing endpoint failed\n");
669
670	ret = v4l2_link_freq_to_bitmap(dev, bus_cfg.link_frequencies,
671				       bus_cfg.nr_of_link_frequencies,
672				       link_freq_menu_items,
673				       ARRAY_SIZE(link_freq_menu_items),
674				       &link_freq_bitmap);
675
676	if (ret == 0 && bus_cfg.bus.mipi_csi2.num_data_lanes != 1)
677		ret = dev_err_probe(dev, -EINVAL,
678				    "number of CSI2 data lanes %u is not supported\n",
679				    bus_cfg.bus.mipi_csi2.num_data_lanes);
680
681	v4l2_fwnode_endpoint_free(&bus_cfg);
682	return ret;
683}
684
685static int gc0310_probe(struct i2c_client *client)
686{
687	struct gc0310_device *sensor;
688	int ret;
689
690	ret = gc0310_check_hwcfg(&client->dev);
691	if (ret)
692		return ret;
693
694	sensor = devm_kzalloc(&client->dev, sizeof(*sensor), GFP_KERNEL);
695	if (!sensor)
696		return -ENOMEM;
697
698	sensor->reset = devm_gpiod_get(&client->dev, "reset", GPIOD_OUT_HIGH);
699	if (IS_ERR(sensor->reset)) {
700		return dev_err_probe(&client->dev, PTR_ERR(sensor->reset),
701				     "getting reset GPIO\n");
702	}
703
704	sensor->powerdown = devm_gpiod_get(&client->dev, "powerdown", GPIOD_OUT_HIGH);
705	if (IS_ERR(sensor->powerdown)) {
706		return dev_err_probe(&client->dev, PTR_ERR(sensor->powerdown),
707				     "getting powerdown GPIO\n");
708	}
709
710	v4l2_i2c_subdev_init(&sensor->sd, client, &gc0310_ops);
711
712	sensor->regmap = devm_cci_regmap_init_i2c(client, 8);
713	if (IS_ERR(sensor->regmap))
714		return PTR_ERR(sensor->regmap);
715
716	gc0310_power_on(&client->dev);
717
718	pm_runtime_set_active(&client->dev);
719	pm_runtime_get_noresume(&client->dev);
720	pm_runtime_enable(&client->dev);
721
722	ret = gc0310_detect(sensor);
723	if (ret)
724		goto err_power_down;
725
726	sensor->sd.internal_ops = &gc0310_internal_ops;
727	sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
728	sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
729	sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
730
731	ret = gc0310_init_controls(sensor);
732	if (ret)
733		goto err_power_down;
734
735	ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad);
736	if (ret)
737		goto err_power_down;
738
739	sensor->sd.state_lock = sensor->ctrls.handler.lock;
740	ret = v4l2_subdev_init_finalize(&sensor->sd);
741	if (ret)
742		goto err_power_down;
743
744	ret = v4l2_async_register_subdev_sensor(&sensor->sd);
745	if (ret)
746		goto err_power_down;
747
748	pm_runtime_set_autosuspend_delay(&client->dev, 1000);
749	pm_runtime_use_autosuspend(&client->dev);
750	pm_runtime_put_autosuspend(&client->dev);
751
752	return 0;
753
754err_power_down:
755	pm_runtime_put_noidle(&client->dev);
756	gc0310_remove(client);
757	return ret;
758}
759
760static DEFINE_RUNTIME_DEV_PM_OPS(gc0310_pm_ops,
761				 gc0310_power_off, gc0310_power_on, NULL);
762
763static const struct acpi_device_id gc0310_acpi_match[] = {
764	{"INT0310"},
765	{},
766};
767MODULE_DEVICE_TABLE(acpi, gc0310_acpi_match);
768
769static struct i2c_driver gc0310_driver = {
770	.driver = {
771		.name = "gc0310",
772		.pm = pm_sleep_ptr(&gc0310_pm_ops),
773		.acpi_match_table = gc0310_acpi_match,
774	},
775	.probe = gc0310_probe,
776	.remove = gc0310_remove,
777};
778module_i2c_driver(gc0310_driver);
779
780MODULE_AUTHOR("Lai, Angie <angie.lai@intel.com>");
781MODULE_AUTHOR("Hans de Goede <hansg@kernel.org>");
782MODULE_DESCRIPTION("A low-level driver for GalaxyCore GC0310 sensors");
783MODULE_LICENSE("GPL");