ds90ub913.c

  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Driver for the Texas Instruments DS90UB913 video serializer
  4 *
  5 * Based on a driver from Luca Ceresoli <luca@lucaceresoli.net>
  6 *
  7 * Copyright (c) 2019 Luca Ceresoli <luca@lucaceresoli.net>
  8 * Copyright (c) 2023 Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
  9 */
 10
 11#include <linux/bitfield.h>
 12#include <linux/clk-provider.h>
 13#include <linux/clk.h>
 14#include <linux/delay.h>
 15#include <linux/gpio/driver.h>
 16#include <linux/i2c-atr.h>
 17#include <linux/i2c.h>
 18#include <linux/kernel.h>
 19#include <linux/module.h>
 20#include <linux/property.h>
 21#include <linux/regmap.h>
 22
 23#include <media/i2c/ds90ub9xx.h>
 24#include <media/v4l2-fwnode.h>
 25#include <media/v4l2-mediabus.h>
 26#include <media/v4l2-subdev.h>
 27
 28#define UB913_PAD_SINK			0
 29#define UB913_PAD_SOURCE		1
 30
 31/*
 32 * UB913 has 4 gpios, but gpios 3 and 4 are reserved for external oscillator
 33 * mode. Thus we only support 2 gpios for now.
 34 */
 35#define UB913_NUM_GPIOS			2
 36
 37#define UB913_REG_RESET_CTL			0x01
 38#define UB913_REG_RESET_CTL_DIGITAL_RESET_1	BIT(1)
 39#define UB913_REG_RESET_CTL_DIGITAL_RESET_0	BIT(0)
 40
 41#define UB913_REG_GENERAL_CFG			0x03
 42#define UB913_REG_GENERAL_CFG_CRC_ERR_RESET	BIT(5)
 43#define UB913_REG_GENERAL_CFG_PCLK_RISING	BIT(0)
 44
 45#define UB913_REG_MODE_SEL			0x05
 46#define UB913_REG_MODE_SEL_MODE_OVERRIDE	BIT(5)
 47#define UB913_REG_MODE_SEL_MODE_UP_TO_DATE	BIT(4)
 48#define UB913_REG_MODE_SEL_MODE_MASK		GENMASK(3, 0)
 49
 50#define UB913_REG_CRC_ERRORS_LSB		0x0a
 51#define UB913_REG_CRC_ERRORS_MSB		0x0b
 52
 53#define UB913_REG_GENERAL_STATUS		0x0c
 54
 55#define UB913_REG_GPIO_CFG(n)			(0x0d + (n))
 56#define UB913_REG_GPIO_CFG_ENABLE(n)		BIT(0 + (n) * 4)
 57#define UB913_REG_GPIO_CFG_DIR_INPUT(n)		BIT(1 + (n) * 4)
 58#define UB913_REG_GPIO_CFG_REMOTE_EN(n)		BIT(2 + (n) * 4)
 59#define UB913_REG_GPIO_CFG_OUT_VAL(n)		BIT(3 + (n) * 4)
 60#define UB913_REG_GPIO_CFG_MASK(n)		(0xf << ((n) * 4))
 61
 62#define UB913_REG_SCL_HIGH_TIME			0x11
 63#define UB913_REG_SCL_LOW_TIME			0x12
 64
 65#define UB913_REG_PLL_OVR			0x35
 66
 67struct ub913_data {
 68	struct i2c_client	*client;
 69	struct regmap		*regmap;
 70	struct clk		*clkin;
 71
 72	struct gpio_chip	gpio_chip;
 73
 74	struct v4l2_subdev	sd;
 75	struct media_pad	pads[2];
 76
 77	struct v4l2_async_notifier	notifier;
 78
 79	struct v4l2_subdev	*source_sd;
 80	u16			source_sd_pad;
 81
 82	u64			enabled_source_streams;
 83
 84	struct clk_hw		*clkout_clk_hw;
 85
 86	struct ds90ub9xx_platform_data *plat_data;
 87
 88	bool			pclk_polarity_rising;
 89};
 90
 91static inline struct ub913_data *sd_to_ub913(struct v4l2_subdev *sd)
 92{
 93	return container_of(sd, struct ub913_data, sd);
 94}
 95
 96struct ub913_format_info {
 97	u32 incode;
 98	u32 outcode;
 99};
100
101static const struct ub913_format_info ub913_formats[] = {
102	/* Only RAW10 with 8-bit payload is supported at the moment */
103	{ .incode = MEDIA_BUS_FMT_YUYV8_2X8, .outcode = MEDIA_BUS_FMT_YUYV8_1X16 },
104	{ .incode = MEDIA_BUS_FMT_UYVY8_2X8, .outcode = MEDIA_BUS_FMT_UYVY8_1X16 },
105	{ .incode = MEDIA_BUS_FMT_VYUY8_2X8, .outcode = MEDIA_BUS_FMT_VYUY8_1X16 },
106	{ .incode = MEDIA_BUS_FMT_YVYU8_2X8, .outcode = MEDIA_BUS_FMT_YVYU8_1X16 },
107};
108
109static const struct ub913_format_info *ub913_find_format(u32 incode)
110{
111	unsigned int i;
112
113	for (i = 0; i < ARRAY_SIZE(ub913_formats); i++) {
114		if (ub913_formats[i].incode == incode)
115			return &ub913_formats[i];
116	}
117
118	return NULL;
119}
120
121static int ub913_read(const struct ub913_data *priv, u8 reg, u8 *val,
122		      int *err)
123{
124	unsigned int v;
125	int ret;
126
127	if (err && *err)
128		return *err;
129
130	ret = regmap_read(priv->regmap, reg, &v);
131	if (ret) {
132		dev_err(&priv->client->dev,
133			"Cannot read register 0x%02x: %d!\n", reg, ret);
134		goto out;
135	}
136
137	*val = v;
138
139out:
140	if (ret && err)
141		*err = ret;
142
143	return ret;
144}
145
146static int ub913_write(const struct ub913_data *priv, u8 reg, u8 val,
147		       int *err)
148{
149	int ret;
150
151	if (err && *err)
152		return *err;
153
154	ret = regmap_write(priv->regmap, reg, val);
155	if (ret < 0)
156		dev_err(&priv->client->dev,
157			"Cannot write register 0x%02x: %d!\n", reg, ret);
158
159	if (ret && err)
160		*err = ret;
161
162	return ret;
163}
164
165static int ub913_update_bits(const struct ub913_data *priv, u8 reg, u8 mask,
166			     u8 val, int *err)
167{
168	int ret;
169
170	if (err && *err)
171		return *err;
172
173	ret = regmap_update_bits(priv->regmap, reg, mask, val);
174	if (ret < 0)
175		dev_err(&priv->client->dev,
176			"Cannot update register 0x%02x %d!\n", reg, ret);
177
178	if (ret && err)
179		*err = ret;
180
181	return ret;
182}
183
184/*
185 * GPIO chip
186 */
187static int ub913_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
188{
189	return GPIO_LINE_DIRECTION_OUT;
190}
191
192static int ub913_gpio_direction_out(struct gpio_chip *gc, unsigned int offset,
193				    int value)
194{
195	struct ub913_data *priv = gpiochip_get_data(gc);
196	unsigned int reg_idx = offset / 2;
197	unsigned int field_idx = offset % 2;
198
199	return regmap_update_bits(priv->regmap, UB913_REG_GPIO_CFG(reg_idx),
200				  UB913_REG_GPIO_CFG_MASK(field_idx),
201				  UB913_REG_GPIO_CFG_ENABLE(field_idx) |
202					  (value ? UB913_REG_GPIO_CFG_OUT_VAL(field_idx) :
203						   0));
204}
205
206static int ub913_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
207{
208	return ub913_gpio_direction_out(gc, offset, value);
209}
210
211static int ub913_gpio_of_xlate(struct gpio_chip *gc,
212			       const struct of_phandle_args *gpiospec,
213			       u32 *flags)
214{
215	if (flags)
216		*flags = gpiospec->args[1];
217
218	return gpiospec->args[0];
219}
220
221static int ub913_gpiochip_probe(struct ub913_data *priv)
222{
223	struct device *dev = &priv->client->dev;
224	struct gpio_chip *gc = &priv->gpio_chip;
225	int ret;
226
227	/* Initialize GPIOs 0 and 1 to local control, tri-state */
228	ub913_write(priv, UB913_REG_GPIO_CFG(0), 0, NULL);
229
230	gc->label = dev_name(dev);
231	gc->parent = dev;
232	gc->owner = THIS_MODULE;
233	gc->base = -1;
234	gc->can_sleep = true;
235	gc->ngpio = UB913_NUM_GPIOS;
236	gc->get_direction = ub913_gpio_get_direction;
237	gc->direction_output = ub913_gpio_direction_out;
238	gc->set = ub913_gpio_set;
239	gc->of_xlate = ub913_gpio_of_xlate;
240	gc->of_gpio_n_cells = 2;
241
242	ret = gpiochip_add_data(gc, priv);
243	if (ret) {
244		dev_err(dev, "Failed to add GPIOs: %d\n", ret);
245		return ret;
246	}
247
248	return 0;
249}
250
251static void ub913_gpiochip_remove(struct ub913_data *priv)
252{
253	gpiochip_remove(&priv->gpio_chip);
254}
255
256static const struct regmap_config ub913_regmap_config = {
257	.name = "ds90ub913",
258	.reg_bits = 8,
259	.val_bits = 8,
260	.reg_format_endian = REGMAP_ENDIAN_DEFAULT,
261	.val_format_endian = REGMAP_ENDIAN_DEFAULT,
262};
263
264/*
265 * V4L2
266 */
267
268static int ub913_enable_streams(struct v4l2_subdev *sd,
269				struct v4l2_subdev_state *state, u32 pad,
270				u64 streams_mask)
271{
272	struct ub913_data *priv = sd_to_ub913(sd);
273	u64 sink_streams;
274	int ret;
275
276	sink_streams = v4l2_subdev_state_xlate_streams(state, UB913_PAD_SOURCE,
277						       UB913_PAD_SINK,
278						       &streams_mask);
279
280	ret = v4l2_subdev_enable_streams(priv->source_sd, priv->source_sd_pad,
281					 sink_streams);
282	if (ret)
283		return ret;
284
285	priv->enabled_source_streams |= streams_mask;
286
287	return 0;
288}
289
290static int ub913_disable_streams(struct v4l2_subdev *sd,
291				 struct v4l2_subdev_state *state, u32 pad,
292				 u64 streams_mask)
293{
294	struct ub913_data *priv = sd_to_ub913(sd);
295	u64 sink_streams;
296	int ret;
297
298	sink_streams = v4l2_subdev_state_xlate_streams(state, UB913_PAD_SOURCE,
299						       UB913_PAD_SINK,
300						       &streams_mask);
301
302	ret = v4l2_subdev_disable_streams(priv->source_sd, priv->source_sd_pad,
303					  sink_streams);
304	if (ret)
305		return ret;
306
307	priv->enabled_source_streams &= ~streams_mask;
308
309	return 0;
310}
311
312static int _ub913_set_routing(struct v4l2_subdev *sd,
313			      struct v4l2_subdev_state *state,
314			      struct v4l2_subdev_krouting *routing)
315{
316	static const struct v4l2_mbus_framefmt in_format = {
317		.width = 640,
318		.height = 480,
319		.code = MEDIA_BUS_FMT_UYVY8_2X8,
320		.field = V4L2_FIELD_NONE,
321		.colorspace = V4L2_COLORSPACE_SRGB,
322		.ycbcr_enc = V4L2_YCBCR_ENC_601,
323		.quantization = V4L2_QUANTIZATION_LIM_RANGE,
324		.xfer_func = V4L2_XFER_FUNC_SRGB,
325	};
326	static const struct v4l2_mbus_framefmt out_format = {
327		.width = 640,
328		.height = 480,
329		.code = MEDIA_BUS_FMT_UYVY8_1X16,
330		.field = V4L2_FIELD_NONE,
331		.colorspace = V4L2_COLORSPACE_SRGB,
332		.ycbcr_enc = V4L2_YCBCR_ENC_601,
333		.quantization = V4L2_QUANTIZATION_LIM_RANGE,
334		.xfer_func = V4L2_XFER_FUNC_SRGB,
335	};
336	struct v4l2_subdev_route *route;
337	int ret;
338
339	ret = v4l2_subdev_routing_validate(sd, routing,
340					   V4L2_SUBDEV_ROUTING_ONLY_1_TO_1);
341	if (ret)
342		return ret;
343
344	ret = v4l2_subdev_set_routing(sd, state, routing);
345	if (ret)
346		return ret;
347
348	for_each_active_route(&state->routing, route) {
349		struct v4l2_mbus_framefmt *fmt;
350
351		fmt = v4l2_subdev_state_get_format(state, route->sink_pad,
352						   route->sink_stream);
353		*fmt = in_format;
354		fmt = v4l2_subdev_state_get_format(state, route->source_pad,
355						   route->source_stream);
356		*fmt = out_format;
357	}
358
359	return 0;
360}
361
362static int ub913_set_routing(struct v4l2_subdev *sd,
363			     struct v4l2_subdev_state *state,
364			     enum v4l2_subdev_format_whence which,
365			     struct v4l2_subdev_krouting *routing)
366{
367	struct ub913_data *priv = sd_to_ub913(sd);
368
369	if (which == V4L2_SUBDEV_FORMAT_ACTIVE && priv->enabled_source_streams)
370		return -EBUSY;
371
372	return _ub913_set_routing(sd, state, routing);
373}
374
375static int ub913_get_frame_desc(struct v4l2_subdev *sd, unsigned int pad,
376				struct v4l2_mbus_frame_desc *fd)
377{
378	struct ub913_data *priv = sd_to_ub913(sd);
379	const struct v4l2_subdev_krouting *routing;
380	struct v4l2_mbus_frame_desc source_fd;
381	struct v4l2_subdev_route *route;
382	struct v4l2_subdev_state *state;
383	int ret;
384
385	if (pad != UB913_PAD_SOURCE)
386		return -EINVAL;
387
388	ret = v4l2_subdev_call(priv->source_sd, pad, get_frame_desc,
389			       priv->source_sd_pad, &source_fd);
390	if (ret)
391		return ret;
392
393	fd->type = V4L2_MBUS_FRAME_DESC_TYPE_PARALLEL;
394
395	state = v4l2_subdev_lock_and_get_active_state(sd);
396
397	routing = &state->routing;
398
399	for_each_active_route(routing, route) {
400		unsigned int i;
401
402		if (route->source_pad != pad)
403			continue;
404
405		for (i = 0; i < source_fd.num_entries; i++) {
406			if (source_fd.entry[i].stream == route->sink_stream)
407				break;
408		}
409
410		if (i == source_fd.num_entries) {
411			dev_err(&priv->client->dev,
412				"Failed to find stream from source frame desc\n");
413			ret = -EPIPE;
414			goto out_unlock;
415		}
416
417		fd->entry[fd->num_entries].stream = route->source_stream;
418		fd->entry[fd->num_entries].flags = source_fd.entry[i].flags;
419		fd->entry[fd->num_entries].length = source_fd.entry[i].length;
420		fd->entry[fd->num_entries].pixelcode =
421			source_fd.entry[i].pixelcode;
422
423		fd->num_entries++;
424	}
425
426out_unlock:
427	v4l2_subdev_unlock_state(state);
428
429	return ret;
430}
431
432static int ub913_set_fmt(struct v4l2_subdev *sd,
433			 struct v4l2_subdev_state *state,
434			 struct v4l2_subdev_format *format)
435{
436	struct ub913_data *priv = sd_to_ub913(sd);
437	struct v4l2_mbus_framefmt *fmt;
438	const struct ub913_format_info *finfo;
439
440	if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE &&
441	    priv->enabled_source_streams)
442		return -EBUSY;
443
444	/* Source format is fully defined by the sink format, so not settable */
445	if (format->pad == UB913_PAD_SOURCE)
446		return v4l2_subdev_get_fmt(sd, state, format);
447
448	finfo = ub913_find_format(format->format.code);
449	if (!finfo) {
450		finfo = &ub913_formats[0];
451		format->format.code = finfo->incode;
452	}
453
454	/* Set sink format */
455	fmt = v4l2_subdev_state_get_format(state, format->pad, format->stream);
456	if (!fmt)
457		return -EINVAL;
458
459	*fmt = format->format;
460
461	/* Propagate to source format, and adjust the mbus code */
462	fmt = v4l2_subdev_state_get_opposite_stream_format(state, format->pad,
463							   format->stream);
464	if (!fmt)
465		return -EINVAL;
466
467	*fmt = format->format;
468
469	fmt->code = finfo->outcode;
470
471	return 0;
472}
473
474static int ub913_init_state(struct v4l2_subdev *sd,
475			    struct v4l2_subdev_state *state)
476{
477	struct v4l2_subdev_route routes[] = {
478		{
479			.sink_pad = UB913_PAD_SINK,
480			.sink_stream = 0,
481			.source_pad = UB913_PAD_SOURCE,
482			.source_stream = 0,
483			.flags = V4L2_SUBDEV_ROUTE_FL_ACTIVE,
484		},
485	};
486
487	struct v4l2_subdev_krouting routing = {
488		.num_routes = ARRAY_SIZE(routes),
489		.routes = routes,
490	};
491
492	return _ub913_set_routing(sd, state, &routing);
493}
494
495static int ub913_log_status(struct v4l2_subdev *sd)
496{
497	struct ub913_data *priv = sd_to_ub913(sd);
498	struct device *dev = &priv->client->dev;
499	u8 v, v1, v2;
500	int ret;
501
502	ret = ub913_read(priv, UB913_REG_MODE_SEL, &v, NULL);
503	if (ret)
504		return ret;
505
506	dev_info(dev, "MODE_SEL %#02x\n", v);
507
508	ub913_read(priv, UB913_REG_CRC_ERRORS_LSB, &v1, &ret);
509	ub913_read(priv, UB913_REG_CRC_ERRORS_MSB, &v2, &ret);
510	if (ret)
511		return ret;
512
513	dev_info(dev, "CRC errors %u\n", v1 | (v2 << 8));
514
515	/* clear CRC errors */
516	ub913_read(priv, UB913_REG_GENERAL_CFG, &v, &ret);
517	ub913_write(priv, UB913_REG_GENERAL_CFG,
518		    v | UB913_REG_GENERAL_CFG_CRC_ERR_RESET, &ret);
519	ub913_write(priv, UB913_REG_GENERAL_CFG, v, &ret);
520
521	if (ret)
522		return ret;
523
524	ret = ub913_read(priv, UB913_REG_GENERAL_STATUS, &v, NULL);
525	if (ret)
526		return ret;
527
528	dev_info(dev, "GENERAL_STATUS %#02x\n", v);
529
530	ret = ub913_read(priv, UB913_REG_PLL_OVR, &v, NULL);
531	if (ret)
532		return ret;
533
534	dev_info(dev, "PLL_OVR %#02x\n", v);
535
536	return 0;
537}
538
539static const struct v4l2_subdev_core_ops ub913_subdev_core_ops = {
540	.log_status = ub913_log_status,
541};
542
543static const struct v4l2_subdev_pad_ops ub913_pad_ops = {
544	.enable_streams = ub913_enable_streams,
545	.disable_streams = ub913_disable_streams,
546	.set_routing = ub913_set_routing,
547	.get_frame_desc = ub913_get_frame_desc,
548	.get_fmt = v4l2_subdev_get_fmt,
549	.set_fmt = ub913_set_fmt,
550};
551
552static const struct v4l2_subdev_ops ub913_subdev_ops = {
553	.core = &ub913_subdev_core_ops,
554	.pad = &ub913_pad_ops,
555};
556
557static const struct v4l2_subdev_internal_ops ub913_internal_ops = {
558	.init_state = ub913_init_state,
559};
560
561static const struct media_entity_operations ub913_entity_ops = {
562	.link_validate = v4l2_subdev_link_validate,
563};
564
565static int ub913_notify_bound(struct v4l2_async_notifier *notifier,
566			      struct v4l2_subdev *source_subdev,
567			      struct v4l2_async_connection *asd)
568{
569	struct ub913_data *priv = sd_to_ub913(notifier->sd);
570	struct device *dev = &priv->client->dev;
571	int ret;
572
573	ret = media_entity_get_fwnode_pad(&source_subdev->entity,
574					  source_subdev->fwnode,
575					  MEDIA_PAD_FL_SOURCE);
576	if (ret < 0) {
577		dev_err(dev, "Failed to find pad for %s\n",
578			source_subdev->name);
579		return ret;
580	}
581
582	priv->source_sd = source_subdev;
583	priv->source_sd_pad = ret;
584
585	ret = media_create_pad_link(&source_subdev->entity, priv->source_sd_pad,
586				    &priv->sd.entity, UB913_PAD_SINK,
587				    MEDIA_LNK_FL_ENABLED |
588					    MEDIA_LNK_FL_IMMUTABLE);
589	if (ret) {
590		dev_err(dev, "Unable to link %s:%u -> %s:0\n",
591			source_subdev->name, priv->source_sd_pad,
592			priv->sd.name);
593		return ret;
594	}
595
596	return 0;
597}
598
599static const struct v4l2_async_notifier_operations ub913_notify_ops = {
600	.bound = ub913_notify_bound,
601};
602
603static int ub913_v4l2_notifier_register(struct ub913_data *priv)
604{
605	struct device *dev = &priv->client->dev;
606	struct v4l2_async_connection *asd;
607	struct fwnode_handle *ep_fwnode;
608	int ret;
609
610	ep_fwnode = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev),
611						    UB913_PAD_SINK, 0, 0);
612	if (!ep_fwnode) {
613		dev_err(dev, "No graph endpoint\n");
614		return -ENODEV;
615	}
616
617	v4l2_async_subdev_nf_init(&priv->notifier, &priv->sd);
618
619	asd = v4l2_async_nf_add_fwnode_remote(&priv->notifier, ep_fwnode,
620					      struct v4l2_async_connection);
621
622	fwnode_handle_put(ep_fwnode);
623
624	if (IS_ERR(asd)) {
625		dev_err(dev, "Failed to add subdev: %pe", asd);
626		v4l2_async_nf_cleanup(&priv->notifier);
627		return PTR_ERR(asd);
628	}
629
630	priv->notifier.ops = &ub913_notify_ops;
631
632	ret = v4l2_async_nf_register(&priv->notifier);
633	if (ret) {
634		dev_err(dev, "Failed to register subdev_notifier");
635		v4l2_async_nf_cleanup(&priv->notifier);
636		return ret;
637	}
638
639	return 0;
640}
641
642static void ub913_v4l2_nf_unregister(struct ub913_data *priv)
643{
644	v4l2_async_nf_unregister(&priv->notifier);
645	v4l2_async_nf_cleanup(&priv->notifier);
646}
647
648static int ub913_register_clkout(struct ub913_data *priv)
649{
650	struct device *dev = &priv->client->dev;
651	const char *name;
652	int ret;
653
654	name = kasprintf(GFP_KERNEL, "ds90ub913.%s.clk_out", dev_name(dev));
655	if (!name)
656		return -ENOMEM;
657
658	priv->clkout_clk_hw = devm_clk_hw_register_fixed_factor(dev, name,
659		__clk_get_name(priv->clkin), 0, 1, 2);
660
661	kfree(name);
662
663	if (IS_ERR(priv->clkout_clk_hw))
664		return dev_err_probe(dev, PTR_ERR(priv->clkout_clk_hw),
665				     "Cannot register clkout hw\n");
666
667	ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
668					  priv->clkout_clk_hw);
669	if (ret)
670		return dev_err_probe(dev, ret,
671				     "Cannot add OF clock provider\n");
672
673	return 0;
674}
675
676static int ub913_i2c_master_init(struct ub913_data *priv)
677{
678	/* i2c fast mode */
679	u32 scl_high = 600 + 300; /* high period + rise time, ns */
680	u32 scl_low = 1300 + 300; /* low period + fall time, ns */
681	unsigned long ref;
682	int ret;
683
684	ref = clk_get_rate(priv->clkin) / 2;
685
686	scl_high = div64_u64((u64)scl_high * ref, 1000000000);
687	scl_low = div64_u64((u64)scl_low * ref, 1000000000);
688
689	ret = ub913_write(priv, UB913_REG_SCL_HIGH_TIME, scl_high, NULL);
690	if (ret)
691		return ret;
692
693	ret = ub913_write(priv, UB913_REG_SCL_LOW_TIME, scl_low, NULL);
694	if (ret)
695		return ret;
696
697	return 0;
698}
699
700static int ub913_add_i2c_adapter(struct ub913_data *priv)
701{
702	struct device *dev = &priv->client->dev;
703	struct i2c_atr_adap_desc desc = { };
704	struct fwnode_handle *i2c_handle;
705	int ret;
706
707	i2c_handle = device_get_named_child_node(dev, "i2c");
708	if (!i2c_handle)
709		return 0;
710
711	desc.chan_id = priv->plat_data->port;
712	desc.parent = dev;
713	desc.bus_handle = i2c_handle;
714	desc.num_aliases = 0;
715
716	ret = i2c_atr_add_adapter(priv->plat_data->atr, &desc);
717
718	fwnode_handle_put(i2c_handle);
719
720	if (ret)
721		return ret;
722
723	return 0;
724}
725
726static int ub913_parse_dt(struct ub913_data *priv)
727{
728	struct device *dev = &priv->client->dev;
729	struct v4l2_fwnode_endpoint vep = {
730		.bus_type = V4L2_MBUS_PARALLEL,
731	};
732	struct fwnode_handle *ep_fwnode;
733	int ret;
734
735	ep_fwnode = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev),
736						    UB913_PAD_SINK, 0, 0);
737	if (!ep_fwnode)
738		return dev_err_probe(dev, -ENOENT, "No sink endpoint\n");
739
740	ret = v4l2_fwnode_endpoint_parse(ep_fwnode, &vep);
741
742	fwnode_handle_put(ep_fwnode);
743
744	if (ret)
745		return dev_err_probe(dev, ret,
746				     "failed to parse sink endpoint data\n");
747
748	if (vep.bus.parallel.flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
749		priv->pclk_polarity_rising = true;
750	else if (vep.bus.parallel.flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)
751		priv->pclk_polarity_rising = false;
752	else
753		return dev_err_probe(dev, -EINVAL,
754				     "bad value for 'pclk-sample'\n");
755
756	return 0;
757}
758
759static int ub913_hw_init(struct ub913_data *priv)
760{
761	struct device *dev = &priv->client->dev;
762	bool mode_override;
763	u8 mode;
764	int ret;
765	u8 v;
766
767	ret = ub913_read(priv, UB913_REG_MODE_SEL, &v, NULL);
768	if (ret)
769		return ret;
770
771	if (!(v & UB913_REG_MODE_SEL_MODE_UP_TO_DATE))
772		return dev_err_probe(dev, -ENODEV,
773				     "Mode value not stabilized\n");
774
775	mode_override = v & UB913_REG_MODE_SEL_MODE_OVERRIDE;
776	mode = v & UB913_REG_MODE_SEL_MODE_MASK;
777
778	dev_dbg(dev, "mode from %s: %#x\n",
779		mode_override ? "reg" : "deserializer", mode);
780
781	ret = ub913_i2c_master_init(priv);
782	if (ret)
783		return dev_err_probe(dev, ret, "i2c master init failed\n");
784
785	ret = ub913_update_bits(priv, UB913_REG_GENERAL_CFG,
786				UB913_REG_GENERAL_CFG_PCLK_RISING,
787				FIELD_PREP(UB913_REG_GENERAL_CFG_PCLK_RISING,
788					   priv->pclk_polarity_rising), NULL);
789
790	if (ret)
791		return ret;
792
793	return 0;
794}
795
796static int ub913_subdev_init(struct ub913_data *priv)
797{
798	struct device *dev = &priv->client->dev;
799	int ret;
800
801	v4l2_i2c_subdev_init(&priv->sd, priv->client, &ub913_subdev_ops);
802	priv->sd.internal_ops = &ub913_internal_ops;
803	priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_STREAMS;
804	priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
805	priv->sd.entity.ops = &ub913_entity_ops;
806
807	priv->pads[0].flags = MEDIA_PAD_FL_SINK;
808	priv->pads[1].flags = MEDIA_PAD_FL_SOURCE;
809
810	ret = media_entity_pads_init(&priv->sd.entity, 2, priv->pads);
811	if (ret)
812		return dev_err_probe(dev, ret, "Failed to init pads\n");
813
814	ret = v4l2_subdev_init_finalize(&priv->sd);
815	if (ret)
816		goto err_entity_cleanup;
817
818	ret = ub913_v4l2_notifier_register(priv);
819	if (ret) {
820		dev_err_probe(dev, ret,
821			      "v4l2 subdev notifier register failed\n");
822		goto err_subdev_cleanup;
823	}
824
825	ret = v4l2_async_register_subdev(&priv->sd);
826	if (ret) {
827		dev_err_probe(dev, ret, "v4l2_async_register_subdev error\n");
828		goto err_unreg_notif;
829	}
830
831	return 0;
832
833err_unreg_notif:
834	ub913_v4l2_nf_unregister(priv);
835err_subdev_cleanup:
836	v4l2_subdev_cleanup(&priv->sd);
837err_entity_cleanup:
838	media_entity_cleanup(&priv->sd.entity);
839
840	return ret;
841}
842
843static void ub913_subdev_uninit(struct ub913_data *priv)
844{
845	v4l2_async_unregister_subdev(&priv->sd);
846	ub913_v4l2_nf_unregister(priv);
847	v4l2_subdev_cleanup(&priv->sd);
848	media_entity_cleanup(&priv->sd.entity);
849}
850
851static int ub913_probe(struct i2c_client *client)
852{
853	struct device *dev = &client->dev;
854	struct ub913_data *priv;
855	int ret;
856
857	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
858	if (!priv)
859		return -ENOMEM;
860
861	priv->client = client;
862
863	priv->plat_data = dev_get_platdata(&client->dev);
864	if (!priv->plat_data)
865		return dev_err_probe(dev, -ENODEV, "Platform data missing\n");
866
867	priv->regmap = devm_regmap_init_i2c(client, &ub913_regmap_config);
868	if (IS_ERR(priv->regmap))
869		return dev_err_probe(dev, PTR_ERR(priv->regmap),
870				     "Failed to init regmap\n");
871
872	/*
873	 * ub913 can also work without ext clock, but that is not supported by
874	 * the driver yet.
875	 */
876	priv->clkin = devm_clk_get(dev, "clkin");
877	if (IS_ERR(priv->clkin))
878		return dev_err_probe(dev, PTR_ERR(priv->clkin),
879				     "Cannot get CLKIN\n");
880
881	ret = ub913_parse_dt(priv);
882	if (ret)
883		return ret;
884
885	ret = ub913_hw_init(priv);
886	if (ret)
887		return ret;
888
889	ret = ub913_gpiochip_probe(priv);
890	if (ret)
891		return dev_err_probe(dev, ret, "Failed to init gpiochip\n");
892
893	ret = ub913_register_clkout(priv);
894	if (ret) {
895		dev_err_probe(dev, ret, "Failed to register clkout\n");
896		goto err_gpiochip_remove;
897	}
898
899	ret = ub913_subdev_init(priv);
900	if (ret)
901		goto err_gpiochip_remove;
902
903	ret = ub913_add_i2c_adapter(priv);
904	if (ret) {
905		dev_err_probe(dev, ret, "failed to add remote i2c adapter\n");
906		goto err_subdev_uninit;
907	}
908
909	return 0;
910
911err_subdev_uninit:
912	ub913_subdev_uninit(priv);
913err_gpiochip_remove:
914	ub913_gpiochip_remove(priv);
915
916	return ret;
917}
918
919static void ub913_remove(struct i2c_client *client)
920{
921	struct v4l2_subdev *sd = i2c_get_clientdata(client);
922	struct ub913_data *priv = sd_to_ub913(sd);
923
924	i2c_atr_del_adapter(priv->plat_data->atr, priv->plat_data->port);
925
926	ub913_subdev_uninit(priv);
927
928	ub913_gpiochip_remove(priv);
929}
930
931static const struct i2c_device_id ub913_id[] = {
932	{ "ds90ub913a-q1" },
933	{}
934};
935MODULE_DEVICE_TABLE(i2c, ub913_id);
936
937static const struct of_device_id ub913_dt_ids[] = {
938	{ .compatible = "ti,ds90ub913a-q1" },
939	{}
940};
941MODULE_DEVICE_TABLE(of, ub913_dt_ids);
942
943static struct i2c_driver ds90ub913_driver = {
944	.probe		= ub913_probe,
945	.remove		= ub913_remove,
946	.id_table	= ub913_id,
947	.driver = {
948		.name	= "ds90ub913a",
949		.of_match_table = ub913_dt_ids,
950	},
951};
952module_i2c_driver(ds90ub913_driver);
953
954MODULE_LICENSE("GPL");
955MODULE_DESCRIPTION("Texas Instruments DS90UB913 FPD-Link III Serializer Driver");
956MODULE_AUTHOR("Luca Ceresoli <luca@lucaceresoli.net>");
957MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>");
958MODULE_IMPORT_NS("I2C_ATR");