ccs.h

  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * drivers/media/i2c/smiapp/ccs.h
  4 *
  5 * Generic driver for MIPI CCS/SMIA/SMIA++ compliant camera sensors
  6 *
  7 * Copyright (C) 2020 Intel Corporation
  8 * Copyright (C) 2010--2012 Nokia Corporation
  9 * Contact: Sakari Ailus <sakari.ailus@linux.intel.com>
 10 */
 11
 12#ifndef __CCS_H__
 13#define __CCS_H__
 14
 15#include <linux/mutex.h>
 16#include <linux/regmap.h>
 17#include <media/v4l2-ctrls.h>
 18#include <media/v4l2-subdev.h>
 19
 20#include "ccs-data.h"
 21#include "ccs-limits.h"
 22#include "ccs-quirk.h"
 23#include "ccs-regs.h"
 24#include "ccs-reg-access.h"
 25#include "../ccs-pll.h"
 26#include "smiapp-reg-defs.h"
 27
 28/*
 29 * Standard SMIA++ constants
 30 */
 31#define SMIA_VERSION_1			10
 32#define SMIAPP_VERSION_0_8		8 /* Draft 0.8 */
 33#define SMIAPP_VERSION_0_9		9 /* Draft 0.9 */
 34#define SMIAPP_VERSION_1		10
 35
 36#define SMIAPP_PROFILE_0		0
 37#define SMIAPP_PROFILE_1		1
 38#define SMIAPP_PROFILE_2		2
 39
 40#define SMIAPP_NVM_PAGE_SIZE		64	/* bytes */
 41
 42#define SMIAPP_RESET_DELAY_CLOCKS	2400
 43#define SMIAPP_RESET_DELAY(clk)				\
 44	(1000 +	(SMIAPP_RESET_DELAY_CLOCKS * 1000	\
 45		 + (clk) / 1000 - 1) / ((clk) / 1000))
 46#define CCS_RESET_DELAY_US		5000
 47#define CCS_RESET_TIMEOUT_US		1000000
 48
 49#define CCS_COLOUR_COMPONENTS		4
 50
 51#define SMIAPP_NAME			"smiapp"
 52#define CCS_NAME			"ccs"
 53
 54#define CCS_DFL_I2C_ADDR	(0x20 >> 1) /* Default I2C Address */
 55#define CCS_ALT_I2C_ADDR	(0x6e >> 1) /* Alternate I2C Address */
 56
 57#define CCS_LIM(sensor, limit) \
 58	ccs_get_limit(sensor, CCS_L_##limit, 0)
 59
 60#define CCS_LIM_AT(sensor, limit, offset)	\
 61	ccs_get_limit(sensor, CCS_L_##limit, CCS_L_##limit##_OFFSET(offset))
 62
 63struct ccs_flash_strobe_parms {
 64	u8 mode;
 65	u32 strobe_width_high_us;
 66	u16 strobe_delay;
 67	u16 stobe_start_point;
 68	u8 trigger;
 69};
 70
 71struct ccs_hwconfig {
 72	/*
 73	 * Change the cci address if i2c_addr_alt is set.
 74	 * Both default and alternate cci addr need to be present
 75	 */
 76	unsigned short i2c_addr_dfl;	/* Default i2c addr */
 77	unsigned short i2c_addr_alt;	/* Alternate i2c addr */
 78
 79	u32 ext_clk;			/* sensor external clk */
 80
 81	unsigned int lanes;		/* Number of CSI-2 lanes */
 82	u32 csi_signalling_mode;	/* CCS_CSI_SIGNALLING_MODE_* */
 83	u64 *op_sys_clock;
 84
 85	struct ccs_flash_strobe_parms *strobe_setup;
 86};
 87
 88struct ccs_quirk;
 89
 90#define CCS_MODULE_IDENT_FLAG_REV_LE		(1 << 0)
 91
 92struct ccs_module_ident {
 93	u16 mipi_manufacturer_id;
 94	u16 model_id;
 95	u8 smia_manufacturer_id;
 96	u8 revision_number_major;
 97
 98	u8 flags;
 99
100	char *name;
101	const struct ccs_quirk *quirk;
102};
103
104struct ccs_module_info {
105	u32 smia_manufacturer_id;
106	u32 mipi_manufacturer_id;
107	u32 model_id;
108	u32 revision_number;
109
110	u32 module_year;
111	u32 module_month;
112	u32 module_day;
113
114	u32 sensor_smia_manufacturer_id;
115	u32 sensor_mipi_manufacturer_id;
116	u32 sensor_model_id;
117	u32 sensor_revision_number;
118	u32 sensor_firmware_version;
119
120	u32 smia_version;
121	u32 smiapp_version;
122	u32 ccs_version;
123
124	char *name;
125	const struct ccs_quirk *quirk;
126};
127
128#define CCS_IDENT_FQ(manufacturer, model, rev, fl, _name, _quirk)	\
129	{ .smia_manufacturer_id = manufacturer,				\
130	  .model_id = model,						\
131	  .revision_number_major = rev,					\
132	  .flags = fl,							\
133	  .name = _name,						\
134	  .quirk = _quirk, }
135
136#define CCS_IDENT_LQ(manufacturer, model, rev, _name, _quirk)	\
137	{ .smia_manufacturer_id = manufacturer,				\
138	  .model_id = model,						\
139	  .revision_number_major = rev,					\
140	  .flags = CCS_MODULE_IDENT_FLAG_REV_LE,			\
141	  .name = _name,						\
142	  .quirk = _quirk, }
143
144#define CCS_IDENT_L(manufacturer, model, rev, _name)			\
145	{ .smia_manufacturer_id = manufacturer,				\
146	  .model_id = model,						\
147	  .revision_number_major = rev,					\
148	  .flags = CCS_MODULE_IDENT_FLAG_REV_LE,			\
149	  .name = _name, }
150
151#define CCS_IDENT_Q(manufacturer, model, rev, _name, _quirk)		\
152	{ .smia_manufacturer_id = manufacturer,				\
153	  .model_id = model,						\
154	  .revision_number_major = rev,					\
155	  .flags = 0,							\
156	  .name = _name,						\
157	  .quirk = _quirk, }
158
159#define CCS_IDENT(manufacturer, model, rev, _name)			\
160	{ .smia_manufacturer_id = manufacturer,				\
161	  .model_id = model,						\
162	  .revision_number_major = rev,					\
163	  .flags = 0,							\
164	  .name = _name, }
165
166struct ccs_csi_data_format {
167	u32 code;
168	u8 width;
169	u8 compressed;
170	u8 pixel_order;
171};
172
173#define CCS_SUBDEVS			3
174
175#define CCS_PA_PAD_SRC			0
176#define CCS_PAD_SINK			0
177#define CCS_PAD_SRC			1
178#define CCS_PADS			2
179
180struct ccs_binning_subtype {
181	u8 horizontal:4;
182	u8 vertical:4;
183} __packed;
184
185struct ccs_subdev {
186	struct v4l2_subdev sd;
187	struct media_pad pads[CCS_PADS];
188	unsigned short sink_pad;
189	unsigned short source_pad;
190	int npads;
191	struct ccs_sensor *sensor;
192	struct v4l2_ctrl_handler ctrl_handler;
193};
194
195/*
196 * struct ccs_sensor - Main device structure
197 */
198struct ccs_sensor {
199	/*
200	 * "mutex" is used to serialise access to all fields here
201	 * except v4l2_ctrls at the end of the struct. "mutex" is also
202	 * used to serialise access to file handle specific
203	 * information.
204	 */
205	struct mutex mutex;
206	struct ccs_subdev ssds[CCS_SUBDEVS];
207	u32 ssds_used;
208	struct ccs_subdev *src;
209	struct ccs_subdev *binner;
210	struct ccs_subdev *scaler;
211	struct ccs_subdev *pixel_array;
212	struct ccs_hwconfig hwcfg;
213	struct regulator_bulk_data *regulators;
214	struct clk *ext_clk;
215	struct gpio_desc *xshutdown;
216	struct gpio_desc *reset;
217	struct regmap *regmap;
218	void *ccs_limits;
219	u8 nbinning_subtypes;
220	struct ccs_binning_subtype binning_subtypes[CCS_LIM_BINNING_SUB_TYPE_MAX_N + 1];
221	u32 mbus_frame_fmts;
222	const struct ccs_csi_data_format *csi_format;
223	const struct ccs_csi_data_format *internal_csi_format;
224	struct v4l2_rect pa_src, scaler_sink, src_src;
225	u32 default_mbus_frame_fmts;
226	int default_pixel_order;
227	struct ccs_data_container sdata, mdata;
228
229	u8 binning_horizontal;
230	u8 binning_vertical;
231
232	u8 scale_m;
233	u8 scaling_mode;
234
235	u8 frame_skip;
236	u16 embedded_start; /* embedded data start line */
237	u16 embedded_end;
238	u16 image_start; /* image data start line */
239	u16 visible_pixel_start; /* start pixel of the visible image */
240
241	bool streaming;
242	bool dev_init_done;
243	bool handler_setup_needed;
244	u8 compressed_min_bpp;
245
246	struct ccs_module_info minfo;
247
248	struct ccs_pll pll;
249
250	/* Is a default format supported for a given BPP? */
251	unsigned long *valid_link_freqs;
252
253	/* Pixel array controls */
254	struct v4l2_ctrl *exposure;
255	struct v4l2_ctrl *hflip;
256	struct v4l2_ctrl *vflip;
257	struct v4l2_ctrl *vblank;
258	struct v4l2_ctrl *hblank;
259	struct v4l2_ctrl *pixel_rate_parray;
260	struct v4l2_ctrl *luminance_level;
261	/* src controls */
262	struct v4l2_ctrl *link_freq;
263	struct v4l2_ctrl *pixel_rate_csi;
264	/* test pattern colour components */
265	struct v4l2_ctrl *test_data[CCS_COLOUR_COMPONENTS];
266};
267
268#define to_ccs_subdev(_sd)				\
269	container_of(_sd, struct ccs_subdev, sd)
270
271#define to_ccs_sensor(_sd)	\
272	(to_ccs_subdev(_sd)->sensor)
273
274void ccs_replace_limit(struct ccs_sensor *sensor,
275		       unsigned int limit, unsigned int offset, u32 val);
276u32 ccs_get_limit(struct ccs_sensor *sensor, unsigned int limit,
277		  unsigned int offset);
278
279#endif /* __CCS_H__ */