irq-msi-lib.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2// Copyright (C) 2022 Linutronix GmbH
  3// Copyright (C) 2022 Intel
  4
  5#include <linux/export.h>
  6
  7#include <linux/irqchip/irq-msi-lib.h>
  8
  9/**
 10 * msi_lib_init_dev_msi_info - Domain info setup for MSI domains
 11 * @dev:		The device for which the domain is created for
 12 * @domain:		The domain providing this callback
 13 * @real_parent:	The real parent domain of the domain to be initialized
 14 *			which might be a domain built on top of @domain or
 15 *			@domain itself
 16 * @info:		The domain info for the domain to be initialize
 17 *
 18 * This function is to be used for all types of MSI domains above the root
 19 * parent domain and any intermediates. The topmost parent domain specific
 20 * functionality is determined via @real_parent.
 21 *
 22 * All intermediate domains between the root and the device domain must
 23 * have either msi_parent_ops.init_dev_msi_info = msi_parent_init_dev_msi_info
 24 * or invoke it down the line.
 25 */
 26bool msi_lib_init_dev_msi_info(struct device *dev, struct irq_domain *domain,
 27			       struct irq_domain *real_parent,
 28			       struct msi_domain_info *info)
 29{
 30	const struct msi_parent_ops *pops = real_parent->msi_parent_ops;
 31	struct irq_chip *chip = info->chip;
 32	u32 required_flags;
 33
 34	/* Parent ops available? */
 35	if (WARN_ON_ONCE(!pops))
 36		return false;
 37
 38	/*
 39	 * MSI parent domain specific settings. For now there is only the
 40	 * root parent domain, e.g. NEXUS, acting as a MSI parent, but it is
 41	 * possible to stack MSI parents. See x86 vector -> irq remapping
 42	 */
 43	if (domain->bus_token == pops->bus_select_token) {
 44		if (WARN_ON_ONCE(domain != real_parent))
 45			return false;
 46	} else {
 47		WARN_ON_ONCE(1);
 48		return false;
 49	}
 50
 51	required_flags = pops->required_flags;
 52
 53	/* Is the target domain bus token supported? */
 54	switch(info->bus_token) {
 55	case DOMAIN_BUS_PCI_DEVICE_MSI:
 56	case DOMAIN_BUS_PCI_DEVICE_MSIX:
 57		if (WARN_ON_ONCE(!IS_ENABLED(CONFIG_PCI_MSI)))
 58			return false;
 59
 60		break;
 61	case DOMAIN_BUS_DEVICE_MSI:
 62		/*
 63		 * Per device MSI should never have any MSI feature bits
 64		 * set. It's sole purpose is to create a dumb interrupt
 65		 * chip which has a device specific irq_write_msi_msg()
 66		 * callback.
 67		 */
 68		if (WARN_ON_ONCE(info->flags))
 69			return false;
 70
 71		/* Core managed MSI descriptors */
 72		info->flags = MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS | MSI_FLAG_FREE_MSI_DESCS;
 73		fallthrough;
 74	case DOMAIN_BUS_WIRED_TO_MSI:
 75		/* Remove PCI specific flags */
 76		required_flags &= ~MSI_FLAG_PCI_MSI_MASK_PARENT;
 77		break;
 78	default:
 79		/*
 80		 * This should never be reached. See
 81		 * msi_lib_irq_domain_select()
 82		 */
 83		WARN_ON_ONCE(1);
 84		return false;
 85	}
 86
 87	/*
 88	 * Mask out the domain specific MSI feature flags which are not
 89	 * supported by the real parent.
 90	 */
 91	info->flags			&= pops->supported_flags;
 92	/* Enforce the required flags */
 93	info->flags			|= required_flags;
 94
 95	/* Chip updates for all child bus types */
 96	if (!chip->irq_eoi && (pops->chip_flags & MSI_CHIP_FLAG_SET_EOI))
 97		chip->irq_eoi = irq_chip_eoi_parent;
 98	if (!chip->irq_ack && (pops->chip_flags & MSI_CHIP_FLAG_SET_ACK))
 99		chip->irq_ack = irq_chip_ack_parent;
100
101	/*
102	 * The device MSI domain can never have a set affinity callback. It
103	 * always has to rely on the parent domain to handle affinity
104	 * settings. The device MSI domain just has to write the resulting
105	 * MSI message into the hardware which is the whole purpose of the
106	 * device MSI domain aside of mask/unmask which is provided e.g. by
107	 * PCI/MSI device domains.
108	 *
109	 * The exception to the rule is when the underlying domain
110	 * tells you that affinity is not a thing -- for example when
111	 * everything is muxed behind a single interrupt.
112	 */
113	if (!chip->irq_set_affinity && !(info->flags & MSI_FLAG_NO_AFFINITY))
114		chip->irq_set_affinity = msi_domain_set_affinity;
115
116	/*
117	 * If the parent domain insists on being in charge of masking, obey
118	 * blindly. The interrupt is un-masked at the PCI level on startup
119	 * and masked on shutdown to prevent rogue interrupts after the
120	 * driver freed the interrupt. Not masking it at the PCI level
121	 * speeds up operation for disable/enable_irq() as it avoids
122	 * getting all the way out to the PCI device.
123	 */
124	if (info->flags & MSI_FLAG_PCI_MSI_MASK_PARENT) {
125		chip->irq_mask		= irq_chip_mask_parent;
126		chip->irq_unmask	= irq_chip_unmask_parent;
127	}
128
129	return true;
130}
131EXPORT_SYMBOL_GPL(msi_lib_init_dev_msi_info);
132
133/**
134 * msi_lib_irq_domain_select - Shared select function for NEXUS domains
135 * @d:		Pointer to the irq domain on which select is invoked
136 * @fwspec:	Firmware spec describing what is searched
137 * @bus_token:	The bus token for which a matching irq domain is looked up
138 *
139 * Returns:	%0 if @d is not what is being looked for
140 *
141 *		%1 if @d is either the domain which is directly searched for or
142 *		   if @d is providing the parent MSI domain for the functionality
143 *			 requested with @bus_token.
144 */
145int msi_lib_irq_domain_select(struct irq_domain *d, struct irq_fwspec *fwspec,
146			      enum irq_domain_bus_token bus_token)
147{
148	const struct msi_parent_ops *ops = d->msi_parent_ops;
149	u32 busmask = BIT(bus_token);
150
151	if (!ops)
152		return 0;
153
154	struct fwnode_handle *fwh __free(fwnode_handle) =
155		d->flags & IRQ_DOMAIN_FLAG_FWNODE_PARENT ? fwnode_get_parent(fwspec->fwnode)
156							 : fwnode_handle_get(fwspec->fwnode);
157	if (fwh != d->fwnode || fwspec->param_count != 0)
158		return 0;
159
160	/* Handle pure domain searches */
161	if (bus_token == ops->bus_select_token)
162		return 1;
163
164	return !!(ops->bus_select_mask & busmask);
165}
166EXPORT_SYMBOL_GPL(msi_lib_irq_domain_select);