amd_iommu.h

  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * Copyright (C) 2009-2010 Advanced Micro Devices, Inc.
  4 * Author: Joerg Roedel <jroedel@suse.de>
  5 */
  6
  7#ifndef AMD_IOMMU_H
  8#define AMD_IOMMU_H
  9
 10#include <linux/iommu.h>
 11
 12#include "amd_iommu_types.h"
 13
 14irqreturn_t amd_iommu_int_thread(int irq, void *data);
 15irqreturn_t amd_iommu_int_thread_evtlog(int irq, void *data);
 16irqreturn_t amd_iommu_int_thread_pprlog(int irq, void *data);
 17irqreturn_t amd_iommu_int_thread_galog(int irq, void *data);
 18void amd_iommu_restart_log(struct amd_iommu *iommu, const char *evt_type,
 19			   u8 cntrl_intr, u8 cntrl_log,
 20			   u32 status_run_mask, u32 status_overflow_mask);
 21void amd_iommu_restart_event_logging(struct amd_iommu *iommu);
 22void amd_iommu_restart_ga_log(struct amd_iommu *iommu);
 23void amd_iommu_restart_ppr_log(struct amd_iommu *iommu);
 24void amd_iommu_set_rlookup_table(struct amd_iommu *iommu, u16 devid);
 25void iommu_feature_enable(struct amd_iommu *iommu, u8 bit);
 26void *__init iommu_alloc_4k_pages(struct amd_iommu *iommu,
 27				  gfp_t gfp, size_t size);
 28
 29#ifdef CONFIG_AMD_IOMMU_DEBUGFS
 30void amd_iommu_debugfs_setup(void);
 31#else
 32static inline void amd_iommu_debugfs_setup(void) {}
 33#endif
 34
 35/* Needed for interrupt remapping */
 36int amd_iommu_prepare(void);
 37int amd_iommu_enable(void);
 38void amd_iommu_disable(void);
 39int amd_iommu_reenable(int mode);
 40int amd_iommu_enable_faulting(unsigned int cpu);
 41extern int amd_iommu_guest_ir;
 42extern enum protection_domain_mode amd_iommu_pgtable;
 43extern int amd_iommu_gpt_level;
 44extern u8 amd_iommu_hpt_level;
 45extern unsigned long amd_iommu_pgsize_bitmap;
 46extern bool amd_iommu_hatdis;
 47
 48/* Protection domain ops */
 49void amd_iommu_init_identity_domain(void);
 50struct protection_domain *protection_domain_alloc(void);
 51struct iommu_domain *amd_iommu_domain_alloc_sva(struct device *dev,
 52						struct mm_struct *mm);
 53void amd_iommu_domain_free(struct iommu_domain *dom);
 54int iommu_sva_set_dev_pasid(struct iommu_domain *domain,
 55			    struct device *dev, ioasid_t pasid,
 56			    struct iommu_domain *old);
 57void amd_iommu_remove_dev_pasid(struct device *dev, ioasid_t pasid,
 58				struct iommu_domain *domain);
 59
 60/* SVA/PASID */
 61bool amd_iommu_pasid_supported(void);
 62
 63/* IOPF */
 64int amd_iommu_iopf_init(struct amd_iommu *iommu);
 65void amd_iommu_iopf_uninit(struct amd_iommu *iommu);
 66void amd_iommu_page_response(struct device *dev, struct iopf_fault *evt,
 67			     struct iommu_page_response *resp);
 68int amd_iommu_iopf_add_device(struct amd_iommu *iommu,
 69			      struct iommu_dev_data *dev_data);
 70void amd_iommu_iopf_remove_device(struct amd_iommu *iommu,
 71				  struct iommu_dev_data *dev_data);
 72
 73/* GCR3 setup */
 74int amd_iommu_set_gcr3(struct iommu_dev_data *dev_data,
 75		       ioasid_t pasid, unsigned long gcr3);
 76int amd_iommu_clear_gcr3(struct iommu_dev_data *dev_data, ioasid_t pasid);
 77
 78/* PPR */
 79int __init amd_iommu_alloc_ppr_log(struct amd_iommu *iommu);
 80void __init amd_iommu_free_ppr_log(struct amd_iommu *iommu);
 81void amd_iommu_enable_ppr_log(struct amd_iommu *iommu);
 82void amd_iommu_poll_ppr_log(struct amd_iommu *iommu);
 83int amd_iommu_complete_ppr(struct device *dev, u32 pasid, int status, int tag);
 84
 85/*
 86 * This function flushes all internal caches of
 87 * the IOMMU used by this driver.
 88 */
 89void amd_iommu_flush_all_caches(struct amd_iommu *iommu);
 90void amd_iommu_domain_flush_pages(struct protection_domain *domain,
 91				  u64 address, size_t size);
 92void amd_iommu_dev_flush_pasid_pages(struct iommu_dev_data *dev_data,
 93				     ioasid_t pasid, u64 address, size_t size);
 94
 95#ifdef CONFIG_IRQ_REMAP
 96int amd_iommu_create_irq_domain(struct amd_iommu *iommu);
 97#else
 98static inline int amd_iommu_create_irq_domain(struct amd_iommu *iommu)
 99{
100	return 0;
101}
102#endif
103
104static inline bool is_rd890_iommu(struct pci_dev *pdev)
105{
106	return (pdev->vendor == PCI_VENDOR_ID_ATI) &&
107	       (pdev->device == PCI_DEVICE_ID_RD890_IOMMU);
108}
109
110static inline bool check_feature(u64 mask)
111{
112	return (amd_iommu_efr & mask);
113}
114
115static inline bool check_feature2(u64 mask)
116{
117	return (amd_iommu_efr2 & mask);
118}
119
120static inline bool amd_iommu_v2_pgtbl_supported(void)
121{
122	return (check_feature(FEATURE_GIOSUP) && check_feature(FEATURE_GT));
123}
124
125static inline bool amd_iommu_gt_ppr_supported(void)
126{
127	return (amd_iommu_v2_pgtbl_supported() &&
128		check_feature(FEATURE_PPR) &&
129		check_feature(FEATURE_EPHSUP));
130}
131
132static inline u64 iommu_virt_to_phys(void *vaddr)
133{
134	return (u64)__sme_set(virt_to_phys(vaddr));
135}
136
137static inline void *iommu_phys_to_virt(unsigned long paddr)
138{
139	return phys_to_virt(__sme_clr(paddr));
140}
141
142static inline int get_pci_sbdf_id(struct pci_dev *pdev)
143{
144	int seg = pci_domain_nr(pdev->bus);
145	u16 devid = pci_dev_id(pdev);
146
147	return PCI_SEG_DEVID_TO_SBDF(seg, devid);
148}
149
150bool amd_iommu_ht_range_ignore(void);
151
152/*
153 * This must be called after device probe completes. During probe
154 * use rlookup_amd_iommu() get the iommu.
155 */
156static inline struct amd_iommu *get_amd_iommu_from_dev(struct device *dev)
157{
158	return iommu_get_iommu_dev(dev, struct amd_iommu, iommu);
159}
160
161/* This must be called after device probe completes. */
162static inline struct amd_iommu *get_amd_iommu_from_dev_data(struct iommu_dev_data *dev_data)
163{
164	return iommu_get_iommu_dev(dev_data->dev, struct amd_iommu, iommu);
165}
166
167static inline struct protection_domain *to_pdomain(struct iommu_domain *dom)
168{
169	return container_of(dom, struct protection_domain, domain);
170}
171
172bool translation_pre_enabled(struct amd_iommu *iommu);
173int __init add_special_device(u8 type, u8 id, u32 *devid, bool cmd_line);
174
175int amd_iommu_pdom_id_alloc(void);
176int amd_iommu_pdom_id_reserve(u16 id, gfp_t gfp);
177void amd_iommu_pdom_id_free(int id);
178void amd_iommu_pdom_id_destroy(void);
179
180#ifdef CONFIG_DMI
181void amd_iommu_apply_ivrs_quirks(void);
182#else
183static inline void amd_iommu_apply_ivrs_quirks(void) { }
184#endif
185struct dev_table_entry *amd_iommu_get_ivhd_dte_flags(u16 segid, u16 devid);
186
187void amd_iommu_domain_set_pgtable(struct protection_domain *domain,
188				  u64 *root, int mode);
189struct dev_table_entry *get_dev_table(struct amd_iommu *iommu);
190struct iommu_dev_data *search_dev_data(struct amd_iommu *iommu, u16 devid);
191
192#endif /* AMD_IOMMU_H */