imx6ul_tsc.c

  1// SPDX-License-Identifier: GPL-2.0
  2//
  3// Freescale i.MX6UL touchscreen controller driver
  4//
  5// Copyright (C) 2015 Freescale Semiconductor, Inc.
  6
  7#include <linux/errno.h>
  8#include <linux/kernel.h>
  9#include <linux/module.h>
 10#include <linux/bitfield.h>
 11#include <linux/gpio/consumer.h>
 12#include <linux/input.h>
 13#include <linux/slab.h>
 14#include <linux/completion.h>
 15#include <linux/delay.h>
 16#include <linux/of.h>
 17#include <linux/interrupt.h>
 18#include <linux/platform_device.h>
 19#include <linux/clk.h>
 20#include <linux/io.h>
 21#include <linux/log2.h>
 22
 23/* ADC configuration registers field define */
 24#define ADC_AIEN		BIT(7)
 25#define ADC_ADCH_MASK		GENMASK(4, 0)
 26#define ADC_CONV_DISABLE	0x1F
 27#define ADC_AVGE		BIT(5)
 28#define ADC_CAL			BIT(7)
 29#define ADC_CALF		BIT(1)
 30#define ADC_CONV_MODE_MASK	GENMASK(3, 2)
 31#define ADC_12BIT_MODE		0x2
 32#define ADC_IPG_CLK		0x00
 33#define ADC_INPUT_CLK_MASK	GENMASK(1, 0)
 34#define ADC_CLK_DIV_8		0x03
 35#define ADC_CLK_DIV_MASK	GENMASK(6, 5)
 36#define ADC_SAMPLE_MODE		BIT(4)
 37#define ADC_HARDWARE_TRIGGER	BIT(13)
 38#define ADC_AVGS_MASK		GENMASK(15, 14)
 39#define SELECT_CHANNEL_4	0x04
 40#define SELECT_CHANNEL_1	0x01
 41
 42/* ADC registers */
 43#define REG_ADC_HC0		0x00
 44#define REG_ADC_HC1		0x04
 45#define REG_ADC_HC2		0x08
 46#define REG_ADC_HC3		0x0C
 47#define REG_ADC_HC4		0x10
 48#define REG_ADC_HS		0x14
 49#define REG_ADC_R0		0x18
 50#define REG_ADC_CFG		0x2C
 51#define REG_ADC_GC		0x30
 52#define REG_ADC_GS		0x34
 53
 54#define ADC_TIMEOUT		msecs_to_jiffies(100)
 55
 56/* TSC registers */
 57#define REG_TSC_BASIC_SETTING	0x00
 58#define REG_TSC_PRE_CHARGE_TIME	0x10
 59#define REG_TSC_FLOW_CONTROL	0x20
 60#define REG_TSC_MEASURE_VALUE	0x30
 61#define REG_TSC_INT_EN		0x40
 62#define REG_TSC_INT_SIG_EN	0x50
 63#define REG_TSC_INT_STATUS	0x60
 64#define REG_TSC_DEBUG_MODE	0x70
 65#define REG_TSC_DEBUG_MODE2	0x80
 66
 67/* TSC_MEASURE_VALUE register field define */
 68#define X_VALUE_MASK		GENMASK(27, 16)
 69#define Y_VALUE_MASK		GENMASK(11, 0)
 70
 71/* TSC configuration registers field define */
 72#define MEASURE_DELAY_TIME_MASK	GENMASK(31, 8)
 73#define DETECT_5_WIRE_MODE	BIT(4)
 74#define AUTO_MEASURE		BIT(0)
 75#define MEASURE_SIGNAL		BIT(0)
 76#define DETECT_SIGNAL		BIT(4)
 77#define VALID_SIGNAL		BIT(8)
 78#define MEASURE_INT_EN		BIT(0)
 79#define MEASURE_SIG_EN		BIT(0)
 80#define VALID_SIG_EN		BIT(8)
 81#define DE_GLITCH_MASK		GENMASK(30, 29)
 82#define DE_GLITCH_DEF		0x02
 83#define START_SENSE		BIT(12)
 84#define TSC_DISABLE		BIT(16)
 85#define DETECT_MODE		0x2
 86#define STATE_MACHINE_MASK	GENMASK(22, 20)
 87
 88struct imx6ul_tsc {
 89	struct device *dev;
 90	struct input_dev *input;
 91	void __iomem *tsc_regs;
 92	void __iomem *adc_regs;
 93	struct clk *tsc_clk;
 94	struct clk *adc_clk;
 95	struct gpio_desc *xnur_gpio;
 96
 97	u32 measure_delay_time;
 98	u32 pre_charge_time;
 99	bool average_enable;
100	u32 average_select;
101	u32 de_glitch;
102
103	struct completion completion;
104};
105
106/*
107 * TSC module need ADC to get the measure value. So
108 * before config TSC, we should initialize ADC module.
109 */
110static int imx6ul_adc_init(struct imx6ul_tsc *tsc)
111{
112	u32 adc_hc = 0;
113	u32 adc_gc;
114	u32 adc_gs;
115	u32 adc_cfg;
116	unsigned long timeout;
117
118	reinit_completion(&tsc->completion);
119
120	adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
121	adc_cfg &= ~(ADC_CONV_MODE_MASK | ADC_INPUT_CLK_MASK);
122	adc_cfg |= FIELD_PREP(ADC_CONV_MODE_MASK, ADC_12BIT_MODE) |
123		FIELD_PREP(ADC_INPUT_CLK_MASK, ADC_IPG_CLK);
124	adc_cfg &= ~(ADC_CLK_DIV_MASK | ADC_SAMPLE_MODE);
125	adc_cfg |= FIELD_PREP(ADC_CLK_DIV_MASK, ADC_CLK_DIV_8);
126	if (tsc->average_enable) {
127		adc_cfg &= ~ADC_AVGS_MASK;
128		adc_cfg |= FIELD_PREP(ADC_AVGS_MASK, tsc->average_select);
129	}
130	adc_cfg &= ~ADC_HARDWARE_TRIGGER;
131	writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
132
133	/* enable calibration interrupt */
134	adc_hc |= ADC_AIEN;
135	adc_hc |= FIELD_PREP(ADC_ADCH_MASK, ADC_CONV_DISABLE);
136	writel(adc_hc, tsc->adc_regs + REG_ADC_HC0);
137
138	/* start ADC calibration */
139	adc_gc = readl(tsc->adc_regs + REG_ADC_GC);
140	adc_gc |= ADC_CAL;
141	if (tsc->average_enable)
142		adc_gc |= ADC_AVGE;
143	writel(adc_gc, tsc->adc_regs + REG_ADC_GC);
144
145	timeout = wait_for_completion_timeout
146			(&tsc->completion, ADC_TIMEOUT);
147	if (timeout == 0) {
148		dev_err(tsc->dev, "Timeout for adc calibration\n");
149		return -ETIMEDOUT;
150	}
151
152	adc_gs = readl(tsc->adc_regs + REG_ADC_GS);
153	if (adc_gs & ADC_CALF) {
154		dev_err(tsc->dev, "ADC calibration failed\n");
155		return -EINVAL;
156	}
157
158	/* TSC need the ADC work in hardware trigger */
159	adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
160	adc_cfg |= ADC_HARDWARE_TRIGGER;
161	writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
162
163	return 0;
164}
165
166/*
167 * This is a TSC workaround. Currently TSC misconnect two
168 * ADC channels, this function remap channel configure for
169 * hardware trigger.
170 */
171static void imx6ul_tsc_channel_config(struct imx6ul_tsc *tsc)
172{
173	u32 adc_hc0, adc_hc1, adc_hc2, adc_hc3, adc_hc4;
174
175	adc_hc0 = FIELD_PREP(ADC_AIEN, 0);
176	writel(adc_hc0, tsc->adc_regs + REG_ADC_HC0);
177
178	adc_hc1 = FIELD_PREP(ADC_AIEN, 0) |
179		FIELD_PREP(ADC_ADCH_MASK, SELECT_CHANNEL_4);
180	writel(adc_hc1, tsc->adc_regs + REG_ADC_HC1);
181
182	adc_hc2 = FIELD_PREP(ADC_AIEN, 0);
183	writel(adc_hc2, tsc->adc_regs + REG_ADC_HC2);
184
185	adc_hc3 = FIELD_PREP(ADC_AIEN, 0) |
186		FIELD_PREP(ADC_ADCH_MASK, SELECT_CHANNEL_1);
187	writel(adc_hc3, tsc->adc_regs + REG_ADC_HC3);
188
189	adc_hc4 = FIELD_PREP(ADC_AIEN, 0);
190	writel(adc_hc4, tsc->adc_regs + REG_ADC_HC4);
191}
192
193/*
194 * TSC setting, confige the pre-charge time and measure delay time.
195 * different touch screen may need different pre-charge time and
196 * measure delay time.
197 */
198static void imx6ul_tsc_set(struct imx6ul_tsc *tsc)
199{
200	u32 basic_setting = 0;
201	u32 debug_mode2;
202	u32 start;
203
204	basic_setting |= FIELD_PREP(MEASURE_DELAY_TIME_MASK,
205				    tsc->measure_delay_time);
206	basic_setting |= AUTO_MEASURE;
207	writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETTING);
208
209	debug_mode2 = FIELD_PREP(DE_GLITCH_MASK, tsc->de_glitch);
210	writel(debug_mode2, tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
211
212	writel(tsc->pre_charge_time, tsc->tsc_regs + REG_TSC_PRE_CHARGE_TIME);
213	writel(MEASURE_INT_EN, tsc->tsc_regs + REG_TSC_INT_EN);
214	writel(MEASURE_SIG_EN | VALID_SIG_EN,
215		tsc->tsc_regs + REG_TSC_INT_SIG_EN);
216
217	/* start sense detection */
218	start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
219	start |= START_SENSE;
220	start &= ~TSC_DISABLE;
221	writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
222}
223
224static int imx6ul_tsc_init(struct imx6ul_tsc *tsc)
225{
226	int err;
227
228	err = imx6ul_adc_init(tsc);
229	if (err)
230		return err;
231	imx6ul_tsc_channel_config(tsc);
232	imx6ul_tsc_set(tsc);
233
234	return 0;
235}
236
237static void imx6ul_tsc_disable(struct imx6ul_tsc *tsc)
238{
239	u32 tsc_flow;
240	u32 adc_cfg;
241
242	/* TSC controller enters to idle status */
243	tsc_flow = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
244	tsc_flow |= TSC_DISABLE;
245	writel(tsc_flow, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
246
247	/* ADC controller enters to stop mode */
248	adc_cfg = readl(tsc->adc_regs + REG_ADC_HC0);
249	adc_cfg |= ADC_CONV_DISABLE;
250	writel(adc_cfg, tsc->adc_regs + REG_ADC_HC0);
251}
252
253/* Delay some time (max 2ms), wait the pre-charge done. */
254static bool tsc_wait_detect_mode(struct imx6ul_tsc *tsc)
255{
256	unsigned long timeout = jiffies + msecs_to_jiffies(2);
257	u32 state_machine;
258	u32 debug_mode2;
259
260	do {
261		if (time_after(jiffies, timeout))
262			return false;
263
264		usleep_range(200, 400);
265		debug_mode2 = readl(tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
266		state_machine = FIELD_GET(STATE_MACHINE_MASK, debug_mode2);
267	} while (state_machine != DETECT_MODE);
268
269	usleep_range(200, 400);
270	return true;
271}
272
273static irqreturn_t tsc_irq_fn(int irq, void *dev_id)
274{
275	struct imx6ul_tsc *tsc = dev_id;
276	u32 status;
277	u32 value;
278	u32 x, y;
279	u32 start;
280
281	status = readl(tsc->tsc_regs + REG_TSC_INT_STATUS);
282
283	/* write 1 to clear the bit measure-signal */
284	writel(MEASURE_SIGNAL | DETECT_SIGNAL,
285		tsc->tsc_regs + REG_TSC_INT_STATUS);
286
287	/* It's a HW self-clean bit. Set this bit and start sense detection */
288	start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
289	start |= START_SENSE;
290	writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
291
292	if (status & MEASURE_SIGNAL) {
293		value = readl(tsc->tsc_regs + REG_TSC_MEASURE_VALUE);
294		x = FIELD_GET(X_VALUE_MASK, value);
295		y = FIELD_GET(Y_VALUE_MASK, value);
296
297		/*
298		 * In detect mode, we can get the xnur gpio value,
299		 * otherwise assume contact is stiull active.
300		 */
301		if (!tsc_wait_detect_mode(tsc) ||
302		    gpiod_get_value_cansleep(tsc->xnur_gpio)) {
303			input_report_key(tsc->input, BTN_TOUCH, 1);
304			input_report_abs(tsc->input, ABS_X, x);
305			input_report_abs(tsc->input, ABS_Y, y);
306		} else {
307			input_report_key(tsc->input, BTN_TOUCH, 0);
308		}
309
310		input_sync(tsc->input);
311	}
312
313	return IRQ_HANDLED;
314}
315
316static irqreturn_t adc_irq_fn(int irq, void *dev_id)
317{
318	struct imx6ul_tsc *tsc = dev_id;
319	u32 coco;
320
321	coco = readl(tsc->adc_regs + REG_ADC_HS);
322	if (coco & 0x01) {
323		readl(tsc->adc_regs + REG_ADC_R0);
324		complete(&tsc->completion);
325	}
326
327	return IRQ_HANDLED;
328}
329
330static int imx6ul_tsc_start(struct imx6ul_tsc *tsc)
331{
332	int err;
333
334	err = clk_prepare_enable(tsc->adc_clk);
335	if (err) {
336		dev_err(tsc->dev,
337			"Could not prepare or enable the adc clock: %d\n",
338			err);
339		return err;
340	}
341
342	err = clk_prepare_enable(tsc->tsc_clk);
343	if (err) {
344		dev_err(tsc->dev,
345			"Could not prepare or enable the tsc clock: %d\n",
346			err);
347		goto disable_adc_clk;
348	}
349
350	err = imx6ul_tsc_init(tsc);
351	if (err)
352		goto disable_tsc_clk;
353
354	return 0;
355
356disable_tsc_clk:
357	clk_disable_unprepare(tsc->tsc_clk);
358disable_adc_clk:
359	clk_disable_unprepare(tsc->adc_clk);
360	return err;
361}
362
363static void imx6ul_tsc_stop(struct imx6ul_tsc *tsc)
364{
365	imx6ul_tsc_disable(tsc);
366
367	clk_disable_unprepare(tsc->tsc_clk);
368	clk_disable_unprepare(tsc->adc_clk);
369}
370
371
372static int imx6ul_tsc_open(struct input_dev *input_dev)
373{
374	struct imx6ul_tsc *tsc = input_get_drvdata(input_dev);
375
376	return imx6ul_tsc_start(tsc);
377}
378
379static void imx6ul_tsc_close(struct input_dev *input_dev)
380{
381	struct imx6ul_tsc *tsc = input_get_drvdata(input_dev);
382
383	imx6ul_tsc_stop(tsc);
384}
385
386static int imx6ul_tsc_probe(struct platform_device *pdev)
387{
388	struct device_node *np = pdev->dev.of_node;
389	struct imx6ul_tsc *tsc;
390	struct input_dev *input_dev;
391	int err;
392	int tsc_irq;
393	int adc_irq;
394	u32 average_samples;
395	u32 de_glitch;
396
397	tsc = devm_kzalloc(&pdev->dev, sizeof(*tsc), GFP_KERNEL);
398	if (!tsc)
399		return -ENOMEM;
400
401	input_dev = devm_input_allocate_device(&pdev->dev);
402	if (!input_dev)
403		return -ENOMEM;
404
405	input_dev->name = "iMX6UL Touchscreen Controller";
406	input_dev->id.bustype = BUS_HOST;
407
408	input_dev->open = imx6ul_tsc_open;
409	input_dev->close = imx6ul_tsc_close;
410
411	input_set_capability(input_dev, EV_KEY, BTN_TOUCH);
412	input_set_abs_params(input_dev, ABS_X, 0, 0xFFF, 0, 0);
413	input_set_abs_params(input_dev, ABS_Y, 0, 0xFFF, 0, 0);
414
415	input_set_drvdata(input_dev, tsc);
416
417	tsc->dev = &pdev->dev;
418	tsc->input = input_dev;
419	init_completion(&tsc->completion);
420
421	tsc->xnur_gpio = devm_gpiod_get(&pdev->dev, "xnur", GPIOD_IN);
422	if (IS_ERR(tsc->xnur_gpio)) {
423		err = PTR_ERR(tsc->xnur_gpio);
424		dev_err(&pdev->dev,
425			"failed to request GPIO tsc_X- (xnur): %d\n", err);
426		return err;
427	}
428
429	tsc->tsc_regs = devm_platform_ioremap_resource(pdev, 0);
430	if (IS_ERR(tsc->tsc_regs)) {
431		err = PTR_ERR(tsc->tsc_regs);
432		dev_err(&pdev->dev, "failed to remap tsc memory: %d\n", err);
433		return err;
434	}
435
436	tsc->adc_regs = devm_platform_ioremap_resource(pdev, 1);
437	if (IS_ERR(tsc->adc_regs)) {
438		err = PTR_ERR(tsc->adc_regs);
439		dev_err(&pdev->dev, "failed to remap adc memory: %d\n", err);
440		return err;
441	}
442
443	tsc->tsc_clk = devm_clk_get(&pdev->dev, "tsc");
444	if (IS_ERR(tsc->tsc_clk)) {
445		err = PTR_ERR(tsc->tsc_clk);
446		dev_err(&pdev->dev, "failed getting tsc clock: %d\n", err);
447		return err;
448	}
449
450	tsc->adc_clk = devm_clk_get(&pdev->dev, "adc");
451	if (IS_ERR(tsc->adc_clk)) {
452		err = PTR_ERR(tsc->adc_clk);
453		dev_err(&pdev->dev, "failed getting adc clock: %d\n", err);
454		return err;
455	}
456
457	tsc_irq = platform_get_irq(pdev, 0);
458	if (tsc_irq < 0)
459		return tsc_irq;
460
461	adc_irq = platform_get_irq(pdev, 1);
462	if (adc_irq < 0)
463		return adc_irq;
464
465	err = devm_request_threaded_irq(tsc->dev, tsc_irq,
466					NULL, tsc_irq_fn, IRQF_ONESHOT,
467					dev_name(&pdev->dev), tsc);
468	if (err) {
469		dev_err(&pdev->dev,
470			"failed requesting tsc irq %d: %d\n",
471			tsc_irq, err);
472		return err;
473	}
474
475	err = devm_request_irq(tsc->dev, adc_irq, adc_irq_fn, 0,
476				dev_name(&pdev->dev), tsc);
477	if (err) {
478		dev_err(&pdev->dev,
479			"failed requesting adc irq %d: %d\n",
480			adc_irq, err);
481		return err;
482	}
483
484	err = of_property_read_u32(np, "measure-delay-time",
485				   &tsc->measure_delay_time);
486	if (err)
487		tsc->measure_delay_time = 0xffff;
488
489	err = of_property_read_u32(np, "pre-charge-time",
490				   &tsc->pre_charge_time);
491	if (err)
492		tsc->pre_charge_time = 0xfff;
493
494	err = of_property_read_u32(np, "touchscreen-average-samples",
495				   &average_samples);
496	if (err)
497		average_samples = 1;
498
499	switch (average_samples) {
500	case 1:
501		tsc->average_enable = false;
502		tsc->average_select = 0; /* value unused; initialize anyway */
503		break;
504	case 4:
505	case 8:
506	case 16:
507	case 32:
508		tsc->average_enable = true;
509		tsc->average_select = ilog2(average_samples) - 2;
510		break;
511	default:
512		dev_err(&pdev->dev,
513			"touchscreen-average-samples (%u) must be 1, 4, 8, 16 or 32\n",
514			average_samples);
515		return -EINVAL;
516	}
517
518	err = of_property_read_u32(np, "debounce-delay-us", &de_glitch);
519	if (err) {
520		tsc->de_glitch = DE_GLITCH_DEF;
521	} else {
522		u64 cycles;
523		unsigned long rate = clk_get_rate(tsc->tsc_clk);
524
525		cycles = DIV64_U64_ROUND_UP((u64)de_glitch * rate, USEC_PER_SEC);
526
527		if (cycles <= 0x3ff)
528			tsc->de_glitch = 3;
529		else if (cycles <= 0x7ff)
530			tsc->de_glitch = 2;
531		else if (cycles <= 0xfff)
532			tsc->de_glitch = 1;
533		else
534			tsc->de_glitch = 0;
535	}
536
537	err = input_register_device(tsc->input);
538	if (err) {
539		dev_err(&pdev->dev,
540			"failed to register input device: %d\n", err);
541		return err;
542	}
543
544	platform_set_drvdata(pdev, tsc);
545	return 0;
546}
547
548static int imx6ul_tsc_suspend(struct device *dev)
549{
550	struct platform_device *pdev = to_platform_device(dev);
551	struct imx6ul_tsc *tsc = platform_get_drvdata(pdev);
552	struct input_dev *input_dev = tsc->input;
553
554	mutex_lock(&input_dev->mutex);
555
556	if (input_device_enabled(input_dev))
557		imx6ul_tsc_stop(tsc);
558
559	mutex_unlock(&input_dev->mutex);
560
561	return 0;
562}
563
564static int imx6ul_tsc_resume(struct device *dev)
565{
566	struct platform_device *pdev = to_platform_device(dev);
567	struct imx6ul_tsc *tsc = platform_get_drvdata(pdev);
568	struct input_dev *input_dev = tsc->input;
569	int retval = 0;
570
571	mutex_lock(&input_dev->mutex);
572
573	if (input_device_enabled(input_dev))
574		retval = imx6ul_tsc_start(tsc);
575
576	mutex_unlock(&input_dev->mutex);
577
578	return retval;
579}
580
581static DEFINE_SIMPLE_DEV_PM_OPS(imx6ul_tsc_pm_ops,
582				imx6ul_tsc_suspend, imx6ul_tsc_resume);
583
584static const struct of_device_id imx6ul_tsc_match[] = {
585	{ .compatible = "fsl,imx6ul-tsc", },
586	{ /* sentinel */ }
587};
588MODULE_DEVICE_TABLE(of, imx6ul_tsc_match);
589
590static struct platform_driver imx6ul_tsc_driver = {
591	.driver		= {
592		.name	= "imx6ul-tsc",
593		.of_match_table	= imx6ul_tsc_match,
594		.pm	= pm_sleep_ptr(&imx6ul_tsc_pm_ops),
595	},
596	.probe		= imx6ul_tsc_probe,
597};
598module_platform_driver(imx6ul_tsc_driver);
599
600MODULE_AUTHOR("Haibo Chen <haibo.chen@freescale.com>");
601MODULE_DESCRIPTION("Freescale i.MX6UL Touchscreen controller driver");
602MODULE_LICENSE("GPL v2");