verbs.c

   1// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
   2/* Copyright (c) 2015 - 2021 Intel Corporation */
   3#include "main.h"
   4
   5/**
   6 * irdma_query_device - get device attributes
   7 * @ibdev: device pointer from stack
   8 * @props: returning device attributes
   9 * @udata: user data
  10 */
  11static int irdma_query_device(struct ib_device *ibdev,
  12			      struct ib_device_attr *props,
  13			      struct ib_udata *udata)
  14{
  15	struct irdma_device *iwdev = to_iwdev(ibdev);
  16	struct irdma_pci_f *rf = iwdev->rf;
  17	struct pci_dev *pcidev = iwdev->rf->pcidev;
  18	struct irdma_hw_attrs *hw_attrs = &rf->sc_dev.hw_attrs;
  19
  20	if (udata->inlen || udata->outlen)
  21		return -EINVAL;
  22
  23	memset(props, 0, sizeof(*props));
  24	addrconf_addr_eui48((u8 *)&props->sys_image_guid,
  25			    iwdev->netdev->dev_addr);
  26	props->fw_ver = (u64)irdma_fw_major_ver(&rf->sc_dev) << 32 |
  27			irdma_fw_minor_ver(&rf->sc_dev);
  28	props->device_cap_flags = IB_DEVICE_MEM_WINDOW |
  29				  IB_DEVICE_MEM_MGT_EXTENSIONS;
  30	if (hw_attrs->uk_attrs.hw_rev < IRDMA_GEN_3)
  31		props->kernel_cap_flags = IBK_LOCAL_DMA_LKEY;
  32	props->vendor_id = pcidev->vendor;
  33	props->vendor_part_id = pcidev->device;
  34
  35	props->hw_ver = rf->pcidev->revision;
  36	props->page_size_cap = hw_attrs->page_size_cap;
  37	props->max_mr_size = hw_attrs->max_mr_size;
  38	props->max_qp = rf->max_qp - rf->used_qps;
  39	props->max_qp_wr = hw_attrs->max_qp_wr;
  40	props->max_send_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
  41	props->max_recv_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
  42	props->max_cq = rf->max_cq - rf->used_cqs;
  43	props->max_cqe = rf->max_cqe - 1;
  44	props->max_mr = rf->max_mr - rf->used_mrs;
  45	if (hw_attrs->uk_attrs.hw_rev >= IRDMA_GEN_3)
  46		props->max_mw = props->max_mr;
  47	props->max_pd = rf->max_pd - rf->used_pds;
  48	props->max_sge_rd = hw_attrs->uk_attrs.max_hw_read_sges;
  49	props->max_qp_rd_atom = hw_attrs->max_hw_ird;
  50	props->max_qp_init_rd_atom = hw_attrs->max_hw_ord;
  51	if (rdma_protocol_roce(ibdev, 1)) {
  52		props->device_cap_flags |= IB_DEVICE_RC_RNR_NAK_GEN;
  53		props->max_pkeys = IRDMA_PKEY_TBL_SZ;
  54	}
  55
  56	props->max_ah = rf->max_ah;
  57	props->max_mcast_grp = rf->max_mcg;
  58	props->max_mcast_qp_attach = IRDMA_MAX_MGS_PER_CTX;
  59	props->max_total_mcast_qp_attach = rf->max_qp * IRDMA_MAX_MGS_PER_CTX;
  60	props->max_fast_reg_page_list_len = IRDMA_MAX_PAGES_PER_FMR;
  61	props->max_srq = rf->max_srq - rf->used_srqs;
  62	props->max_srq_wr = IRDMA_MAX_SRQ_WRS;
  63	props->max_srq_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
  64	if (hw_attrs->uk_attrs.feature_flags & IRDMA_FEATURE_ATOMIC_OPS)
  65		props->atomic_cap = IB_ATOMIC_HCA;
  66	else
  67		props->atomic_cap = IB_ATOMIC_NONE;
  68	props->masked_atomic_cap = props->atomic_cap;
  69	if (hw_attrs->uk_attrs.hw_rev >= IRDMA_GEN_3) {
  70#define HCA_CORE_CLOCK_KHZ 1000000UL
  71		props->timestamp_mask = GENMASK(31, 0);
  72		props->hca_core_clock = HCA_CORE_CLOCK_KHZ;
  73	}
  74	if (hw_attrs->uk_attrs.hw_rev >= IRDMA_GEN_3)
  75		props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
  76
  77	return 0;
  78}
  79
  80/**
  81 * irdma_query_port - get port attributes
  82 * @ibdev: device pointer from stack
  83 * @port: port number for query
  84 * @props: returning device attributes
  85 */
  86static int irdma_query_port(struct ib_device *ibdev, u32 port,
  87			    struct ib_port_attr *props)
  88{
  89	struct irdma_device *iwdev = to_iwdev(ibdev);
  90	struct net_device *netdev = iwdev->netdev;
  91
  92	/* no need to zero out pros here. done by caller */
  93
  94	props->max_mtu = IB_MTU_4096;
  95	props->active_mtu = ib_mtu_int_to_enum(netdev->mtu);
  96	props->lid = 1;
  97	props->lmc = 0;
  98	props->sm_lid = 0;
  99	props->sm_sl = 0;
 100	if (netif_carrier_ok(netdev) && netif_running(netdev)) {
 101		props->state = IB_PORT_ACTIVE;
 102		props->phys_state = IB_PORT_PHYS_STATE_LINK_UP;
 103	} else {
 104		props->state = IB_PORT_DOWN;
 105		props->phys_state = IB_PORT_PHYS_STATE_DISABLED;
 106	}
 107
 108	ib_get_eth_speed(ibdev, port, &props->active_speed,
 109			 &props->active_width);
 110
 111	if (rdma_protocol_roce(ibdev, 1)) {
 112		props->gid_tbl_len = 32;
 113		props->ip_gids = true;
 114		props->pkey_tbl_len = IRDMA_PKEY_TBL_SZ;
 115	} else {
 116		props->gid_tbl_len = 1;
 117	}
 118	props->qkey_viol_cntr = 0;
 119	props->port_cap_flags |= IB_PORT_CM_SUP | IB_PORT_REINIT_SUP;
 120	props->max_msg_sz = iwdev->rf->sc_dev.hw_attrs.max_hw_outbound_msg_size;
 121
 122	return 0;
 123}
 124
 125/**
 126 * irdma_disassociate_ucontext - Disassociate user context
 127 * @context: ib user context
 128 */
 129static void irdma_disassociate_ucontext(struct ib_ucontext *context)
 130{
 131}
 132
 133static int irdma_mmap_legacy(struct irdma_ucontext *ucontext,
 134			     struct vm_area_struct *vma)
 135{
 136	u64 pfn;
 137
 138	if (vma->vm_pgoff || vma->vm_end - vma->vm_start != PAGE_SIZE)
 139		return -EINVAL;
 140
 141	vma->vm_private_data = ucontext;
 142	pfn = ((uintptr_t)ucontext->iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET] +
 143	       pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT;
 144
 145	return rdma_user_mmap_io(&ucontext->ibucontext, vma, pfn, PAGE_SIZE,
 146				 pgprot_noncached(vma->vm_page_prot), NULL);
 147}
 148
 149static void irdma_mmap_free(struct rdma_user_mmap_entry *rdma_entry)
 150{
 151	struct irdma_user_mmap_entry *entry = to_irdma_mmap_entry(rdma_entry);
 152
 153	kfree(entry);
 154}
 155
 156static struct rdma_user_mmap_entry*
 157irdma_user_mmap_entry_insert(struct irdma_ucontext *ucontext, u64 bar_offset,
 158			     enum irdma_mmap_flag mmap_flag, u64 *mmap_offset)
 159{
 160	struct irdma_user_mmap_entry *entry = kzalloc(sizeof(*entry), GFP_KERNEL);
 161	int ret;
 162
 163	if (!entry)
 164		return NULL;
 165
 166	entry->bar_offset = bar_offset;
 167	entry->mmap_flag = mmap_flag;
 168
 169	ret = rdma_user_mmap_entry_insert(&ucontext->ibucontext,
 170					  &entry->rdma_entry, PAGE_SIZE);
 171	if (ret) {
 172		kfree(entry);
 173		return NULL;
 174	}
 175	*mmap_offset = rdma_user_mmap_get_offset(&entry->rdma_entry);
 176
 177	return &entry->rdma_entry;
 178}
 179
 180/**
 181 * irdma_mmap - user memory map
 182 * @context: context created during alloc
 183 * @vma: kernel info for user memory map
 184 */
 185static int irdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
 186{
 187	struct rdma_user_mmap_entry *rdma_entry;
 188	struct irdma_user_mmap_entry *entry;
 189	struct irdma_ucontext *ucontext;
 190	u64 pfn;
 191	int ret;
 192
 193	ucontext = to_ucontext(context);
 194
 195	/* Legacy support for libi40iw with hard-coded mmap key */
 196	if (ucontext->legacy_mode)
 197		return irdma_mmap_legacy(ucontext, vma);
 198
 199	rdma_entry = rdma_user_mmap_entry_get(&ucontext->ibucontext, vma);
 200	if (!rdma_entry) {
 201		ibdev_dbg(&ucontext->iwdev->ibdev,
 202			  "VERBS: pgoff[0x%lx] does not have valid entry\n",
 203			  vma->vm_pgoff);
 204		return -EINVAL;
 205	}
 206
 207	entry = to_irdma_mmap_entry(rdma_entry);
 208	ibdev_dbg(&ucontext->iwdev->ibdev,
 209		  "VERBS: bar_offset [0x%llx] mmap_flag [%d]\n",
 210		  entry->bar_offset, entry->mmap_flag);
 211
 212	pfn = (entry->bar_offset +
 213	      pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT;
 214
 215	switch (entry->mmap_flag) {
 216	case IRDMA_MMAP_IO_NC:
 217		ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE,
 218					pgprot_noncached(vma->vm_page_prot),
 219					rdma_entry);
 220		break;
 221	case IRDMA_MMAP_IO_WC:
 222		ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE,
 223					pgprot_writecombine(vma->vm_page_prot),
 224					rdma_entry);
 225		break;
 226	default:
 227		ret = -EINVAL;
 228	}
 229
 230	if (ret)
 231		ibdev_dbg(&ucontext->iwdev->ibdev,
 232			  "VERBS: bar_offset [0x%llx] mmap_flag[%d] err[%d]\n",
 233			  entry->bar_offset, entry->mmap_flag, ret);
 234	rdma_user_mmap_entry_put(rdma_entry);
 235
 236	return ret;
 237}
 238
 239/**
 240 * irdma_alloc_push_page - allocate a push page for qp
 241 * @iwqp: qp pointer
 242 */
 243static void irdma_alloc_push_page(struct irdma_qp *iwqp)
 244{
 245	struct irdma_cqp_request *cqp_request;
 246	struct cqp_cmds_info *cqp_info;
 247	struct irdma_device *iwdev = iwqp->iwdev;
 248	struct irdma_sc_qp *qp = &iwqp->sc_qp;
 249	int status;
 250
 251	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
 252	if (!cqp_request)
 253		return;
 254
 255	cqp_info = &cqp_request->info;
 256	cqp_info->cqp_cmd = IRDMA_OP_MANAGE_PUSH_PAGE;
 257	cqp_info->post_sq = 1;
 258	cqp_info->in.u.manage_push_page.info.push_idx = 0;
 259	cqp_info->in.u.manage_push_page.info.qs_handle =
 260		qp->vsi->qos[qp->user_pri].qs_handle;
 261	cqp_info->in.u.manage_push_page.info.free_page = 0;
 262	cqp_info->in.u.manage_push_page.info.push_page_type = 0;
 263	cqp_info->in.u.manage_push_page.cqp = &iwdev->rf->cqp.sc_cqp;
 264	cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
 265
 266	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
 267	if (!status && cqp_request->compl_info.op_ret_val <
 268	    iwdev->rf->sc_dev.hw_attrs.max_hw_device_pages) {
 269		qp->push_idx = cqp_request->compl_info.op_ret_val;
 270		qp->push_offset = 0;
 271	}
 272
 273	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
 274}
 275
 276/**
 277 * irdma_alloc_ucontext - Allocate the user context data structure
 278 * @uctx: uverbs context pointer
 279 * @udata: user data
 280 *
 281 * This keeps track of all objects associated with a particular
 282 * user-mode client.
 283 */
 284static int irdma_alloc_ucontext(struct ib_ucontext *uctx,
 285				struct ib_udata *udata)
 286{
 287#define IRDMA_ALLOC_UCTX_MIN_REQ_LEN offsetofend(struct irdma_alloc_ucontext_req, rsvd8)
 288#define IRDMA_ALLOC_UCTX_MIN_RESP_LEN offsetofend(struct irdma_alloc_ucontext_resp, rsvd)
 289	struct ib_device *ibdev = uctx->device;
 290	struct irdma_device *iwdev = to_iwdev(ibdev);
 291	struct irdma_alloc_ucontext_req req = {};
 292	struct irdma_alloc_ucontext_resp uresp = {};
 293	struct irdma_ucontext *ucontext = to_ucontext(uctx);
 294	struct irdma_uk_attrs *uk_attrs = &iwdev->rf->sc_dev.hw_attrs.uk_attrs;
 295
 296	if (udata->inlen < IRDMA_ALLOC_UCTX_MIN_REQ_LEN ||
 297	    udata->outlen < IRDMA_ALLOC_UCTX_MIN_RESP_LEN)
 298		return -EINVAL;
 299
 300	if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen)))
 301		return -EINVAL;
 302
 303	if (req.userspace_ver < 4 || req.userspace_ver > IRDMA_ABI_VER)
 304		goto ver_error;
 305
 306	ucontext->iwdev = iwdev;
 307	ucontext->abi_ver = req.userspace_ver;
 308
 309	if (!(req.comp_mask & IRDMA_SUPPORT_WQE_FORMAT_V2) &&
 310	    uk_attrs->hw_rev >= IRDMA_GEN_3)
 311		return -EOPNOTSUPP;
 312
 313	if (req.comp_mask & IRDMA_ALLOC_UCTX_USE_RAW_ATTR)
 314		ucontext->use_raw_attrs = true;
 315
 316	/* GEN_1 legacy support with libi40iw */
 317	if (udata->outlen == IRDMA_ALLOC_UCTX_MIN_RESP_LEN) {
 318		if (uk_attrs->hw_rev != IRDMA_GEN_1)
 319			return -EOPNOTSUPP;
 320
 321		ucontext->legacy_mode = true;
 322		uresp.max_qps = iwdev->rf->max_qp;
 323		uresp.max_pds = iwdev->rf->sc_dev.hw_attrs.max_hw_pds;
 324		uresp.wq_size = iwdev->rf->sc_dev.hw_attrs.max_qp_wr * 2;
 325		uresp.kernel_ver = req.userspace_ver;
 326		if (ib_copy_to_udata(udata, &uresp,
 327				     min(sizeof(uresp), udata->outlen)))
 328			return -EFAULT;
 329	} else {
 330		u64 bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET];
 331
 332		ucontext->db_mmap_entry =
 333			irdma_user_mmap_entry_insert(ucontext, bar_off,
 334						     IRDMA_MMAP_IO_NC,
 335						     &uresp.db_mmap_key);
 336		if (!ucontext->db_mmap_entry)
 337			return -ENOMEM;
 338
 339		uresp.kernel_ver = IRDMA_ABI_VER;
 340		uresp.feature_flags = uk_attrs->feature_flags;
 341		uresp.max_hw_wq_frags = uk_attrs->max_hw_wq_frags;
 342		uresp.max_hw_read_sges = uk_attrs->max_hw_read_sges;
 343		uresp.max_hw_inline = uk_attrs->max_hw_inline;
 344		uresp.max_hw_rq_quanta = uk_attrs->max_hw_rq_quanta;
 345		uresp.max_hw_wq_quanta = uk_attrs->max_hw_wq_quanta;
 346		uresp.max_hw_sq_chunk = uk_attrs->max_hw_sq_chunk;
 347		uresp.max_hw_cq_size = uk_attrs->max_hw_cq_size;
 348		uresp.min_hw_cq_size = uk_attrs->min_hw_cq_size;
 349		uresp.hw_rev = uk_attrs->hw_rev;
 350		uresp.comp_mask |= IRDMA_ALLOC_UCTX_USE_RAW_ATTR;
 351		uresp.min_hw_wq_size = uk_attrs->min_hw_wq_size;
 352		uresp.comp_mask |= IRDMA_ALLOC_UCTX_MIN_HW_WQ_SIZE;
 353		uresp.max_hw_srq_quanta = uk_attrs->max_hw_srq_quanta;
 354		uresp.comp_mask |= IRDMA_ALLOC_UCTX_MAX_HW_SRQ_QUANTA;
 355		if (ib_copy_to_udata(udata, &uresp,
 356				     min(sizeof(uresp), udata->outlen))) {
 357			rdma_user_mmap_entry_remove(ucontext->db_mmap_entry);
 358			return -EFAULT;
 359		}
 360	}
 361
 362	INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
 363	spin_lock_init(&ucontext->cq_reg_mem_list_lock);
 364	INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
 365	spin_lock_init(&ucontext->qp_reg_mem_list_lock);
 366	INIT_LIST_HEAD(&ucontext->srq_reg_mem_list);
 367	spin_lock_init(&ucontext->srq_reg_mem_list_lock);
 368
 369	return 0;
 370
 371ver_error:
 372	ibdev_err(&iwdev->ibdev,
 373		  "Invalid userspace driver version detected. Detected version %d, should be %d\n",
 374		  req.userspace_ver, IRDMA_ABI_VER);
 375	return -EINVAL;
 376}
 377
 378/**
 379 * irdma_dealloc_ucontext - deallocate the user context data structure
 380 * @context: user context created during alloc
 381 */
 382static void irdma_dealloc_ucontext(struct ib_ucontext *context)
 383{
 384	struct irdma_ucontext *ucontext = to_ucontext(context);
 385
 386	rdma_user_mmap_entry_remove(ucontext->db_mmap_entry);
 387}
 388
 389/**
 390 * irdma_alloc_pd - allocate protection domain
 391 * @pd: PD pointer
 392 * @udata: user data
 393 */
 394static int irdma_alloc_pd(struct ib_pd *pd, struct ib_udata *udata)
 395{
 396#define IRDMA_ALLOC_PD_MIN_RESP_LEN offsetofend(struct irdma_alloc_pd_resp, rsvd)
 397	struct irdma_pd *iwpd = to_iwpd(pd);
 398	struct irdma_device *iwdev = to_iwdev(pd->device);
 399	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
 400	struct irdma_pci_f *rf = iwdev->rf;
 401	struct irdma_alloc_pd_resp uresp = {};
 402	struct irdma_sc_pd *sc_pd;
 403	u32 pd_id = 0;
 404	int err;
 405
 406	if (udata && udata->outlen < IRDMA_ALLOC_PD_MIN_RESP_LEN)
 407		return -EINVAL;
 408
 409	err = irdma_alloc_rsrc(rf, rf->allocated_pds, rf->max_pd, &pd_id,
 410			       &rf->next_pd);
 411	if (err)
 412		return err;
 413
 414	sc_pd = &iwpd->sc_pd;
 415	if (udata) {
 416		struct irdma_ucontext *ucontext =
 417			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
 418						  ibucontext);
 419		irdma_sc_pd_init(dev, sc_pd, pd_id, ucontext->abi_ver);
 420		uresp.pd_id = pd_id;
 421		if (ib_copy_to_udata(udata, &uresp,
 422				     min(sizeof(uresp), udata->outlen))) {
 423			err = -EFAULT;
 424			goto error;
 425		}
 426	} else {
 427		irdma_sc_pd_init(dev, sc_pd, pd_id, IRDMA_ABI_VER);
 428	}
 429
 430	return 0;
 431error:
 432	irdma_free_rsrc(rf, rf->allocated_pds, pd_id);
 433
 434	return err;
 435}
 436
 437/**
 438 * irdma_dealloc_pd - deallocate pd
 439 * @ibpd: ptr of pd to be deallocated
 440 * @udata: user data
 441 */
 442static int irdma_dealloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
 443{
 444	struct irdma_pd *iwpd = to_iwpd(ibpd);
 445	struct irdma_device *iwdev = to_iwdev(ibpd->device);
 446
 447	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_pds, iwpd->sc_pd.pd_id);
 448
 449	return 0;
 450}
 451
 452/**
 453 * irdma_get_pbl - Retrieve pbl from a list given a virtual
 454 * address
 455 * @va: user virtual address
 456 * @pbl_list: pbl list to search in (QP's or CQ's)
 457 */
 458static struct irdma_pbl *irdma_get_pbl(unsigned long va,
 459				       struct list_head *pbl_list)
 460{
 461	struct irdma_pbl *iwpbl;
 462
 463	list_for_each_entry (iwpbl, pbl_list, list) {
 464		if (iwpbl->user_base == va) {
 465			list_del(&iwpbl->list);
 466			iwpbl->on_list = false;
 467			return iwpbl;
 468		}
 469	}
 470
 471	return NULL;
 472}
 473
 474/**
 475 * irdma_clean_cqes - clean cq entries for qp
 476 * @iwqp: qp ptr (user or kernel)
 477 * @iwcq: cq ptr
 478 */
 479static void irdma_clean_cqes(struct irdma_qp *iwqp, struct irdma_cq *iwcq)
 480{
 481	struct irdma_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
 482	unsigned long flags;
 483
 484	spin_lock_irqsave(&iwcq->lock, flags);
 485	irdma_uk_clean_cq(&iwqp->sc_qp.qp_uk, ukcq);
 486	spin_unlock_irqrestore(&iwcq->lock, flags);
 487}
 488
 489static void irdma_remove_push_mmap_entries(struct irdma_qp *iwqp)
 490{
 491	if (iwqp->push_db_mmap_entry) {
 492		rdma_user_mmap_entry_remove(iwqp->push_db_mmap_entry);
 493		iwqp->push_db_mmap_entry = NULL;
 494	}
 495	if (iwqp->push_wqe_mmap_entry) {
 496		rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry);
 497		iwqp->push_wqe_mmap_entry = NULL;
 498	}
 499}
 500
 501static int irdma_setup_push_mmap_entries(struct irdma_ucontext *ucontext,
 502					 struct irdma_qp *iwqp,
 503					 u64 *push_wqe_mmap_key,
 504					 u64 *push_db_mmap_key)
 505{
 506	struct irdma_device *iwdev = ucontext->iwdev;
 507	u64 rsvd, bar_off;
 508
 509	rsvd = IRDMA_PF_BAR_RSVD;
 510	bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET];
 511	/* skip over db page */
 512	bar_off += IRDMA_HW_PAGE_SIZE;
 513	/* push wqe page */
 514	bar_off += rsvd + iwqp->sc_qp.push_idx * IRDMA_HW_PAGE_SIZE;
 515	iwqp->push_wqe_mmap_entry = irdma_user_mmap_entry_insert(ucontext,
 516					bar_off, IRDMA_MMAP_IO_WC,
 517					push_wqe_mmap_key);
 518	if (!iwqp->push_wqe_mmap_entry)
 519		return -ENOMEM;
 520
 521	/* push doorbell page */
 522	bar_off += IRDMA_HW_PAGE_SIZE;
 523	iwqp->push_db_mmap_entry = irdma_user_mmap_entry_insert(ucontext,
 524					bar_off, IRDMA_MMAP_IO_NC,
 525					push_db_mmap_key);
 526	if (!iwqp->push_db_mmap_entry) {
 527		rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry);
 528		return -ENOMEM;
 529	}
 530
 531	return 0;
 532}
 533
 534/**
 535 * irdma_destroy_qp - destroy qp
 536 * @ibqp: qp's ib pointer also to get to device's qp address
 537 * @udata: user data
 538 */
 539static int irdma_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata)
 540{
 541	struct irdma_qp *iwqp = to_iwqp(ibqp);
 542	struct irdma_device *iwdev = iwqp->iwdev;
 543
 544	iwqp->sc_qp.qp_uk.destroy_pending = true;
 545
 546	if (iwqp->iwarp_state >= IRDMA_QP_STATE_IDLE)
 547		irdma_modify_qp_to_err(&iwqp->sc_qp);
 548
 549	if (!iwqp->user_mode)
 550		cancel_delayed_work_sync(&iwqp->dwork_flush);
 551
 552	if (!iwqp->user_mode) {
 553		if (iwqp->iwscq) {
 554			irdma_clean_cqes(iwqp, iwqp->iwscq);
 555			if (iwqp->iwrcq != iwqp->iwscq)
 556				irdma_clean_cqes(iwqp, iwqp->iwrcq);
 557		}
 558	}
 559
 560	irdma_qp_rem_ref(&iwqp->ibqp);
 561	if (!iwdev->rf->reset)
 562		wait_for_completion(&iwqp->free_qp);
 563	irdma_free_lsmm_rsrc(iwqp);
 564	irdma_cqp_qp_destroy_cmd(&iwdev->rf->sc_dev, &iwqp->sc_qp);
 565
 566	irdma_remove_push_mmap_entries(iwqp);
 567
 568	if (iwqp->sc_qp.qp_uk.qp_id == 1)
 569		iwdev->rf->hwqp1_rsvd = false;
 570	irdma_free_qp_rsrc(iwqp);
 571
 572	return 0;
 573}
 574
 575/**
 576 * irdma_setup_virt_qp - setup for allocation of virtual qp
 577 * @iwdev: irdma device
 578 * @iwqp: qp ptr
 579 * @init_info: initialize info to return
 580 */
 581static void irdma_setup_virt_qp(struct irdma_device *iwdev,
 582			       struct irdma_qp *iwqp,
 583			       struct irdma_qp_init_info *init_info)
 584{
 585	struct irdma_pbl *iwpbl = iwqp->iwpbl;
 586	struct irdma_qp_mr *qpmr = &iwpbl->qp_mr;
 587
 588	iwqp->page = qpmr->sq_page;
 589	init_info->shadow_area_pa = qpmr->shadow;
 590	if (iwpbl->pbl_allocated) {
 591		init_info->virtual_map = true;
 592		init_info->sq_pa = qpmr->sq_pbl.idx;
 593		/* Need to use contiguous buffer for RQ of QP
 594		 * in case it is associated with SRQ.
 595		 */
 596		init_info->rq_pa = init_info->qp_uk_init_info.srq_uk ?
 597			qpmr->rq_pa : qpmr->rq_pbl.idx;
 598	} else {
 599		init_info->sq_pa = qpmr->sq_pbl.addr;
 600		init_info->rq_pa = qpmr->rq_pbl.addr;
 601	}
 602}
 603
 604/**
 605 * irdma_setup_umode_qp - setup sq and rq size in user mode qp
 606 * @udata: udata
 607 * @iwdev: iwarp device
 608 * @iwqp: qp ptr (user or kernel)
 609 * @info: initialize info to return
 610 * @init_attr: Initial QP create attributes
 611 */
 612static int irdma_setup_umode_qp(struct ib_udata *udata,
 613				struct irdma_device *iwdev,
 614				struct irdma_qp *iwqp,
 615				struct irdma_qp_init_info *info,
 616				struct ib_qp_init_attr *init_attr)
 617{
 618	struct irdma_ucontext *ucontext = rdma_udata_to_drv_context(udata,
 619				struct irdma_ucontext, ibucontext);
 620	struct irdma_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
 621	struct irdma_create_qp_req req;
 622	unsigned long flags;
 623	int ret;
 624
 625	ret = ib_copy_from_udata(&req, udata,
 626				 min(sizeof(req), udata->inlen));
 627	if (ret) {
 628		ibdev_dbg(&iwdev->ibdev, "VERBS: ib_copy_from_data fail\n");
 629		return ret;
 630	}
 631
 632	iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
 633	iwqp->user_mode = 1;
 634	if (req.user_wqe_bufs) {
 635		info->qp_uk_init_info.legacy_mode = ucontext->legacy_mode;
 636		spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
 637		iwqp->iwpbl = irdma_get_pbl((unsigned long)req.user_wqe_bufs,
 638					    &ucontext->qp_reg_mem_list);
 639		spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
 640
 641		if (!iwqp->iwpbl) {
 642			ret = -ENODATA;
 643			ibdev_dbg(&iwdev->ibdev, "VERBS: no pbl info\n");
 644			return ret;
 645		}
 646	}
 647
 648	if (!ucontext->use_raw_attrs) {
 649		/**
 650		 * Maintain backward compat with older ABI which passes sq and
 651		 * rq depth in quanta in cap.max_send_wr and cap.max_recv_wr.
 652		 * There is no way to compute the correct value of
 653		 * iwqp->max_send_wr/max_recv_wr in the kernel.
 654		 */
 655		iwqp->max_send_wr = init_attr->cap.max_send_wr;
 656		iwqp->max_recv_wr = init_attr->cap.max_recv_wr;
 657		ukinfo->sq_size = init_attr->cap.max_send_wr;
 658		ukinfo->rq_size = init_attr->cap.max_recv_wr;
 659		irdma_uk_calc_shift_wq(ukinfo, &ukinfo->sq_shift,
 660				       &ukinfo->rq_shift);
 661	} else {
 662		ret = irdma_uk_calc_depth_shift_sq(ukinfo, &ukinfo->sq_depth,
 663						   &ukinfo->sq_shift);
 664		if (ret)
 665			return ret;
 666
 667		ret = irdma_uk_calc_depth_shift_rq(ukinfo, &ukinfo->rq_depth,
 668						   &ukinfo->rq_shift);
 669		if (ret)
 670			return ret;
 671
 672		iwqp->max_send_wr =
 673			(ukinfo->sq_depth - IRDMA_SQ_RSVD) >> ukinfo->sq_shift;
 674		iwqp->max_recv_wr =
 675			(ukinfo->rq_depth - IRDMA_RQ_RSVD) >> ukinfo->rq_shift;
 676		ukinfo->sq_size = ukinfo->sq_depth >> ukinfo->sq_shift;
 677		ukinfo->rq_size = ukinfo->rq_depth >> ukinfo->rq_shift;
 678	}
 679
 680	irdma_setup_virt_qp(iwdev, iwqp, info);
 681
 682	return 0;
 683}
 684
 685/**
 686 * irdma_setup_kmode_qp - setup initialization for kernel mode qp
 687 * @iwdev: iwarp device
 688 * @iwqp: qp ptr (user or kernel)
 689 * @info: initialize info to return
 690 * @init_attr: Initial QP create attributes
 691 */
 692static int irdma_setup_kmode_qp(struct irdma_device *iwdev,
 693				struct irdma_qp *iwqp,
 694				struct irdma_qp_init_info *info,
 695				struct ib_qp_init_attr *init_attr)
 696{
 697	struct irdma_dma_mem *mem = &iwqp->kqp.dma_mem;
 698	u32 size;
 699	int status;
 700	struct irdma_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
 701
 702	status = irdma_uk_calc_depth_shift_sq(ukinfo, &ukinfo->sq_depth,
 703					      &ukinfo->sq_shift);
 704	if (status)
 705		return status;
 706
 707	status = irdma_uk_calc_depth_shift_rq(ukinfo, &ukinfo->rq_depth,
 708					      &ukinfo->rq_shift);
 709	if (status)
 710		return status;
 711
 712	iwqp->kqp.sq_wrid_mem =
 713		kcalloc(ukinfo->sq_depth, sizeof(*iwqp->kqp.sq_wrid_mem), GFP_KERNEL);
 714	if (!iwqp->kqp.sq_wrid_mem)
 715		return -ENOMEM;
 716
 717	iwqp->kqp.rq_wrid_mem =
 718		kcalloc(ukinfo->rq_depth, sizeof(*iwqp->kqp.rq_wrid_mem), GFP_KERNEL);
 719
 720	if (!iwqp->kqp.rq_wrid_mem) {
 721		kfree(iwqp->kqp.sq_wrid_mem);
 722		iwqp->kqp.sq_wrid_mem = NULL;
 723		return -ENOMEM;
 724	}
 725
 726	ukinfo->sq_wrtrk_array = iwqp->kqp.sq_wrid_mem;
 727	ukinfo->rq_wrid_array = iwqp->kqp.rq_wrid_mem;
 728
 729	size = (ukinfo->sq_depth + ukinfo->rq_depth) * IRDMA_QP_WQE_MIN_SIZE;
 730	size += (IRDMA_SHADOW_AREA_SIZE << 3);
 731
 732	mem->size = ALIGN(size, 256);
 733	mem->va = dma_alloc_coherent(iwdev->rf->hw.device, mem->size,
 734				     &mem->pa, GFP_KERNEL);
 735	if (!mem->va) {
 736		kfree(iwqp->kqp.sq_wrid_mem);
 737		iwqp->kqp.sq_wrid_mem = NULL;
 738		kfree(iwqp->kqp.rq_wrid_mem);
 739		iwqp->kqp.rq_wrid_mem = NULL;
 740		return -ENOMEM;
 741	}
 742
 743	ukinfo->sq = mem->va;
 744	info->sq_pa = mem->pa;
 745	ukinfo->rq = &ukinfo->sq[ukinfo->sq_depth];
 746	info->rq_pa = info->sq_pa + (ukinfo->sq_depth * IRDMA_QP_WQE_MIN_SIZE);
 747	ukinfo->shadow_area = ukinfo->rq[ukinfo->rq_depth].elem;
 748	info->shadow_area_pa =
 749		info->rq_pa + (ukinfo->rq_depth * IRDMA_QP_WQE_MIN_SIZE);
 750	ukinfo->sq_size = ukinfo->sq_depth >> ukinfo->sq_shift;
 751	ukinfo->rq_size = ukinfo->rq_depth >> ukinfo->rq_shift;
 752	ukinfo->qp_id = info->qp_uk_init_info.qp_id;
 753
 754	iwqp->max_send_wr = (ukinfo->sq_depth - IRDMA_SQ_RSVD) >> ukinfo->sq_shift;
 755	iwqp->max_recv_wr = (ukinfo->rq_depth - IRDMA_RQ_RSVD) >> ukinfo->rq_shift;
 756	init_attr->cap.max_send_wr = iwqp->max_send_wr;
 757	init_attr->cap.max_recv_wr = iwqp->max_recv_wr;
 758
 759	return 0;
 760}
 761
 762static int irdma_cqp_create_qp_cmd(struct irdma_qp *iwqp)
 763{
 764	struct irdma_pci_f *rf = iwqp->iwdev->rf;
 765	struct irdma_cqp_request *cqp_request;
 766	struct cqp_cmds_info *cqp_info;
 767	struct irdma_create_qp_info *qp_info;
 768	int status;
 769
 770	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
 771	if (!cqp_request)
 772		return -ENOMEM;
 773
 774	cqp_info = &cqp_request->info;
 775	qp_info = &cqp_request->info.in.u.qp_create.info;
 776	qp_info->mac_valid = true;
 777	qp_info->cq_num_valid = true;
 778	qp_info->next_iwarp_state = IRDMA_QP_STATE_IDLE;
 779
 780	cqp_info->cqp_cmd = IRDMA_OP_QP_CREATE;
 781	cqp_info->post_sq = 1;
 782	cqp_info->in.u.qp_create.qp = &iwqp->sc_qp;
 783	cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
 784	status = irdma_handle_cqp_op(rf, cqp_request);
 785	irdma_put_cqp_request(&rf->cqp, cqp_request);
 786
 787	return status;
 788}
 789
 790static void irdma_roce_fill_and_set_qpctx_info(struct irdma_qp *iwqp,
 791					       struct irdma_qp_host_ctx_info *ctx_info)
 792{
 793	struct irdma_device *iwdev = iwqp->iwdev;
 794	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
 795	struct irdma_roce_offload_info *roce_info;
 796	struct irdma_udp_offload_info *udp_info;
 797
 798	udp_info = &iwqp->udp_info;
 799	udp_info->snd_mss = ib_mtu_enum_to_int(ib_mtu_int_to_enum(iwdev->vsi.mtu));
 800	udp_info->cwnd = iwdev->roce_cwnd;
 801	udp_info->rexmit_thresh = 2;
 802	udp_info->rnr_nak_thresh = 2;
 803	udp_info->src_port = 0xc000;
 804	udp_info->dst_port = ROCE_V2_UDP_DPORT;
 805	roce_info = &iwqp->roce_info;
 806	ether_addr_copy(roce_info->mac_addr, iwdev->netdev->dev_addr);
 807
 808	if (iwqp->ibqp.qp_type == IB_QPT_GSI && iwqp->ibqp.qp_num != 1)
 809		roce_info->is_qp1 = true;
 810	roce_info->rd_en = true;
 811	roce_info->wr_rdresp_en = true;
 812	if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_3)
 813		roce_info->bind_en = true;
 814	roce_info->dcqcn_en = false;
 815	roce_info->rtomin = 5;
 816
 817	roce_info->ack_credits = iwdev->roce_ackcreds;
 818	roce_info->ird_size = dev->hw_attrs.max_hw_ird;
 819	roce_info->ord_size = dev->hw_attrs.max_hw_ord;
 820
 821	if (!iwqp->user_mode) {
 822		roce_info->priv_mode_en = true;
 823		roce_info->fast_reg_en = true;
 824		roce_info->udprivcq_en = true;
 825	}
 826	roce_info->roce_tver = 0;
 827
 828	ctx_info->roce_info = &iwqp->roce_info;
 829	ctx_info->udp_info = &iwqp->udp_info;
 830	irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
 831}
 832
 833static void irdma_iw_fill_and_set_qpctx_info(struct irdma_qp *iwqp,
 834					     struct irdma_qp_host_ctx_info *ctx_info)
 835{
 836	struct irdma_device *iwdev = iwqp->iwdev;
 837	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
 838	struct irdma_iwarp_offload_info *iwarp_info;
 839
 840	iwarp_info = &iwqp->iwarp_info;
 841	ether_addr_copy(iwarp_info->mac_addr, iwdev->netdev->dev_addr);
 842	iwarp_info->rd_en = true;
 843	iwarp_info->wr_rdresp_en = true;
 844	iwarp_info->ecn_en = true;
 845	iwarp_info->rtomin = 5;
 846
 847	if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
 848		iwarp_info->ib_rd_en = true;
 849	if (!iwqp->user_mode) {
 850		iwarp_info->priv_mode_en = true;
 851		iwarp_info->fast_reg_en = true;
 852	}
 853	iwarp_info->ddp_ver = 1;
 854	iwarp_info->rdmap_ver = 1;
 855
 856	ctx_info->iwarp_info = &iwqp->iwarp_info;
 857	ctx_info->iwarp_info_valid = true;
 858	irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
 859	ctx_info->iwarp_info_valid = false;
 860}
 861
 862static int irdma_validate_qp_attrs(struct ib_qp_init_attr *init_attr,
 863				   struct irdma_device *iwdev)
 864{
 865	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
 866	struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs;
 867
 868	if (init_attr->create_flags)
 869		return -EOPNOTSUPP;
 870
 871	if (init_attr->cap.max_inline_data > uk_attrs->max_hw_inline ||
 872	    init_attr->cap.max_send_sge > uk_attrs->max_hw_wq_frags ||
 873	    init_attr->cap.max_recv_sge > uk_attrs->max_hw_wq_frags ||
 874	    init_attr->cap.max_send_wr > uk_attrs->max_hw_wq_quanta ||
 875	    init_attr->cap.max_recv_wr > uk_attrs->max_hw_rq_quanta)
 876		return -EINVAL;
 877
 878	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
 879		if (init_attr->qp_type != IB_QPT_RC &&
 880		    init_attr->qp_type != IB_QPT_UD &&
 881		    init_attr->qp_type != IB_QPT_GSI)
 882			return -EOPNOTSUPP;
 883	} else {
 884		if (init_attr->qp_type != IB_QPT_RC)
 885			return -EOPNOTSUPP;
 886	}
 887
 888	return 0;
 889}
 890
 891static void irdma_flush_worker(struct work_struct *work)
 892{
 893	struct delayed_work *dwork = to_delayed_work(work);
 894	struct irdma_qp *iwqp = container_of(dwork, struct irdma_qp, dwork_flush);
 895
 896	irdma_generate_flush_completions(iwqp);
 897}
 898
 899static int irdma_setup_gsi_qp_rsrc(struct irdma_qp *iwqp, u32 *qp_num)
 900{
 901	struct irdma_device *iwdev = iwqp->iwdev;
 902	struct irdma_pci_f *rf = iwdev->rf;
 903	unsigned long flags;
 904	int ret;
 905
 906	if (rf->rdma_ver <= IRDMA_GEN_2) {
 907		*qp_num = 1;
 908		return 0;
 909	}
 910
 911	spin_lock_irqsave(&rf->rsrc_lock, flags);
 912	if (!rf->hwqp1_rsvd) {
 913		*qp_num = 1;
 914		rf->hwqp1_rsvd = true;
 915		spin_unlock_irqrestore(&rf->rsrc_lock, flags);
 916	} else {
 917		spin_unlock_irqrestore(&rf->rsrc_lock, flags);
 918		ret = irdma_alloc_rsrc(rf, rf->allocated_qps, rf->max_qp,
 919				       qp_num, &rf->next_qp);
 920		if (ret)
 921			return ret;
 922	}
 923
 924	ret = irdma_vchnl_req_add_vport(&rf->sc_dev, iwdev->vport_id, *qp_num,
 925					(&iwdev->vsi)->qos);
 926	if (ret) {
 927		if (*qp_num != 1) {
 928			irdma_free_rsrc(rf, rf->allocated_qps, *qp_num);
 929		} else {
 930			spin_lock_irqsave(&rf->rsrc_lock, flags);
 931			rf->hwqp1_rsvd = false;
 932			spin_unlock_irqrestore(&rf->rsrc_lock, flags);
 933		}
 934		return ret;
 935	}
 936
 937	return 0;
 938}
 939
 940/**
 941 * irdma_create_qp - create qp
 942 * @ibqp: ptr of qp
 943 * @init_attr: attributes for qp
 944 * @udata: user data for create qp
 945 */
 946static int irdma_create_qp(struct ib_qp *ibqp,
 947			   struct ib_qp_init_attr *init_attr,
 948			   struct ib_udata *udata)
 949{
 950#define IRDMA_CREATE_QP_MIN_REQ_LEN offsetofend(struct irdma_create_qp_req, user_compl_ctx)
 951#define IRDMA_CREATE_QP_MIN_RESP_LEN offsetofend(struct irdma_create_qp_resp, rsvd)
 952	struct ib_pd *ibpd = ibqp->pd;
 953	struct irdma_pd *iwpd = to_iwpd(ibpd);
 954	struct irdma_device *iwdev = to_iwdev(ibpd->device);
 955	struct irdma_pci_f *rf = iwdev->rf;
 956	struct irdma_qp *iwqp = to_iwqp(ibqp);
 957	struct irdma_create_qp_resp uresp = {};
 958	u32 qp_num = 0;
 959	int err_code;
 960	struct irdma_sc_qp *qp;
 961	struct irdma_sc_dev *dev = &rf->sc_dev;
 962	struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs;
 963	struct irdma_qp_init_info init_info = {};
 964	struct irdma_qp_host_ctx_info *ctx_info;
 965	struct irdma_srq *iwsrq;
 966	bool srq_valid = false;
 967	u32 srq_id = 0;
 968
 969	if (init_attr->srq) {
 970		iwsrq = to_iwsrq(init_attr->srq);
 971		srq_valid = true;
 972		srq_id = iwsrq->srq_num;
 973		init_attr->cap.max_recv_sge = uk_attrs->max_hw_wq_frags;
 974		init_attr->cap.max_recv_wr = 4;
 975		init_info.qp_uk_init_info.srq_uk = &iwsrq->sc_srq.srq_uk;
 976	}
 977
 978	err_code = irdma_validate_qp_attrs(init_attr, iwdev);
 979	if (err_code)
 980		return err_code;
 981
 982	if (udata && (udata->inlen < IRDMA_CREATE_QP_MIN_REQ_LEN ||
 983		      udata->outlen < IRDMA_CREATE_QP_MIN_RESP_LEN))
 984		return -EINVAL;
 985
 986	init_info.vsi = &iwdev->vsi;
 987	init_info.qp_uk_init_info.uk_attrs = uk_attrs;
 988	init_info.qp_uk_init_info.sq_size = init_attr->cap.max_send_wr;
 989	init_info.qp_uk_init_info.rq_size = init_attr->cap.max_recv_wr;
 990	init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
 991	init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
 992	init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
 993
 994	qp = &iwqp->sc_qp;
 995	qp->qp_uk.back_qp = iwqp;
 996	qp->push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX;
 997
 998	iwqp->iwdev = iwdev;
 999	iwqp->q2_ctx_mem.size = ALIGN(IRDMA_Q2_BUF_SIZE + IRDMA_QP_CTX_SIZE,
1000				      256);
1001	iwqp->q2_ctx_mem.va = dma_alloc_coherent(dev->hw->device,
1002						 iwqp->q2_ctx_mem.size,
1003						 &iwqp->q2_ctx_mem.pa,
1004						 GFP_KERNEL);
1005	if (!iwqp->q2_ctx_mem.va)
1006		return -ENOMEM;
1007
1008	init_info.q2 = iwqp->q2_ctx_mem.va;
1009	init_info.q2_pa = iwqp->q2_ctx_mem.pa;
1010	init_info.host_ctx = (__le64 *)(init_info.q2 + IRDMA_Q2_BUF_SIZE);
1011	init_info.host_ctx_pa = init_info.q2_pa + IRDMA_Q2_BUF_SIZE;
1012
1013	if (init_attr->qp_type == IB_QPT_GSI) {
1014		err_code = irdma_setup_gsi_qp_rsrc(iwqp, &qp_num);
1015		if (err_code)
1016			goto error;
1017		iwqp->ibqp.qp_num = 1;
1018	} else {
1019		err_code = irdma_alloc_rsrc(rf, rf->allocated_qps, rf->max_qp,
1020					    &qp_num, &rf->next_qp);
1021		if (err_code)
1022			goto error;
1023		iwqp->ibqp.qp_num = qp_num;
1024	}
1025
1026	iwqp->iwpd = iwpd;
1027	qp = &iwqp->sc_qp;
1028	iwqp->iwscq = to_iwcq(init_attr->send_cq);
1029	iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
1030	iwqp->host_ctx.va = init_info.host_ctx;
1031	iwqp->host_ctx.pa = init_info.host_ctx_pa;
1032	iwqp->host_ctx.size = IRDMA_QP_CTX_SIZE;
1033
1034	init_info.pd = &iwpd->sc_pd;
1035	init_info.qp_uk_init_info.qp_id = qp_num;
1036	if (!rdma_protocol_roce(&iwdev->ibdev, 1))
1037		init_info.qp_uk_init_info.first_sq_wq = 1;
1038	iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
1039	init_waitqueue_head(&iwqp->waitq);
1040	init_waitqueue_head(&iwqp->mod_qp_waitq);
1041
1042	if (udata) {
1043		init_info.qp_uk_init_info.abi_ver = iwpd->sc_pd.abi_ver;
1044		err_code = irdma_setup_umode_qp(udata, iwdev, iwqp, &init_info,
1045						init_attr);
1046	} else {
1047		INIT_DELAYED_WORK(&iwqp->dwork_flush, irdma_flush_worker);
1048		init_info.qp_uk_init_info.abi_ver = IRDMA_ABI_VER;
1049		err_code = irdma_setup_kmode_qp(iwdev, iwqp, &init_info, init_attr);
1050	}
1051
1052	if (err_code) {
1053		ibdev_dbg(&iwdev->ibdev, "VERBS: setup qp failed\n");
1054		goto error;
1055	}
1056
1057	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
1058		if (init_attr->qp_type == IB_QPT_RC) {
1059			init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_ROCE_RC;
1060			init_info.qp_uk_init_info.qp_caps = IRDMA_SEND_WITH_IMM |
1061							    IRDMA_WRITE_WITH_IMM |
1062							    IRDMA_ROCE;
1063		} else {
1064			init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_ROCE_UD;
1065			init_info.qp_uk_init_info.qp_caps = IRDMA_SEND_WITH_IMM |
1066							    IRDMA_ROCE;
1067		}
1068	} else {
1069		init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_IWARP;
1070		init_info.qp_uk_init_info.qp_caps = IRDMA_WRITE_WITH_IMM;
1071	}
1072
1073	if (dev->hw_attrs.uk_attrs.hw_rev > IRDMA_GEN_1)
1074		init_info.qp_uk_init_info.qp_caps |= IRDMA_PUSH_MODE;
1075
1076	err_code = irdma_sc_qp_init(qp, &init_info);
1077	if (err_code) {
1078		ibdev_dbg(&iwdev->ibdev, "VERBS: qp_init fail\n");
1079		goto error;
1080	}
1081
1082	ctx_info = &iwqp->ctx_info;
1083	ctx_info->srq_valid = srq_valid;
1084	ctx_info->srq_id = srq_id;
1085	ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1086	ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1087
1088	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
1089		if (dev->ws_add(&iwdev->vsi, 0)) {
1090			irdma_cqp_qp_destroy_cmd(&rf->sc_dev, &iwqp->sc_qp);
1091			err_code = -EINVAL;
1092			goto error;
1093		}
1094		irdma_qp_add_qos(&iwqp->sc_qp);
1095		irdma_roce_fill_and_set_qpctx_info(iwqp, ctx_info);
1096	} else {
1097		irdma_iw_fill_and_set_qpctx_info(iwqp, ctx_info);
1098	}
1099
1100	err_code = irdma_cqp_create_qp_cmd(iwqp);
1101	if (err_code)
1102		goto error;
1103
1104	refcount_set(&iwqp->refcnt, 1);
1105	spin_lock_init(&iwqp->lock);
1106	spin_lock_init(&iwqp->sc_qp.pfpdu.lock);
1107	iwqp->sig_all = init_attr->sq_sig_type == IB_SIGNAL_ALL_WR;
1108	rf->qp_table[qp_num] = iwqp;
1109	init_completion(&iwqp->free_qp);
1110
1111	if (udata) {
1112		/* GEN_1 legacy support with libi40iw does not have expanded uresp struct */
1113		if (udata->outlen < sizeof(uresp)) {
1114			uresp.lsmm = 1;
1115			uresp.push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX_GEN_1;
1116		} else {
1117			if (rdma_protocol_iwarp(&iwdev->ibdev, 1))
1118				uresp.lsmm = 1;
1119		}
1120		uresp.actual_sq_size = init_info.qp_uk_init_info.sq_size;
1121		uresp.actual_rq_size = init_info.qp_uk_init_info.rq_size;
1122		uresp.qp_id = qp_num;
1123		uresp.qp_caps = qp->qp_uk.qp_caps;
1124
1125		err_code = ib_copy_to_udata(udata, &uresp,
1126					    min(sizeof(uresp), udata->outlen));
1127		if (err_code) {
1128			ibdev_dbg(&iwdev->ibdev, "VERBS: copy_to_udata failed\n");
1129			irdma_destroy_qp(&iwqp->ibqp, udata);
1130			return err_code;
1131		}
1132	}
1133
1134	return 0;
1135
1136error:
1137	irdma_free_qp_rsrc(iwqp);
1138	return err_code;
1139}
1140
1141static int irdma_get_ib_acc_flags(struct irdma_qp *iwqp)
1142{
1143	int acc_flags = 0;
1144
1145	if (rdma_protocol_roce(iwqp->ibqp.device, 1)) {
1146		if (iwqp->roce_info.wr_rdresp_en) {
1147			acc_flags |= IB_ACCESS_LOCAL_WRITE;
1148			acc_flags |= IB_ACCESS_REMOTE_WRITE;
1149		}
1150		if (iwqp->roce_info.rd_en)
1151			acc_flags |= IB_ACCESS_REMOTE_READ;
1152		if (iwqp->roce_info.bind_en)
1153			acc_flags |= IB_ACCESS_MW_BIND;
1154		if (iwqp->ctx_info.remote_atomics_en)
1155			acc_flags |= IB_ACCESS_REMOTE_ATOMIC;
1156	} else {
1157		if (iwqp->iwarp_info.wr_rdresp_en) {
1158			acc_flags |= IB_ACCESS_LOCAL_WRITE;
1159			acc_flags |= IB_ACCESS_REMOTE_WRITE;
1160		}
1161		if (iwqp->iwarp_info.rd_en)
1162			acc_flags |= IB_ACCESS_REMOTE_READ;
1163		if (iwqp->ctx_info.remote_atomics_en)
1164			acc_flags |= IB_ACCESS_REMOTE_ATOMIC;
1165	}
1166	return acc_flags;
1167}
1168
1169/**
1170 * irdma_query_qp - query qp attributes
1171 * @ibqp: qp pointer
1172 * @attr: attributes pointer
1173 * @attr_mask: Not used
1174 * @init_attr: qp attributes to return
1175 */
1176static int irdma_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1177			  int attr_mask, struct ib_qp_init_attr *init_attr)
1178{
1179	struct irdma_qp *iwqp = to_iwqp(ibqp);
1180	struct irdma_sc_qp *qp = &iwqp->sc_qp;
1181
1182	memset(attr, 0, sizeof(*attr));
1183	memset(init_attr, 0, sizeof(*init_attr));
1184
1185	attr->qp_state = iwqp->ibqp_state;
1186	attr->cur_qp_state = iwqp->ibqp_state;
1187	attr->cap.max_send_wr = iwqp->max_send_wr;
1188	attr->cap.max_recv_wr = iwqp->max_recv_wr;
1189	attr->cap.max_inline_data = qp->qp_uk.max_inline_data;
1190	attr->cap.max_send_sge = qp->qp_uk.max_sq_frag_cnt;
1191	attr->cap.max_recv_sge = qp->qp_uk.max_rq_frag_cnt;
1192	attr->qp_access_flags = irdma_get_ib_acc_flags(iwqp);
1193	attr->port_num = 1;
1194	if (rdma_protocol_roce(ibqp->device, 1)) {
1195		attr->path_mtu = ib_mtu_int_to_enum(iwqp->udp_info.snd_mss);
1196		attr->qkey = iwqp->roce_info.qkey;
1197		attr->rq_psn = iwqp->udp_info.epsn;
1198		attr->sq_psn = iwqp->udp_info.psn_nxt;
1199		attr->dest_qp_num = iwqp->roce_info.dest_qp;
1200		attr->pkey_index = iwqp->roce_info.p_key;
1201		attr->retry_cnt = iwqp->udp_info.rexmit_thresh;
1202		attr->rnr_retry = iwqp->udp_info.rnr_nak_thresh;
1203		attr->min_rnr_timer = iwqp->udp_info.min_rnr_timer;
1204		attr->max_rd_atomic = iwqp->roce_info.ord_size;
1205		attr->max_dest_rd_atomic = iwqp->roce_info.ird_size;
1206	}
1207
1208	init_attr->event_handler = iwqp->ibqp.event_handler;
1209	init_attr->qp_context = iwqp->ibqp.qp_context;
1210	init_attr->send_cq = iwqp->ibqp.send_cq;
1211	init_attr->recv_cq = iwqp->ibqp.recv_cq;
1212	init_attr->srq = iwqp->ibqp.srq;
1213	init_attr->cap = attr->cap;
1214
1215	return 0;
1216}
1217
1218/**
1219 * irdma_query_pkey - Query partition key
1220 * @ibdev: device pointer from stack
1221 * @port: port number
1222 * @index: index of pkey
1223 * @pkey: pointer to store the pkey
1224 */
1225static int irdma_query_pkey(struct ib_device *ibdev, u32 port, u16 index,
1226			    u16 *pkey)
1227{
1228	if (index >= IRDMA_PKEY_TBL_SZ)
1229		return -EINVAL;
1230
1231	*pkey = IRDMA_DEFAULT_PKEY;
1232	return 0;
1233}
1234
1235static u8 irdma_roce_get_vlan_prio(const struct ib_gid_attr *attr, u8 prio)
1236{
1237	struct net_device *ndev;
1238
1239	rcu_read_lock();
1240	ndev = rcu_dereference(attr->ndev);
1241	if (!ndev)
1242		goto exit;
1243	if (is_vlan_dev(ndev)) {
1244		u16 vlan_qos = vlan_dev_get_egress_qos_mask(ndev, prio);
1245
1246		prio = (vlan_qos & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
1247	}
1248exit:
1249	rcu_read_unlock();
1250	return prio;
1251}
1252
1253static int irdma_wait_for_suspend(struct irdma_qp *iwqp)
1254{
1255	if (!wait_event_timeout(iwqp->iwdev->suspend_wq,
1256				!iwqp->suspend_pending,
1257				msecs_to_jiffies(IRDMA_EVENT_TIMEOUT_MS))) {
1258		iwqp->suspend_pending = false;
1259		ibdev_warn(&iwqp->iwdev->ibdev,
1260			   "modify_qp timed out waiting for suspend. qp_id = %d, last_ae = 0x%x\n",
1261			   iwqp->ibqp.qp_num, iwqp->last_aeq);
1262		return -EBUSY;
1263	}
1264
1265	return 0;
1266}
1267
1268/**
1269 * irdma_modify_qp_roce - modify qp request
1270 * @ibqp: qp's pointer for modify
1271 * @attr: access attributes
1272 * @attr_mask: state mask
1273 * @udata: user data
1274 */
1275int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1276			 int attr_mask, struct ib_udata *udata)
1277{
1278#define IRDMA_MODIFY_QP_MIN_REQ_LEN offsetofend(struct irdma_modify_qp_req, rq_flush)
1279#define IRDMA_MODIFY_QP_MIN_RESP_LEN offsetofend(struct irdma_modify_qp_resp, push_valid)
1280	struct irdma_pd *iwpd = to_iwpd(ibqp->pd);
1281	struct irdma_qp *iwqp = to_iwqp(ibqp);
1282	struct irdma_device *iwdev = iwqp->iwdev;
1283	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
1284	struct irdma_qp_host_ctx_info *ctx_info;
1285	struct irdma_roce_offload_info *roce_info;
1286	struct irdma_udp_offload_info *udp_info;
1287	struct irdma_modify_qp_info info = {};
1288	struct irdma_modify_qp_resp uresp = {};
1289	struct irdma_modify_qp_req ureq = {};
1290	unsigned long flags;
1291	u8 issue_modify_qp = 0;
1292	int ret = 0;
1293
1294	ctx_info = &iwqp->ctx_info;
1295	roce_info = &iwqp->roce_info;
1296	udp_info = &iwqp->udp_info;
1297
1298	if (udata) {
1299		/* udata inlen/outlen can be 0 when supporting legacy libi40iw */
1300		if ((udata->inlen && udata->inlen < IRDMA_MODIFY_QP_MIN_REQ_LEN) ||
1301		    (udata->outlen && udata->outlen < IRDMA_MODIFY_QP_MIN_RESP_LEN))
1302			return -EINVAL;
1303	}
1304
1305	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
1306		return -EOPNOTSUPP;
1307
1308	if (attr_mask & IB_QP_DEST_QPN)
1309		roce_info->dest_qp = attr->dest_qp_num;
1310
1311	if (attr_mask & IB_QP_PKEY_INDEX) {
1312		ret = irdma_query_pkey(ibqp->device, 0, attr->pkey_index,
1313				       &roce_info->p_key);
1314		if (ret)
1315			return ret;
1316	}
1317
1318	if (attr_mask & IB_QP_QKEY)
1319		roce_info->qkey = attr->qkey;
1320
1321	if (attr_mask & IB_QP_PATH_MTU)
1322		udp_info->snd_mss = ib_mtu_enum_to_int(attr->path_mtu);
1323
1324	if (attr_mask & IB_QP_SQ_PSN) {
1325		udp_info->psn_nxt = attr->sq_psn;
1326		udp_info->lsn =  0xffff;
1327		udp_info->psn_una = attr->sq_psn;
1328		udp_info->psn_max = attr->sq_psn;
1329	}
1330
1331	if (attr_mask & IB_QP_RQ_PSN)
1332		udp_info->epsn = attr->rq_psn;
1333
1334	if (attr_mask & IB_QP_RNR_RETRY)
1335		udp_info->rnr_nak_thresh = attr->rnr_retry;
1336
1337	if (attr_mask & IB_QP_MIN_RNR_TIMER &&
1338	    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_3)
1339		udp_info->min_rnr_timer = attr->min_rnr_timer;
1340
1341	if (attr_mask & IB_QP_RETRY_CNT)
1342		udp_info->rexmit_thresh = attr->retry_cnt;
1343
1344	ctx_info->roce_info->pd_id = iwpd->sc_pd.pd_id;
1345
1346	if (attr_mask & IB_QP_AV) {
1347		struct irdma_av *av = &iwqp->roce_ah.av;
1348		const struct ib_gid_attr *sgid_attr =
1349				attr->ah_attr.grh.sgid_attr;
1350		u16 vlan_id = VLAN_N_VID;
1351		u32 local_ip[4];
1352
1353		memset(&iwqp->roce_ah, 0, sizeof(iwqp->roce_ah));
1354		if (attr->ah_attr.ah_flags & IB_AH_GRH) {
1355			udp_info->ttl = attr->ah_attr.grh.hop_limit;
1356			udp_info->flow_label = attr->ah_attr.grh.flow_label;
1357			udp_info->tos = attr->ah_attr.grh.traffic_class;
1358			udp_info->src_port =
1359				rdma_get_udp_sport(udp_info->flow_label,
1360						   ibqp->qp_num,
1361						   roce_info->dest_qp);
1362			irdma_qp_rem_qos(&iwqp->sc_qp);
1363			dev->ws_remove(iwqp->sc_qp.vsi, ctx_info->user_pri);
1364			if (iwqp->sc_qp.vsi->dscp_mode)
1365				ctx_info->user_pri =
1366				iwqp->sc_qp.vsi->dscp_map[irdma_tos2dscp(udp_info->tos)];
1367			else
1368				ctx_info->user_pri = rt_tos2priority(udp_info->tos);
1369		}
1370		ret = rdma_read_gid_l2_fields(sgid_attr, &vlan_id,
1371					      ctx_info->roce_info->mac_addr);
1372		if (ret)
1373			return ret;
1374		ctx_info->user_pri = irdma_roce_get_vlan_prio(sgid_attr,
1375							      ctx_info->user_pri);
1376		if (dev->ws_add(iwqp->sc_qp.vsi, ctx_info->user_pri))
1377			return -ENOMEM;
1378		iwqp->sc_qp.user_pri = ctx_info->user_pri;
1379		irdma_qp_add_qos(&iwqp->sc_qp);
1380
1381		if (vlan_id >= VLAN_N_VID && iwdev->dcb_vlan_mode)
1382			vlan_id = 0;
1383		if (vlan_id < VLAN_N_VID) {
1384			udp_info->insert_vlan_tag = true;
1385			udp_info->vlan_tag = vlan_id |
1386				ctx_info->user_pri << VLAN_PRIO_SHIFT;
1387		} else {
1388			udp_info->insert_vlan_tag = false;
1389		}
1390
1391		av->attrs = attr->ah_attr;
1392		rdma_gid2ip((struct sockaddr *)&av->sgid_addr, &sgid_attr->gid);
1393		rdma_gid2ip((struct sockaddr *)&av->dgid_addr, &attr->ah_attr.grh.dgid);
1394		av->net_type = rdma_gid_attr_network_type(sgid_attr);
1395		if (av->net_type == RDMA_NETWORK_IPV6) {
1396			__be32 *daddr =
1397				av->dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32;
1398			__be32 *saddr =
1399				av->sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32;
1400
1401			irdma_copy_ip_ntohl(&udp_info->dest_ip_addr[0], daddr);
1402			irdma_copy_ip_ntohl(&udp_info->local_ipaddr[0], saddr);
1403
1404			udp_info->ipv4 = false;
1405			irdma_copy_ip_ntohl(local_ip, daddr);
1406
1407		} else if (av->net_type == RDMA_NETWORK_IPV4) {
1408			__be32 saddr = av->sgid_addr.saddr_in.sin_addr.s_addr;
1409			__be32 daddr = av->dgid_addr.saddr_in.sin_addr.s_addr;
1410
1411			local_ip[0] = ntohl(daddr);
1412
1413			udp_info->ipv4 = true;
1414			udp_info->dest_ip_addr[0] = 0;
1415			udp_info->dest_ip_addr[1] = 0;
1416			udp_info->dest_ip_addr[2] = 0;
1417			udp_info->dest_ip_addr[3] = local_ip[0];
1418
1419			udp_info->local_ipaddr[0] = 0;
1420			udp_info->local_ipaddr[1] = 0;
1421			udp_info->local_ipaddr[2] = 0;
1422			udp_info->local_ipaddr[3] = ntohl(saddr);
1423		}
1424		udp_info->arp_idx =
1425			irdma_add_arp(iwdev->rf, local_ip, udp_info->ipv4,
1426				      attr->ah_attr.roce.dmac);
1427	}
1428
1429	if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1430		if (attr->max_rd_atomic > dev->hw_attrs.max_hw_ord) {
1431			ibdev_err(&iwdev->ibdev,
1432				  "rd_atomic = %d, above max_hw_ord=%d\n",
1433				  attr->max_rd_atomic,
1434				  dev->hw_attrs.max_hw_ord);
1435			return -EINVAL;
1436		}
1437		if (attr->max_rd_atomic)
1438			roce_info->ord_size = attr->max_rd_atomic;
1439		info.ord_valid = true;
1440	}
1441
1442	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1443		if (attr->max_dest_rd_atomic > dev->hw_attrs.max_hw_ird) {
1444			ibdev_err(&iwdev->ibdev,
1445				  "rd_atomic = %d, above max_hw_ird=%d\n",
1446				   attr->max_dest_rd_atomic,
1447				   dev->hw_attrs.max_hw_ird);
1448			return -EINVAL;
1449		}
1450		if (attr->max_dest_rd_atomic)
1451			roce_info->ird_size = attr->max_dest_rd_atomic;
1452	}
1453
1454	if (attr_mask & IB_QP_ACCESS_FLAGS) {
1455		if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
1456			roce_info->wr_rdresp_en = true;
1457		if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
1458			roce_info->wr_rdresp_en = true;
1459		if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
1460			roce_info->rd_en = true;
1461		if (dev->hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_ATOMIC_OPS)
1462			if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC)
1463				ctx_info->remote_atomics_en = true;
1464	}
1465
1466	ibdev_dbg(&iwdev->ibdev,
1467		  "VERBS: caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d attr_mask=0x%x\n",
1468		  __builtin_return_address(0), ibqp->qp_num, attr->qp_state,
1469		  iwqp->ibqp_state, iwqp->iwarp_state, attr_mask);
1470
1471	spin_lock_irqsave(&iwqp->lock, flags);
1472	if (attr_mask & IB_QP_STATE) {
1473		if (!ib_modify_qp_is_ok(iwqp->ibqp_state, attr->qp_state,
1474					iwqp->ibqp.qp_type, attr_mask)) {
1475			ibdev_warn(&iwdev->ibdev, "modify_qp invalid for qp_id=%d, old_state=0x%x, new_state=0x%x\n",
1476				   iwqp->ibqp.qp_num, iwqp->ibqp_state,
1477				   attr->qp_state);
1478			ret = -EINVAL;
1479			goto exit;
1480		}
1481		info.curr_iwarp_state = iwqp->iwarp_state;
1482
1483		switch (attr->qp_state) {
1484		case IB_QPS_INIT:
1485			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1486				ret = -EINVAL;
1487				goto exit;
1488			}
1489
1490			if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) {
1491				info.next_iwarp_state = IRDMA_QP_STATE_IDLE;
1492				issue_modify_qp = 1;
1493			}
1494			break;
1495		case IB_QPS_RTR:
1496			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1497				ret = -EINVAL;
1498				goto exit;
1499			}
1500			info.arp_cache_idx_valid = true;
1501			info.cq_num_valid = true;
1502			info.next_iwarp_state = IRDMA_QP_STATE_RTR;
1503			issue_modify_qp = 1;
1504			break;
1505		case IB_QPS_RTS:
1506			if (iwqp->ibqp_state < IB_QPS_RTR ||
1507			    iwqp->ibqp_state == IB_QPS_ERR) {
1508				ret = -EINVAL;
1509				goto exit;
1510			}
1511
1512			info.arp_cache_idx_valid = true;
1513			info.cq_num_valid = true;
1514			info.ord_valid = true;
1515			info.next_iwarp_state = IRDMA_QP_STATE_RTS;
1516			issue_modify_qp = 1;
1517			if (iwdev->push_mode && udata &&
1518			    iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX &&
1519			    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1520				spin_unlock_irqrestore(&iwqp->lock, flags);
1521				irdma_alloc_push_page(iwqp);
1522				spin_lock_irqsave(&iwqp->lock, flags);
1523			}
1524			break;
1525		case IB_QPS_SQD:
1526			if (iwqp->iwarp_state == IRDMA_QP_STATE_SQD)
1527				goto exit;
1528
1529			if (iwqp->iwarp_state != IRDMA_QP_STATE_RTS) {
1530				ret = -EINVAL;
1531				goto exit;
1532			}
1533
1534			info.next_iwarp_state = IRDMA_QP_STATE_SQD;
1535			issue_modify_qp = 1;
1536			iwqp->suspend_pending = true;
1537			break;
1538		case IB_QPS_SQE:
1539		case IB_QPS_ERR:
1540		case IB_QPS_RESET:
1541			if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) {
1542				iwqp->ibqp_state = attr->qp_state;
1543				spin_unlock_irqrestore(&iwqp->lock, flags);
1544				if (udata && udata->inlen) {
1545					if (ib_copy_from_udata(&ureq, udata,
1546					    min(sizeof(ureq), udata->inlen)))
1547						return -EINVAL;
1548
1549					irdma_flush_wqes(iwqp,
1550					    (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) |
1551					    (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) |
1552					    IRDMA_REFLUSH);
1553				}
1554				return 0;
1555			}
1556
1557			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1558			issue_modify_qp = 1;
1559			break;
1560		default:
1561			ret = -EINVAL;
1562			goto exit;
1563		}
1564
1565		iwqp->ibqp_state = attr->qp_state;
1566	}
1567
1568	ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1569	ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1570	irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
1571	spin_unlock_irqrestore(&iwqp->lock, flags);
1572
1573	if (attr_mask & IB_QP_STATE) {
1574		if (issue_modify_qp) {
1575			ctx_info->rem_endpoint_idx = udp_info->arp_idx;
1576			if (irdma_hw_modify_qp(iwdev, iwqp, &info, true))
1577				return -EINVAL;
1578			if (info.next_iwarp_state == IRDMA_QP_STATE_SQD) {
1579				ret = irdma_wait_for_suspend(iwqp);
1580				if (ret)
1581					return ret;
1582			}
1583			spin_lock_irqsave(&iwqp->lock, flags);
1584			if (iwqp->iwarp_state == info.curr_iwarp_state) {
1585				iwqp->iwarp_state = info.next_iwarp_state;
1586				iwqp->ibqp_state = attr->qp_state;
1587			}
1588			if (iwqp->ibqp_state > IB_QPS_RTS &&
1589			    !iwqp->flush_issued) {
1590				spin_unlock_irqrestore(&iwqp->lock, flags);
1591				irdma_flush_wqes(iwqp, IRDMA_FLUSH_SQ |
1592						       IRDMA_FLUSH_RQ |
1593						       IRDMA_FLUSH_WAIT);
1594				iwqp->flush_issued = 1;
1595			} else {
1596				spin_unlock_irqrestore(&iwqp->lock, flags);
1597			}
1598		} else {
1599			iwqp->ibqp_state = attr->qp_state;
1600		}
1601		if (udata && udata->outlen && dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1602			struct irdma_ucontext *ucontext;
1603
1604			ucontext = rdma_udata_to_drv_context(udata,
1605					struct irdma_ucontext, ibucontext);
1606			if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX &&
1607			    !iwqp->push_wqe_mmap_entry &&
1608			    !irdma_setup_push_mmap_entries(ucontext, iwqp,
1609				&uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) {
1610				uresp.push_valid = 1;
1611				uresp.push_offset = iwqp->sc_qp.push_offset;
1612			}
1613			ret = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp),
1614					       udata->outlen));
1615			if (ret) {
1616				irdma_remove_push_mmap_entries(iwqp);
1617				ibdev_dbg(&iwdev->ibdev,
1618					  "VERBS: copy_to_udata failed\n");
1619				return ret;
1620			}
1621		}
1622	}
1623
1624	return 0;
1625exit:
1626	spin_unlock_irqrestore(&iwqp->lock, flags);
1627
1628	return ret;
1629}
1630
1631/**
1632 * irdma_modify_qp - modify qp request
1633 * @ibqp: qp's pointer for modify
1634 * @attr: access attributes
1635 * @attr_mask: state mask
1636 * @udata: user data
1637 */
1638int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1639		    struct ib_udata *udata)
1640{
1641#define IRDMA_MODIFY_QP_MIN_REQ_LEN offsetofend(struct irdma_modify_qp_req, rq_flush)
1642#define IRDMA_MODIFY_QP_MIN_RESP_LEN offsetofend(struct irdma_modify_qp_resp, push_valid)
1643	struct irdma_qp *iwqp = to_iwqp(ibqp);
1644	struct irdma_device *iwdev = iwqp->iwdev;
1645	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
1646	struct irdma_qp_host_ctx_info *ctx_info;
1647	struct irdma_tcp_offload_info *tcp_info;
1648	struct irdma_iwarp_offload_info *offload_info;
1649	struct irdma_modify_qp_info info = {};
1650	struct irdma_modify_qp_resp uresp = {};
1651	struct irdma_modify_qp_req ureq = {};
1652	u8 issue_modify_qp = 0;
1653	u8 dont_wait = 0;
1654	int err;
1655	unsigned long flags;
1656
1657	if (udata) {
1658		/* udata inlen/outlen can be 0 when supporting legacy libi40iw */
1659		if ((udata->inlen && udata->inlen < IRDMA_MODIFY_QP_MIN_REQ_LEN) ||
1660		    (udata->outlen && udata->outlen < IRDMA_MODIFY_QP_MIN_RESP_LEN))
1661			return -EINVAL;
1662	}
1663
1664	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
1665		return -EOPNOTSUPP;
1666
1667	ctx_info = &iwqp->ctx_info;
1668	offload_info = &iwqp->iwarp_info;
1669	tcp_info = &iwqp->tcp_info;
1670	wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend));
1671	ibdev_dbg(&iwdev->ibdev,
1672		  "VERBS: caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d last_aeq=%d hw_tcp_state=%d hw_iwarp_state=%d attr_mask=0x%x\n",
1673		  __builtin_return_address(0), ibqp->qp_num, attr->qp_state,
1674		  iwqp->ibqp_state, iwqp->iwarp_state, iwqp->last_aeq,
1675		  iwqp->hw_tcp_state, iwqp->hw_iwarp_state, attr_mask);
1676
1677	spin_lock_irqsave(&iwqp->lock, flags);
1678	if (attr_mask & IB_QP_STATE) {
1679		info.curr_iwarp_state = iwqp->iwarp_state;
1680		switch (attr->qp_state) {
1681		case IB_QPS_INIT:
1682		case IB_QPS_RTR:
1683			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1684				err = -EINVAL;
1685				goto exit;
1686			}
1687
1688			if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) {
1689				info.next_iwarp_state = IRDMA_QP_STATE_IDLE;
1690				issue_modify_qp = 1;
1691			}
1692			if (iwdev->push_mode && udata &&
1693			    iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX &&
1694			    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1695				spin_unlock_irqrestore(&iwqp->lock, flags);
1696				irdma_alloc_push_page(iwqp);
1697				spin_lock_irqsave(&iwqp->lock, flags);
1698			}
1699			break;
1700		case IB_QPS_RTS:
1701			if (iwqp->iwarp_state > IRDMA_QP_STATE_RTS ||
1702			    !iwqp->cm_id) {
1703				err = -EINVAL;
1704				goto exit;
1705			}
1706
1707			issue_modify_qp = 1;
1708			iwqp->hw_tcp_state = IRDMA_TCP_STATE_ESTABLISHED;
1709			iwqp->hte_added = 1;
1710			info.next_iwarp_state = IRDMA_QP_STATE_RTS;
1711			info.tcp_ctx_valid = true;
1712			info.ord_valid = true;
1713			info.arp_cache_idx_valid = true;
1714			info.cq_num_valid = true;
1715			break;
1716		case IB_QPS_SQD:
1717			if (iwqp->hw_iwarp_state > IRDMA_QP_STATE_RTS) {
1718				err = 0;
1719				goto exit;
1720			}
1721
1722			if (iwqp->iwarp_state == IRDMA_QP_STATE_CLOSING ||
1723			    iwqp->iwarp_state < IRDMA_QP_STATE_RTS) {
1724				err = 0;
1725				goto exit;
1726			}
1727
1728			if (iwqp->iwarp_state > IRDMA_QP_STATE_CLOSING) {
1729				err = -EINVAL;
1730				goto exit;
1731			}
1732
1733			info.next_iwarp_state = IRDMA_QP_STATE_CLOSING;
1734			issue_modify_qp = 1;
1735			break;
1736		case IB_QPS_SQE:
1737			if (iwqp->iwarp_state >= IRDMA_QP_STATE_TERMINATE) {
1738				err = -EINVAL;
1739				goto exit;
1740			}
1741
1742			info.next_iwarp_state = IRDMA_QP_STATE_TERMINATE;
1743			issue_modify_qp = 1;
1744			break;
1745		case IB_QPS_ERR:
1746		case IB_QPS_RESET:
1747			if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) {
1748				iwqp->ibqp_state = attr->qp_state;
1749				spin_unlock_irqrestore(&iwqp->lock, flags);
1750				if (udata && udata->inlen) {
1751					if (ib_copy_from_udata(&ureq, udata,
1752					    min(sizeof(ureq), udata->inlen)))
1753						return -EINVAL;
1754
1755					irdma_flush_wqes(iwqp,
1756					    (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) |
1757					    (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) |
1758					    IRDMA_REFLUSH);
1759				}
1760				return 0;
1761			}
1762
1763			if (iwqp->sc_qp.term_flags) {
1764				spin_unlock_irqrestore(&iwqp->lock, flags);
1765				irdma_terminate_del_timer(&iwqp->sc_qp);
1766				spin_lock_irqsave(&iwqp->lock, flags);
1767			}
1768			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1769			if (iwqp->hw_tcp_state > IRDMA_TCP_STATE_CLOSED &&
1770			    iwdev->iw_status &&
1771			    iwqp->hw_tcp_state != IRDMA_TCP_STATE_TIME_WAIT)
1772				info.reset_tcp_conn = true;
1773			else
1774				dont_wait = 1;
1775
1776			issue_modify_qp = 1;
1777			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1778			break;
1779		default:
1780			err = -EINVAL;
1781			goto exit;
1782		}
1783
1784		iwqp->ibqp_state = attr->qp_state;
1785	}
1786	if (attr_mask & IB_QP_ACCESS_FLAGS) {
1787		ctx_info->iwarp_info_valid = true;
1788		if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
1789			offload_info->wr_rdresp_en = true;
1790		if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
1791			offload_info->wr_rdresp_en = true;
1792		if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
1793			offload_info->rd_en = true;
1794	}
1795
1796	if (ctx_info->iwarp_info_valid) {
1797		ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1798		ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1799		irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
1800	}
1801	spin_unlock_irqrestore(&iwqp->lock, flags);
1802
1803	if (attr_mask & IB_QP_STATE) {
1804		if (issue_modify_qp) {
1805			ctx_info->rem_endpoint_idx = tcp_info->arp_idx;
1806			if (irdma_hw_modify_qp(iwdev, iwqp, &info, true))
1807				return -EINVAL;
1808		}
1809
1810		spin_lock_irqsave(&iwqp->lock, flags);
1811		if (iwqp->iwarp_state == info.curr_iwarp_state) {
1812			iwqp->iwarp_state = info.next_iwarp_state;
1813			iwqp->ibqp_state = attr->qp_state;
1814		}
1815		spin_unlock_irqrestore(&iwqp->lock, flags);
1816	}
1817
1818	if (issue_modify_qp && iwqp->ibqp_state > IB_QPS_RTS) {
1819		if (dont_wait) {
1820			if (iwqp->hw_tcp_state) {
1821				spin_lock_irqsave(&iwqp->lock, flags);
1822				iwqp->hw_tcp_state = IRDMA_TCP_STATE_CLOSED;
1823				iwqp->last_aeq = IRDMA_AE_RESET_SENT;
1824				spin_unlock_irqrestore(&iwqp->lock, flags);
1825			}
1826			irdma_cm_disconn(iwqp);
1827		} else {
1828			int close_timer_started;
1829
1830			spin_lock_irqsave(&iwdev->cm_core.ht_lock, flags);
1831
1832			if (iwqp->cm_node) {
1833				refcount_inc(&iwqp->cm_node->refcnt);
1834				spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags);
1835				close_timer_started = atomic_inc_return(&iwqp->close_timer_started);
1836				if (iwqp->cm_id && close_timer_started == 1)
1837					irdma_schedule_cm_timer(iwqp->cm_node,
1838						(struct irdma_puda_buf *)iwqp,
1839						IRDMA_TIMER_TYPE_CLOSE, 1, 0);
1840
1841				irdma_rem_ref_cm_node(iwqp->cm_node);
1842			} else {
1843				spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags);
1844			}
1845		}
1846	}
1847	if (attr_mask & IB_QP_STATE && udata && udata->outlen &&
1848	    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1849		struct irdma_ucontext *ucontext;
1850
1851		ucontext = rdma_udata_to_drv_context(udata,
1852					struct irdma_ucontext, ibucontext);
1853		if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX &&
1854		    !iwqp->push_wqe_mmap_entry &&
1855		    !irdma_setup_push_mmap_entries(ucontext, iwqp,
1856			&uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) {
1857			uresp.push_valid = 1;
1858			uresp.push_offset = iwqp->sc_qp.push_offset;
1859		}
1860
1861		err = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp),
1862				       udata->outlen));
1863		if (err) {
1864			irdma_remove_push_mmap_entries(iwqp);
1865			ibdev_dbg(&iwdev->ibdev,
1866				  "VERBS: copy_to_udata failed\n");
1867			return err;
1868		}
1869	}
1870
1871	return 0;
1872exit:
1873	spin_unlock_irqrestore(&iwqp->lock, flags);
1874
1875	return err;
1876}
1877
1878/**
1879 * irdma_srq_free_rsrc - free up resources for srq
1880 * @rf: RDMA PCI function
1881 * @iwsrq: srq ptr
1882 */
1883static void irdma_srq_free_rsrc(struct irdma_pci_f *rf, struct irdma_srq *iwsrq)
1884{
1885	struct irdma_sc_srq *srq = &iwsrq->sc_srq;
1886
1887	if (!iwsrq->user_mode) {
1888		dma_free_coherent(rf->sc_dev.hw->device, iwsrq->kmem.size,
1889				  iwsrq->kmem.va, iwsrq->kmem.pa);
1890		iwsrq->kmem.va = NULL;
1891	}
1892
1893	irdma_free_rsrc(rf, rf->allocated_srqs, srq->srq_uk.srq_id);
1894}
1895
1896/**
1897 * irdma_cq_free_rsrc - free up resources for cq
1898 * @rf: RDMA PCI function
1899 * @iwcq: cq ptr
1900 */
1901static void irdma_cq_free_rsrc(struct irdma_pci_f *rf, struct irdma_cq *iwcq)
1902{
1903	struct irdma_sc_cq *cq = &iwcq->sc_cq;
1904
1905	if (!iwcq->user_mode) {
1906		dma_free_coherent(rf->sc_dev.hw->device, iwcq->kmem.size,
1907				  iwcq->kmem.va, iwcq->kmem.pa);
1908		iwcq->kmem.va = NULL;
1909		dma_free_coherent(rf->sc_dev.hw->device,
1910				  iwcq->kmem_shadow.size,
1911				  iwcq->kmem_shadow.va, iwcq->kmem_shadow.pa);
1912		iwcq->kmem_shadow.va = NULL;
1913	}
1914
1915	irdma_free_rsrc(rf, rf->allocated_cqs, cq->cq_uk.cq_id);
1916}
1917
1918/**
1919 * irdma_free_cqbuf - worker to free a cq buffer
1920 * @work: provides access to the cq buffer to free
1921 */
1922static void irdma_free_cqbuf(struct work_struct *work)
1923{
1924	struct irdma_cq_buf *cq_buf = container_of(work, struct irdma_cq_buf, work);
1925
1926	dma_free_coherent(cq_buf->hw->device, cq_buf->kmem_buf.size,
1927			  cq_buf->kmem_buf.va, cq_buf->kmem_buf.pa);
1928	cq_buf->kmem_buf.va = NULL;
1929	kfree(cq_buf);
1930}
1931
1932/**
1933 * irdma_process_resize_list - remove resized cq buffers from the resize_list
1934 * @iwcq: cq which owns the resize_list
1935 * @iwdev: irdma device
1936 * @lcqe_buf: the buffer where the last cqe is received
1937 */
1938static int irdma_process_resize_list(struct irdma_cq *iwcq,
1939				     struct irdma_device *iwdev,
1940				     struct irdma_cq_buf *lcqe_buf)
1941{
1942	struct list_head *tmp_node, *list_node;
1943	struct irdma_cq_buf *cq_buf;
1944	int cnt = 0;
1945
1946	list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) {
1947		cq_buf = list_entry(list_node, struct irdma_cq_buf, list);
1948		if (cq_buf == lcqe_buf)
1949			return cnt;
1950
1951		list_del(&cq_buf->list);
1952		queue_work(iwdev->cleanup_wq, &cq_buf->work);
1953		cnt++;
1954	}
1955
1956	return cnt;
1957}
1958
1959/**
1960 * irdma_destroy_srq - destroy srq
1961 * @ibsrq: srq pointer
1962 * @udata: user data
1963 */
1964static int irdma_destroy_srq(struct ib_srq *ibsrq, struct ib_udata *udata)
1965{
1966	struct irdma_device *iwdev = to_iwdev(ibsrq->device);
1967	struct irdma_srq *iwsrq = to_iwsrq(ibsrq);
1968	struct irdma_sc_srq *srq = &iwsrq->sc_srq;
1969
1970	irdma_srq_wq_destroy(iwdev->rf, srq);
1971	irdma_srq_free_rsrc(iwdev->rf, iwsrq);
1972	return 0;
1973}
1974
1975/**
1976 * irdma_destroy_cq - destroy cq
1977 * @ib_cq: cq pointer
1978 * @udata: user data
1979 */
1980static int irdma_destroy_cq(struct ib_cq *ib_cq, struct ib_udata *udata)
1981{
1982	struct irdma_device *iwdev = to_iwdev(ib_cq->device);
1983	struct irdma_cq *iwcq = to_iwcq(ib_cq);
1984	struct irdma_sc_cq *cq = &iwcq->sc_cq;
1985	struct irdma_sc_dev *dev = cq->dev;
1986	struct irdma_sc_ceq *ceq = dev->ceq[cq->ceq_id];
1987	struct irdma_ceq *iwceq = container_of(ceq, struct irdma_ceq, sc_ceq);
1988	unsigned long flags;
1989
1990	spin_lock_irqsave(&iwcq->lock, flags);
1991	if (!list_empty(&iwcq->cmpl_generated))
1992		irdma_remove_cmpls_list(iwcq);
1993	if (!list_empty(&iwcq->resize_list))
1994		irdma_process_resize_list(iwcq, iwdev, NULL);
1995	spin_unlock_irqrestore(&iwcq->lock, flags);
1996
1997	irdma_cq_rem_ref(ib_cq);
1998	wait_for_completion(&iwcq->free_cq);
1999
2000	irdma_cq_wq_destroy(iwdev->rf, cq);
2001
2002	spin_lock_irqsave(&iwceq->ce_lock, flags);
2003	irdma_sc_cleanup_ceqes(cq, ceq);
2004	spin_unlock_irqrestore(&iwceq->ce_lock, flags);
2005	irdma_cq_free_rsrc(iwdev->rf, iwcq);
2006
2007	return 0;
2008}
2009
2010/**
2011 * irdma_resize_cq - resize cq
2012 * @ibcq: cq to be resized
2013 * @entries: desired cq size
2014 * @udata: user data
2015 */
2016static int irdma_resize_cq(struct ib_cq *ibcq, int entries,
2017			   struct ib_udata *udata)
2018{
2019#define IRDMA_RESIZE_CQ_MIN_REQ_LEN offsetofend(struct irdma_resize_cq_req, user_cq_buffer)
2020	struct irdma_cq *iwcq = to_iwcq(ibcq);
2021	struct irdma_sc_dev *dev = iwcq->sc_cq.dev;
2022	struct irdma_cqp_request *cqp_request;
2023	struct cqp_cmds_info *cqp_info;
2024	struct irdma_modify_cq_info *m_info;
2025	struct irdma_modify_cq_info info = {};
2026	struct irdma_dma_mem kmem_buf;
2027	struct irdma_cq_mr *cqmr_buf;
2028	struct irdma_pbl *iwpbl_buf;
2029	struct irdma_device *iwdev;
2030	struct irdma_pci_f *rf;
2031	struct irdma_cq_buf *cq_buf = NULL;
2032	unsigned long flags;
2033	u8 cqe_size;
2034	int ret;
2035
2036	iwdev = to_iwdev(ibcq->device);
2037	rf = iwdev->rf;
2038
2039	if (!(rf->sc_dev.hw_attrs.uk_attrs.feature_flags &
2040	    IRDMA_FEATURE_CQ_RESIZE))
2041		return -EOPNOTSUPP;
2042
2043	if (udata && udata->inlen < IRDMA_RESIZE_CQ_MIN_REQ_LEN)
2044		return -EINVAL;
2045
2046	if (entries > rf->max_cqe)
2047		return -EINVAL;
2048
2049	if (!iwcq->user_mode) {
2050		entries += 2;
2051
2052		if (!iwcq->sc_cq.cq_uk.avoid_mem_cflct &&
2053		    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
2054			entries *= 2;
2055
2056		if (entries & 1)
2057			entries += 1; /* cq size must be an even number */
2058
2059		cqe_size = iwcq->sc_cq.cq_uk.avoid_mem_cflct ? 64 : 32;
2060		if (entries * cqe_size == IRDMA_HW_PAGE_SIZE)
2061			entries += 2;
2062	}
2063
2064	info.cq_size = max(entries, 4);
2065
2066	if (info.cq_size == iwcq->sc_cq.cq_uk.cq_size - 1)
2067		return 0;
2068
2069	if (udata) {
2070		struct irdma_resize_cq_req req = {};
2071		struct irdma_ucontext *ucontext =
2072			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2073						  ibucontext);
2074
2075		/* CQ resize not supported with legacy GEN_1 libi40iw */
2076		if (ucontext->legacy_mode)
2077			return -EOPNOTSUPP;
2078
2079		if (ib_copy_from_udata(&req, udata,
2080				       min(sizeof(req), udata->inlen)))
2081			return -EINVAL;
2082
2083		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2084		iwpbl_buf = irdma_get_pbl((unsigned long)req.user_cq_buffer,
2085					  &ucontext->cq_reg_mem_list);
2086		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2087
2088		if (!iwpbl_buf)
2089			return -ENOMEM;
2090
2091		cqmr_buf = &iwpbl_buf->cq_mr;
2092		if (iwpbl_buf->pbl_allocated) {
2093			info.virtual_map = true;
2094			info.pbl_chunk_size = 1;
2095			info.first_pm_pbl_idx = cqmr_buf->cq_pbl.idx;
2096		} else {
2097			info.cq_pa = cqmr_buf->cq_pbl.addr;
2098		}
2099	} else {
2100		/* Kmode CQ resize */
2101		int rsize;
2102
2103		rsize = info.cq_size * sizeof(struct irdma_cqe);
2104		kmem_buf.size = ALIGN(round_up(rsize, 256), 256);
2105		kmem_buf.va = dma_alloc_coherent(dev->hw->device,
2106						 kmem_buf.size, &kmem_buf.pa,
2107						 GFP_KERNEL);
2108		if (!kmem_buf.va)
2109			return -ENOMEM;
2110
2111		info.cq_base = kmem_buf.va;
2112		info.cq_pa = kmem_buf.pa;
2113		cq_buf = kzalloc(sizeof(*cq_buf), GFP_KERNEL);
2114		if (!cq_buf) {
2115			ret = -ENOMEM;
2116			goto error;
2117		}
2118	}
2119
2120	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
2121	if (!cqp_request) {
2122		ret = -ENOMEM;
2123		goto error;
2124	}
2125
2126	info.shadow_read_threshold = iwcq->sc_cq.shadow_read_threshold;
2127	info.cq_resize = true;
2128
2129	cqp_info = &cqp_request->info;
2130	m_info = &cqp_info->in.u.cq_modify.info;
2131	memcpy(m_info, &info, sizeof(*m_info));
2132
2133	cqp_info->cqp_cmd = IRDMA_OP_CQ_MODIFY;
2134	cqp_info->in.u.cq_modify.cq = &iwcq->sc_cq;
2135	cqp_info->in.u.cq_modify.scratch = (uintptr_t)cqp_request;
2136	cqp_info->post_sq = 1;
2137	ret = irdma_handle_cqp_op(rf, cqp_request);
2138	irdma_put_cqp_request(&rf->cqp, cqp_request);
2139	if (ret)
2140		goto error;
2141
2142	spin_lock_irqsave(&iwcq->lock, flags);
2143	if (cq_buf) {
2144		cq_buf->kmem_buf = iwcq->kmem;
2145		cq_buf->hw = dev->hw;
2146		memcpy(&cq_buf->cq_uk, &iwcq->sc_cq.cq_uk, sizeof(cq_buf->cq_uk));
2147		INIT_WORK(&cq_buf->work, irdma_free_cqbuf);
2148		list_add_tail(&cq_buf->list, &iwcq->resize_list);
2149		iwcq->kmem = kmem_buf;
2150	}
2151
2152	irdma_sc_cq_resize(&iwcq->sc_cq, &info);
2153	ibcq->cqe = info.cq_size - 1;
2154	spin_unlock_irqrestore(&iwcq->lock, flags);
2155
2156	return 0;
2157error:
2158	if (!udata) {
2159		dma_free_coherent(dev->hw->device, kmem_buf.size, kmem_buf.va,
2160				  kmem_buf.pa);
2161		kmem_buf.va = NULL;
2162	}
2163	kfree(cq_buf);
2164
2165	return ret;
2166}
2167
2168/**
2169 * irdma_srq_event - event notification for srq limit
2170 * @srq: shared srq struct
2171 */
2172void irdma_srq_event(struct irdma_sc_srq *srq)
2173{
2174	struct irdma_srq *iwsrq = container_of(srq, struct irdma_srq, sc_srq);
2175	struct ib_srq *ibsrq = &iwsrq->ibsrq;
2176	struct ib_event event;
2177
2178	srq->srq_limit = 0;
2179
2180	if (!ibsrq->event_handler)
2181		return;
2182
2183	event.device = ibsrq->device;
2184	event.element.port_num = 1;
2185	event.element.srq = ibsrq;
2186	event.event = IB_EVENT_SRQ_LIMIT_REACHED;
2187	ibsrq->event_handler(&event, ibsrq->srq_context);
2188}
2189
2190/**
2191 * irdma_modify_srq - modify srq request
2192 * @ibsrq: srq's pointer for modify
2193 * @attr: access attributes
2194 * @attr_mask: state mask
2195 * @udata: user data
2196 */
2197static int irdma_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
2198			    enum ib_srq_attr_mask attr_mask,
2199			    struct ib_udata *udata)
2200{
2201	struct irdma_device *iwdev = to_iwdev(ibsrq->device);
2202	struct irdma_srq *iwsrq = to_iwsrq(ibsrq);
2203	struct irdma_cqp_request *cqp_request;
2204	struct irdma_pci_f *rf = iwdev->rf;
2205	struct irdma_modify_srq_info *info;
2206	struct cqp_cmds_info *cqp_info;
2207	int status;
2208
2209	if (attr_mask & IB_SRQ_MAX_WR)
2210		return -EINVAL;
2211
2212	if (!(attr_mask & IB_SRQ_LIMIT))
2213		return 0;
2214
2215	if (attr->srq_limit > iwsrq->sc_srq.srq_uk.srq_size)
2216		return -EINVAL;
2217
2218	/* Execute this cqp op synchronously, so we can update srq_limit
2219	 * upon successful completion.
2220	 */
2221	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
2222	if (!cqp_request)
2223		return -ENOMEM;
2224
2225	cqp_info = &cqp_request->info;
2226	info = &cqp_info->in.u.srq_modify.info;
2227	info->srq_limit = attr->srq_limit;
2228	if (info->srq_limit > 0xFFF)
2229		info->srq_limit = 0xFFF;
2230	info->arm_limit_event = 1;
2231
2232	cqp_info->cqp_cmd = IRDMA_OP_SRQ_MODIFY;
2233	cqp_info->post_sq = 1;
2234	cqp_info->in.u.srq_modify.srq = &iwsrq->sc_srq;
2235	cqp_info->in.u.srq_modify.scratch = (uintptr_t)cqp_request;
2236	status = irdma_handle_cqp_op(rf, cqp_request);
2237	irdma_put_cqp_request(&rf->cqp, cqp_request);
2238	if (status)
2239		return status;
2240
2241	iwsrq->sc_srq.srq_limit = info->srq_limit;
2242
2243	return 0;
2244}
2245
2246static int irdma_setup_umode_srq(struct irdma_device *iwdev,
2247				 struct irdma_srq *iwsrq,
2248				 struct irdma_srq_init_info *info,
2249				 struct ib_udata *udata)
2250{
2251#define IRDMA_CREATE_SRQ_MIN_REQ_LEN \
2252	offsetofend(struct irdma_create_srq_req, user_shadow_area)
2253	struct irdma_create_srq_req req = {};
2254	struct irdma_ucontext *ucontext;
2255	struct irdma_srq_mr *srqmr;
2256	struct irdma_pbl *iwpbl;
2257	unsigned long flags;
2258
2259	iwsrq->user_mode = true;
2260	ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2261					     ibucontext);
2262
2263	if (udata->inlen < IRDMA_CREATE_SRQ_MIN_REQ_LEN)
2264		return -EINVAL;
2265
2266	if (ib_copy_from_udata(&req, udata,
2267			       min(sizeof(req), udata->inlen)))
2268		return -EFAULT;
2269
2270	spin_lock_irqsave(&ucontext->srq_reg_mem_list_lock, flags);
2271	iwpbl = irdma_get_pbl((unsigned long)req.user_srq_buf,
2272			      &ucontext->srq_reg_mem_list);
2273	spin_unlock_irqrestore(&ucontext->srq_reg_mem_list_lock, flags);
2274	if (!iwpbl)
2275		return -EPROTO;
2276
2277	iwsrq->iwpbl = iwpbl;
2278	srqmr = &iwpbl->srq_mr;
2279
2280	if (iwpbl->pbl_allocated) {
2281		info->virtual_map = true;
2282		info->pbl_chunk_size = 1;
2283		info->first_pm_pbl_idx = srqmr->srq_pbl.idx;
2284		info->leaf_pbl_size = 1;
2285	} else {
2286		info->srq_pa = srqmr->srq_pbl.addr;
2287	}
2288	info->shadow_area_pa = srqmr->shadow;
2289
2290	return 0;
2291}
2292
2293static int irdma_setup_kmode_srq(struct irdma_device *iwdev,
2294				 struct irdma_srq *iwsrq,
2295				 struct irdma_srq_init_info *info, u32 depth,
2296				 u8 shift)
2297{
2298	struct irdma_srq_uk_init_info *ukinfo = &info->srq_uk_init_info;
2299	struct irdma_dma_mem *mem = &iwsrq->kmem;
2300	u32 size, ring_size;
2301
2302	ring_size = depth * IRDMA_QP_WQE_MIN_SIZE;
2303	size = ring_size + (IRDMA_SHADOW_AREA_SIZE << 3);
2304
2305	mem->size = ALIGN(size, 256);
2306	mem->va = dma_alloc_coherent(iwdev->rf->hw.device, mem->size,
2307				     &mem->pa, GFP_KERNEL);
2308	if (!mem->va)
2309		return -ENOMEM;
2310
2311	ukinfo->srq = mem->va;
2312	ukinfo->srq_size = depth >> shift;
2313	ukinfo->shadow_area = mem->va + ring_size;
2314
2315	info->srq_pa = mem->pa;
2316	info->shadow_area_pa = info->srq_pa + ring_size;
2317
2318	return 0;
2319}
2320
2321/**
2322 * irdma_create_srq - create srq
2323 * @ibsrq: ib's srq pointer
2324 * @initattrs: attributes for srq
2325 * @udata: user data for create srq
2326 */
2327static int irdma_create_srq(struct ib_srq *ibsrq,
2328			    struct ib_srq_init_attr *initattrs,
2329			    struct ib_udata *udata)
2330{
2331	struct irdma_device *iwdev = to_iwdev(ibsrq->device);
2332	struct ib_srq_attr *attr = &initattrs->attr;
2333	struct irdma_pd *iwpd = to_iwpd(ibsrq->pd);
2334	struct irdma_srq *iwsrq = to_iwsrq(ibsrq);
2335	struct irdma_srq_uk_init_info *ukinfo;
2336	struct irdma_cqp_request *cqp_request;
2337	struct irdma_srq_init_info info = {};
2338	struct irdma_pci_f *rf = iwdev->rf;
2339	struct irdma_uk_attrs *uk_attrs;
2340	struct cqp_cmds_info *cqp_info;
2341	int err_code = 0;
2342	u32 depth;
2343	u8 shift;
2344
2345	uk_attrs = &rf->sc_dev.hw_attrs.uk_attrs;
2346	ukinfo = &info.srq_uk_init_info;
2347
2348	if (initattrs->srq_type != IB_SRQT_BASIC)
2349		return -EOPNOTSUPP;
2350
2351	if (!(uk_attrs->feature_flags & IRDMA_FEATURE_SRQ) ||
2352	    attr->max_sge > uk_attrs->max_hw_wq_frags)
2353		return -EINVAL;
2354
2355	refcount_set(&iwsrq->refcnt, 1);
2356	spin_lock_init(&iwsrq->lock);
2357	err_code = irdma_alloc_rsrc(rf, rf->allocated_srqs, rf->max_srq,
2358				    &iwsrq->srq_num, &rf->next_srq);
2359	if (err_code)
2360		return err_code;
2361
2362	ukinfo->max_srq_frag_cnt = attr->max_sge;
2363	ukinfo->uk_attrs = uk_attrs;
2364	ukinfo->srq_id = iwsrq->srq_num;
2365
2366	irdma_get_wqe_shift(ukinfo->uk_attrs, ukinfo->max_srq_frag_cnt, 0,
2367			    &shift);
2368
2369	err_code = irdma_get_srqdepth(ukinfo->uk_attrs, attr->max_wr,
2370				      shift, &depth);
2371	if (err_code)
2372		return err_code;
2373
2374	/* Actual SRQ size in WRs for ring and HW */
2375	ukinfo->srq_size = depth >> shift;
2376
2377	/* Max postable WRs to SRQ */
2378	iwsrq->max_wr = (depth - IRDMA_RQ_RSVD) >> shift;
2379	attr->max_wr = iwsrq->max_wr;
2380
2381	if (udata)
2382		err_code = irdma_setup_umode_srq(iwdev, iwsrq, &info, udata);
2383	else
2384		err_code = irdma_setup_kmode_srq(iwdev, iwsrq, &info, depth,
2385						 shift);
2386
2387	if (err_code)
2388		goto free_rsrc;
2389
2390	info.vsi = &iwdev->vsi;
2391	info.pd = &iwpd->sc_pd;
2392
2393	iwsrq->sc_srq.srq_uk.lock = &iwsrq->lock;
2394	err_code = irdma_sc_srq_init(&iwsrq->sc_srq, &info);
2395	if (err_code)
2396		goto free_dmem;
2397
2398	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
2399	if (!cqp_request) {
2400		err_code = -ENOMEM;
2401		goto free_dmem;
2402	}
2403
2404	cqp_info = &cqp_request->info;
2405	cqp_info->cqp_cmd = IRDMA_OP_SRQ_CREATE;
2406	cqp_info->post_sq = 1;
2407	cqp_info->in.u.srq_create.srq = &iwsrq->sc_srq;
2408	cqp_info->in.u.srq_create.scratch = (uintptr_t)cqp_request;
2409	err_code = irdma_handle_cqp_op(rf, cqp_request);
2410	irdma_put_cqp_request(&rf->cqp, cqp_request);
2411	if (err_code)
2412		goto free_dmem;
2413
2414	if (udata) {
2415		struct irdma_create_srq_resp resp = {};
2416
2417		resp.srq_id = iwsrq->srq_num;
2418		resp.srq_size = ukinfo->srq_size;
2419		if (ib_copy_to_udata(udata, &resp,
2420				     min(sizeof(resp), udata->outlen))) {
2421			err_code = -EPROTO;
2422			goto srq_destroy;
2423		}
2424	}
2425
2426	return 0;
2427
2428srq_destroy:
2429	irdma_srq_wq_destroy(rf, &iwsrq->sc_srq);
2430
2431free_dmem:
2432	if (!iwsrq->user_mode)
2433		dma_free_coherent(rf->hw.device, iwsrq->kmem.size,
2434				  iwsrq->kmem.va, iwsrq->kmem.pa);
2435free_rsrc:
2436	irdma_free_rsrc(rf, rf->allocated_srqs, iwsrq->srq_num);
2437	return err_code;
2438}
2439
2440/**
2441 * irdma_query_srq - get SRQ attributes
2442 * @ibsrq: the SRQ to query
2443 * @attr: the attributes of the SRQ
2444 */
2445static int irdma_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr)
2446{
2447	struct irdma_srq *iwsrq = to_iwsrq(ibsrq);
2448
2449	attr->max_wr = iwsrq->max_wr;
2450	attr->max_sge = iwsrq->sc_srq.srq_uk.max_srq_frag_cnt;
2451	attr->srq_limit = iwsrq->sc_srq.srq_limit;
2452
2453	return 0;
2454}
2455
2456static inline int cq_validate_flags(u32 flags, u8 hw_rev)
2457{
2458	/* GEN1/2 does not support CQ create flags */
2459	if (hw_rev <= IRDMA_GEN_2)
2460		return flags ? -EOPNOTSUPP : 0;
2461
2462	return flags & ~IB_UVERBS_CQ_FLAGS_TIMESTAMP_COMPLETION ? -EOPNOTSUPP : 0;
2463}
2464
2465/**
2466 * irdma_create_cq - create cq
2467 * @ibcq: CQ allocated
2468 * @attr: attributes for cq
2469 * @attrs: uverbs attribute bundle
2470 */
2471static int irdma_create_cq(struct ib_cq *ibcq,
2472			   const struct ib_cq_init_attr *attr,
2473			   struct uverbs_attr_bundle *attrs)
2474{
2475#define IRDMA_CREATE_CQ_MIN_REQ_LEN offsetofend(struct irdma_create_cq_req, user_cq_buf)
2476#define IRDMA_CREATE_CQ_MIN_RESP_LEN offsetofend(struct irdma_create_cq_resp, cq_size)
2477	struct ib_udata *udata = &attrs->driver_udata;
2478	struct ib_device *ibdev = ibcq->device;
2479	struct irdma_device *iwdev = to_iwdev(ibdev);
2480	struct irdma_pci_f *rf = iwdev->rf;
2481	struct irdma_cq *iwcq = to_iwcq(ibcq);
2482	u32 cq_num = 0;
2483	struct irdma_sc_cq *cq;
2484	struct irdma_sc_dev *dev = &rf->sc_dev;
2485	struct irdma_cq_init_info info = {};
2486	struct irdma_cqp_request *cqp_request;
2487	struct cqp_cmds_info *cqp_info;
2488	struct irdma_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
2489	unsigned long flags;
2490	int err_code;
2491	int entries = attr->cqe;
2492	bool cqe_64byte_ena;
2493	u8 cqe_size;
2494
2495	err_code = cq_validate_flags(attr->flags, dev->hw_attrs.uk_attrs.hw_rev);
2496	if (err_code)
2497		return err_code;
2498
2499	if (udata && (udata->inlen < IRDMA_CREATE_CQ_MIN_REQ_LEN ||
2500		      udata->outlen < IRDMA_CREATE_CQ_MIN_RESP_LEN))
2501		return -EINVAL;
2502
2503	err_code = irdma_alloc_rsrc(rf, rf->allocated_cqs, rf->max_cq, &cq_num,
2504				    &rf->next_cq);
2505	if (err_code)
2506		return err_code;
2507
2508	cq = &iwcq->sc_cq;
2509	cq->back_cq = iwcq;
2510	refcount_set(&iwcq->refcnt, 1);
2511	spin_lock_init(&iwcq->lock);
2512	INIT_LIST_HEAD(&iwcq->resize_list);
2513	INIT_LIST_HEAD(&iwcq->cmpl_generated);
2514	iwcq->cq_num = cq_num;
2515	info.dev = dev;
2516	ukinfo->cq_size = max(entries, 4);
2517	ukinfo->cq_id = cq_num;
2518	cqe_64byte_ena = dev->hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_64_BYTE_CQE ?
2519			 true : false;
2520	cqe_size = cqe_64byte_ena ? 64 : 32;
2521	ukinfo->avoid_mem_cflct = cqe_64byte_ena;
2522	iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
2523	if (attr->comp_vector < rf->ceqs_count)
2524		info.ceq_id = attr->comp_vector;
2525	info.ceq_id_valid = true;
2526	info.ceqe_mask = 1;
2527	info.type = IRDMA_CQ_TYPE_IWARP;
2528	info.vsi = &iwdev->vsi;
2529
2530	if (udata) {
2531		struct irdma_ucontext *ucontext;
2532		struct irdma_create_cq_req req = {};
2533		struct irdma_cq_mr *cqmr;
2534		struct irdma_pbl *iwpbl;
2535		struct irdma_pbl *iwpbl_shadow;
2536		struct irdma_cq_mr *cqmr_shadow;
2537
2538		iwcq->user_mode = true;
2539		ucontext =
2540			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2541						  ibucontext);
2542		if (ib_copy_from_udata(&req, udata,
2543				       min(sizeof(req), udata->inlen))) {
2544			err_code = -EFAULT;
2545			goto cq_free_rsrc;
2546		}
2547
2548		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2549		iwpbl = irdma_get_pbl((unsigned long)req.user_cq_buf,
2550				      &ucontext->cq_reg_mem_list);
2551		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2552		if (!iwpbl) {
2553			err_code = -EPROTO;
2554			goto cq_free_rsrc;
2555		}
2556
2557		cqmr = &iwpbl->cq_mr;
2558
2559		if (rf->sc_dev.hw_attrs.uk_attrs.feature_flags &
2560		    IRDMA_FEATURE_CQ_RESIZE && !ucontext->legacy_mode) {
2561			spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2562			iwpbl_shadow = irdma_get_pbl(
2563					(unsigned long)req.user_shadow_area,
2564					&ucontext->cq_reg_mem_list);
2565			spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2566
2567			if (!iwpbl_shadow) {
2568				err_code = -EPROTO;
2569				goto cq_free_rsrc;
2570			}
2571			cqmr_shadow = &iwpbl_shadow->cq_mr;
2572			info.shadow_area_pa = cqmr_shadow->cq_pbl.addr;
2573			cqmr->split = true;
2574		} else {
2575			info.shadow_area_pa = cqmr->shadow;
2576		}
2577		if (iwpbl->pbl_allocated) {
2578			info.virtual_map = true;
2579			info.pbl_chunk_size = 1;
2580			info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
2581		} else {
2582			info.cq_base_pa = cqmr->cq_pbl.addr;
2583		}
2584	} else {
2585		/* Kmode allocations */
2586		int rsize;
2587
2588		if (entries < 1 || entries > rf->max_cqe) {
2589			err_code = -EINVAL;
2590			goto cq_free_rsrc;
2591		}
2592
2593		entries += 2;
2594		if (!cqe_64byte_ena && dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
2595			entries *= 2;
2596
2597		if (entries & 1)
2598			entries += 1; /* cq size must be an even number */
2599
2600		if (entries * cqe_size == IRDMA_HW_PAGE_SIZE)
2601			entries += 2;
2602
2603		ukinfo->cq_size = entries;
2604
2605		if (cqe_64byte_ena)
2606			rsize = info.cq_uk_init_info.cq_size * sizeof(struct irdma_extended_cqe);
2607		else
2608			rsize = info.cq_uk_init_info.cq_size * sizeof(struct irdma_cqe);
2609		iwcq->kmem.size = ALIGN(round_up(rsize, 256), 256);
2610		iwcq->kmem.va = dma_alloc_coherent(dev->hw->device,
2611						   iwcq->kmem.size,
2612						   &iwcq->kmem.pa, GFP_KERNEL);
2613		if (!iwcq->kmem.va) {
2614			err_code = -ENOMEM;
2615			goto cq_free_rsrc;
2616		}
2617
2618		iwcq->kmem_shadow.size = ALIGN(IRDMA_SHADOW_AREA_SIZE << 3,
2619					       64);
2620		iwcq->kmem_shadow.va = dma_alloc_coherent(dev->hw->device,
2621							  iwcq->kmem_shadow.size,
2622							  &iwcq->kmem_shadow.pa,
2623							  GFP_KERNEL);
2624		if (!iwcq->kmem_shadow.va) {
2625			err_code = -ENOMEM;
2626			goto cq_free_rsrc;
2627		}
2628		info.shadow_area_pa = iwcq->kmem_shadow.pa;
2629		ukinfo->shadow_area = iwcq->kmem_shadow.va;
2630		ukinfo->cq_base = iwcq->kmem.va;
2631		info.cq_base_pa = iwcq->kmem.pa;
2632	}
2633
2634	info.shadow_read_threshold = min(info.cq_uk_init_info.cq_size / 2,
2635					 (u32)IRDMA_MAX_CQ_READ_THRESH);
2636
2637	if (irdma_sc_cq_init(cq, &info)) {
2638		ibdev_dbg(&iwdev->ibdev, "VERBS: init cq fail\n");
2639		err_code = -EPROTO;
2640		goto cq_free_rsrc;
2641	}
2642
2643	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
2644	if (!cqp_request) {
2645		err_code = -ENOMEM;
2646		goto cq_free_rsrc;
2647	}
2648
2649	cqp_info = &cqp_request->info;
2650	cqp_info->cqp_cmd = IRDMA_OP_CQ_CREATE;
2651	cqp_info->post_sq = 1;
2652	cqp_info->in.u.cq_create.cq = cq;
2653	cqp_info->in.u.cq_create.check_overflow = true;
2654	cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
2655	err_code = irdma_handle_cqp_op(rf, cqp_request);
2656	irdma_put_cqp_request(&rf->cqp, cqp_request);
2657	if (err_code)
2658		goto cq_free_rsrc;
2659
2660	if (udata) {
2661		struct irdma_create_cq_resp resp = {};
2662
2663		resp.cq_id = info.cq_uk_init_info.cq_id;
2664		resp.cq_size = info.cq_uk_init_info.cq_size;
2665		if (ib_copy_to_udata(udata, &resp,
2666				     min(sizeof(resp), udata->outlen))) {
2667			ibdev_dbg(&iwdev->ibdev,
2668				  "VERBS: copy to user data\n");
2669			err_code = -EPROTO;
2670			goto cq_destroy;
2671		}
2672	}
2673	rf->cq_table[cq_num] = iwcq;
2674	init_completion(&iwcq->free_cq);
2675
2676	return 0;
2677cq_destroy:
2678	irdma_cq_wq_destroy(rf, cq);
2679cq_free_rsrc:
2680	irdma_cq_free_rsrc(rf, iwcq);
2681
2682	return err_code;
2683}
2684
2685/**
2686 * irdma_get_mr_access - get hw MR access permissions from IB access flags
2687 * @access: IB access flags
2688 * @hw_rev: Hardware version
2689 */
2690static inline u16 irdma_get_mr_access(int access, u8 hw_rev)
2691{
2692	u16 hw_access = 0;
2693
2694	hw_access |= (access & IB_ACCESS_LOCAL_WRITE) ?
2695		     IRDMA_ACCESS_FLAGS_LOCALWRITE : 0;
2696	hw_access |= (access & IB_ACCESS_REMOTE_WRITE) ?
2697		     IRDMA_ACCESS_FLAGS_REMOTEWRITE : 0;
2698	hw_access |= (access & IB_ACCESS_REMOTE_READ) ?
2699		     IRDMA_ACCESS_FLAGS_REMOTEREAD : 0;
2700	if (hw_rev >= IRDMA_GEN_3) {
2701		hw_access |= (access & IB_ACCESS_MW_BIND) ?
2702			     IRDMA_ACCESS_FLAGS_BIND_WINDOW : 0;
2703	}
2704	hw_access |= (access & IB_ZERO_BASED) ?
2705		     IRDMA_ACCESS_FLAGS_ZERO_BASED : 0;
2706	hw_access |= IRDMA_ACCESS_FLAGS_LOCALREAD;
2707
2708	return hw_access;
2709}
2710
2711/**
2712 * irdma_free_stag - free stag resource
2713 * @iwdev: irdma device
2714 * @stag: stag to free
2715 */
2716static void irdma_free_stag(struct irdma_device *iwdev, u32 stag)
2717{
2718	u32 stag_idx;
2719
2720	stag_idx = (stag & iwdev->rf->mr_stagmask) >> IRDMA_CQPSQ_STAG_IDX_S;
2721	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_mrs, stag_idx);
2722}
2723
2724/**
2725 * irdma_create_stag - create random stag
2726 * @iwdev: irdma device
2727 */
2728static u32 irdma_create_stag(struct irdma_device *iwdev)
2729{
2730	u32 stag = 0;
2731	u32 stag_index = 0;
2732	u32 next_stag_index;
2733	u32 driver_key;
2734	u32 random;
2735	u8 consumer_key;
2736	int ret;
2737
2738	get_random_bytes(&random, sizeof(random));
2739	consumer_key = (u8)random;
2740
2741	driver_key = random & ~iwdev->rf->mr_stagmask;
2742	next_stag_index = (random & iwdev->rf->mr_stagmask) >> 8;
2743	next_stag_index %= iwdev->rf->max_mr;
2744
2745	ret = irdma_alloc_rsrc(iwdev->rf, iwdev->rf->allocated_mrs,
2746			       iwdev->rf->max_mr, &stag_index,
2747			       &next_stag_index);
2748	if (ret)
2749		return stag;
2750	stag = stag_index << IRDMA_CQPSQ_STAG_IDX_S;
2751	stag |= driver_key;
2752	stag += (u32)consumer_key;
2753
2754	return stag;
2755}
2756
2757/**
2758 * irdma_next_pbl_addr - Get next pbl address
2759 * @pbl: pointer to a pble
2760 * @pinfo: info pointer
2761 * @idx: index
2762 */
2763static inline u64 *irdma_next_pbl_addr(u64 *pbl, struct irdma_pble_info **pinfo,
2764				       u32 *idx)
2765{
2766	*idx += 1;
2767	if (!(*pinfo) || *idx != (*pinfo)->cnt)
2768		return ++pbl;
2769	*idx = 0;
2770	(*pinfo)++;
2771
2772	return (*pinfo)->addr;
2773}
2774
2775/**
2776 * irdma_copy_user_pgaddrs - copy user page address to pble's os locally
2777 * @iwmr: iwmr for IB's user page addresses
2778 * @pbl: ple pointer to save 1 level or 0 level pble
2779 * @level: indicated level 0, 1 or 2
2780 */
2781static void irdma_copy_user_pgaddrs(struct irdma_mr *iwmr, u64 *pbl,
2782				    enum irdma_pble_level level)
2783{
2784	struct ib_umem *region = iwmr->region;
2785	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2786	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2787	struct irdma_pble_info *pinfo;
2788	struct ib_block_iter biter;
2789	u32 idx = 0;
2790	u32 pbl_cnt = 0;
2791
2792	pinfo = (level == PBLE_LEVEL_1) ? NULL : palloc->level2.leaf;
2793
2794	if (iwmr->type == IRDMA_MEMREG_TYPE_QP)
2795		iwpbl->qp_mr.sq_page = sg_page(region->sgt_append.sgt.sgl);
2796
2797	rdma_umem_for_each_dma_block(region, &biter, iwmr->page_size) {
2798		*pbl = rdma_block_iter_dma_address(&biter);
2799		if (++pbl_cnt == palloc->total_cnt)
2800			break;
2801		pbl = irdma_next_pbl_addr(pbl, &pinfo, &idx);
2802	}
2803}
2804
2805/**
2806 * irdma_check_mem_contiguous - check if pbls stored in arr are contiguous
2807 * @arr: lvl1 pbl array
2808 * @npages: page count
2809 * @pg_size: page size
2810 *
2811 */
2812static bool irdma_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size)
2813{
2814	u32 pg_idx;
2815
2816	for (pg_idx = 0; pg_idx < npages; pg_idx++) {
2817		if ((*arr + (pg_size * pg_idx)) != arr[pg_idx])
2818			return false;
2819	}
2820
2821	return true;
2822}
2823
2824/**
2825 * irdma_check_mr_contiguous - check if MR is physically contiguous
2826 * @palloc: pbl allocation struct
2827 * @pg_size: page size
2828 */
2829static bool irdma_check_mr_contiguous(struct irdma_pble_alloc *palloc,
2830				      u32 pg_size)
2831{
2832	struct irdma_pble_level2 *lvl2 = &palloc->level2;
2833	struct irdma_pble_info *leaf = lvl2->leaf;
2834	u64 *arr = NULL;
2835	u64 *start_addr = NULL;
2836	int i;
2837	bool ret;
2838
2839	if (palloc->level == PBLE_LEVEL_1) {
2840		arr = palloc->level1.addr;
2841		ret = irdma_check_mem_contiguous(arr, palloc->total_cnt,
2842						 pg_size);
2843		return ret;
2844	}
2845
2846	start_addr = leaf->addr;
2847
2848	for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) {
2849		arr = leaf->addr;
2850		if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr)
2851			return false;
2852		ret = irdma_check_mem_contiguous(arr, leaf->cnt, pg_size);
2853		if (!ret)
2854			return false;
2855	}
2856
2857	return true;
2858}
2859
2860/**
2861 * irdma_setup_pbles - copy user pg address to pble's
2862 * @rf: RDMA PCI function
2863 * @iwmr: mr pointer for this memory registration
2864 * @lvl: requested pble levels
2865 */
2866static int irdma_setup_pbles(struct irdma_pci_f *rf, struct irdma_mr *iwmr,
2867			     u8 lvl)
2868{
2869	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2870	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2871	struct irdma_pble_info *pinfo;
2872	u64 *pbl;
2873	int status;
2874	enum irdma_pble_level level = PBLE_LEVEL_1;
2875
2876	if (lvl) {
2877		status = irdma_get_pble(rf->pble_rsrc, palloc, iwmr->page_cnt,
2878					lvl);
2879		if (status)
2880			return status;
2881
2882		iwpbl->pbl_allocated = true;
2883		level = palloc->level;
2884		pinfo = (level == PBLE_LEVEL_1) ? &palloc->level1 :
2885						  palloc->level2.leaf;
2886		pbl = pinfo->addr;
2887	} else {
2888		pbl = iwmr->pgaddrmem;
2889	}
2890
2891	irdma_copy_user_pgaddrs(iwmr, pbl, level);
2892
2893	if (lvl)
2894		iwmr->pgaddrmem[0] = *pbl;
2895
2896	return 0;
2897}
2898
2899/**
2900 * irdma_handle_q_mem - handle memory for qp and cq
2901 * @iwdev: irdma device
2902 * @req: information for q memory management
2903 * @iwpbl: pble struct
2904 * @lvl: pble level mask
2905 */
2906static int irdma_handle_q_mem(struct irdma_device *iwdev,
2907			      struct irdma_mem_reg_req *req,
2908			      struct irdma_pbl *iwpbl, u8 lvl)
2909{
2910	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2911	struct irdma_mr *iwmr = iwpbl->iwmr;
2912	struct irdma_qp_mr *qpmr = &iwpbl->qp_mr;
2913	struct irdma_cq_mr *cqmr = &iwpbl->cq_mr;
2914	struct irdma_srq_mr *srqmr = &iwpbl->srq_mr;
2915	struct irdma_hmc_pble *hmc_p;
2916	u64 *arr = iwmr->pgaddrmem;
2917	u32 pg_size, total;
2918	int err = 0;
2919	bool ret = true;
2920
2921	pg_size = iwmr->page_size;
2922	err = irdma_setup_pbles(iwdev->rf, iwmr, lvl);
2923	if (err)
2924		return err;
2925
2926	if (lvl)
2927		arr = palloc->level1.addr;
2928
2929	switch (iwmr->type) {
2930	case IRDMA_MEMREG_TYPE_QP:
2931		total = req->sq_pages + req->rq_pages;
2932		hmc_p = &qpmr->sq_pbl;
2933		qpmr->shadow = (dma_addr_t)arr[total];
2934		/* Need to use physical address for RQ of QP
2935		 * in case it is associated with SRQ.
2936		 */
2937		qpmr->rq_pa = (dma_addr_t)arr[req->sq_pages];
2938		if (lvl) {
2939			ret = irdma_check_mem_contiguous(arr, req->sq_pages,
2940							 pg_size);
2941			if (ret)
2942				ret = irdma_check_mem_contiguous(&arr[req->sq_pages],
2943								 req->rq_pages,
2944								 pg_size);
2945		}
2946
2947		if (!ret) {
2948			hmc_p->idx = palloc->level1.idx;
2949			hmc_p = &qpmr->rq_pbl;
2950			hmc_p->idx = palloc->level1.idx + req->sq_pages;
2951		} else {
2952			hmc_p->addr = arr[0];
2953			hmc_p = &qpmr->rq_pbl;
2954			hmc_p->addr = arr[req->sq_pages];
2955		}
2956		break;
2957	case IRDMA_MEMREG_TYPE_SRQ:
2958		hmc_p = &srqmr->srq_pbl;
2959		srqmr->shadow = (dma_addr_t)arr[req->rq_pages];
2960		if (lvl)
2961			ret = irdma_check_mem_contiguous(arr, req->rq_pages,
2962							 pg_size);
2963
2964		if (!ret)
2965			hmc_p->idx = palloc->level1.idx;
2966		else
2967			hmc_p->addr = arr[0];
2968	break;
2969	case IRDMA_MEMREG_TYPE_CQ:
2970		hmc_p = &cqmr->cq_pbl;
2971
2972		if (!cqmr->split)
2973			cqmr->shadow = (dma_addr_t)arr[req->cq_pages];
2974
2975		if (lvl)
2976			ret = irdma_check_mem_contiguous(arr, req->cq_pages,
2977							 pg_size);
2978
2979		if (!ret)
2980			hmc_p->idx = palloc->level1.idx;
2981		else
2982			hmc_p->addr = arr[0];
2983	break;
2984	default:
2985		ibdev_dbg(&iwdev->ibdev, "VERBS: MR type error\n");
2986		err = -EINVAL;
2987	}
2988
2989	if (lvl && ret) {
2990		irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2991		iwpbl->pbl_allocated = false;
2992	}
2993
2994	return err;
2995}
2996
2997/**
2998 * irdma_hw_alloc_mw - create the hw memory window
2999 * @iwdev: irdma device
3000 * @iwmr: pointer to memory window info
3001 */
3002static int irdma_hw_alloc_mw(struct irdma_device *iwdev, struct irdma_mr *iwmr)
3003{
3004	struct irdma_mw_alloc_info *info;
3005	struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
3006	struct irdma_cqp_request *cqp_request;
3007	struct cqp_cmds_info *cqp_info;
3008	int status;
3009
3010	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3011	if (!cqp_request)
3012		return -ENOMEM;
3013
3014	cqp_info = &cqp_request->info;
3015	info = &cqp_info->in.u.mw_alloc.info;
3016	memset(info, 0, sizeof(*info));
3017	if (iwmr->ibmw.type == IB_MW_TYPE_1)
3018		info->mw_wide = true;
3019
3020	info->page_size = PAGE_SIZE;
3021	info->mw_stag_index = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
3022	info->pd_id = iwpd->sc_pd.pd_id;
3023	info->remote_access = true;
3024	cqp_info->cqp_cmd = IRDMA_OP_MW_ALLOC;
3025	cqp_info->post_sq = 1;
3026	cqp_info->in.u.mw_alloc.dev = &iwdev->rf->sc_dev;
3027	cqp_info->in.u.mw_alloc.scratch = (uintptr_t)cqp_request;
3028	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
3029	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3030
3031	return status;
3032}
3033
3034/**
3035 * irdma_alloc_mw - Allocate memory window
3036 * @ibmw: Memory Window
3037 * @udata: user data pointer
3038 */
3039static int irdma_alloc_mw(struct ib_mw *ibmw, struct ib_udata *udata)
3040{
3041	struct irdma_device *iwdev = to_iwdev(ibmw->device);
3042	struct irdma_mr *iwmr = to_iwmw(ibmw);
3043	int err_code;
3044	u32 stag;
3045
3046	stag = irdma_create_stag(iwdev);
3047	if (!stag)
3048		return -ENOMEM;
3049
3050	iwmr->stag = stag;
3051	ibmw->rkey = stag;
3052
3053	err_code = irdma_hw_alloc_mw(iwdev, iwmr);
3054	if (err_code) {
3055		irdma_free_stag(iwdev, stag);
3056		return err_code;
3057	}
3058
3059	return 0;
3060}
3061
3062/**
3063 * irdma_dealloc_mw - Dealloc memory window
3064 * @ibmw: memory window structure.
3065 */
3066static int irdma_dealloc_mw(struct ib_mw *ibmw)
3067{
3068	struct ib_pd *ibpd = ibmw->pd;
3069	struct irdma_pd *iwpd = to_iwpd(ibpd);
3070	struct irdma_mr *iwmr = to_iwmr((struct ib_mr *)ibmw);
3071	struct irdma_device *iwdev = to_iwdev(ibmw->device);
3072	struct irdma_cqp_request *cqp_request;
3073	struct cqp_cmds_info *cqp_info;
3074	struct irdma_dealloc_stag_info *info;
3075
3076	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3077	if (!cqp_request)
3078		return -ENOMEM;
3079
3080	cqp_info = &cqp_request->info;
3081	info = &cqp_info->in.u.dealloc_stag.info;
3082	memset(info, 0, sizeof(*info));
3083	info->pd_id = iwpd->sc_pd.pd_id;
3084	info->stag_idx = ibmw->rkey >> IRDMA_CQPSQ_STAG_IDX_S;
3085	info->mr = false;
3086	cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG;
3087	cqp_info->post_sq = 1;
3088	cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev;
3089	cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
3090	irdma_handle_cqp_op(iwdev->rf, cqp_request);
3091	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3092	irdma_free_stag(iwdev, iwmr->stag);
3093
3094	return 0;
3095}
3096
3097/**
3098 * irdma_hw_alloc_stag - cqp command to allocate stag
3099 * @iwdev: irdma device
3100 * @iwmr: irdma mr pointer
3101 */
3102static int irdma_hw_alloc_stag(struct irdma_device *iwdev,
3103			       struct irdma_mr *iwmr)
3104{
3105	struct irdma_allocate_stag_info *info;
3106	struct ib_pd *pd = iwmr->ibmr.pd;
3107	struct irdma_pd *iwpd = to_iwpd(pd);
3108	int status;
3109	struct irdma_cqp_request *cqp_request;
3110	struct cqp_cmds_info *cqp_info;
3111
3112	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3113	if (!cqp_request)
3114		return -ENOMEM;
3115
3116	cqp_info = &cqp_request->info;
3117	info = &cqp_info->in.u.alloc_stag.info;
3118	info->page_size = PAGE_SIZE;
3119	info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
3120	info->pd_id = iwpd->sc_pd.pd_id;
3121	info->total_len = iwmr->len;
3122	info->remote_access = true;
3123	cqp_info->cqp_cmd = IRDMA_OP_ALLOC_STAG;
3124	cqp_info->post_sq = 1;
3125	cqp_info->in.u.alloc_stag.dev = &iwdev->rf->sc_dev;
3126	cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
3127	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
3128	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3129	if (status)
3130		return status;
3131
3132	iwmr->is_hwreg = true;
3133	return 0;
3134}
3135
3136/**
3137 * irdma_alloc_mr - register stag for fast memory registration
3138 * @pd: ibpd pointer
3139 * @mr_type: memory for stag registrion
3140 * @max_num_sg: man number of pages
3141 */
3142static struct ib_mr *irdma_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
3143				    u32 max_num_sg)
3144{
3145	struct irdma_device *iwdev = to_iwdev(pd->device);
3146	struct irdma_pble_alloc *palloc;
3147	struct irdma_pbl *iwpbl;
3148	struct irdma_mr *iwmr;
3149	u32 stag;
3150	int err_code;
3151
3152	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
3153	if (!iwmr)
3154		return ERR_PTR(-ENOMEM);
3155
3156	stag = irdma_create_stag(iwdev);
3157	if (!stag) {
3158		err_code = -ENOMEM;
3159		goto err;
3160	}
3161
3162	iwmr->stag = stag;
3163	iwmr->ibmr.rkey = stag;
3164	iwmr->ibmr.lkey = stag;
3165	iwmr->ibmr.pd = pd;
3166	iwmr->ibmr.device = pd->device;
3167	iwpbl = &iwmr->iwpbl;
3168	iwpbl->iwmr = iwmr;
3169	iwmr->type = IRDMA_MEMREG_TYPE_MEM;
3170	palloc = &iwpbl->pble_alloc;
3171	iwmr->page_cnt = max_num_sg;
3172	/* Use system PAGE_SIZE as the sg page sizes are unknown at this point */
3173	iwmr->len = max_num_sg * PAGE_SIZE;
3174	err_code = irdma_get_pble(iwdev->rf->pble_rsrc, palloc, iwmr->page_cnt,
3175				  false);
3176	if (err_code)
3177		goto err_get_pble;
3178
3179	err_code = irdma_hw_alloc_stag(iwdev, iwmr);
3180	if (err_code)
3181		goto err_alloc_stag;
3182
3183	iwpbl->pbl_allocated = true;
3184
3185	return &iwmr->ibmr;
3186err_alloc_stag:
3187	irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
3188err_get_pble:
3189	irdma_free_stag(iwdev, stag);
3190err:
3191	kfree(iwmr);
3192
3193	return ERR_PTR(err_code);
3194}
3195
3196/**
3197 * irdma_set_page - populate pbl list for fmr
3198 * @ibmr: ib mem to access iwarp mr pointer
3199 * @addr: page dma address fro pbl list
3200 */
3201static int irdma_set_page(struct ib_mr *ibmr, u64 addr)
3202{
3203	struct irdma_mr *iwmr = to_iwmr(ibmr);
3204	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3205	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
3206	u64 *pbl;
3207
3208	if (unlikely(iwmr->npages == iwmr->page_cnt))
3209		return -ENOMEM;
3210
3211	if (palloc->level == PBLE_LEVEL_2) {
3212		struct irdma_pble_info *palloc_info =
3213			palloc->level2.leaf + (iwmr->npages >> PBLE_512_SHIFT);
3214
3215		palloc_info->addr[iwmr->npages & (PBLE_PER_PAGE - 1)] = addr;
3216	} else {
3217		pbl = palloc->level1.addr;
3218		pbl[iwmr->npages] = addr;
3219	}
3220	iwmr->npages++;
3221
3222	return 0;
3223}
3224
3225/**
3226 * irdma_map_mr_sg - map of sg list for fmr
3227 * @ibmr: ib mem to access iwarp mr pointer
3228 * @sg: scatter gather list
3229 * @sg_nents: number of sg pages
3230 * @sg_offset: scatter gather list for fmr
3231 */
3232static int irdma_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
3233			   int sg_nents, unsigned int *sg_offset)
3234{
3235	struct irdma_mr *iwmr = to_iwmr(ibmr);
3236
3237	iwmr->npages = 0;
3238
3239	return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, irdma_set_page);
3240}
3241
3242/**
3243 * irdma_hwreg_mr - send cqp command for memory registration
3244 * @iwdev: irdma device
3245 * @iwmr: irdma mr pointer
3246 * @access: access for MR
3247 */
3248static int irdma_hwreg_mr(struct irdma_device *iwdev, struct irdma_mr *iwmr,
3249			  u16 access)
3250{
3251	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3252	struct irdma_reg_ns_stag_info *stag_info;
3253	struct ib_pd *pd = iwmr->ibmr.pd;
3254	struct irdma_pd *iwpd = to_iwpd(pd);
3255	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
3256	struct irdma_cqp_request *cqp_request;
3257	struct cqp_cmds_info *cqp_info;
3258	int ret;
3259
3260	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3261	if (!cqp_request)
3262		return -ENOMEM;
3263
3264	cqp_info = &cqp_request->info;
3265	stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
3266	stag_info->va = iwpbl->user_base;
3267	stag_info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
3268	stag_info->stag_key = (u8)iwmr->stag;
3269	stag_info->total_len = iwmr->len;
3270	stag_info->access_rights = irdma_get_mr_access(access,
3271						       iwdev->rf->sc_dev.hw_attrs.uk_attrs.hw_rev);
3272	if (iwdev->rf->sc_dev.hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_ATOMIC_OPS)
3273		stag_info->remote_atomics_en = (access & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
3274	stag_info->pd_id = iwpd->sc_pd.pd_id;
3275	stag_info->all_memory = iwmr->dma_mr;
3276	if (stag_info->access_rights & IRDMA_ACCESS_FLAGS_ZERO_BASED)
3277		stag_info->addr_type = IRDMA_ADDR_TYPE_ZERO_BASED;
3278	else
3279		stag_info->addr_type = IRDMA_ADDR_TYPE_VA_BASED;
3280	stag_info->page_size = iwmr->page_size;
3281
3282	if (iwpbl->pbl_allocated) {
3283		if (palloc->level == PBLE_LEVEL_1) {
3284			stag_info->first_pm_pbl_index = palloc->level1.idx;
3285			stag_info->chunk_size = 1;
3286		} else {
3287			stag_info->first_pm_pbl_index = palloc->level2.root.idx;
3288			stag_info->chunk_size = 3;
3289		}
3290	} else {
3291		stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
3292	}
3293
3294	cqp_info->cqp_cmd = IRDMA_OP_MR_REG_NON_SHARED;
3295	cqp_info->post_sq = 1;
3296	cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->rf->sc_dev;
3297	cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
3298	ret = irdma_handle_cqp_op(iwdev->rf, cqp_request);
3299	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3300
3301	if (!ret)
3302		iwmr->is_hwreg = true;
3303
3304	return ret;
3305}
3306
3307static int irdma_reg_user_mr_type_mem(struct irdma_mr *iwmr, int access,
3308				      bool create_stag)
3309{
3310	struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device);
3311	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3312	u32 stag = 0;
3313	u8 lvl;
3314	int err;
3315
3316	lvl = iwmr->page_cnt != 1 ? PBLE_LEVEL_1 | PBLE_LEVEL_2 : PBLE_LEVEL_0;
3317
3318	err = irdma_setup_pbles(iwdev->rf, iwmr, lvl);
3319	if (err)
3320		return err;
3321
3322	if (lvl) {
3323		err = irdma_check_mr_contiguous(&iwpbl->pble_alloc,
3324						iwmr->page_size);
3325		if (err) {
3326			irdma_free_pble(iwdev->rf->pble_rsrc, &iwpbl->pble_alloc);
3327			iwpbl->pbl_allocated = false;
3328		}
3329	}
3330
3331	if (create_stag) {
3332		stag = irdma_create_stag(iwdev);
3333		if (!stag) {
3334			err = -ENOMEM;
3335			goto free_pble;
3336		}
3337
3338		iwmr->stag = stag;
3339		iwmr->ibmr.rkey = stag;
3340		iwmr->ibmr.lkey = stag;
3341	}
3342
3343	err = irdma_hwreg_mr(iwdev, iwmr, access);
3344	if (err)
3345		goto err_hwreg;
3346
3347	return 0;
3348
3349err_hwreg:
3350	if (stag)
3351		irdma_free_stag(iwdev, stag);
3352
3353free_pble:
3354	if (iwpbl->pble_alloc.level != PBLE_LEVEL_0 && iwpbl->pbl_allocated)
3355		irdma_free_pble(iwdev->rf->pble_rsrc, &iwpbl->pble_alloc);
3356
3357	return err;
3358}
3359
3360static struct irdma_mr *irdma_alloc_iwmr(struct ib_umem *region,
3361					 struct ib_pd *pd, u64 virt,
3362					 enum irdma_memreg_type reg_type)
3363{
3364	struct irdma_device *iwdev = to_iwdev(pd->device);
3365	struct irdma_pbl *iwpbl;
3366	struct irdma_mr *iwmr;
3367	unsigned long pgsz_bitmap;
3368
3369	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
3370	if (!iwmr)
3371		return ERR_PTR(-ENOMEM);
3372
3373	iwpbl = &iwmr->iwpbl;
3374	iwpbl->iwmr = iwmr;
3375	iwmr->region = region;
3376	iwmr->ibmr.pd = pd;
3377	iwmr->ibmr.device = pd->device;
3378	iwmr->ibmr.iova = virt;
3379	iwmr->type = reg_type;
3380
3381	pgsz_bitmap = (reg_type == IRDMA_MEMREG_TYPE_MEM) ?
3382		iwdev->rf->sc_dev.hw_attrs.page_size_cap : SZ_4K;
3383
3384	iwmr->page_size = ib_umem_find_best_pgsz(region, pgsz_bitmap, virt);
3385	if (unlikely(!iwmr->page_size)) {
3386		kfree(iwmr);
3387		return ERR_PTR(-EOPNOTSUPP);
3388	}
3389
3390	iwmr->len = region->length;
3391	iwpbl->user_base = virt;
3392	iwmr->page_cnt = ib_umem_num_dma_blocks(region, iwmr->page_size);
3393
3394	return iwmr;
3395}
3396
3397static void irdma_free_iwmr(struct irdma_mr *iwmr)
3398{
3399	kfree(iwmr);
3400}
3401
3402static int irdma_reg_user_mr_type_qp(struct irdma_mem_reg_req req,
3403				     struct ib_udata *udata,
3404				     struct irdma_mr *iwmr)
3405{
3406	struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device);
3407	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3408	struct irdma_ucontext *ucontext = NULL;
3409	unsigned long flags;
3410	u32 total;
3411	int err;
3412	u8 lvl;
3413
3414	/* iWarp: Catch page not starting on OS page boundary */
3415	if (!rdma_protocol_roce(&iwdev->ibdev, 1) &&
3416	    ib_umem_offset(iwmr->region))
3417		return -EINVAL;
3418
3419	total = req.sq_pages + req.rq_pages + 1;
3420	if (total > iwmr->page_cnt)
3421		return -EINVAL;
3422
3423	total = req.sq_pages + req.rq_pages;
3424	lvl = total > 2 ? PBLE_LEVEL_1 : PBLE_LEVEL_0;
3425	err = irdma_handle_q_mem(iwdev, &req, iwpbl, lvl);
3426	if (err)
3427		return err;
3428
3429	ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
3430					     ibucontext);
3431	spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
3432	list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
3433	iwpbl->on_list = true;
3434	spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
3435
3436	return 0;
3437}
3438
3439static int irdma_reg_user_mr_type_srq(struct irdma_mem_reg_req req,
3440				      struct ib_udata *udata,
3441				      struct irdma_mr *iwmr)
3442{
3443	struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device);
3444	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3445	struct irdma_ucontext *ucontext;
3446	unsigned long flags;
3447	u32 total;
3448	int err;
3449	u8 lvl;
3450
3451	total = req.rq_pages + IRDMA_SHADOW_PGCNT;
3452	if (total > iwmr->page_cnt)
3453		return -EINVAL;
3454
3455	lvl = req.rq_pages > 1 ? PBLE_LEVEL_1 : PBLE_LEVEL_0;
3456	err = irdma_handle_q_mem(iwdev, &req, iwpbl, lvl);
3457	if (err)
3458		return err;
3459
3460	ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
3461					     ibucontext);
3462	spin_lock_irqsave(&ucontext->srq_reg_mem_list_lock, flags);
3463	list_add_tail(&iwpbl->list, &ucontext->srq_reg_mem_list);
3464	iwpbl->on_list = true;
3465	spin_unlock_irqrestore(&ucontext->srq_reg_mem_list_lock, flags);
3466
3467	return 0;
3468}
3469
3470static int irdma_reg_user_mr_type_cq(struct irdma_mem_reg_req req,
3471				     struct ib_udata *udata,
3472				     struct irdma_mr *iwmr)
3473{
3474	struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device);
3475	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3476	struct irdma_ucontext *ucontext = NULL;
3477	u8 shadow_pgcnt = 1;
3478	unsigned long flags;
3479	u32 total;
3480	int err;
3481	u8 lvl;
3482
3483	if (iwdev->rf->sc_dev.hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_CQ_RESIZE)
3484		shadow_pgcnt = 0;
3485	total = req.cq_pages + shadow_pgcnt;
3486	if (total > iwmr->page_cnt)
3487		return -EINVAL;
3488
3489	lvl = req.cq_pages > 1 ? PBLE_LEVEL_1 : PBLE_LEVEL_0;
3490	err = irdma_handle_q_mem(iwdev, &req, iwpbl, lvl);
3491	if (err)
3492		return err;
3493
3494	ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
3495					     ibucontext);
3496	spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
3497	list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
3498	iwpbl->on_list = true;
3499	spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
3500
3501	return 0;
3502}
3503
3504/**
3505 * irdma_reg_user_mr - Register a user memory region
3506 * @pd: ptr of pd
3507 * @start: virtual start address
3508 * @len: length of mr
3509 * @virt: virtual address
3510 * @access: access of mr
3511 * @dmah: dma handle
3512 * @udata: user data
3513 */
3514static struct ib_mr *irdma_reg_user_mr(struct ib_pd *pd, u64 start, u64 len,
3515				       u64 virt, int access,
3516				       struct ib_dmah *dmah,
3517				       struct ib_udata *udata)
3518{
3519#define IRDMA_MEM_REG_MIN_REQ_LEN offsetofend(struct irdma_mem_reg_req, sq_pages)
3520	struct irdma_device *iwdev = to_iwdev(pd->device);
3521	struct irdma_mem_reg_req req = {};
3522	struct ib_umem *region = NULL;
3523	struct irdma_mr *iwmr = NULL;
3524	int err;
3525
3526	if (dmah)
3527		return ERR_PTR(-EOPNOTSUPP);
3528
3529	if (len > iwdev->rf->sc_dev.hw_attrs.max_mr_size)
3530		return ERR_PTR(-EINVAL);
3531
3532	if (udata->inlen < IRDMA_MEM_REG_MIN_REQ_LEN)
3533		return ERR_PTR(-EINVAL);
3534
3535	region = ib_umem_get(pd->device, start, len, access);
3536
3537	if (IS_ERR(region)) {
3538		ibdev_dbg(&iwdev->ibdev,
3539			  "VERBS: Failed to create ib_umem region\n");
3540		return (struct ib_mr *)region;
3541	}
3542
3543	if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen))) {
3544		ib_umem_release(region);
3545		return ERR_PTR(-EFAULT);
3546	}
3547
3548	iwmr = irdma_alloc_iwmr(region, pd, virt, req.reg_type);
3549	if (IS_ERR(iwmr)) {
3550		ib_umem_release(region);
3551		return (struct ib_mr *)iwmr;
3552	}
3553
3554	switch (req.reg_type) {
3555	case IRDMA_MEMREG_TYPE_QP:
3556		err = irdma_reg_user_mr_type_qp(req, udata, iwmr);
3557		if (err)
3558			goto error;
3559
3560		break;
3561	case IRDMA_MEMREG_TYPE_SRQ:
3562		err = irdma_reg_user_mr_type_srq(req, udata, iwmr);
3563		if (err)
3564			goto error;
3565
3566		break;
3567	case IRDMA_MEMREG_TYPE_CQ:
3568		err = irdma_reg_user_mr_type_cq(req, udata, iwmr);
3569		if (err)
3570			goto error;
3571		break;
3572	case IRDMA_MEMREG_TYPE_MEM:
3573		err = irdma_reg_user_mr_type_mem(iwmr, access, true);
3574		if (err)
3575			goto error;
3576
3577		break;
3578	default:
3579		err = -EINVAL;
3580		goto error;
3581	}
3582
3583	return &iwmr->ibmr;
3584error:
3585	ib_umem_release(region);
3586	irdma_free_iwmr(iwmr);
3587
3588	return ERR_PTR(err);
3589}
3590
3591static struct ib_mr *irdma_reg_user_mr_dmabuf(struct ib_pd *pd, u64 start,
3592					      u64 len, u64 virt,
3593					      int fd, int access,
3594					      struct ib_dmah *dmah,
3595					      struct uverbs_attr_bundle *attrs)
3596{
3597	struct irdma_device *iwdev = to_iwdev(pd->device);
3598	struct ib_umem_dmabuf *umem_dmabuf;
3599	struct irdma_mr *iwmr;
3600	int err;
3601
3602	if (dmah)
3603		return ERR_PTR(-EOPNOTSUPP);
3604
3605	if (len > iwdev->rf->sc_dev.hw_attrs.max_mr_size)
3606		return ERR_PTR(-EINVAL);
3607
3608	umem_dmabuf = ib_umem_dmabuf_get_pinned(pd->device, start, len, fd, access);
3609	if (IS_ERR(umem_dmabuf)) {
3610		ibdev_dbg(&iwdev->ibdev, "Failed to get dmabuf umem[%pe]\n",
3611			  umem_dmabuf);
3612		return ERR_CAST(umem_dmabuf);
3613	}
3614
3615	iwmr = irdma_alloc_iwmr(&umem_dmabuf->umem, pd, virt, IRDMA_MEMREG_TYPE_MEM);
3616	if (IS_ERR(iwmr)) {
3617		err = PTR_ERR(iwmr);
3618		goto err_release;
3619	}
3620
3621	err = irdma_reg_user_mr_type_mem(iwmr, access, true);
3622	if (err)
3623		goto err_iwmr;
3624
3625	return &iwmr->ibmr;
3626
3627err_iwmr:
3628	irdma_free_iwmr(iwmr);
3629
3630err_release:
3631	ib_umem_release(&umem_dmabuf->umem);
3632
3633	return ERR_PTR(err);
3634}
3635
3636static int irdma_hwdereg_mr(struct ib_mr *ib_mr)
3637{
3638	struct irdma_device *iwdev = to_iwdev(ib_mr->device);
3639	struct irdma_mr *iwmr = to_iwmr(ib_mr);
3640	struct irdma_pd *iwpd = to_iwpd(ib_mr->pd);
3641	struct irdma_dealloc_stag_info *info;
3642	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3643	struct irdma_cqp_request *cqp_request;
3644	struct cqp_cmds_info *cqp_info;
3645	int status;
3646
3647	/* Skip HW MR de-register when it is already de-registered
3648	 * during an MR re-reregister and the re-registration fails
3649	 */
3650	if (!iwmr->is_hwreg)
3651		return 0;
3652
3653	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3654	if (!cqp_request)
3655		return -ENOMEM;
3656
3657	cqp_info = &cqp_request->info;
3658	info = &cqp_info->in.u.dealloc_stag.info;
3659	info->pd_id = iwpd->sc_pd.pd_id;
3660	info->stag_idx = ib_mr->rkey >> IRDMA_CQPSQ_STAG_IDX_S;
3661	info->mr = true;
3662	if (iwpbl->pbl_allocated)
3663		info->dealloc_pbl = true;
3664
3665	cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG;
3666	cqp_info->post_sq = 1;
3667	cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev;
3668	cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
3669	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
3670	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3671	if (status)
3672		return status;
3673
3674	iwmr->is_hwreg = false;
3675	return 0;
3676}
3677
3678/*
3679 * irdma_rereg_mr_trans - Re-register a user MR for a change translation.
3680 * @iwmr: ptr of iwmr
3681 * @start: virtual start address
3682 * @len: length of mr
3683 * @virt: virtual address
3684 *
3685 * Re-register a user memory region when a change translation is requested.
3686 * Re-register a new region while reusing the stag from the original registration.
3687 */
3688static int irdma_rereg_mr_trans(struct irdma_mr *iwmr, u64 start, u64 len,
3689				u64 virt)
3690{
3691	struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device);
3692	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3693	struct ib_pd *pd = iwmr->ibmr.pd;
3694	struct ib_umem *region;
3695	int err;
3696
3697	region = ib_umem_get(pd->device, start, len, iwmr->access);
3698	if (IS_ERR(region))
3699		return PTR_ERR(region);
3700
3701	iwmr->region = region;
3702	iwmr->ibmr.iova = virt;
3703	iwmr->ibmr.pd = pd;
3704	iwmr->page_size = ib_umem_find_best_pgsz(region,
3705				iwdev->rf->sc_dev.hw_attrs.page_size_cap,
3706				virt);
3707	if (unlikely(!iwmr->page_size)) {
3708		err = -EOPNOTSUPP;
3709		goto err;
3710	}
3711
3712	iwmr->len = region->length;
3713	iwpbl->user_base = virt;
3714	iwmr->page_cnt = ib_umem_num_dma_blocks(region, iwmr->page_size);
3715
3716	err = irdma_reg_user_mr_type_mem(iwmr, iwmr->access, false);
3717	if (err)
3718		goto err;
3719
3720	return 0;
3721
3722err:
3723	ib_umem_release(region);
3724	iwmr->region = NULL;
3725	return err;
3726}
3727
3728/*
3729 *  irdma_rereg_user_mr - Re-Register a user memory region(MR)
3730 *  @ibmr: ib mem to access iwarp mr pointer
3731 *  @flags: bit mask to indicate which of the attr's of MR modified
3732 *  @start: virtual start address
3733 *  @len: length of mr
3734 *  @virt: virtual address
3735 *  @new_access: bit mask of access flags
3736 *  @new_pd: ptr of pd
3737 *  @udata: user data
3738 *
3739 *  Return:
3740 *  NULL - Success, existing MR updated
3741 *  ERR_PTR - error occurred
3742 */
3743static struct ib_mr *irdma_rereg_user_mr(struct ib_mr *ib_mr, int flags,
3744					 u64 start, u64 len, u64 virt,
3745					 int new_access, struct ib_pd *new_pd,
3746					 struct ib_udata *udata)
3747{
3748	struct irdma_device *iwdev = to_iwdev(ib_mr->device);
3749	struct irdma_mr *iwmr = to_iwmr(ib_mr);
3750	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3751	int ret;
3752
3753	if (len > iwdev->rf->sc_dev.hw_attrs.max_mr_size)
3754		return ERR_PTR(-EINVAL);
3755
3756	if (flags & ~(IB_MR_REREG_TRANS | IB_MR_REREG_PD | IB_MR_REREG_ACCESS))
3757		return ERR_PTR(-EOPNOTSUPP);
3758
3759	ret = irdma_hwdereg_mr(ib_mr);
3760	if (ret)
3761		return ERR_PTR(ret);
3762
3763	if (flags & IB_MR_REREG_ACCESS)
3764		iwmr->access = new_access;
3765
3766	if (flags & IB_MR_REREG_PD) {
3767		iwmr->ibmr.pd = new_pd;
3768		iwmr->ibmr.device = new_pd->device;
3769	}
3770
3771	if (flags & IB_MR_REREG_TRANS) {
3772		if (iwpbl->pbl_allocated) {
3773			irdma_free_pble(iwdev->rf->pble_rsrc,
3774					&iwpbl->pble_alloc);
3775			iwpbl->pbl_allocated = false;
3776		}
3777		if (iwmr->region) {
3778			ib_umem_release(iwmr->region);
3779			iwmr->region = NULL;
3780		}
3781
3782		ret = irdma_rereg_mr_trans(iwmr, start, len, virt);
3783	} else
3784		ret = irdma_hwreg_mr(iwdev, iwmr, iwmr->access);
3785	if (ret)
3786		return ERR_PTR(ret);
3787
3788	return NULL;
3789}
3790
3791/**
3792 * irdma_reg_phys_mr - register kernel physical memory
3793 * @pd: ibpd pointer
3794 * @addr: physical address of memory to register
3795 * @size: size of memory to register
3796 * @access: Access rights
3797 * @iova_start: start of virtual address for physical buffers
3798 * @dma_mr: Flag indicating whether this region is a PD DMA MR
3799 */
3800struct ib_mr *irdma_reg_phys_mr(struct ib_pd *pd, u64 addr, u64 size, int access,
3801				u64 *iova_start, bool dma_mr)
3802{
3803	struct irdma_device *iwdev = to_iwdev(pd->device);
3804	struct irdma_pbl *iwpbl;
3805	struct irdma_mr *iwmr;
3806	u32 stag;
3807	int ret;
3808
3809	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
3810	if (!iwmr)
3811		return ERR_PTR(-ENOMEM);
3812
3813	iwmr->ibmr.pd = pd;
3814	iwmr->ibmr.device = pd->device;
3815	iwpbl = &iwmr->iwpbl;
3816	iwpbl->iwmr = iwmr;
3817	iwmr->type = IRDMA_MEMREG_TYPE_MEM;
3818	iwmr->dma_mr = dma_mr;
3819	iwpbl->user_base = *iova_start;
3820	stag = irdma_create_stag(iwdev);
3821	if (!stag) {
3822		ret = -ENOMEM;
3823		goto err;
3824	}
3825
3826	iwmr->stag = stag;
3827	iwmr->ibmr.iova = *iova_start;
3828	iwmr->ibmr.rkey = stag;
3829	iwmr->ibmr.lkey = stag;
3830	iwmr->page_cnt = 1;
3831	iwmr->pgaddrmem[0] = addr;
3832	iwmr->len = size;
3833	iwmr->page_size = SZ_4K;
3834	ret = irdma_hwreg_mr(iwdev, iwmr, access);
3835	if (ret) {
3836		irdma_free_stag(iwdev, stag);
3837		goto err;
3838	}
3839
3840	return &iwmr->ibmr;
3841
3842err:
3843	kfree(iwmr);
3844
3845	return ERR_PTR(ret);
3846}
3847
3848/**
3849 * irdma_get_dma_mr - register physical mem
3850 * @pd: ptr of pd
3851 * @acc: access for memory
3852 */
3853static struct ib_mr *irdma_get_dma_mr(struct ib_pd *pd, int acc)
3854{
3855	u64 kva = 0;
3856
3857	return irdma_reg_phys_mr(pd, 0, 0, acc, &kva, true);
3858}
3859
3860/**
3861 * irdma_del_memlist - Deleting pbl list entries for CQ/QP
3862 * @iwmr: iwmr for IB's user page addresses
3863 * @ucontext: ptr to user context
3864 */
3865static void irdma_del_memlist(struct irdma_mr *iwmr,
3866			      struct irdma_ucontext *ucontext)
3867{
3868	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3869	unsigned long flags;
3870
3871	switch (iwmr->type) {
3872	case IRDMA_MEMREG_TYPE_CQ:
3873		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
3874		if (iwpbl->on_list) {
3875			iwpbl->on_list = false;
3876			list_del(&iwpbl->list);
3877		}
3878		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
3879		break;
3880	case IRDMA_MEMREG_TYPE_QP:
3881		spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
3882		if (iwpbl->on_list) {
3883			iwpbl->on_list = false;
3884			list_del(&iwpbl->list);
3885		}
3886		spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
3887		break;
3888	case IRDMA_MEMREG_TYPE_SRQ:
3889		spin_lock_irqsave(&ucontext->srq_reg_mem_list_lock, flags);
3890		if (iwpbl->on_list) {
3891			iwpbl->on_list = false;
3892			list_del(&iwpbl->list);
3893		}
3894		spin_unlock_irqrestore(&ucontext->srq_reg_mem_list_lock, flags);
3895		break;
3896	default:
3897		break;
3898	}
3899}
3900
3901/**
3902 * irdma_dereg_mr - deregister mr
3903 * @ib_mr: mr ptr for dereg
3904 * @udata: user data
3905 */
3906static int irdma_dereg_mr(struct ib_mr *ib_mr, struct ib_udata *udata)
3907{
3908	struct irdma_mr *iwmr = to_iwmr(ib_mr);
3909	struct irdma_device *iwdev = to_iwdev(ib_mr->device);
3910	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3911	int ret;
3912
3913	if (iwmr->type != IRDMA_MEMREG_TYPE_MEM) {
3914		if (iwmr->region) {
3915			struct irdma_ucontext *ucontext;
3916
3917			ucontext = rdma_udata_to_drv_context(udata,
3918						struct irdma_ucontext,
3919						ibucontext);
3920			irdma_del_memlist(iwmr, ucontext);
3921		}
3922		goto done;
3923	}
3924
3925	ret = irdma_hwdereg_mr(ib_mr);
3926	if (ret)
3927		return ret;
3928
3929	irdma_free_stag(iwdev, iwmr->stag);
3930done:
3931	if (iwpbl->pbl_allocated)
3932		irdma_free_pble(iwdev->rf->pble_rsrc, &iwpbl->pble_alloc);
3933
3934	if (iwmr->region)
3935		ib_umem_release(iwmr->region);
3936
3937	kfree(iwmr);
3938
3939	return 0;
3940}
3941
3942/**
3943 * irdma_post_send -  kernel application wr
3944 * @ibqp: qp ptr for wr
3945 * @ib_wr: work request ptr
3946 * @bad_wr: return of bad wr if err
3947 */
3948static int irdma_post_send(struct ib_qp *ibqp,
3949			   const struct ib_send_wr *ib_wr,
3950			   const struct ib_send_wr **bad_wr)
3951{
3952	struct irdma_qp *iwqp;
3953	struct irdma_qp_uk *ukqp;
3954	struct irdma_sc_dev *dev;
3955	struct irdma_post_sq_info info;
3956	int err = 0;
3957	unsigned long flags;
3958	bool inv_stag;
3959	struct irdma_ah *ah;
3960
3961	iwqp = to_iwqp(ibqp);
3962	ukqp = &iwqp->sc_qp.qp_uk;
3963	dev = &iwqp->iwdev->rf->sc_dev;
3964
3965	spin_lock_irqsave(&iwqp->lock, flags);
3966	while (ib_wr) {
3967		memset(&info, 0, sizeof(info));
3968		inv_stag = false;
3969		info.wr_id = (ib_wr->wr_id);
3970		if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
3971			info.signaled = true;
3972		if (ib_wr->send_flags & IB_SEND_FENCE)
3973			info.read_fence = true;
3974		switch (ib_wr->opcode) {
3975		case IB_WR_ATOMIC_CMP_AND_SWP:
3976			if (unlikely(!(dev->hw_attrs.uk_attrs.feature_flags &
3977				       IRDMA_FEATURE_ATOMIC_OPS))) {
3978				err = -EINVAL;
3979				break;
3980			}
3981			info.op_type = IRDMA_OP_TYPE_ATOMIC_COMPARE_AND_SWAP;
3982			info.op.atomic_compare_swap.tagged_offset = ib_wr->sg_list[0].addr;
3983			info.op.atomic_compare_swap.remote_tagged_offset =
3984				atomic_wr(ib_wr)->remote_addr;
3985			info.op.atomic_compare_swap.swap_data_bytes = atomic_wr(ib_wr)->swap;
3986			info.op.atomic_compare_swap.compare_data_bytes =
3987				atomic_wr(ib_wr)->compare_add;
3988			info.op.atomic_compare_swap.stag = ib_wr->sg_list[0].lkey;
3989			info.op.atomic_compare_swap.remote_stag = atomic_wr(ib_wr)->rkey;
3990			err = irdma_uk_atomic_compare_swap(ukqp, &info, false);
3991			break;
3992		case IB_WR_ATOMIC_FETCH_AND_ADD:
3993			if (unlikely(!(dev->hw_attrs.uk_attrs.feature_flags &
3994				       IRDMA_FEATURE_ATOMIC_OPS))) {
3995				err = -EINVAL;
3996				break;
3997			}
3998			info.op_type = IRDMA_OP_TYPE_ATOMIC_FETCH_AND_ADD;
3999			info.op.atomic_fetch_add.tagged_offset = ib_wr->sg_list[0].addr;
4000			info.op.atomic_fetch_add.remote_tagged_offset =
4001				atomic_wr(ib_wr)->remote_addr;
4002			info.op.atomic_fetch_add.fetch_add_data_bytes =
4003				atomic_wr(ib_wr)->compare_add;
4004			info.op.atomic_fetch_add.stag = ib_wr->sg_list[0].lkey;
4005			info.op.atomic_fetch_add.remote_stag =
4006				atomic_wr(ib_wr)->rkey;
4007			err = irdma_uk_atomic_fetch_add(ukqp, &info, false);
4008			break;
4009		case IB_WR_SEND_WITH_IMM:
4010			if (ukqp->qp_caps & IRDMA_SEND_WITH_IMM) {
4011				info.imm_data_valid = true;
4012				info.imm_data = ntohl(ib_wr->ex.imm_data);
4013			} else {
4014				err = -EINVAL;
4015				break;
4016			}
4017			fallthrough;
4018		case IB_WR_SEND:
4019		case IB_WR_SEND_WITH_INV:
4020			if (ib_wr->opcode == IB_WR_SEND ||
4021			    ib_wr->opcode == IB_WR_SEND_WITH_IMM) {
4022				if (ib_wr->send_flags & IB_SEND_SOLICITED)
4023					info.op_type = IRDMA_OP_TYPE_SEND_SOL;
4024				else
4025					info.op_type = IRDMA_OP_TYPE_SEND;
4026			} else {
4027				if (ib_wr->send_flags & IB_SEND_SOLICITED)
4028					info.op_type = IRDMA_OP_TYPE_SEND_SOL_INV;
4029				else
4030					info.op_type = IRDMA_OP_TYPE_SEND_INV;
4031				info.stag_to_inv = ib_wr->ex.invalidate_rkey;
4032			}
4033
4034			info.op.send.num_sges = ib_wr->num_sge;
4035			info.op.send.sg_list = ib_wr->sg_list;
4036			if (iwqp->ibqp.qp_type == IB_QPT_UD ||
4037			    iwqp->ibqp.qp_type == IB_QPT_GSI) {
4038				ah = to_iwah(ud_wr(ib_wr)->ah);
4039				info.op.send.ah_id = ah->sc_ah.ah_info.ah_idx;
4040				info.op.send.qkey = ud_wr(ib_wr)->remote_qkey;
4041				info.op.send.dest_qp = ud_wr(ib_wr)->remote_qpn;
4042			}
4043
4044			if (ib_wr->send_flags & IB_SEND_INLINE)
4045				err = irdma_uk_inline_send(ukqp, &info, false);
4046			else
4047				err = irdma_uk_send(ukqp, &info, false);
4048			break;
4049		case IB_WR_RDMA_WRITE_WITH_IMM:
4050			if (ukqp->qp_caps & IRDMA_WRITE_WITH_IMM) {
4051				info.imm_data_valid = true;
4052				info.imm_data = ntohl(ib_wr->ex.imm_data);
4053			} else {
4054				err = -EINVAL;
4055				break;
4056			}
4057			fallthrough;
4058		case IB_WR_RDMA_WRITE:
4059			if (ib_wr->send_flags & IB_SEND_SOLICITED)
4060				info.op_type = IRDMA_OP_TYPE_RDMA_WRITE_SOL;
4061			else
4062				info.op_type = IRDMA_OP_TYPE_RDMA_WRITE;
4063
4064			info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
4065			info.op.rdma_write.lo_sg_list = ib_wr->sg_list;
4066			info.op.rdma_write.rem_addr.addr =
4067				rdma_wr(ib_wr)->remote_addr;
4068			info.op.rdma_write.rem_addr.lkey = rdma_wr(ib_wr)->rkey;
4069			if (ib_wr->send_flags & IB_SEND_INLINE)
4070				err = irdma_uk_inline_rdma_write(ukqp, &info, false);
4071			else
4072				err = irdma_uk_rdma_write(ukqp, &info, false);
4073			break;
4074		case IB_WR_RDMA_READ_WITH_INV:
4075			inv_stag = true;
4076			fallthrough;
4077		case IB_WR_RDMA_READ:
4078			if (ib_wr->num_sge >
4079			    dev->hw_attrs.uk_attrs.max_hw_read_sges) {
4080				err = -EINVAL;
4081				break;
4082			}
4083			info.op_type = IRDMA_OP_TYPE_RDMA_READ;
4084			info.op.rdma_read.rem_addr.addr = rdma_wr(ib_wr)->remote_addr;
4085			info.op.rdma_read.rem_addr.lkey = rdma_wr(ib_wr)->rkey;
4086			info.op.rdma_read.lo_sg_list = (void *)ib_wr->sg_list;
4087			info.op.rdma_read.num_lo_sges = ib_wr->num_sge;
4088			err = irdma_uk_rdma_read(ukqp, &info, inv_stag, false);
4089			break;
4090		case IB_WR_LOCAL_INV:
4091			info.op_type = IRDMA_OP_TYPE_INV_STAG;
4092			info.local_fence = true;
4093			info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
4094			err = irdma_uk_stag_local_invalidate(ukqp, &info, true);
4095			break;
4096		case IB_WR_REG_MR: {
4097			struct irdma_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
4098			struct irdma_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
4099			struct irdma_fast_reg_stag_info stag_info = {};
4100
4101			stag_info.signaled = info.signaled;
4102			stag_info.read_fence = info.read_fence;
4103			stag_info.access_rights =
4104				irdma_get_mr_access(reg_wr(ib_wr)->access,
4105						    dev->hw_attrs.uk_attrs.hw_rev);
4106			stag_info.stag_key = reg_wr(ib_wr)->key & 0xff;
4107			stag_info.stag_idx = reg_wr(ib_wr)->key >> 8;
4108			stag_info.page_size = reg_wr(ib_wr)->mr->page_size;
4109			stag_info.wr_id = ib_wr->wr_id;
4110			stag_info.addr_type = IRDMA_ADDR_TYPE_VA_BASED;
4111			stag_info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
4112			stag_info.total_len = iwmr->ibmr.length;
4113			stag_info.reg_addr_pa = *palloc->level1.addr;
4114			stag_info.first_pm_pbl_index = palloc->level1.idx;
4115			stag_info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
4116			if (iwmr->npages > IRDMA_MIN_PAGES_PER_FMR)
4117				stag_info.chunk_size = 1;
4118			err = irdma_sc_mr_fast_register(&iwqp->sc_qp, &stag_info,
4119							true);
4120			break;
4121		}
4122		default:
4123			err = -EINVAL;
4124			ibdev_dbg(&iwqp->iwdev->ibdev,
4125				  "VERBS: upost_send bad opcode = 0x%x\n",
4126				  ib_wr->opcode);
4127			break;
4128		}
4129
4130		if (err)
4131			break;
4132		ib_wr = ib_wr->next;
4133	}
4134
4135	if (!iwqp->flush_issued) {
4136		if (iwqp->hw_iwarp_state <= IRDMA_QP_STATE_RTS)
4137			irdma_uk_qp_post_wr(ukqp);
4138		spin_unlock_irqrestore(&iwqp->lock, flags);
4139	} else {
4140		spin_unlock_irqrestore(&iwqp->lock, flags);
4141		mod_delayed_work(iwqp->iwdev->cleanup_wq, &iwqp->dwork_flush,
4142				 msecs_to_jiffies(IRDMA_FLUSH_DELAY_MS));
4143	}
4144
4145	if (err)
4146		*bad_wr = ib_wr;
4147
4148	return err;
4149}
4150
4151/**
4152 * irdma_post_srq_recv - post receive wr for kernel application
4153 * @ibsrq: ib srq pointer
4154 * @ib_wr: work request for receive
4155 * @bad_wr: bad wr caused an error
4156 */
4157static int irdma_post_srq_recv(struct ib_srq *ibsrq,
4158			       const struct ib_recv_wr *ib_wr,
4159			       const struct ib_recv_wr **bad_wr)
4160{
4161	struct irdma_srq *iwsrq = to_iwsrq(ibsrq);
4162	struct irdma_srq_uk *uksrq = &iwsrq->sc_srq.srq_uk;
4163	struct irdma_post_rq_info post_recv = {};
4164	unsigned long flags;
4165	int err = 0;
4166
4167	spin_lock_irqsave(&iwsrq->lock, flags);
4168	while (ib_wr) {
4169		if (ib_wr->num_sge > uksrq->max_srq_frag_cnt) {
4170			err = -EINVAL;
4171			goto out;
4172		}
4173		post_recv.num_sges = ib_wr->num_sge;
4174		post_recv.wr_id = ib_wr->wr_id;
4175		post_recv.sg_list = ib_wr->sg_list;
4176		err = irdma_uk_srq_post_receive(uksrq, &post_recv);
4177		if (err)
4178			goto out;
4179
4180		ib_wr = ib_wr->next;
4181	}
4182
4183out:
4184	spin_unlock_irqrestore(&iwsrq->lock, flags);
4185
4186	if (err)
4187		*bad_wr = ib_wr;
4188
4189	return err;
4190}
4191
4192/**
4193 * irdma_post_recv - post receive wr for kernel application
4194 * @ibqp: ib qp pointer
4195 * @ib_wr: work request for receive
4196 * @bad_wr: bad wr caused an error
4197 */
4198static int irdma_post_recv(struct ib_qp *ibqp,
4199			   const struct ib_recv_wr *ib_wr,
4200			   const struct ib_recv_wr **bad_wr)
4201{
4202	struct irdma_qp *iwqp;
4203	struct irdma_qp_uk *ukqp;
4204	struct irdma_post_rq_info post_recv = {};
4205	unsigned long flags;
4206	int err = 0;
4207
4208	iwqp = to_iwqp(ibqp);
4209	ukqp = &iwqp->sc_qp.qp_uk;
4210
4211	if (ukqp->srq_uk) {
4212		*bad_wr = ib_wr;
4213		return -EINVAL;
4214	}
4215
4216	spin_lock_irqsave(&iwqp->lock, flags);
4217	while (ib_wr) {
4218		post_recv.num_sges = ib_wr->num_sge;
4219		post_recv.wr_id = ib_wr->wr_id;
4220		post_recv.sg_list = ib_wr->sg_list;
4221		err = irdma_uk_post_receive(ukqp, &post_recv);
4222		if (err) {
4223			ibdev_dbg(&iwqp->iwdev->ibdev,
4224				  "VERBS: post_recv err %d\n", err);
4225			goto out;
4226		}
4227
4228		ib_wr = ib_wr->next;
4229	}
4230
4231out:
4232	spin_unlock_irqrestore(&iwqp->lock, flags);
4233	if (iwqp->flush_issued)
4234		mod_delayed_work(iwqp->iwdev->cleanup_wq, &iwqp->dwork_flush,
4235				 msecs_to_jiffies(IRDMA_FLUSH_DELAY_MS));
4236
4237	if (err)
4238		*bad_wr = ib_wr;
4239
4240	return err;
4241}
4242
4243/**
4244 * irdma_flush_err_to_ib_wc_status - return change flush error code to IB status
4245 * @opcode: iwarp flush code
4246 */
4247static enum ib_wc_status irdma_flush_err_to_ib_wc_status(enum irdma_flush_opcode opcode)
4248{
4249	switch (opcode) {
4250	case FLUSH_PROT_ERR:
4251		return IB_WC_LOC_PROT_ERR;
4252	case FLUSH_REM_ACCESS_ERR:
4253		return IB_WC_REM_ACCESS_ERR;
4254	case FLUSH_LOC_QP_OP_ERR:
4255		return IB_WC_LOC_QP_OP_ERR;
4256	case FLUSH_REM_OP_ERR:
4257		return IB_WC_REM_OP_ERR;
4258	case FLUSH_LOC_LEN_ERR:
4259		return IB_WC_LOC_LEN_ERR;
4260	case FLUSH_GENERAL_ERR:
4261		return IB_WC_WR_FLUSH_ERR;
4262	case FLUSH_RETRY_EXC_ERR:
4263		return IB_WC_RETRY_EXC_ERR;
4264	case FLUSH_MW_BIND_ERR:
4265		return IB_WC_MW_BIND_ERR;
4266	case FLUSH_REM_INV_REQ_ERR:
4267		return IB_WC_REM_INV_REQ_ERR;
4268	case FLUSH_RNR_RETRY_EXC_ERR:
4269		return IB_WC_RNR_RETRY_EXC_ERR;
4270	case FLUSH_FATAL_ERR:
4271	default:
4272		return IB_WC_FATAL_ERR;
4273	}
4274}
4275
4276/**
4277 * irdma_process_cqe - process cqe info
4278 * @entry: processed cqe
4279 * @cq_poll_info: cqe info
4280 */
4281static void irdma_process_cqe(struct ib_wc *entry,
4282			      struct irdma_cq_poll_info *cq_poll_info)
4283{
4284	struct irdma_sc_qp *qp;
4285
4286	entry->wc_flags = 0;
4287	entry->pkey_index = 0;
4288	entry->wr_id = cq_poll_info->wr_id;
4289
4290	qp = cq_poll_info->qp_handle;
4291	entry->qp = qp->qp_uk.back_qp;
4292
4293	if (cq_poll_info->error) {
4294		entry->status = (cq_poll_info->comp_status == IRDMA_COMPL_STATUS_FLUSHED) ?
4295				irdma_flush_err_to_ib_wc_status(cq_poll_info->minor_err) : IB_WC_GENERAL_ERR;
4296
4297		entry->vendor_err = cq_poll_info->major_err << 16 |
4298				    cq_poll_info->minor_err;
4299	} else {
4300		entry->status = IB_WC_SUCCESS;
4301		if (cq_poll_info->imm_valid) {
4302			entry->ex.imm_data = htonl(cq_poll_info->imm_data);
4303			entry->wc_flags |= IB_WC_WITH_IMM;
4304		}
4305		if (cq_poll_info->ud_smac_valid) {
4306			ether_addr_copy(entry->smac, cq_poll_info->ud_smac);
4307			entry->wc_flags |= IB_WC_WITH_SMAC;
4308		}
4309
4310		if (cq_poll_info->ud_vlan_valid) {
4311			u16 vlan = cq_poll_info->ud_vlan & VLAN_VID_MASK;
4312
4313			entry->sl = cq_poll_info->ud_vlan >> VLAN_PRIO_SHIFT;
4314			if (vlan) {
4315				entry->vlan_id = vlan;
4316				entry->wc_flags |= IB_WC_WITH_VLAN;
4317			}
4318		} else {
4319			entry->sl = 0;
4320		}
4321	}
4322
4323	if (cq_poll_info->q_type == IRDMA_CQE_QTYPE_SQ) {
4324		set_ib_wc_op_sq(cq_poll_info, entry);
4325	} else {
4326		if (qp->dev->hw_attrs.uk_attrs.hw_rev <= IRDMA_GEN_2)
4327			set_ib_wc_op_rq(cq_poll_info, entry,
4328					qp->qp_uk.qp_caps & IRDMA_SEND_WITH_IMM ?
4329					true : false);
4330		else
4331			set_ib_wc_op_rq_gen_3(cq_poll_info, entry);
4332		if (qp->qp_uk.qp_type != IRDMA_QP_TYPE_ROCE_UD &&
4333		    cq_poll_info->stag_invalid_set) {
4334			entry->ex.invalidate_rkey = cq_poll_info->inv_stag;
4335			entry->wc_flags |= IB_WC_WITH_INVALIDATE;
4336		}
4337	}
4338
4339	if (qp->qp_uk.qp_type == IRDMA_QP_TYPE_ROCE_UD) {
4340		entry->src_qp = cq_poll_info->ud_src_qpn;
4341		entry->slid = 0;
4342		entry->wc_flags |=
4343			(IB_WC_GRH | IB_WC_WITH_NETWORK_HDR_TYPE);
4344		entry->network_hdr_type = cq_poll_info->ipv4 ?
4345						  RDMA_NETWORK_IPV4 :
4346						  RDMA_NETWORK_IPV6;
4347	} else {
4348		entry->src_qp = cq_poll_info->qp_id;
4349	}
4350
4351	entry->byte_len = cq_poll_info->bytes_xfered;
4352}
4353
4354/**
4355 * irdma_poll_one - poll one entry of the CQ
4356 * @ukcq: ukcq to poll
4357 * @cur_cqe: current CQE info to be filled in
4358 * @entry: ibv_wc object to be filled for non-extended CQ or NULL for extended CQ
4359 *
4360 * Returns the internal irdma device error code or 0 on success
4361 */
4362static inline int irdma_poll_one(struct irdma_cq_uk *ukcq,
4363				 struct irdma_cq_poll_info *cur_cqe,
4364				 struct ib_wc *entry)
4365{
4366	int ret = irdma_uk_cq_poll_cmpl(ukcq, cur_cqe);
4367
4368	if (ret)
4369		return ret;
4370
4371	irdma_process_cqe(entry, cur_cqe);
4372
4373	return 0;
4374}
4375
4376/**
4377 * __irdma_poll_cq - poll cq for completion (kernel apps)
4378 * @iwcq: cq to poll
4379 * @num_entries: number of entries to poll
4380 * @entry: wr of a completed entry
4381 */
4382static int __irdma_poll_cq(struct irdma_cq *iwcq, int num_entries, struct ib_wc *entry)
4383{
4384	struct list_head *tmp_node, *list_node;
4385	struct irdma_cq_buf *last_buf = NULL;
4386	struct irdma_cq_poll_info *cur_cqe = &iwcq->cur_cqe;
4387	struct irdma_cq_buf *cq_buf;
4388	int ret;
4389	struct irdma_device *iwdev;
4390	struct irdma_cq_uk *ukcq;
4391	bool cq_new_cqe = false;
4392	int resized_bufs = 0;
4393	int npolled = 0;
4394
4395	iwdev = to_iwdev(iwcq->ibcq.device);
4396	ukcq = &iwcq->sc_cq.cq_uk;
4397
4398	/* go through the list of previously resized CQ buffers */
4399	list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) {
4400		cq_buf = container_of(list_node, struct irdma_cq_buf, list);
4401		while (npolled < num_entries) {
4402			ret = irdma_poll_one(&cq_buf->cq_uk, cur_cqe, entry + npolled);
4403			if (!ret) {
4404				++npolled;
4405				cq_new_cqe = true;
4406				continue;
4407			}
4408			if (ret == -ENOENT)
4409				break;
4410			 /* QP using the CQ is destroyed. Skip reporting this CQE */
4411			if (ret == -EFAULT) {
4412				cq_new_cqe = true;
4413				continue;
4414			}
4415			goto error;
4416		}
4417
4418		/* save the resized CQ buffer which received the last cqe */
4419		if (cq_new_cqe)
4420			last_buf = cq_buf;
4421		cq_new_cqe = false;
4422	}
4423
4424	/* check the current CQ for new cqes */
4425	while (npolled < num_entries) {
4426		ret = irdma_poll_one(ukcq, cur_cqe, entry + npolled);
4427		if (ret == -ENOENT) {
4428			ret = irdma_generated_cmpls(iwcq, cur_cqe);
4429			if (!ret)
4430				irdma_process_cqe(entry + npolled, cur_cqe);
4431		}
4432		if (!ret) {
4433			++npolled;
4434			cq_new_cqe = true;
4435			continue;
4436		}
4437
4438		if (ret == -ENOENT)
4439			break;
4440		/* QP using the CQ is destroyed. Skip reporting this CQE */
4441		if (ret == -EFAULT) {
4442			cq_new_cqe = true;
4443			continue;
4444		}
4445		goto error;
4446	}
4447
4448	if (cq_new_cqe)
4449		/* all previous CQ resizes are complete */
4450		resized_bufs = irdma_process_resize_list(iwcq, iwdev, NULL);
4451	else if (last_buf)
4452		/* only CQ resizes up to the last_buf are complete */
4453		resized_bufs = irdma_process_resize_list(iwcq, iwdev, last_buf);
4454	if (resized_bufs)
4455		/* report to the HW the number of complete CQ resizes */
4456		irdma_uk_cq_set_resized_cnt(ukcq, resized_bufs);
4457
4458	return npolled;
4459error:
4460	ibdev_dbg(&iwdev->ibdev, "%s: Error polling CQ, irdma_err: %d\n",
4461		  __func__, ret);
4462
4463	return ret;
4464}
4465
4466/**
4467 * irdma_poll_cq - poll cq for completion (kernel apps)
4468 * @ibcq: cq to poll
4469 * @num_entries: number of entries to poll
4470 * @entry: wr of a completed entry
4471 */
4472static int irdma_poll_cq(struct ib_cq *ibcq, int num_entries,
4473			 struct ib_wc *entry)
4474{
4475	struct irdma_cq *iwcq;
4476	unsigned long flags;
4477	int ret;
4478
4479	iwcq = to_iwcq(ibcq);
4480
4481	spin_lock_irqsave(&iwcq->lock, flags);
4482	ret = __irdma_poll_cq(iwcq, num_entries, entry);
4483	spin_unlock_irqrestore(&iwcq->lock, flags);
4484
4485	return ret;
4486}
4487
4488/**
4489 * irdma_req_notify_cq - arm cq kernel application
4490 * @ibcq: cq to arm
4491 * @notify_flags: notofication flags
4492 */
4493static int irdma_req_notify_cq(struct ib_cq *ibcq,
4494			       enum ib_cq_notify_flags notify_flags)
4495{
4496	struct irdma_cq *iwcq;
4497	struct irdma_cq_uk *ukcq;
4498	unsigned long flags;
4499	enum irdma_cmpl_notify cq_notify;
4500	bool promo_event = false;
4501	int ret = 0;
4502
4503	cq_notify = notify_flags == IB_CQ_SOLICITED ?
4504		    IRDMA_CQ_COMPL_SOLICITED : IRDMA_CQ_COMPL_EVENT;
4505	iwcq = to_iwcq(ibcq);
4506	ukcq = &iwcq->sc_cq.cq_uk;
4507
4508	spin_lock_irqsave(&iwcq->lock, flags);
4509	/* Only promote to arm the CQ for any event if the last arm event was solicited. */
4510	if (iwcq->last_notify == IRDMA_CQ_COMPL_SOLICITED && notify_flags != IB_CQ_SOLICITED)
4511		promo_event = true;
4512
4513	if (!atomic_cmpxchg(&iwcq->armed, 0, 1) || promo_event) {
4514		iwcq->last_notify = cq_notify;
4515		irdma_uk_cq_request_notification(ukcq, cq_notify);
4516	}
4517
4518	if ((notify_flags & IB_CQ_REPORT_MISSED_EVENTS) &&
4519	    (!irdma_uk_cq_empty(ukcq) || !list_empty(&iwcq->cmpl_generated)))
4520		ret = 1;
4521	spin_unlock_irqrestore(&iwcq->lock, flags);
4522
4523	return ret;
4524}
4525
4526static const struct rdma_stat_desc irdma_hw_stat_descs[] = {
4527	/* gen1 - 32-bit */
4528	[IRDMA_HW_STAT_INDEX_IP4RXDISCARD].name		= "ip4InDiscards",
4529	[IRDMA_HW_STAT_INDEX_IP4RXTRUNC].name		= "ip4InTruncatedPkts",
4530	[IRDMA_HW_STAT_INDEX_IP4TXNOROUTE].name		= "ip4OutNoRoutes",
4531	[IRDMA_HW_STAT_INDEX_IP6RXDISCARD].name		= "ip6InDiscards",
4532	[IRDMA_HW_STAT_INDEX_IP6RXTRUNC].name		= "ip6InTruncatedPkts",
4533	[IRDMA_HW_STAT_INDEX_IP6TXNOROUTE].name		= "ip6OutNoRoutes",
4534	[IRDMA_HW_STAT_INDEX_RXVLANERR].name		= "rxVlanErrors",
4535	/* gen1 - 64-bit */
4536	[IRDMA_HW_STAT_INDEX_IP4RXOCTS].name		= "ip4InOctets",
4537	[IRDMA_HW_STAT_INDEX_IP4RXPKTS].name		= "ip4InPkts",
4538	[IRDMA_HW_STAT_INDEX_IP4RXFRAGS].name		= "ip4InReasmRqd",
4539	[IRDMA_HW_STAT_INDEX_IP4RXMCPKTS].name		= "ip4InMcastPkts",
4540	[IRDMA_HW_STAT_INDEX_IP4TXOCTS].name		= "ip4OutOctets",
4541	[IRDMA_HW_STAT_INDEX_IP4TXPKTS].name		= "ip4OutPkts",
4542	[IRDMA_HW_STAT_INDEX_IP4TXFRAGS].name		= "ip4OutSegRqd",
4543	[IRDMA_HW_STAT_INDEX_IP4TXMCPKTS].name		= "ip4OutMcastPkts",
4544	[IRDMA_HW_STAT_INDEX_IP6RXOCTS].name		= "ip6InOctets",
4545	[IRDMA_HW_STAT_INDEX_IP6RXPKTS].name		= "ip6InPkts",
4546	[IRDMA_HW_STAT_INDEX_IP6RXFRAGS].name		= "ip6InReasmRqd",
4547	[IRDMA_HW_STAT_INDEX_IP6RXMCPKTS].name		= "ip6InMcastPkts",
4548	[IRDMA_HW_STAT_INDEX_IP6TXOCTS].name		= "ip6OutOctets",
4549	[IRDMA_HW_STAT_INDEX_IP6TXPKTS].name		= "ip6OutPkts",
4550	[IRDMA_HW_STAT_INDEX_IP6TXFRAGS].name		= "ip6OutSegRqd",
4551	[IRDMA_HW_STAT_INDEX_IP6TXMCPKTS].name		= "ip6OutMcastPkts",
4552	[IRDMA_HW_STAT_INDEX_RDMARXRDS].name		= "InRdmaReads",
4553	[IRDMA_HW_STAT_INDEX_RDMARXSNDS].name		= "InRdmaSends",
4554	[IRDMA_HW_STAT_INDEX_RDMARXWRS].name		= "InRdmaWrites",
4555	[IRDMA_HW_STAT_INDEX_RDMATXRDS].name		= "OutRdmaReads",
4556	[IRDMA_HW_STAT_INDEX_RDMATXSNDS].name		= "OutRdmaSends",
4557	[IRDMA_HW_STAT_INDEX_RDMATXWRS].name		= "OutRdmaWrites",
4558	[IRDMA_HW_STAT_INDEX_RDMAVBND].name		= "RdmaBnd",
4559	[IRDMA_HW_STAT_INDEX_RDMAVINV].name		= "RdmaInv",
4560
4561	/* gen2 - 32-bit */
4562	[IRDMA_HW_STAT_INDEX_RXRPCNPHANDLED].name	= "cnpHandled",
4563	[IRDMA_HW_STAT_INDEX_RXRPCNPIGNORED].name	= "cnpIgnored",
4564	[IRDMA_HW_STAT_INDEX_TXNPCNPSENT].name		= "cnpSent",
4565	/* gen2 - 64-bit */
4566	[IRDMA_HW_STAT_INDEX_IP4RXMCOCTS].name		= "ip4InMcastOctets",
4567	[IRDMA_HW_STAT_INDEX_IP4TXMCOCTS].name		= "ip4OutMcastOctets",
4568	[IRDMA_HW_STAT_INDEX_IP6RXMCOCTS].name		= "ip6InMcastOctets",
4569	[IRDMA_HW_STAT_INDEX_IP6TXMCOCTS].name		= "ip6OutMcastOctets",
4570	[IRDMA_HW_STAT_INDEX_UDPRXPKTS].name		= "RxUDP",
4571	[IRDMA_HW_STAT_INDEX_UDPTXPKTS].name		= "TxUDP",
4572	[IRDMA_HW_STAT_INDEX_RXNPECNMARKEDPKTS].name	= "RxECNMrkd",
4573	[IRDMA_HW_STAT_INDEX_TCPRTXSEG].name		= "RetransSegs",
4574	[IRDMA_HW_STAT_INDEX_TCPRXOPTERR].name		= "InOptErrors",
4575	[IRDMA_HW_STAT_INDEX_TCPRXPROTOERR].name	= "InProtoErrors",
4576	[IRDMA_HW_STAT_INDEX_TCPRXSEGS].name		= "InSegs",
4577	[IRDMA_HW_STAT_INDEX_TCPTXSEG].name		= "OutSegs",
4578
4579	/* gen3 */
4580	[IRDMA_HW_STAT_INDEX_RNR_SENT].name		= "RNR sent",
4581	[IRDMA_HW_STAT_INDEX_RNR_RCVD].name		= "RNR received",
4582	[IRDMA_HW_STAT_INDEX_RDMAORDLMTCNT].name	= "ord limit count",
4583	[IRDMA_HW_STAT_INDEX_RDMAIRDLMTCNT].name	= "ird limit count",
4584	[IRDMA_HW_STAT_INDEX_RDMARXATS].name		= "Rx atomics",
4585	[IRDMA_HW_STAT_INDEX_RDMATXATS].name		= "Tx atomics",
4586	[IRDMA_HW_STAT_INDEX_NAKSEQERR].name		= "Nak Sequence Error",
4587	[IRDMA_HW_STAT_INDEX_NAKSEQERR_IMPLIED].name	= "Nak Sequence Error Implied",
4588	[IRDMA_HW_STAT_INDEX_RTO].name			= "RTO",
4589	[IRDMA_HW_STAT_INDEX_RXOOOPKTS].name		= "Rcvd Out of order packets",
4590	[IRDMA_HW_STAT_INDEX_ICRCERR].name		= "CRC errors",
4591};
4592
4593static int irdma_roce_port_immutable(struct ib_device *ibdev, u32 port_num,
4594				     struct ib_port_immutable *immutable)
4595{
4596	struct ib_port_attr attr;
4597	int err;
4598
4599	immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
4600	err = ib_query_port(ibdev, port_num, &attr);
4601	if (err)
4602		return err;
4603
4604	immutable->max_mad_size = IB_MGMT_MAD_SIZE;
4605	immutable->pkey_tbl_len = attr.pkey_tbl_len;
4606	immutable->gid_tbl_len = attr.gid_tbl_len;
4607
4608	return 0;
4609}
4610
4611static int irdma_iw_port_immutable(struct ib_device *ibdev, u32 port_num,
4612				   struct ib_port_immutable *immutable)
4613{
4614	struct ib_port_attr attr;
4615	int err;
4616
4617	immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
4618	err = ib_query_port(ibdev, port_num, &attr);
4619	if (err)
4620		return err;
4621	immutable->gid_tbl_len = attr.gid_tbl_len;
4622
4623	return 0;
4624}
4625
4626static void irdma_get_dev_fw_str(struct ib_device *dev, char *str)
4627{
4628	struct irdma_device *iwdev = to_iwdev(dev);
4629
4630	snprintf(str, IB_FW_VERSION_NAME_MAX, "%u.%u",
4631		 irdma_fw_major_ver(&iwdev->rf->sc_dev),
4632		 irdma_fw_minor_ver(&iwdev->rf->sc_dev));
4633}
4634
4635/**
4636 * irdma_alloc_hw_port_stats - Allocate a hw stats structure
4637 * @ibdev: device pointer from stack
4638 * @port_num: port number
4639 */
4640static struct rdma_hw_stats *irdma_alloc_hw_port_stats(struct ib_device *ibdev,
4641						       u32 port_num)
4642{
4643	struct irdma_device *iwdev = to_iwdev(ibdev);
4644	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
4645
4646	int num_counters = dev->hw_attrs.max_stat_idx;
4647	unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN;
4648
4649	return rdma_alloc_hw_stats_struct(irdma_hw_stat_descs, num_counters,
4650					  lifespan);
4651}
4652
4653/**
4654 * irdma_get_hw_stats - Populates the rdma_hw_stats structure
4655 * @ibdev: device pointer from stack
4656 * @stats: stats pointer from stack
4657 * @port_num: port number
4658 * @index: which hw counter the stack is requesting we update
4659 */
4660static int irdma_get_hw_stats(struct ib_device *ibdev,
4661			      struct rdma_hw_stats *stats, u32 port_num,
4662			      int index)
4663{
4664	struct irdma_device *iwdev = to_iwdev(ibdev);
4665	struct irdma_dev_hw_stats *hw_stats = &iwdev->vsi.pestat->hw_stats;
4666
4667	if (iwdev->rf->rdma_ver >= IRDMA_GEN_2)
4668		irdma_cqp_gather_stats_cmd(&iwdev->rf->sc_dev, iwdev->vsi.pestat, true);
4669	else
4670		irdma_cqp_gather_stats_gen1(&iwdev->rf->sc_dev, iwdev->vsi.pestat);
4671
4672	memcpy(&stats->value[0], hw_stats, sizeof(u64) * stats->num_counters);
4673
4674	return stats->num_counters;
4675}
4676
4677/**
4678 * irdma_query_gid - Query port GID
4679 * @ibdev: device pointer from stack
4680 * @port: port number
4681 * @index: Entry index
4682 * @gid: Global ID
4683 */
4684static int irdma_query_gid(struct ib_device *ibdev, u32 port, int index,
4685			   union ib_gid *gid)
4686{
4687	struct irdma_device *iwdev = to_iwdev(ibdev);
4688
4689	memset(gid->raw, 0, sizeof(gid->raw));
4690	ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
4691
4692	return 0;
4693}
4694
4695/**
4696 * mcast_list_add -  Add a new mcast item to list
4697 * @rf: RDMA PCI function
4698 * @new_elem: pointer to element to add
4699 */
4700static void mcast_list_add(struct irdma_pci_f *rf,
4701			   struct mc_table_list *new_elem)
4702{
4703	list_add(&new_elem->list, &rf->mc_qht_list.list);
4704}
4705
4706/**
4707 * mcast_list_del - Remove an mcast item from list
4708 * @mc_qht_elem: pointer to mcast table list element
4709 */
4710static void mcast_list_del(struct mc_table_list *mc_qht_elem)
4711{
4712	if (mc_qht_elem)
4713		list_del(&mc_qht_elem->list);
4714}
4715
4716/**
4717 * mcast_list_lookup_ip - Search mcast list for address
4718 * @rf: RDMA PCI function
4719 * @ip_mcast: pointer to mcast IP address
4720 */
4721static struct mc_table_list *mcast_list_lookup_ip(struct irdma_pci_f *rf,
4722						  u32 *ip_mcast)
4723{
4724	struct mc_table_list *mc_qht_el;
4725	struct list_head *pos, *q;
4726
4727	list_for_each_safe (pos, q, &rf->mc_qht_list.list) {
4728		mc_qht_el = list_entry(pos, struct mc_table_list, list);
4729		if (!memcmp(mc_qht_el->mc_info.dest_ip, ip_mcast,
4730			    sizeof(mc_qht_el->mc_info.dest_ip)))
4731			return mc_qht_el;
4732	}
4733
4734	return NULL;
4735}
4736
4737/**
4738 * irdma_mcast_cqp_op - perform a mcast cqp operation
4739 * @iwdev: irdma device
4740 * @mc_grp_ctx: mcast group info
4741 * @op: operation
4742 *
4743 * returns error status
4744 */
4745static int irdma_mcast_cqp_op(struct irdma_device *iwdev,
4746			      struct irdma_mcast_grp_info *mc_grp_ctx, u8 op)
4747{
4748	struct cqp_cmds_info *cqp_info;
4749	struct irdma_cqp_request *cqp_request;
4750	int status;
4751
4752	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
4753	if (!cqp_request)
4754		return -ENOMEM;
4755
4756	cqp_request->info.in.u.mc_create.info = *mc_grp_ctx;
4757	cqp_info = &cqp_request->info;
4758	cqp_info->cqp_cmd = op;
4759	cqp_info->post_sq = 1;
4760	cqp_info->in.u.mc_create.scratch = (uintptr_t)cqp_request;
4761	cqp_info->in.u.mc_create.cqp = &iwdev->rf->cqp.sc_cqp;
4762	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
4763	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
4764
4765	return status;
4766}
4767
4768/**
4769 * irdma_mcast_mac - Get the multicast MAC for an IP address
4770 * @ip_addr: IPv4 or IPv6 address
4771 * @mac: pointer to result MAC address
4772 * @ipv4: flag indicating IPv4 or IPv6
4773 *
4774 */
4775void irdma_mcast_mac(u32 *ip_addr, u8 *mac, bool ipv4)
4776{
4777	u8 *ip = (u8 *)ip_addr;
4778
4779	if (ipv4) {
4780		unsigned char mac4[ETH_ALEN] = {0x01, 0x00, 0x5E, 0x00,
4781						0x00, 0x00};
4782
4783		mac4[3] = ip[2] & 0x7F;
4784		mac4[4] = ip[1];
4785		mac4[5] = ip[0];
4786		ether_addr_copy(mac, mac4);
4787	} else {
4788		unsigned char mac6[ETH_ALEN] = {0x33, 0x33, 0x00, 0x00,
4789						0x00, 0x00};
4790
4791		mac6[2] = ip[3];
4792		mac6[3] = ip[2];
4793		mac6[4] = ip[1];
4794		mac6[5] = ip[0];
4795		ether_addr_copy(mac, mac6);
4796	}
4797}
4798
4799/**
4800 * irdma_attach_mcast - attach a qp to a multicast group
4801 * @ibqp: ptr to qp
4802 * @ibgid: pointer to global ID
4803 * @lid: local ID
4804 *
4805 * returns error status
4806 */
4807static int irdma_attach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid)
4808{
4809	struct irdma_qp *iwqp = to_iwqp(ibqp);
4810	struct irdma_device *iwdev = iwqp->iwdev;
4811	struct irdma_pci_f *rf = iwdev->rf;
4812	struct mc_table_list *mc_qht_elem;
4813	struct irdma_mcast_grp_ctx_entry_info mcg_info = {};
4814	unsigned long flags;
4815	u32 ip_addr[4] = {};
4816	u32 mgn;
4817	u32 no_mgs;
4818	int ret = 0;
4819	bool ipv4;
4820	u16 vlan_id;
4821	union irdma_sockaddr sgid_addr;
4822	unsigned char dmac[ETH_ALEN];
4823
4824	rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid);
4825
4826	if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid)) {
4827		irdma_copy_ip_ntohl(ip_addr,
4828				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4829		irdma_get_vlan_mac_ipv6(ip_addr, &vlan_id, NULL);
4830		ipv4 = false;
4831		ibdev_dbg(&iwdev->ibdev,
4832			  "VERBS: qp_id=%d, IP6address=%pI6\n", ibqp->qp_num,
4833			  ip_addr);
4834		irdma_mcast_mac(ip_addr, dmac, false);
4835	} else {
4836		ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
4837		ipv4 = true;
4838		vlan_id = irdma_get_vlan_ipv4(ip_addr);
4839		irdma_mcast_mac(ip_addr, dmac, true);
4840		ibdev_dbg(&iwdev->ibdev,
4841			  "VERBS: qp_id=%d, IP4address=%pI4, MAC=%pM\n",
4842			  ibqp->qp_num, ip_addr, dmac);
4843	}
4844
4845	spin_lock_irqsave(&rf->qh_list_lock, flags);
4846	mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr);
4847	if (!mc_qht_elem) {
4848		struct irdma_dma_mem *dma_mem_mc;
4849
4850		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4851		mc_qht_elem = kzalloc(sizeof(*mc_qht_elem), GFP_KERNEL);
4852		if (!mc_qht_elem)
4853			return -ENOMEM;
4854
4855		mc_qht_elem->mc_info.ipv4_valid = ipv4;
4856		memcpy(mc_qht_elem->mc_info.dest_ip, ip_addr,
4857		       sizeof(mc_qht_elem->mc_info.dest_ip));
4858		ret = irdma_alloc_rsrc(rf, rf->allocated_mcgs, rf->max_mcg,
4859				       &mgn, &rf->next_mcg);
4860		if (ret) {
4861			kfree(mc_qht_elem);
4862			return -ENOMEM;
4863		}
4864
4865		mc_qht_elem->mc_info.mgn = mgn;
4866		dma_mem_mc = &mc_qht_elem->mc_grp_ctx.dma_mem_mc;
4867		dma_mem_mc->size = ALIGN(sizeof(u64) * IRDMA_MAX_MGS_PER_CTX,
4868					 IRDMA_HW_PAGE_SIZE);
4869		dma_mem_mc->va = dma_alloc_coherent(rf->hw.device,
4870						    dma_mem_mc->size,
4871						    &dma_mem_mc->pa,
4872						    GFP_KERNEL);
4873		if (!dma_mem_mc->va) {
4874			irdma_free_rsrc(rf, rf->allocated_mcgs, mgn);
4875			kfree(mc_qht_elem);
4876			return -ENOMEM;
4877		}
4878
4879		mc_qht_elem->mc_grp_ctx.mg_id = (u16)mgn;
4880		memcpy(mc_qht_elem->mc_grp_ctx.dest_ip_addr, ip_addr,
4881		       sizeof(mc_qht_elem->mc_grp_ctx.dest_ip_addr));
4882		mc_qht_elem->mc_grp_ctx.ipv4_valid = ipv4;
4883		mc_qht_elem->mc_grp_ctx.vlan_id = vlan_id;
4884		if (vlan_id < VLAN_N_VID)
4885			mc_qht_elem->mc_grp_ctx.vlan_valid = true;
4886		mc_qht_elem->mc_grp_ctx.hmc_fcn_id = iwdev->rf->sc_dev.hmc_fn_id;
4887		mc_qht_elem->mc_grp_ctx.qs_handle =
4888			iwqp->sc_qp.vsi->qos[iwqp->sc_qp.user_pri].qs_handle;
4889		ether_addr_copy(mc_qht_elem->mc_grp_ctx.dest_mac_addr, dmac);
4890
4891		spin_lock_irqsave(&rf->qh_list_lock, flags);
4892		mcast_list_add(rf, mc_qht_elem);
4893	} else {
4894		if (mc_qht_elem->mc_grp_ctx.no_of_mgs ==
4895		    IRDMA_MAX_MGS_PER_CTX) {
4896			spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4897			return -ENOMEM;
4898		}
4899	}
4900
4901	mcg_info.qp_id = iwqp->ibqp.qp_num;
4902	no_mgs = mc_qht_elem->mc_grp_ctx.no_of_mgs;
4903	irdma_sc_add_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4904	spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4905
4906	/* Only if there is a change do we need to modify or create */
4907	if (!no_mgs) {
4908		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4909					 IRDMA_OP_MC_CREATE);
4910	} else if (no_mgs != mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4911		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4912					 IRDMA_OP_MC_MODIFY);
4913	} else {
4914		return 0;
4915	}
4916
4917	if (ret)
4918		goto error;
4919
4920	return 0;
4921
4922error:
4923	irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4924	if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4925		mcast_list_del(mc_qht_elem);
4926		dma_free_coherent(rf->hw.device,
4927				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.size,
4928				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.va,
4929				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.pa);
4930		mc_qht_elem->mc_grp_ctx.dma_mem_mc.va = NULL;
4931		irdma_free_rsrc(rf, rf->allocated_mcgs,
4932				mc_qht_elem->mc_grp_ctx.mg_id);
4933		kfree(mc_qht_elem);
4934	}
4935
4936	return ret;
4937}
4938
4939/**
4940 * irdma_detach_mcast - detach a qp from a multicast group
4941 * @ibqp: ptr to qp
4942 * @ibgid: pointer to global ID
4943 * @lid: local ID
4944 *
4945 * returns error status
4946 */
4947static int irdma_detach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid)
4948{
4949	struct irdma_qp *iwqp = to_iwqp(ibqp);
4950	struct irdma_device *iwdev = iwqp->iwdev;
4951	struct irdma_pci_f *rf = iwdev->rf;
4952	u32 ip_addr[4] = {};
4953	struct mc_table_list *mc_qht_elem;
4954	struct irdma_mcast_grp_ctx_entry_info mcg_info = {};
4955	int ret;
4956	unsigned long flags;
4957	union irdma_sockaddr sgid_addr;
4958
4959	rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid);
4960	if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid))
4961		irdma_copy_ip_ntohl(ip_addr,
4962				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4963	else
4964		ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
4965
4966	spin_lock_irqsave(&rf->qh_list_lock, flags);
4967	mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr);
4968	if (!mc_qht_elem) {
4969		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4970		ibdev_dbg(&iwdev->ibdev,
4971			  "VERBS: address not found MCG\n");
4972		return 0;
4973	}
4974
4975	mcg_info.qp_id = iwqp->ibqp.qp_num;
4976	irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4977	if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4978		mcast_list_del(mc_qht_elem);
4979		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4980		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4981					 IRDMA_OP_MC_DESTROY);
4982		if (ret) {
4983			ibdev_dbg(&iwdev->ibdev,
4984				  "VERBS: failed MC_DESTROY MCG\n");
4985			spin_lock_irqsave(&rf->qh_list_lock, flags);
4986			mcast_list_add(rf, mc_qht_elem);
4987			spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4988			return -EAGAIN;
4989		}
4990
4991		dma_free_coherent(rf->hw.device,
4992				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.size,
4993				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.va,
4994				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.pa);
4995		mc_qht_elem->mc_grp_ctx.dma_mem_mc.va = NULL;
4996		irdma_free_rsrc(rf, rf->allocated_mcgs,
4997				mc_qht_elem->mc_grp_ctx.mg_id);
4998		kfree(mc_qht_elem);
4999	} else {
5000		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
5001		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
5002					 IRDMA_OP_MC_MODIFY);
5003		if (ret) {
5004			ibdev_dbg(&iwdev->ibdev,
5005				  "VERBS: failed Modify MCG\n");
5006			return ret;
5007		}
5008	}
5009
5010	return 0;
5011}
5012
5013static int irdma_create_hw_ah(struct irdma_device *iwdev, struct irdma_ah *ah, bool sleep)
5014{
5015	struct irdma_pci_f *rf = iwdev->rf;
5016	int err;
5017
5018	err = irdma_alloc_rsrc(rf, rf->allocated_ahs, rf->max_ah, &ah->sc_ah.ah_info.ah_idx,
5019			       &rf->next_ah);
5020	if (err)
5021		return err;
5022
5023	err = irdma_ah_cqp_op(rf, &ah->sc_ah, IRDMA_OP_AH_CREATE, sleep,
5024			      irdma_gsi_ud_qp_ah_cb, &ah->sc_ah);
5025
5026	if (err) {
5027		ibdev_dbg(&iwdev->ibdev, "VERBS: CQP-OP Create AH fail");
5028		goto err_ah_create;
5029	}
5030
5031	if (!sleep) {
5032		int cnt = CQP_COMPL_WAIT_TIME_MS * CQP_TIMEOUT_THRESHOLD;
5033
5034		do {
5035			irdma_cqp_ce_handler(rf, &rf->ccq.sc_cq);
5036			mdelay(1);
5037		} while (!ah->sc_ah.ah_info.ah_valid && --cnt);
5038
5039		if (!cnt) {
5040			ibdev_dbg(&iwdev->ibdev, "VERBS: CQP create AH timed out");
5041			err = -ETIMEDOUT;
5042			goto err_ah_create;
5043		}
5044	}
5045	return 0;
5046
5047err_ah_create:
5048	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs, ah->sc_ah.ah_info.ah_idx);
5049
5050	return err;
5051}
5052
5053static int irdma_setup_ah(struct ib_ah *ibah, struct rdma_ah_init_attr *attr)
5054{
5055	struct irdma_pd *pd = to_iwpd(ibah->pd);
5056	struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
5057	struct rdma_ah_attr *ah_attr = attr->ah_attr;
5058	const struct ib_gid_attr *sgid_attr;
5059	struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
5060	struct irdma_pci_f *rf = iwdev->rf;
5061	struct irdma_sc_ah *sc_ah;
5062	struct irdma_ah_info *ah_info;
5063	union irdma_sockaddr sgid_addr, dgid_addr;
5064	int err;
5065	u8 dmac[ETH_ALEN];
5066
5067	ah->pd = pd;
5068	sc_ah = &ah->sc_ah;
5069	sc_ah->ah_info.vsi = &iwdev->vsi;
5070	irdma_sc_init_ah(&rf->sc_dev, sc_ah);
5071	ah->sgid_index = ah_attr->grh.sgid_index;
5072	sgid_attr = ah_attr->grh.sgid_attr;
5073	memcpy(&ah->dgid, &ah_attr->grh.dgid, sizeof(ah->dgid));
5074	rdma_gid2ip((struct sockaddr *)&sgid_addr, &sgid_attr->gid);
5075	rdma_gid2ip((struct sockaddr *)&dgid_addr, &ah_attr->grh.dgid);
5076	ah->av.attrs = *ah_attr;
5077	ah->av.net_type = rdma_gid_attr_network_type(sgid_attr);
5078	ah_info = &sc_ah->ah_info;
5079	ah_info->pd_idx = pd->sc_pd.pd_id;
5080	if (ah_attr->ah_flags & IB_AH_GRH) {
5081		ah_info->flow_label = ah_attr->grh.flow_label;
5082		ah_info->hop_ttl = ah_attr->grh.hop_limit;
5083		ah_info->tc_tos = ah_attr->grh.traffic_class;
5084	}
5085
5086	ether_addr_copy(dmac, ah_attr->roce.dmac);
5087	if (ah->av.net_type == RDMA_NETWORK_IPV4) {
5088		ah_info->ipv4_valid = true;
5089		ah_info->dest_ip_addr[0] =
5090			ntohl(dgid_addr.saddr_in.sin_addr.s_addr);
5091		ah_info->src_ip_addr[0] =
5092			ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
5093		ah_info->do_lpbk = irdma_ipv4_is_lpb(ah_info->src_ip_addr[0],
5094						     ah_info->dest_ip_addr[0]);
5095		if (ipv4_is_multicast(dgid_addr.saddr_in.sin_addr.s_addr)) {
5096			ah_info->do_lpbk = true;
5097			irdma_mcast_mac(ah_info->dest_ip_addr, dmac, true);
5098		}
5099	} else {
5100		irdma_copy_ip_ntohl(ah_info->dest_ip_addr,
5101				    dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
5102		irdma_copy_ip_ntohl(ah_info->src_ip_addr,
5103				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
5104		ah_info->do_lpbk = irdma_ipv6_is_lpb(ah_info->src_ip_addr,
5105						     ah_info->dest_ip_addr);
5106		if (rdma_is_multicast_addr(&dgid_addr.saddr_in6.sin6_addr)) {
5107			ah_info->do_lpbk = true;
5108			irdma_mcast_mac(ah_info->dest_ip_addr, dmac, false);
5109		}
5110	}
5111
5112	err = rdma_read_gid_l2_fields(sgid_attr, &ah_info->vlan_tag,
5113				      ah_info->mac_addr);
5114	if (err)
5115		return err;
5116
5117	ah_info->dst_arpindex = irdma_add_arp(iwdev->rf, ah_info->dest_ip_addr,
5118					      ah_info->ipv4_valid, dmac);
5119
5120	if (ah_info->dst_arpindex == -1)
5121		return -EINVAL;
5122
5123	if (ah_info->vlan_tag >= VLAN_N_VID && iwdev->dcb_vlan_mode)
5124		ah_info->vlan_tag = 0;
5125
5126	if (ah_info->vlan_tag < VLAN_N_VID) {
5127		u8 prio = rt_tos2priority(ah_info->tc_tos);
5128
5129		prio = irdma_roce_get_vlan_prio(sgid_attr, prio);
5130
5131		ah_info->vlan_tag |= (u16)prio << VLAN_PRIO_SHIFT;
5132		ah_info->insert_vlan_tag = true;
5133	}
5134
5135	return 0;
5136}
5137
5138/**
5139 * irdma_ah_exists - Check for existing identical AH
5140 * @iwdev: irdma device
5141 * @new_ah: AH to check for
5142 *
5143 * returns true if AH is found, false if not found.
5144 */
5145static bool irdma_ah_exists(struct irdma_device *iwdev,
5146			    struct irdma_ah *new_ah)
5147{
5148	struct irdma_ah *ah;
5149	u32 key = new_ah->sc_ah.ah_info.dest_ip_addr[0] ^
5150		  new_ah->sc_ah.ah_info.dest_ip_addr[1] ^
5151		  new_ah->sc_ah.ah_info.dest_ip_addr[2] ^
5152		  new_ah->sc_ah.ah_info.dest_ip_addr[3];
5153
5154	hash_for_each_possible(iwdev->rf->ah_hash_tbl, ah, list, key) {
5155		/* Set ah_valid and ah_id the same so memcmp can work */
5156		new_ah->sc_ah.ah_info.ah_idx = ah->sc_ah.ah_info.ah_idx;
5157		new_ah->sc_ah.ah_info.ah_valid = ah->sc_ah.ah_info.ah_valid;
5158		if (!memcmp(&ah->sc_ah.ah_info, &new_ah->sc_ah.ah_info,
5159			    sizeof(ah->sc_ah.ah_info))) {
5160			refcount_inc(&ah->refcnt);
5161			new_ah->parent_ah = ah;
5162			return true;
5163		}
5164	}
5165
5166	return false;
5167}
5168
5169/**
5170 * irdma_destroy_ah - Destroy address handle
5171 * @ibah: pointer to address handle
5172 * @ah_flags: flags for sleepable
5173 */
5174static int irdma_destroy_ah(struct ib_ah *ibah, u32 ah_flags)
5175{
5176	struct irdma_device *iwdev = to_iwdev(ibah->device);
5177	struct irdma_ah *ah = to_iwah(ibah);
5178
5179	if ((ah_flags & RDMA_DESTROY_AH_SLEEPABLE) && ah->parent_ah) {
5180		mutex_lock(&iwdev->rf->ah_tbl_lock);
5181		if (!refcount_dec_and_test(&ah->parent_ah->refcnt)) {
5182			mutex_unlock(&iwdev->rf->ah_tbl_lock);
5183			return 0;
5184		}
5185		hash_del(&ah->parent_ah->list);
5186		kfree(ah->parent_ah);
5187		mutex_unlock(&iwdev->rf->ah_tbl_lock);
5188	}
5189
5190	irdma_ah_cqp_op(iwdev->rf, &ah->sc_ah, IRDMA_OP_AH_DESTROY,
5191			false, NULL, ah);
5192
5193	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs,
5194			ah->sc_ah.ah_info.ah_idx);
5195
5196	return 0;
5197}
5198
5199/**
5200 * irdma_create_user_ah - create user address handle
5201 * @ibah: address handle
5202 * @attr: address handle attributes
5203 * @udata: User data
5204 *
5205 * returns 0 on success, error otherwise
5206 */
5207static int irdma_create_user_ah(struct ib_ah *ibah,
5208				struct rdma_ah_init_attr *attr,
5209				struct ib_udata *udata)
5210{
5211#define IRDMA_CREATE_AH_MIN_RESP_LEN offsetofend(struct irdma_create_ah_resp, rsvd)
5212	struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
5213	struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
5214	struct irdma_create_ah_resp uresp = {};
5215	struct irdma_ah *parent_ah;
5216	int err;
5217
5218	if (udata->outlen < IRDMA_CREATE_AH_MIN_RESP_LEN)
5219		return -EINVAL;
5220
5221	err = irdma_setup_ah(ibah, attr);
5222	if (err)
5223		return err;
5224	mutex_lock(&iwdev->rf->ah_tbl_lock);
5225	if (!irdma_ah_exists(iwdev, ah)) {
5226		err = irdma_create_hw_ah(iwdev, ah, true);
5227		if (err) {
5228			mutex_unlock(&iwdev->rf->ah_tbl_lock);
5229			return err;
5230		}
5231		/* Add new AH to list */
5232		parent_ah = kmemdup(ah, sizeof(*ah), GFP_KERNEL);
5233		if (parent_ah) {
5234			u32 key = parent_ah->sc_ah.ah_info.dest_ip_addr[0] ^
5235				  parent_ah->sc_ah.ah_info.dest_ip_addr[1] ^
5236				  parent_ah->sc_ah.ah_info.dest_ip_addr[2] ^
5237				  parent_ah->sc_ah.ah_info.dest_ip_addr[3];
5238
5239			ah->parent_ah = parent_ah;
5240			hash_add(iwdev->rf->ah_hash_tbl, &parent_ah->list, key);
5241			refcount_set(&parent_ah->refcnt, 1);
5242		}
5243	}
5244	mutex_unlock(&iwdev->rf->ah_tbl_lock);
5245
5246	uresp.ah_id = ah->sc_ah.ah_info.ah_idx;
5247	err = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp), udata->outlen));
5248	if (err)
5249		irdma_destroy_ah(ibah, attr->flags);
5250
5251	return err;
5252}
5253
5254/**
5255 * irdma_create_ah - create address handle
5256 * @ibah: address handle
5257 * @attr: address handle attributes
5258 * @udata: NULL
5259 *
5260 * returns 0 on success, error otherwise
5261 */
5262static int irdma_create_ah(struct ib_ah *ibah, struct rdma_ah_init_attr *attr,
5263			   struct ib_udata *udata)
5264{
5265	struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
5266	struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
5267	int err;
5268
5269	err = irdma_setup_ah(ibah, attr);
5270	if (err)
5271		return err;
5272	err = irdma_create_hw_ah(iwdev, ah, attr->flags & RDMA_CREATE_AH_SLEEPABLE);
5273
5274	return err;
5275}
5276
5277/**
5278 * irdma_query_ah - Query address handle
5279 * @ibah: pointer to address handle
5280 * @ah_attr: address handle attributes
5281 */
5282static int irdma_query_ah(struct ib_ah *ibah, struct rdma_ah_attr *ah_attr)
5283{
5284	struct irdma_ah *ah = to_iwah(ibah);
5285
5286	memset(ah_attr, 0, sizeof(*ah_attr));
5287	if (ah->av.attrs.ah_flags & IB_AH_GRH) {
5288		ah_attr->ah_flags = IB_AH_GRH;
5289		ah_attr->grh.flow_label = ah->sc_ah.ah_info.flow_label;
5290		ah_attr->grh.traffic_class = ah->sc_ah.ah_info.tc_tos;
5291		ah_attr->grh.hop_limit = ah->sc_ah.ah_info.hop_ttl;
5292		ah_attr->grh.sgid_index = ah->sgid_index;
5293		memcpy(&ah_attr->grh.dgid, &ah->dgid,
5294		       sizeof(ah_attr->grh.dgid));
5295	}
5296
5297	return 0;
5298}
5299
5300static enum rdma_link_layer irdma_get_link_layer(struct ib_device *ibdev,
5301						 u32 port_num)
5302{
5303	return IB_LINK_LAYER_ETHERNET;
5304}
5305
5306static const struct ib_device_ops irdma_gen1_dev_ops = {
5307	.dealloc_driver = irdma_ib_dealloc_device,
5308};
5309
5310static const struct ib_device_ops irdma_gen3_dev_ops = {
5311	.alloc_mw = irdma_alloc_mw,
5312	.create_srq = irdma_create_srq,
5313	.dealloc_mw = irdma_dealloc_mw,
5314	.destroy_srq = irdma_destroy_srq,
5315	.modify_srq = irdma_modify_srq,
5316	.post_srq_recv = irdma_post_srq_recv,
5317	.query_srq = irdma_query_srq,
5318};
5319
5320static const struct ib_device_ops irdma_roce_dev_ops = {
5321	.attach_mcast = irdma_attach_mcast,
5322	.create_ah = irdma_create_ah,
5323	.create_user_ah = irdma_create_user_ah,
5324	.destroy_ah = irdma_destroy_ah,
5325	.detach_mcast = irdma_detach_mcast,
5326	.get_link_layer = irdma_get_link_layer,
5327	.get_port_immutable = irdma_roce_port_immutable,
5328	.modify_qp = irdma_modify_qp_roce,
5329	.query_ah = irdma_query_ah,
5330	.query_pkey = irdma_query_pkey,
5331};
5332
5333static const struct ib_device_ops irdma_iw_dev_ops = {
5334	.get_port_immutable = irdma_iw_port_immutable,
5335	.iw_accept = irdma_accept,
5336	.iw_add_ref = irdma_qp_add_ref,
5337	.iw_connect = irdma_connect,
5338	.iw_create_listen = irdma_create_listen,
5339	.iw_destroy_listen = irdma_destroy_listen,
5340	.iw_get_qp = irdma_get_qp,
5341	.iw_reject = irdma_reject,
5342	.iw_rem_ref = irdma_qp_rem_ref,
5343	.modify_qp = irdma_modify_qp,
5344	.query_gid = irdma_query_gid,
5345};
5346
5347static const struct ib_device_ops irdma_dev_ops = {
5348	.owner = THIS_MODULE,
5349	.driver_id = RDMA_DRIVER_IRDMA,
5350	.uverbs_abi_ver = IRDMA_ABI_VER,
5351
5352	.alloc_hw_port_stats = irdma_alloc_hw_port_stats,
5353	.alloc_mr = irdma_alloc_mr,
5354	.alloc_pd = irdma_alloc_pd,
5355	.alloc_ucontext = irdma_alloc_ucontext,
5356	.create_cq = irdma_create_cq,
5357	.create_qp = irdma_create_qp,
5358	.dealloc_driver = irdma_ib_dealloc_device,
5359	.dealloc_mw = irdma_dealloc_mw,
5360	.dealloc_pd = irdma_dealloc_pd,
5361	.dealloc_ucontext = irdma_dealloc_ucontext,
5362	.dereg_mr = irdma_dereg_mr,
5363	.destroy_cq = irdma_destroy_cq,
5364	.destroy_qp = irdma_destroy_qp,
5365	.disassociate_ucontext = irdma_disassociate_ucontext,
5366	.get_dev_fw_str = irdma_get_dev_fw_str,
5367	.get_dma_mr = irdma_get_dma_mr,
5368	.get_hw_stats = irdma_get_hw_stats,
5369	.map_mr_sg = irdma_map_mr_sg,
5370	.mmap = irdma_mmap,
5371	.mmap_free = irdma_mmap_free,
5372	.poll_cq = irdma_poll_cq,
5373	.post_recv = irdma_post_recv,
5374	.post_send = irdma_post_send,
5375	.query_device = irdma_query_device,
5376	.query_port = irdma_query_port,
5377	.query_qp = irdma_query_qp,
5378	.reg_user_mr = irdma_reg_user_mr,
5379	.reg_user_mr_dmabuf = irdma_reg_user_mr_dmabuf,
5380	.rereg_user_mr = irdma_rereg_user_mr,
5381	.req_notify_cq = irdma_req_notify_cq,
5382	.resize_cq = irdma_resize_cq,
5383	INIT_RDMA_OBJ_SIZE(ib_pd, irdma_pd, ibpd),
5384	INIT_RDMA_OBJ_SIZE(ib_ucontext, irdma_ucontext, ibucontext),
5385	INIT_RDMA_OBJ_SIZE(ib_ah, irdma_ah, ibah),
5386	INIT_RDMA_OBJ_SIZE(ib_cq, irdma_cq, ibcq),
5387	INIT_RDMA_OBJ_SIZE(ib_mw, irdma_mr, ibmw),
5388	INIT_RDMA_OBJ_SIZE(ib_qp, irdma_qp, ibqp),
5389	INIT_RDMA_OBJ_SIZE(ib_srq, irdma_srq, ibsrq),
5390};
5391
5392/**
5393 * irdma_init_roce_device - initialization of roce rdma device
5394 * @iwdev: irdma device
5395 */
5396static void irdma_init_roce_device(struct irdma_device *iwdev)
5397{
5398	iwdev->ibdev.node_type = RDMA_NODE_IB_CA;
5399	addrconf_addr_eui48((u8 *)&iwdev->ibdev.node_guid,
5400			    iwdev->netdev->dev_addr);
5401	ib_set_device_ops(&iwdev->ibdev, &irdma_roce_dev_ops);
5402}
5403
5404/**
5405 * irdma_init_iw_device - initialization of iwarp rdma device
5406 * @iwdev: irdma device
5407 */
5408static void irdma_init_iw_device(struct irdma_device *iwdev)
5409{
5410	struct net_device *netdev = iwdev->netdev;
5411
5412	iwdev->ibdev.node_type = RDMA_NODE_RNIC;
5413	addrconf_addr_eui48((u8 *)&iwdev->ibdev.node_guid,
5414			    netdev->dev_addr);
5415	memcpy(iwdev->ibdev.iw_ifname, netdev->name,
5416	       sizeof(iwdev->ibdev.iw_ifname));
5417	ib_set_device_ops(&iwdev->ibdev, &irdma_iw_dev_ops);
5418}
5419
5420/**
5421 * irdma_init_rdma_device - initialization of rdma device
5422 * @iwdev: irdma device
5423 */
5424static void irdma_init_rdma_device(struct irdma_device *iwdev)
5425{
5426	struct pci_dev *pcidev = iwdev->rf->pcidev;
5427
5428	if (iwdev->roce_mode)
5429		irdma_init_roce_device(iwdev);
5430	else
5431		irdma_init_iw_device(iwdev);
5432
5433	iwdev->ibdev.phys_port_cnt = 1;
5434	iwdev->ibdev.num_comp_vectors = iwdev->rf->ceqs_count;
5435	iwdev->ibdev.dev.parent = &pcidev->dev;
5436	ib_set_device_ops(&iwdev->ibdev, &irdma_dev_ops);
5437	if (iwdev->rf->rdma_ver == IRDMA_GEN_1)
5438		ib_set_device_ops(&iwdev->ibdev, &irdma_gen1_dev_ops);
5439	if (iwdev->rf->rdma_ver >= IRDMA_GEN_3)
5440		ib_set_device_ops(&iwdev->ibdev, &irdma_gen3_dev_ops);
5441}
5442
5443/**
5444 * irdma_port_ibevent - indicate port event
5445 * @iwdev: irdma device
5446 */
5447void irdma_port_ibevent(struct irdma_device *iwdev)
5448{
5449	struct ib_event event;
5450
5451	event.device = &iwdev->ibdev;
5452	event.element.port_num = 1;
5453	event.event =
5454		iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
5455	ib_dispatch_event(&event);
5456}
5457
5458/**
5459 * irdma_ib_unregister_device - unregister rdma device from IB
5460 * core
5461 * @iwdev: irdma device
5462 */
5463void irdma_ib_unregister_device(struct irdma_device *iwdev)
5464{
5465	iwdev->iw_status = 0;
5466	irdma_port_ibevent(iwdev);
5467	ib_unregister_device(&iwdev->ibdev);
5468}
5469
5470/**
5471 * irdma_ib_register_device - register irdma device to IB core
5472 * @iwdev: irdma device
5473 */
5474int irdma_ib_register_device(struct irdma_device *iwdev)
5475{
5476	int ret;
5477
5478	irdma_init_rdma_device(iwdev);
5479
5480	ret = ib_device_set_netdev(&iwdev->ibdev, iwdev->netdev, 1);
5481	if (ret)
5482		goto error;
5483	dma_set_max_seg_size(iwdev->rf->hw.device, UINT_MAX);
5484	ret = ib_register_device(&iwdev->ibdev, "irdma%d", iwdev->rf->hw.device);
5485	if (ret)
5486		goto error;
5487
5488	iwdev->iw_status = 1;
5489	irdma_port_ibevent(iwdev);
5490
5491	return 0;
5492
5493error:
5494	if (ret)
5495		ibdev_dbg(&iwdev->ibdev, "VERBS: Register RDMA device fail\n");
5496
5497	return ret;
5498}
5499
5500/**
5501 * irdma_ib_dealloc_device
5502 * @ibdev: ib device
5503 *
5504 * callback from ibdev dealloc_driver to deallocate resources
5505 * unber irdma device
5506 */
5507void irdma_ib_dealloc_device(struct ib_device *ibdev)
5508{
5509	struct irdma_device *iwdev = to_iwdev(ibdev);
5510
5511	irdma_rt_deinit_hw(iwdev);
5512	if (!iwdev->is_vport) {
5513		irdma_ctrl_deinit_hw(iwdev->rf);
5514		if (iwdev->rf->vchnl_wq) {
5515			destroy_workqueue(iwdev->rf->vchnl_wq);
5516			mutex_destroy(&iwdev->rf->sc_dev.vchnl_mutex);
5517		}
5518	}
5519}