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hns_roce_hw_v2.h
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linux-6.19.14/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
1/* 2 * Copyright (c) 2016-2017 Hisilicon Limited. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33#ifndef _HNS_ROCE_HW_V2_H 34#define _HNS_ROCE_HW_V2_H 35 36#include <linux/bitops.h> 37#include "hnae3.h" 38#include "hns_roce_bond.h" 39 40#define HNS_ROCE_V2_MAX_RC_INL_INN_SZ 32 41#define HNS_ROCE_V2_MTT_ENTRY_SZ 64 42#define HNS_ROCE_V2_AEQE_VEC_NUM 1 43#define HNS_ROCE_V2_ABNORMAL_VEC_NUM 1 44#define HNS_ROCE_V2_MAX_SRQWQE_SEGS 0x1000000 45#define HNS_ROCE_V2_MAX_IDX_SEGS 0x1000000 46#define HNS_ROCE_V2_MAX_XRCD_NUM 0x1000000 47 48#define HNS_ROCE_V2_QP_ACK_TIMEOUT_OFS_HIP08 10 49 50#define HNS_ROCE_V3_SCCC_SZ 64 51#define HNS_ROCE_V3_GMV_ENTRY_SZ 32 52 53#define HNS_ROCE_V2_EXT_LLM_ENTRY_SZ 8 54#define HNS_ROCE_V2_EXT_LLM_MAX_DEPTH 4096 55 56#define HNS_ROCE_V2_QPC_TIMER_ENTRY_SZ PAGE_SIZE 57#define HNS_ROCE_V2_CQC_TIMER_ENTRY_SZ PAGE_SIZE 58#define HNS_ROCE_V2_PAGE_SIZE_SUPPORTED 0xFFFF000 59#define HNS_ROCE_V2_MAX_INNER_MTPT_NUM 2 60#define HNS_ROCE_INVALID_LKEY 0x0 61#define HNS_ROCE_INVALID_SGE_LENGTH 0x80000000 62#define HNS_ROCE_CMQ_TX_TIMEOUT 30000 63#define HNS_ROCE_V2_RSV_QPS 8 64 65#define HNS_ROCE_V2_HW_RST_TIMEOUT 1000 66#define HNS_ROCE_V2_HW_RST_UNINT_DELAY 100 67 68#define HNS_ROCE_V2_HW_RST_COMPLETION_WAIT 20 69 70#define HNS_ROCE_CONTEXT_HOP_NUM 1 71#define HNS_ROCE_SCCC_HOP_NUM 1 72#define HNS_ROCE_MTT_HOP_NUM 1 73#define HNS_ROCE_CQE_HOP_NUM 1 74#define HNS_ROCE_SRQWQE_HOP_NUM 1 75#define HNS_ROCE_PBL_HOP_NUM 2 76#define HNS_ROCE_IDX_HOP_NUM 1 77#define HNS_ROCE_SQWQE_HOP_NUM 2 78#define HNS_ROCE_EXT_SGE_HOP_NUM 1 79#define HNS_ROCE_RQWQE_HOP_NUM 2 80 81#define HNS_ROCE_V2_EQE_HOP_NUM 2 82#define HNS_ROCE_V3_EQE_HOP_NUM 1 83 84#define HNS_ROCE_BA_PG_SZ_SUPPORTED_256K 6 85#define HNS_ROCE_BA_PG_SZ_SUPPORTED_16K 2 86#define HNS_ROCE_V2_GID_INDEX_NUM 16 87 88#define HNS_ROCE_V2_TABLE_CHUNK_SIZE (1 << 18) 89 90/* budget must be smaller than aeqe_depth to guarantee that we update 91 * the ci before we polled all the entries in the EQ. 92 */ 93#define HNS_AEQ_POLLING_BUDGET 64 94 95enum { 96 HNS_ROCE_CMD_FLAG_IN = BIT(0), 97 HNS_ROCE_CMD_FLAG_OUT = BIT(1), 98 HNS_ROCE_CMD_FLAG_NEXT = BIT(2), 99 HNS_ROCE_CMD_FLAG_WR = BIT(3), 100 HNS_ROCE_CMD_FLAG_ERR_INTR = BIT(5), 101}; 102 103#define HNS_ROCE_CMQ_DESC_NUM_S 3 104 105#define HNS_ROCE_CMQ_SCC_CLR_DONE_CNT 5 106 107#define HNS_ROCE_CONG_SIZE 64 108 109#define check_whether_last_step(hop_num, step_idx) \ 110 ((step_idx == 0 && hop_num == HNS_ROCE_HOP_NUM_0) || \ 111 (step_idx == 1 && hop_num == 1) || \ 112 (step_idx == 2 && hop_num == 2)) 113#define HNS_ICL_SWITCH_CMD_ROCEE_SEL_SHIFT 0 114#define HNS_ICL_SWITCH_CMD_ROCEE_SEL BIT(HNS_ICL_SWITCH_CMD_ROCEE_SEL_SHIFT) 115 116#define CMD_CSQ_DESC_NUM 1024 117#define CMD_CRQ_DESC_NUM 1024 118 119/* Free mr used parameters */ 120#define HNS_ROCE_FREE_MR_USED_CQE_NUM 128 121#define HNS_ROCE_FREE_MR_USED_QP_NUM 0x8 122#define HNS_ROCE_FREE_MR_USED_PSN 0x0808 123#define HNS_ROCE_FREE_MR_USED_QP_RETRY_CNT 0x7 124#define HNS_ROCE_FREE_MR_USED_QP_TIMEOUT 0x12 125#define HNS_ROCE_FREE_MR_USED_SQWQE_NUM 128 126#define HNS_ROCE_FREE_MR_USED_SQSGE_NUM 0x2 127#define HNS_ROCE_FREE_MR_USED_RQWQE_NUM 128 128#define HNS_ROCE_FREE_MR_USED_RQSGE_NUM 0x2 129#define HNS_ROCE_V2_FREE_MR_TIMEOUT 4500 130 131enum { 132 NO_ARMED = 0x0, 133 REG_NXT_CEQE = 0x2, 134 REG_NXT_SE_CEQE = 0x3 135}; 136 137enum { 138 CQE_SIZE_32B = 0x0, 139 CQE_SIZE_64B = 0x1 140}; 141 142#define V2_CQ_DB_REQ_NOT_SOL 0 143#define V2_CQ_DB_REQ_NOT 1 144 145#define V2_CQ_STATE_VALID 1 146#define V2_QKEY_VAL 0x80010000 147 148#define GID_LEN_V2 16 149 150enum { 151 HNS_ROCE_V2_WQE_OP_SEND = 0x0, 152 HNS_ROCE_V2_WQE_OP_SEND_WITH_INV = 0x1, 153 HNS_ROCE_V2_WQE_OP_SEND_WITH_IMM = 0x2, 154 HNS_ROCE_V2_WQE_OP_RDMA_WRITE = 0x3, 155 HNS_ROCE_V2_WQE_OP_RDMA_WRITE_WITH_IMM = 0x4, 156 HNS_ROCE_V2_WQE_OP_RDMA_READ = 0x5, 157 HNS_ROCE_V2_WQE_OP_ATOM_CMP_AND_SWAP = 0x6, 158 HNS_ROCE_V2_WQE_OP_ATOM_FETCH_AND_ADD = 0x7, 159 HNS_ROCE_V2_WQE_OP_ATOM_MSK_CMP_AND_SWAP = 0x8, 160 HNS_ROCE_V2_WQE_OP_ATOM_MSK_FETCH_AND_ADD = 0x9, 161 HNS_ROCE_V2_WQE_OP_FAST_REG_PMR = 0xa, 162 HNS_ROCE_V2_WQE_OP_BIND_MW = 0xc, 163 HNS_ROCE_V2_WQE_OP_MASK = 0x1f, 164}; 165 166enum { 167 /* rq operations */ 168 HNS_ROCE_V2_OPCODE_RDMA_WRITE_IMM = 0x0, 169 HNS_ROCE_V2_OPCODE_SEND = 0x1, 170 HNS_ROCE_V2_OPCODE_SEND_WITH_IMM = 0x2, 171 HNS_ROCE_V2_OPCODE_SEND_WITH_INV = 0x3, 172}; 173 174enum { 175 HNS_ROCE_V2_SQ_DB, 176 HNS_ROCE_V2_RQ_DB, 177 HNS_ROCE_V2_SRQ_DB, 178 HNS_ROCE_V2_CQ_DB, 179 HNS_ROCE_V2_CQ_DB_NOTIFY 180}; 181 182enum { 183 HNS_ROCE_CQE_V2_SUCCESS = 0x00, 184 HNS_ROCE_CQE_V2_LOCAL_LENGTH_ERR = 0x01, 185 HNS_ROCE_CQE_V2_LOCAL_QP_OP_ERR = 0x02, 186 HNS_ROCE_CQE_V2_LOCAL_PROT_ERR = 0x04, 187 HNS_ROCE_CQE_V2_WR_FLUSH_ERR = 0x05, 188 HNS_ROCE_CQE_V2_MW_BIND_ERR = 0x06, 189 HNS_ROCE_CQE_V2_BAD_RESP_ERR = 0x10, 190 HNS_ROCE_CQE_V2_LOCAL_ACCESS_ERR = 0x11, 191 HNS_ROCE_CQE_V2_REMOTE_INVAL_REQ_ERR = 0x12, 192 HNS_ROCE_CQE_V2_REMOTE_ACCESS_ERR = 0x13, 193 HNS_ROCE_CQE_V2_REMOTE_OP_ERR = 0x14, 194 HNS_ROCE_CQE_V2_TRANSPORT_RETRY_EXC_ERR = 0x15, 195 HNS_ROCE_CQE_V2_RNR_RETRY_EXC_ERR = 0x16, 196 HNS_ROCE_CQE_V2_REMOTE_ABORT_ERR = 0x22, 197 HNS_ROCE_CQE_V2_GENERAL_ERR = 0x23, 198 199 HNS_ROCE_V2_CQE_STATUS_MASK = 0xff, 200}; 201 202/* CMQ command */ 203enum hns_roce_opcode_type { 204 HNS_QUERY_FW_VER = 0x0001, 205 HNS_ROCE_OPC_QUERY_HW_VER = 0x8000, 206 HNS_ROCE_OPC_CFG_GLOBAL_PARAM = 0x8001, 207 HNS_ROCE_OPC_ALLOC_PF_RES = 0x8004, 208 HNS_ROCE_OPC_QUERY_COUNTER = 0x8206, 209 HNS_ROCE_OPC_QUERY_PF_RES = 0x8400, 210 HNS_ROCE_OPC_ALLOC_VF_RES = 0x8401, 211 HNS_ROCE_OPC_CFG_EXT_LLM = 0x8403, 212 HNS_ROCE_OPC_QUERY_PF_TIMER_RES = 0x8406, 213 HNS_ROCE_OPC_QUERY_FUNC_INFO = 0x8407, 214 HNS_ROCE_OPC_QUERY_PF_CAPS_NUM = 0x8408, 215 HNS_ROCE_OPC_CFG_ENTRY_SIZE = 0x8409, 216 HNS_ROCE_OPC_QUERY_VF_CAPS_NUM = 0x8410, 217 HNS_ROCE_OPC_CFG_SGID_TB = 0x8500, 218 HNS_ROCE_OPC_CFG_SMAC_TB = 0x8501, 219 HNS_ROCE_OPC_POST_MB = 0x8504, 220 HNS_ROCE_OPC_QUERY_MB_ST = 0x8505, 221 HNS_ROCE_OPC_CFG_BT_ATTR = 0x8506, 222 HNS_ROCE_OPC_FUNC_CLEAR = 0x8508, 223 HNS_ROCE_OPC_CLR_SCCC = 0x8509, 224 HNS_ROCE_OPC_QUERY_SCCC = 0x850a, 225 HNS_ROCE_OPC_RESET_SCCC = 0x850b, 226 HNS_ROCE_OPC_CLEAR_EXTDB_LIST_INFO = 0x850d, 227 HNS_ROCE_OPC_QUERY_VF_RES = 0x850e, 228 HNS_ROCE_OPC_CFG_GMV_TBL = 0x850f, 229 HNS_ROCE_OPC_CFG_GMV_BT = 0x8510, 230 HNS_ROCE_QUERY_RAM_ECC = 0x8513, 231 HNS_SWITCH_PARAMETER_CFG = 0x1033, 232 HNS_ROCE_OPC_SET_BOND_INFO = 0x8601, 233 HNS_ROCE_OPC_CLEAR_BOND_INFO = 0x8602, 234 HNS_ROCE_OPC_CHANGE_ACTIVE_PORT = 0x8603, 235}; 236 237#define HNS_ROCE_OPC_POST_MB_TIMEOUT 35000 238#define HNS_ROCE_OPC_POST_MB_TRY_CNT 8 239#define HNS_ROCE_OPC_POST_MB_RETRY_GAP_MSEC 5 240struct hns_roce_cmdq_tx_timeout_map { 241 u16 opcode; 242 u32 tx_timeout; 243}; 244 245enum { 246 TYPE_CRQ, 247 TYPE_CSQ, 248}; 249 250enum hns_roce_cmd_return_status { 251 CMD_EXEC_SUCCESS, 252 CMD_NO_AUTH, 253 CMD_NOT_EXIST, 254 CMD_CRQ_FULL, 255 CMD_NEXT_ERR, 256 CMD_NOT_EXEC, 257 CMD_PARA_ERR, 258 CMD_RESULT_ERR, 259 CMD_TIMEOUT, 260 CMD_HILINK_ERR, 261 CMD_INFO_ILLEGAL, 262 CMD_INVALID, 263 CMD_ROH_CHECK_FAIL, 264 CMD_OTHER_ERR = 0xff 265}; 266 267struct hns_roce_cmd_errcode { 268 enum hns_roce_cmd_return_status return_status; 269 int errno; 270}; 271 272enum hns_roce_sgid_type { 273 GID_TYPE_FLAG_ROCE_V1 = 0, 274 GID_TYPE_FLAG_ROCE_V2_IPV4, 275 GID_TYPE_FLAG_ROCE_V2_IPV6, 276}; 277 278struct hns_roce_v2_cq_context { 279 __le32 byte_4_pg_ceqn; 280 __le32 byte_8_cqn; 281 __le32 cqe_cur_blk_addr; 282 __le32 byte_16_hop_addr; 283 __le32 cqe_nxt_blk_addr; 284 __le32 byte_24_pgsz_addr; 285 __le32 byte_28_cq_pi; 286 __le32 byte_32_cq_ci; 287 __le32 cqe_ba; 288 __le32 byte_40_cqe_ba; 289 __le32 byte_44_db_record; 290 __le32 db_record_addr; 291 __le32 byte_52_cqe_cnt; 292 __le32 byte_56_cqe_period_maxcnt; 293 __le32 cqe_report_timer; 294 __le32 byte_64_se_cqe_idx; 295}; 296 297#define CQC_CQE_BA_L_S 3 298#define CQC_CQE_BA_H_S (32 + CQC_CQE_BA_L_S) 299#define CQC_CQE_DB_RECORD_ADDR_H_S 32 300 301#define HNS_ROCE_V2_CQ_DEFAULT_BURST_NUM 0x0 302#define HNS_ROCE_V2_CQ_DEFAULT_INTERVAL 0x0 303 304#define CQC_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_cq_context, h, l) 305 306#define CQC_CQ_ST CQC_FIELD_LOC(1, 0) 307#define CQC_POLL CQC_FIELD_LOC(2, 2) 308#define CQC_SE CQC_FIELD_LOC(3, 3) 309#define CQC_OVER_IGNORE CQC_FIELD_LOC(4, 4) 310#define CQC_ARM_ST CQC_FIELD_LOC(7, 6) 311#define CQC_SHIFT CQC_FIELD_LOC(12, 8) 312#define CQC_CMD_SN CQC_FIELD_LOC(14, 13) 313#define CQC_CEQN CQC_FIELD_LOC(23, 15) 314#define CQC_CQN CQC_FIELD_LOC(55, 32) 315#define CQC_POE_EN CQC_FIELD_LOC(56, 56) 316#define CQC_POE_NUM CQC_FIELD_LOC(58, 57) 317#define CQC_CQE_SIZE CQC_FIELD_LOC(60, 59) 318#define CQC_CQ_CNT_MODE CQC_FIELD_LOC(61, 61) 319#define CQC_STASH CQC_FIELD_LOC(63, 63) 320#define CQC_CQE_CUR_BLK_ADDR_L CQC_FIELD_LOC(95, 64) 321#define CQC_CQE_CUR_BLK_ADDR_H CQC_FIELD_LOC(115, 96) 322#define CQC_POE_QID CQC_FIELD_LOC(125, 116) 323#define CQC_CQE_HOP_NUM CQC_FIELD_LOC(127, 126) 324#define CQC_CQE_NEX_BLK_ADDR_L CQC_FIELD_LOC(159, 128) 325#define CQC_CQE_NEX_BLK_ADDR_H CQC_FIELD_LOC(179, 160) 326#define CQC_CQE_BAR_PG_SZ CQC_FIELD_LOC(187, 184) 327#define CQC_CQE_BUF_PG_SZ CQC_FIELD_LOC(191, 188) 328#define CQC_CQ_PRODUCER_IDX CQC_FIELD_LOC(215, 192) 329#define CQC_CQ_CONSUMER_IDX CQC_FIELD_LOC(247, 224) 330#define CQC_CQE_BA_L CQC_FIELD_LOC(287, 256) 331#define CQC_CQE_BA_H CQC_FIELD_LOC(316, 288) 332#define CQC_POE_QID_H_0 CQC_FIELD_LOC(319, 317) 333#define CQC_DB_RECORD_EN CQC_FIELD_LOC(320, 320) 334#define CQC_CQE_DB_RECORD_ADDR_L CQC_FIELD_LOC(351, 321) 335#define CQC_CQE_DB_RECORD_ADDR_H CQC_FIELD_LOC(383, 352) 336#define CQC_CQE_CNT CQC_FIELD_LOC(407, 384) 337#define CQC_CQ_MAX_CNT CQC_FIELD_LOC(431, 416) 338#define CQC_CQ_PERIOD CQC_FIELD_LOC(447, 432) 339#define CQC_CQE_REPORT_TIMER CQC_FIELD_LOC(471, 448) 340#define CQC_WR_CQE_IDX CQC_FIELD_LOC(479, 472) 341#define CQC_SE_CQE_IDX CQC_FIELD_LOC(503, 480) 342#define CQC_POE_QID_H_1 CQC_FIELD_LOC(511, 511) 343 344struct hns_roce_srq_context { 345 __le32 data[16]; 346}; 347 348#define SRQC_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_srq_context, h, l) 349 350#define SRQC_SRQ_ST SRQC_FIELD_LOC(1, 0) 351#define SRQC_WQE_HOP_NUM SRQC_FIELD_LOC(3, 2) 352#define SRQC_SHIFT SRQC_FIELD_LOC(7, 4) 353#define SRQC_SRQN SRQC_FIELD_LOC(31, 8) 354#define SRQC_LIMIT_WL SRQC_FIELD_LOC(47, 32) 355#define SRQC_RSV0 SRQC_FIELD_LOC(63, 48) 356#define SRQC_XRCD SRQC_FIELD_LOC(87, 64) 357#define SRQC_RSV1 SRQC_FIELD_LOC(95, 88) 358#define SRQC_PRODUCER_IDX SRQC_FIELD_LOC(111, 96) 359#define SRQC_CONSUMER_IDX SRQC_FIELD_LOC(127, 112) 360#define SRQC_WQE_BT_BA_L SRQC_FIELD_LOC(159, 128) 361#define SRQC_WQE_BT_BA_H SRQC_FIELD_LOC(188, 160) 362#define SRQC_RSV2 SRQC_FIELD_LOC(190, 189) 363#define SRQC_SRQ_TYPE SRQC_FIELD_LOC(191, 191) 364#define SRQC_PD SRQC_FIELD_LOC(215, 192) 365#define SRQC_RQWS SRQC_FIELD_LOC(219, 216) 366#define SRQC_RSV3 SRQC_FIELD_LOC(223, 220) 367#define SRQC_IDX_BT_BA_L SRQC_FIELD_LOC(255, 224) 368#define SRQC_IDX_BT_BA_H SRQC_FIELD_LOC(284, 256) 369#define SRQC_RSV4 SRQC_FIELD_LOC(287, 285) 370#define SRQC_IDX_CUR_BLK_ADDR_L SRQC_FIELD_LOC(319, 288) 371#define SRQC_IDX_CUR_BLK_ADDR_H SRQC_FIELD_LOC(339, 320) 372#define SRQC_RSV5 SRQC_FIELD_LOC(341, 340) 373#define SRQC_IDX_HOP_NUM SRQC_FIELD_LOC(343, 342) 374#define SRQC_IDX_BA_PG_SZ SRQC_FIELD_LOC(347, 344) 375#define SRQC_IDX_BUF_PG_SZ SRQC_FIELD_LOC(351, 348) 376#define SRQC_IDX_NXT_BLK_ADDR_L SRQC_FIELD_LOC(383, 352) 377#define SRQC_IDX_NXT_BLK_ADDR_H SRQC_FIELD_LOC(403, 384) 378#define SRQC_RSV6 SRQC_FIELD_LOC(415, 404) 379#define SRQC_XRC_CQN SRQC_FIELD_LOC(439, 416) 380#define SRQC_WQE_BA_PG_SZ SRQC_FIELD_LOC(443, 440) 381#define SRQC_WQE_BUF_PG_SZ SRQC_FIELD_LOC(447, 444) 382#define SRQC_DB_RECORD_EN SRQC_FIELD_LOC(448, 448) 383#define SRQC_DB_RECORD_ADDR_L SRQC_FIELD_LOC(479, 449) 384#define SRQC_DB_RECORD_ADDR_H SRQC_FIELD_LOC(511, 480) 385 386enum { 387 V2_MPT_ST_VALID = 0x1, 388 V2_MPT_ST_FREE = 0x2, 389}; 390 391enum hns_roce_v2_qp_state { 392 HNS_ROCE_QP_ST_RST, 393 HNS_ROCE_QP_ST_INIT, 394 HNS_ROCE_QP_ST_RTR, 395 HNS_ROCE_QP_ST_RTS, 396 HNS_ROCE_QP_ST_SQD, 397 HNS_ROCE_QP_ST_SQER, 398 HNS_ROCE_QP_ST_ERR, 399 HNS_ROCE_QP_ST_SQ_DRAINING, 400 HNS_ROCE_QP_NUM_ST 401}; 402 403struct hns_roce_v2_qp_context_ex { 404 __le32 data[64]; 405}; 406 407struct hns_roce_v2_qp_context { 408 __le32 byte_4_sqpn_tst; 409 __le32 wqe_sge_ba; 410 __le32 byte_12_sq_hop; 411 __le32 byte_16_buf_ba_pg_sz; 412 __le32 byte_20_smac_sgid_idx; 413 __le32 byte_24_mtu_tc; 414 __le32 byte_28_at_fl; 415 u8 dgid[GID_LEN_V2]; 416 __le32 dmac; 417 __le32 byte_52_udpspn_dmac; 418 __le32 byte_56_dqpn_err; 419 __le32 byte_60_qpst_tempid; 420 __le32 qkey_xrcd; 421 __le32 byte_68_rq_db; 422 __le32 rq_db_record_addr; 423 __le32 byte_76_srqn_op_en; 424 __le32 byte_80_rnr_rx_cqn; 425 __le32 byte_84_rq_ci_pi; 426 __le32 rq_cur_blk_addr; 427 __le32 byte_92_srq_info; 428 __le32 byte_96_rx_reqmsn; 429 __le32 rq_nxt_blk_addr; 430 __le32 byte_104_rq_sge; 431 __le32 byte_108_rx_reqepsn; 432 __le32 rq_rnr_timer; 433 __le32 rx_msg_len; 434 __le32 rx_rkey_pkt_info; 435 __le64 rx_va; 436 __le32 byte_132_trrl; 437 __le32 trrl_ba; 438 __le32 byte_140_raq; 439 __le32 byte_144_raq; 440 __le32 byte_148_raq; 441 __le32 byte_152_raq; 442 __le32 byte_156_raq; 443 __le32 byte_160_sq_ci_pi; 444 __le32 sq_cur_blk_addr; 445 __le32 byte_168_irrl_idx; 446 __le32 byte_172_sq_psn; 447 __le32 byte_176_msg_pktn; 448 __le32 sq_cur_sge_blk_addr; 449 __le32 byte_184_irrl_idx; 450 __le32 cur_sge_offset; 451 __le32 byte_192_ext_sge; 452 __le32 byte_196_sq_psn; 453 __le32 byte_200_sq_max; 454 __le32 irrl_ba; 455 __le32 byte_208_irrl; 456 __le32 byte_212_lsn; 457 __le32 sq_timer; 458 __le32 byte_220_retry_psn_msn; 459 __le32 byte_224_retry_msg; 460 __le32 rx_sq_cur_blk_addr; 461 __le32 byte_232_irrl_sge; 462 __le32 irrl_cur_sge_offset; 463 __le32 byte_240_irrl_tail; 464 __le32 byte_244_rnr_rxack; 465 __le32 byte_248_ack_psn; 466 __le32 byte_252_err_txcqn; 467 __le32 byte_256_sqflush_rqcqe; 468 469 struct hns_roce_v2_qp_context_ex ext; 470}; 471 472#define QPC_TRRL_BA_L_S 4 473#define QPC_TRRL_BA_M_S (16 + QPC_TRRL_BA_L_S) 474#define QPC_TRRL_BA_H_S (32 + QPC_TRRL_BA_M_S) 475#define QPC_IRRL_BA_L_S 6 476#define QPC_IRRL_BA_H_S (32 + QPC_IRRL_BA_L_S) 477 478#define QPC_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_qp_context, h, l) 479 480#define QPC_TST QPC_FIELD_LOC(2, 0) 481#define QPC_SGE_SHIFT QPC_FIELD_LOC(7, 3) 482#define QPC_CNP_TIMER QPC_FIELD_LOC(31, 8) 483#define QPC_WQE_SGE_BA_L QPC_FIELD_LOC(63, 32) 484#define QPC_WQE_SGE_BA_H QPC_FIELD_LOC(92, 64) 485#define QPC_SQ_HOP_NUM QPC_FIELD_LOC(94, 93) 486#define QPC_CIRE_EN QPC_FIELD_LOC(95, 95) 487#define QPC_WQE_SGE_BA_PG_SZ QPC_FIELD_LOC(99, 96) 488#define QPC_WQE_SGE_BUF_PG_SZ QPC_FIELD_LOC(103, 100) 489#define QPC_PD QPC_FIELD_LOC(127, 104) 490#define QPC_RQ_HOP_NUM QPC_FIELD_LOC(129, 128) 491#define QPC_SGE_HOP_NUM QPC_FIELD_LOC(131, 130) 492#define QPC_RQWS QPC_FIELD_LOC(135, 132) 493#define QPC_SQ_SHIFT QPC_FIELD_LOC(139, 136) 494#define QPC_RQ_SHIFT QPC_FIELD_LOC(143, 140) 495#define QPC_GMV_IDX QPC_FIELD_LOC(159, 144) 496#define QPC_HOPLIMIT QPC_FIELD_LOC(167, 160) 497#define QPC_TC QPC_FIELD_LOC(175, 168) 498#define QPC_VLAN_ID QPC_FIELD_LOC(187, 176) 499#define QPC_MTU QPC_FIELD_LOC(191, 188) 500#define QPC_FL QPC_FIELD_LOC(211, 192) 501#define QPC_SL QPC_FIELD_LOC(215, 212) 502#define QPC_CNP_TX_FLAG QPC_FIELD_LOC(216, 216) 503#define QPC_CE_FLAG QPC_FIELD_LOC(217, 217) 504#define QPC_LBI QPC_FIELD_LOC(218, 218) 505#define QPC_AT QPC_FIELD_LOC(223, 219) 506#define QPC_DGID QPC_FIELD_LOC(351, 224) 507#define QPC_DMAC_L QPC_FIELD_LOC(383, 352) 508#define QPC_DMAC_H QPC_FIELD_LOC(399, 384) 509#define QPC_UDPSPN QPC_FIELD_LOC(415, 400) 510#define QPC_DQPN QPC_FIELD_LOC(439, 416) 511#define QPC_SQ_TX_ERR QPC_FIELD_LOC(440, 440) 512#define QPC_SQ_RX_ERR QPC_FIELD_LOC(441, 441) 513#define QPC_RQ_TX_ERR QPC_FIELD_LOC(442, 442) 514#define QPC_RQ_RX_ERR QPC_FIELD_LOC(443, 443) 515#define QPC_LP_PKTN_INI QPC_FIELD_LOC(447, 444) 516#define QPC_CONG_ALGO_TMPL_ID QPC_FIELD_LOC(455, 448) 517#define QPC_SCC_TOKEN QPC_FIELD_LOC(474, 456) 518#define QPC_SQ_DB_DOING QPC_FIELD_LOC(475, 475) 519#define QPC_RQ_DB_DOING QPC_FIELD_LOC(476, 476) 520#define QPC_QP_ST QPC_FIELD_LOC(479, 477) 521#define QPC_QKEY_XRCD QPC_FIELD_LOC(511, 480) 522#define QPC_RQ_RECORD_EN QPC_FIELD_LOC(512, 512) 523#define QPC_RQ_DB_RECORD_ADDR_L QPC_FIELD_LOC(543, 513) 524#define QPC_RQ_DB_RECORD_ADDR_H QPC_FIELD_LOC(575, 544) 525#define QPC_SRQN QPC_FIELD_LOC(599, 576) 526#define QPC_SRQ_EN QPC_FIELD_LOC(600, 600) 527#define QPC_RRE QPC_FIELD_LOC(601, 601) 528#define QPC_RWE QPC_FIELD_LOC(602, 602) 529#define QPC_ATE QPC_FIELD_LOC(603, 603) 530#define QPC_RQIE QPC_FIELD_LOC(604, 604) 531#define QPC_EXT_ATE QPC_FIELD_LOC(605, 605) 532#define QPC_RQ_VLAN_EN QPC_FIELD_LOC(606, 606) 533#define QPC_RQ_RTY_TX_ERR QPC_FIELD_LOC(607, 607) 534#define QPC_RX_CQN QPC_FIELD_LOC(631, 608) 535#define QPC_XRC_QP_TYPE QPC_FIELD_LOC(632, 632) 536#define QPC_CQEIE QPC_FIELD_LOC(633, 633) 537#define QPC_CQEIS QPC_FIELD_LOC(634, 634) 538#define QPC_MIN_RNR_TIME QPC_FIELD_LOC(639, 635) 539#define QPC_RQ_PRODUCER_IDX QPC_FIELD_LOC(655, 640) 540#define QPC_RQ_CONSUMER_IDX QPC_FIELD_LOC(671, 656) 541#define QPC_RQ_CUR_BLK_ADDR_L QPC_FIELD_LOC(703, 672) 542#define QPC_RQ_CUR_BLK_ADDR_H QPC_FIELD_LOC(723, 704) 543#define QPC_SRQ_INFO QPC_FIELD_LOC(735, 724) 544#define QPC_RX_REQ_MSN QPC_FIELD_LOC(759, 736) 545#define QPC_REDUCE_CODE QPC_FIELD_LOC(766, 760) 546#define QPC_RX_XRC_PKT_CQE_FLG QPC_FIELD_LOC(767, 767) 547#define QPC_RQ_NXT_BLK_ADDR_L QPC_FIELD_LOC(799, 768) 548#define QPC_RQ_NXT_BLK_ADDR_H QPC_FIELD_LOC(819, 800) 549#define QPC_REDUCE_EN QPC_FIELD_LOC(820, 820) 550#define QPC_FLUSH_EN QPC_FIELD_LOC(821, 821) 551#define QPC_AW_EN QPC_FIELD_LOC(822, 822) 552#define QPC_WN_EN QPC_FIELD_LOC(823, 823) 553#define QPC_RQ_CUR_WQE_SGE_NUM QPC_FIELD_LOC(831, 824) 554#define QPC_INV_CREDIT QPC_FIELD_LOC(832, 832) 555#define QPC_LAST_WRITE_TYPE QPC_FIELD_LOC(834, 833) 556#define QPC_RX_REQ_PSN_ERR QPC_FIELD_LOC(835, 835) 557#define QPC_RX_REQ_LAST_OPTYPE QPC_FIELD_LOC(838, 836) 558#define QPC_RX_REQ_RNR QPC_FIELD_LOC(839, 839) 559#define QPC_RX_REQ_EPSN QPC_FIELD_LOC(863, 840) 560#define QPC_RQ_RNR_TIMER QPC_FIELD_LOC(895, 864) 561#define QPC_RX_MSG_LEN QPC_FIELD_LOC(927, 896) 562#define QPC_RX_RKEY_PKT_INFO QPC_FIELD_LOC(959, 928) 563#define QPC_RX_VA QPC_FIELD_LOC(1023, 960) 564#define QPC_TRRL_HEAD_MAX QPC_FIELD_LOC(1031, 1024) 565#define QPC_TRRL_TAIL_MAX QPC_FIELD_LOC(1039, 1032) 566#define QPC_TRRL_BA_L QPC_FIELD_LOC(1055, 1040) 567#define QPC_TRRL_BA_M QPC_FIELD_LOC(1087, 1056) 568#define QPC_TRRL_BA_H QPC_FIELD_LOC(1099, 1088) 569#define QPC_RR_MAX QPC_FIELD_LOC(1102, 1100) 570#define QPC_RQ_RTY_WAIT_DO QPC_FIELD_LOC(1103, 1103) 571#define QPC_RAQ_TRRL_HEAD QPC_FIELD_LOC(1111, 1104) 572#define QPC_RAQ_TRRL_TAIL QPC_FIELD_LOC(1119, 1112) 573#define QPC_RAQ_RTY_INI_PSN QPC_FIELD_LOC(1143, 1120) 574#define QPC_CIRE_SLV_RQ_EN QPC_FIELD_LOC(1144, 1144) 575#define QPC_RAQ_CREDIT QPC_FIELD_LOC(1149, 1145) 576#define QPC_RQ_DB_IN_EXT QPC_FIELD_LOC(1150, 1150) 577#define QPC_RESP_RTY_FLG QPC_FIELD_LOC(1151, 1151) 578#define QPC_RAQ_MSN QPC_FIELD_LOC(1175, 1152) 579#define QPC_RAQ_SYNDROME QPC_FIELD_LOC(1183, 1176) 580#define QPC_RAQ_PSN QPC_FIELD_LOC(1207, 1184) 581#define QPC_RAQ_TRRL_RTY_HEAD QPC_FIELD_LOC(1215, 1208) 582#define QPC_RAQ_USE_PKTN QPC_FIELD_LOC(1239, 1216) 583#define QPC_RQ_SCC_TOKEN QPC_FIELD_LOC(1245, 1240) 584#define QPC_RVD10 QPC_FIELD_LOC(1247, 1246) 585#define QPC_SQ_PRODUCER_IDX QPC_FIELD_LOC(1263, 1248) 586#define QPC_SQ_CONSUMER_IDX QPC_FIELD_LOC(1279, 1264) 587#define QPC_SQ_CUR_BLK_ADDR_L QPC_FIELD_LOC(1311, 1280) 588#define QPC_SQ_CUR_BLK_ADDR_H QPC_FIELD_LOC(1331, 1312) 589#define QPC_MSG_RTY_LP_FLG QPC_FIELD_LOC(1332, 1332) 590#define QPC_SQ_INVLD_FLG QPC_FIELD_LOC(1333, 1333) 591#define QPC_LP_SGEN_INI QPC_FIELD_LOC(1335, 1334) 592#define QPC_SQ_VLAN_EN QPC_FIELD_LOC(1336, 1336) 593#define QPC_POLL_DB_WAIT_DO QPC_FIELD_LOC(1337, 1337) 594#define QPC_SCC_TOKEN_FORBID_SQ_DEQ QPC_FIELD_LOC(1338, 1338) 595#define QPC_WAIT_ACK_TIMEOUT QPC_FIELD_LOC(1339, 1339) 596#define QPC_IRRL_IDX_LSB QPC_FIELD_LOC(1343, 1340) 597#define QPC_ACK_REQ_FREQ QPC_FIELD_LOC(1349, 1344) 598#define QPC_MSG_RNR_FLG QPC_FIELD_LOC(1350, 1350) 599#define QPC_FRE QPC_FIELD_LOC(1351, 1351) 600#define QPC_SQ_CUR_PSN QPC_FIELD_LOC(1375, 1352) 601#define QPC_MSG_USE_PKTN QPC_FIELD_LOC(1399, 1376) 602#define QPC_IRRL_HEAD_PRE QPC_FIELD_LOC(1407, 1400) 603#define QPC_SQ_CUR_SGE_BLK_ADDR_L QPC_FIELD_LOC(1439, 1408) 604#define QPC_SQ_CUR_SGE_BLK_ADDR_H QPC_FIELD_LOC(1459, 1440) 605#define QPC_IRRL_IDX_MSB QPC_FIELD_LOC(1471, 1460) 606#define QPC_CUR_SGE_OFFSET QPC_FIELD_LOC(1503, 1472) 607#define QPC_CUR_SGE_IDX QPC_FIELD_LOC(1527, 1504) 608#define QPC_EXT_SGE_NUM_LEFT QPC_FIELD_LOC(1535, 1528) 609#define QPC_OWNER_MODE QPC_FIELD_LOC(1536, 1536) 610#define QPC_CIRE_SLV_SQ_EN QPC_FIELD_LOC(1537, 1537) 611#define QPC_CIRE_DOING QPC_FIELD_LOC(1538, 1538) 612#define QPC_CIRE_RESULT QPC_FIELD_LOC(1539, 1539) 613#define QPC_OWNER_DB_WAIT_DO QPC_FIELD_LOC(1540, 1540) 614#define QPC_SQ_WQE_INVLD QPC_FIELD_LOC(1541, 1541) 615#define QPC_DCA_MODE QPC_FIELD_LOC(1542, 1542) 616#define QPC_RTY_OWNER_NOCHK QPC_FIELD_LOC(1543, 1543) 617#define QPC_V2_IRRL_HEAD QPC_FIELD_LOC(1543, 1536) 618#define QPC_SQ_MAX_PSN QPC_FIELD_LOC(1567, 1544) 619#define QPC_SQ_MAX_IDX QPC_FIELD_LOC(1583, 1568) 620#define QPC_LCL_OPERATED_CNT QPC_FIELD_LOC(1599, 1584) 621#define QPC_IRRL_BA_L QPC_FIELD_LOC(1631, 1600) 622#define QPC_IRRL_BA_H QPC_FIELD_LOC(1657, 1632) 623#define QPC_PKT_RNR_FLG QPC_FIELD_LOC(1658, 1658) 624#define QPC_PKT_RTY_FLG QPC_FIELD_LOC(1659, 1659) 625#define QPC_RMT_E2E QPC_FIELD_LOC(1660, 1660) 626#define QPC_SR_MAX QPC_FIELD_LOC(1663, 1661) 627#define QPC_LSN QPC_FIELD_LOC(1687, 1664) 628#define QPC_RETRY_NUM_INIT QPC_FIELD_LOC(1690, 1688) 629#define QPC_CHECK_FLG QPC_FIELD_LOC(1692, 1691) 630#define QPC_RETRY_CNT QPC_FIELD_LOC(1695, 1693) 631#define QPC_SQ_TIMER QPC_FIELD_LOC(1727, 1696) 632#define QPC_RETRY_MSG_MSN QPC_FIELD_LOC(1743, 1728) 633#define QPC_RETRY_MSG_PSN_L QPC_FIELD_LOC(1759, 1744) 634#define QPC_RETRY_MSG_PSN_H QPC_FIELD_LOC(1767, 1760) 635#define QPC_RETRY_MSG_FPKT_PSN QPC_FIELD_LOC(1791, 1768) 636#define QPC_RX_SQ_CUR_BLK_ADDR_L QPC_FIELD_LOC(1823, 1792) 637#define QPC_RX_SQ_CUR_BLK_ADDR_H QPC_FIELD_LOC(1843, 1824) 638#define QPC_IRRL_SGE_IDX QPC_FIELD_LOC(1851, 1844) 639#define QPC_LSAN_EN QPC_FIELD_LOC(1852, 1852) 640#define QPC_SO_LP_VLD QPC_FIELD_LOC(1853, 1853) 641#define QPC_FENCE_LP_VLD QPC_FIELD_LOC(1854, 1854) 642#define QPC_IRRL_LP_VLD QPC_FIELD_LOC(1855, 1855) 643#define QPC_IRRL_CUR_SGE_OFFSET QPC_FIELD_LOC(1887, 1856) 644#define QPC_IRRL_TAIL_REAL QPC_FIELD_LOC(1895, 1888) 645#define QPC_IRRL_TAIL_RD QPC_FIELD_LOC(1903, 1896) 646#define QPC_RX_ACK_MSN QPC_FIELD_LOC(1919, 1904) 647#define QPC_RX_ACK_EPSN QPC_FIELD_LOC(1943, 1920) 648#define QPC_RNR_NUM_INIT QPC_FIELD_LOC(1946, 1944) 649#define QPC_RNR_CNT QPC_FIELD_LOC(1949, 1947) 650#define QPC_LCL_OP_FLG QPC_FIELD_LOC(1950, 1950) 651#define QPC_IRRL_RD_FLG QPC_FIELD_LOC(1951, 1951) 652#define QPC_IRRL_PSN QPC_FIELD_LOC(1975, 1952) 653#define QPC_ACK_PSN_ERR QPC_FIELD_LOC(1976, 1976) 654#define QPC_ACK_LAST_OPTYPE QPC_FIELD_LOC(1978, 1977) 655#define QPC_IRRL_PSN_VLD QPC_FIELD_LOC(1979, 1979) 656#define QPC_RNR_RETRY_FLAG QPC_FIELD_LOC(1980, 1980) 657#define QPC_SQ_RTY_TX_ERR QPC_FIELD_LOC(1981, 1981) 658#define QPC_LAST_IND QPC_FIELD_LOC(1982, 1982) 659#define QPC_CQ_ERR_IND QPC_FIELD_LOC(1983, 1983) 660#define QPC_TX_CQN QPC_FIELD_LOC(2007, 1984) 661#define QPC_SIG_TYPE QPC_FIELD_LOC(2008, 2008) 662#define QPC_ERR_TYPE QPC_FIELD_LOC(2015, 2009) 663#define QPC_RQ_CQE_IDX QPC_FIELD_LOC(2031, 2016) 664#define QPC_SQ_FLUSH_IDX QPC_FIELD_LOC(2047, 2032) 665 666#define RETRY_MSG_PSN_SHIFT 16 667 668#define QPCEX_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_qp_context_ex, h, l) 669 670#define QPCEX_CONG_ALG_SEL QPCEX_FIELD_LOC(0, 0) 671#define QPCEX_CONG_ALG_SUB_SEL QPCEX_FIELD_LOC(1, 1) 672#define QPCEX_DIP_CTX_IDX_VLD QPCEX_FIELD_LOC(2, 2) 673#define QPCEX_DIP_CTX_IDX QPCEX_FIELD_LOC(22, 3) 674#define QPCEX_SQ_RQ_NOT_FORBID_EN QPCEX_FIELD_LOC(23, 23) 675#define QPCEX_STASH QPCEX_FIELD_LOC(82, 82) 676 677#define SCC_CONTEXT_SIZE 16 678 679struct hns_roce_v2_scc_context { 680 __le32 data[SCC_CONTEXT_SIZE]; 681}; 682 683#define V2_QP_RWE_S 1 /* rdma write enable */ 684#define V2_QP_RRE_S 2 /* rdma read enable */ 685#define V2_QP_ATE_S 3 /* rdma atomic enable */ 686 687struct hns_roce_v2_cqe { 688 __le32 byte_4; 689 union { 690 __le32 rkey; 691 __le32 immtdata; 692 }; 693 __le32 byte_12; 694 __le32 byte_16; 695 __le32 byte_cnt; 696 u8 smac[4]; 697 __le32 byte_28; 698 __le32 byte_32; 699 __le32 rsv[8]; 700}; 701 702#define CQE_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_cqe, h, l) 703 704#define CQE_OPCODE CQE_FIELD_LOC(4, 0) 705#define CQE_RQ_INLINE CQE_FIELD_LOC(5, 5) 706#define CQE_S_R CQE_FIELD_LOC(6, 6) 707#define CQE_OWNER CQE_FIELD_LOC(7, 7) 708#define CQE_STATUS CQE_FIELD_LOC(15, 8) 709#define CQE_WQE_IDX CQE_FIELD_LOC(31, 16) 710#define CQE_RKEY_IMMTDATA CQE_FIELD_LOC(63, 32) 711#define CQE_XRC_SRQN CQE_FIELD_LOC(87, 64) 712#define CQE_RSV0 CQE_FIELD_LOC(95, 88) 713#define CQE_LCL_QPN CQE_FIELD_LOC(119, 96) 714#define CQE_SUB_STATUS CQE_FIELD_LOC(127, 120) 715#define CQE_BYTE_CNT CQE_FIELD_LOC(159, 128) 716#define CQE_SMAC CQE_FIELD_LOC(207, 160) 717#define CQE_PORT_TYPE CQE_FIELD_LOC(209, 208) 718#define CQE_VID CQE_FIELD_LOC(221, 210) 719#define CQE_VID_VLD CQE_FIELD_LOC(222, 222) 720#define CQE_RSV2 CQE_FIELD_LOC(223, 223) 721#define CQE_RMT_QPN CQE_FIELD_LOC(247, 224) 722#define CQE_SL CQE_FIELD_LOC(250, 248) 723#define CQE_PORTN CQE_FIELD_LOC(253, 251) 724#define CQE_GRH CQE_FIELD_LOC(254, 254) 725#define CQE_LPK CQE_FIELD_LOC(255, 255) 726#define CQE_RSV3 CQE_FIELD_LOC(511, 256) 727 728struct hns_roce_v2_mpt_entry { 729 __le32 byte_4_pd_hop_st; 730 __le32 byte_8_mw_cnt_en; 731 __le32 byte_12_mw_pa; 732 __le32 bound_lkey; 733 __le32 len_l; 734 __le32 len_h; 735 __le32 lkey; 736 __le32 va_l; 737 __le32 va_h; 738 __le32 pbl_size; 739 __le32 pbl_ba_l; 740 __le32 byte_48_mode_ba; 741 __le32 pa0_l; 742 __le32 byte_56_pa0_h; 743 __le32 pa1_l; 744 __le32 byte_64_buf_pa1; 745}; 746 747#define MPT_PBL_BUF_ADDR_S 6 748#define MPT_PBL_BA_ADDR_S 3 749 750#define MPT_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_mpt_entry, h, l) 751 752#define MPT_ST MPT_FIELD_LOC(1, 0) 753#define MPT_PBL_HOP_NUM MPT_FIELD_LOC(3, 2) 754#define MPT_PBL_BA_PG_SZ MPT_FIELD_LOC(7, 4) 755#define MPT_PD MPT_FIELD_LOC(31, 8) 756#define MPT_RA_EN MPT_FIELD_LOC(32, 32) 757#define MPT_R_INV_EN MPT_FIELD_LOC(33, 33) 758#define MPT_L_INV_EN MPT_FIELD_LOC(34, 34) 759#define MPT_BIND_EN MPT_FIELD_LOC(35, 35) 760#define MPT_ATOMIC_EN MPT_FIELD_LOC(36, 36) 761#define MPT_RR_EN MPT_FIELD_LOC(37, 37) 762#define MPT_RW_EN MPT_FIELD_LOC(38, 38) 763#define MPT_LW_EN MPT_FIELD_LOC(39, 39) 764#define MPT_MW_CNT MPT_FIELD_LOC(63, 40) 765#define MPT_FRE MPT_FIELD_LOC(64, 64) 766#define MPT_PA MPT_FIELD_LOC(65, 65) 767#define MPT_ZBVA MPT_FIELD_LOC(66, 66) 768#define MPT_SHARE MPT_FIELD_LOC(67, 67) 769#define MPT_MR_MW MPT_FIELD_LOC(68, 68) 770#define MPT_BPD MPT_FIELD_LOC(69, 69) 771#define MPT_BQP MPT_FIELD_LOC(70, 70) 772#define MPT_INNER_PA_VLD MPT_FIELD_LOC(71, 71) 773#define MPT_MW_BIND_QPN MPT_FIELD_LOC(95, 72) 774#define MPT_BOUND_LKEY MPT_FIELD_LOC(127, 96) 775#define MPT_LEN_L MPT_FIELD_LOC(159, 128) 776#define MPT_LEN_H MPT_FIELD_LOC(191, 160) 777#define MPT_LKEY MPT_FIELD_LOC(223, 192) 778#define MPT_VA MPT_FIELD_LOC(287, 224) 779#define MPT_PBL_SIZE MPT_FIELD_LOC(319, 288) 780#define MPT_PBL_BA_L MPT_FIELD_LOC(351, 320) 781#define MPT_PBL_BA_H MPT_FIELD_LOC(380, 352) 782#define MPT_BLK_MODE MPT_FIELD_LOC(381, 381) 783#define MPT_RSV0 MPT_FIELD_LOC(383, 382) 784#define MPT_PA0_L MPT_FIELD_LOC(415, 384) 785#define MPT_PA0_H MPT_FIELD_LOC(441, 416) 786#define MPT_BOUND_VA MPT_FIELD_LOC(447, 442) 787#define MPT_PA1_L MPT_FIELD_LOC(479, 448) 788#define MPT_PA1_H MPT_FIELD_LOC(505, 480) 789#define MPT_PERSIST_EN MPT_FIELD_LOC(506, 506) 790#define MPT_RSV2 MPT_FIELD_LOC(507, 507) 791#define MPT_PBL_BUF_PG_SZ MPT_FIELD_LOC(511, 508) 792 793#define V2_MPT_BYTE_4_MPT_ST_S 0 794#define V2_MPT_BYTE_4_MPT_ST_M GENMASK(1, 0) 795 796#define V2_MPT_BYTE_4_PBL_HOP_NUM_S 2 797#define V2_MPT_BYTE_4_PBL_HOP_NUM_M GENMASK(3, 2) 798 799#define V2_MPT_BYTE_4_PBL_BA_PG_SZ_S 4 800#define V2_MPT_BYTE_4_PBL_BA_PG_SZ_M GENMASK(7, 4) 801 802#define V2_MPT_BYTE_4_PD_S 8 803#define V2_MPT_BYTE_4_PD_M GENMASK(31, 8) 804 805#define V2_MPT_BYTE_8_RA_EN_S 0 806 807#define V2_MPT_BYTE_8_R_INV_EN_S 1 808 809#define V2_MPT_BYTE_8_L_INV_EN_S 2 810 811#define V2_MPT_BYTE_8_BIND_EN_S 3 812 813#define V2_MPT_BYTE_8_ATOMIC_EN_S 4 814 815#define V2_MPT_BYTE_8_RR_EN_S 5 816 817#define V2_MPT_BYTE_8_RW_EN_S 6 818 819#define V2_MPT_BYTE_8_LW_EN_S 7 820 821#define V2_MPT_BYTE_12_FRE_S 0 822 823#define V2_MPT_BYTE_12_PA_S 1 824 825#define V2_MPT_BYTE_12_BPD_S 5 826 827#define V2_MPT_BYTE_12_BQP_S 6 828 829#define V2_MPT_BYTE_12_INNER_PA_VLD_S 7 830 831#define V2_MPT_BYTE_48_PBL_BA_H_S 0 832#define V2_MPT_BYTE_48_PBL_BA_H_M GENMASK(28, 0) 833 834#define V2_MPT_BYTE_48_BLK_MODE_S 29 835 836#define V2_MPT_BYTE_56_PA0_H_S 0 837#define V2_MPT_BYTE_56_PA0_H_M GENMASK(25, 0) 838 839#define V2_MPT_BYTE_64_PA1_H_S 0 840#define V2_MPT_BYTE_64_PA1_H_M GENMASK(25, 0) 841 842#define V2_MPT_BYTE_64_PBL_BUF_PG_SZ_S 28 843#define V2_MPT_BYTE_64_PBL_BUF_PG_SZ_M GENMASK(31, 28) 844 845struct hns_roce_v2_db { 846 __le32 data[2]; 847}; 848 849#define DB_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_db, h, l) 850 851#define DB_TAG DB_FIELD_LOC(23, 0) 852#define DB_CMD DB_FIELD_LOC(27, 24) 853#define DB_FLAG DB_FIELD_LOC(31, 31) 854#define DB_PI DB_FIELD_LOC(47, 32) 855#define DB_SL DB_FIELD_LOC(50, 48) 856#define DB_CQ_CI DB_FIELD_LOC(55, 32) 857#define DB_CQ_NOTIFY DB_FIELD_LOC(56, 56) 858#define DB_CQ_CMD_SN DB_FIELD_LOC(58, 57) 859#define EQ_DB_TAG DB_FIELD_LOC(7, 0) 860#define EQ_DB_CMD DB_FIELD_LOC(17, 16) 861#define EQ_DB_CI DB_FIELD_LOC(55, 32) 862 863#define V2_DB_PRODUCER_IDX_S 0 864#define V2_DB_PRODUCER_IDX_M GENMASK(15, 0) 865 866#define V2_CQ_DB_CONS_IDX_S 0 867#define V2_CQ_DB_CONS_IDX_M GENMASK(23, 0) 868 869struct hns_roce_v2_ud_send_wqe { 870 __le32 byte_4; 871 __le32 msg_len; 872 __le32 immtdata; 873 __le32 byte_16; 874 __le32 byte_20; 875 __le32 byte_24; 876 __le32 qkey; 877 __le32 byte_32; 878 __le32 byte_36; 879 __le32 byte_40; 880 u8 dmac[ETH_ALEN]; 881 u8 sgid_index; 882 u8 smac_index; 883 u8 dgid[GID_LEN_V2]; 884}; 885 886#define UD_SEND_WQE_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_ud_send_wqe, h, l) 887 888#define UD_SEND_WQE_OPCODE UD_SEND_WQE_FIELD_LOC(4, 0) 889#define UD_SEND_WQE_OWNER UD_SEND_WQE_FIELD_LOC(7, 7) 890#define UD_SEND_WQE_CQE UD_SEND_WQE_FIELD_LOC(8, 8) 891#define UD_SEND_WQE_SE UD_SEND_WQE_FIELD_LOC(11, 11) 892#define UD_SEND_WQE_PD UD_SEND_WQE_FIELD_LOC(119, 96) 893#define UD_SEND_WQE_SGE_NUM UD_SEND_WQE_FIELD_LOC(127, 120) 894#define UD_SEND_WQE_MSG_START_SGE_IDX UD_SEND_WQE_FIELD_LOC(151, 128) 895#define UD_SEND_WQE_UDPSPN UD_SEND_WQE_FIELD_LOC(191, 176) 896#define UD_SEND_WQE_DQPN UD_SEND_WQE_FIELD_LOC(247, 224) 897#define UD_SEND_WQE_VLAN UD_SEND_WQE_FIELD_LOC(271, 256) 898#define UD_SEND_WQE_HOPLIMIT UD_SEND_WQE_FIELD_LOC(279, 272) 899#define UD_SEND_WQE_TCLASS UD_SEND_WQE_FIELD_LOC(287, 280) 900#define UD_SEND_WQE_FLOW_LABEL UD_SEND_WQE_FIELD_LOC(307, 288) 901#define UD_SEND_WQE_SL UD_SEND_WQE_FIELD_LOC(311, 308) 902#define UD_SEND_WQE_VLAN_EN UD_SEND_WQE_FIELD_LOC(318, 318) 903#define UD_SEND_WQE_LBI UD_SEND_WQE_FIELD_LOC(319, 319) 904 905struct hns_roce_v2_rc_send_wqe { 906 __le32 byte_4; 907 __le32 msg_len; 908 union { 909 __le32 inv_key; 910 __le32 immtdata; 911 }; 912 __le32 byte_16; 913 __le32 byte_20; 914 __le32 rkey; 915 __le64 va; 916}; 917 918#define RC_SEND_WQE_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_rc_send_wqe, h, l) 919 920#define RC_SEND_WQE_OPCODE RC_SEND_WQE_FIELD_LOC(4, 0) 921#define RC_SEND_WQE_DB_SL_L RC_SEND_WQE_FIELD_LOC(6, 5) 922#define RC_SEND_WQE_DB_SL_H RC_SEND_WQE_FIELD_LOC(14, 13) 923#define RC_SEND_WQE_OWNER RC_SEND_WQE_FIELD_LOC(7, 7) 924#define RC_SEND_WQE_CQE RC_SEND_WQE_FIELD_LOC(8, 8) 925#define RC_SEND_WQE_FENCE RC_SEND_WQE_FIELD_LOC(9, 9) 926#define RC_SEND_WQE_SO RC_SEND_WQE_FIELD_LOC(10, 10) 927#define RC_SEND_WQE_SE RC_SEND_WQE_FIELD_LOC(11, 11) 928#define RC_SEND_WQE_INLINE RC_SEND_WQE_FIELD_LOC(12, 12) 929#define RC_SEND_WQE_WQE_INDEX RC_SEND_WQE_FIELD_LOC(30, 15) 930#define RC_SEND_WQE_FLAG RC_SEND_WQE_FIELD_LOC(31, 31) 931#define RC_SEND_WQE_XRC_SRQN RC_SEND_WQE_FIELD_LOC(119, 96) 932#define RC_SEND_WQE_SGE_NUM RC_SEND_WQE_FIELD_LOC(127, 120) 933#define RC_SEND_WQE_MSG_START_SGE_IDX RC_SEND_WQE_FIELD_LOC(151, 128) 934#define RC_SEND_WQE_INL_TYPE RC_SEND_WQE_FIELD_LOC(159, 159) 935 936struct hns_roce_wqe_frmr_seg { 937 __le32 pbl_size; 938 __le32 byte_40; 939}; 940 941#define FRMR_WQE_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_wqe_frmr_seg, h, l) 942 943#define FRMR_PBL_SIZE FRMR_WQE_FIELD_LOC(31, 0) 944#define FRMR_BLOCK_SIZE FRMR_WQE_FIELD_LOC(35, 32) 945#define FRMR_PBL_BUF_PG_SZ FRMR_WQE_FIELD_LOC(39, 36) 946#define FRMR_BLK_MODE FRMR_WQE_FIELD_LOC(40, 40) 947#define FRMR_ZBVA FRMR_WQE_FIELD_LOC(41, 41) 948#define FRMR_BIND_EN FRMR_WQE_FIELD_LOC(42, 42) 949#define FRMR_ATOMIC FRMR_WQE_FIELD_LOC(43, 43) 950#define FRMR_RR FRMR_WQE_FIELD_LOC(44, 44) 951#define FRMR_RW FRMR_WQE_FIELD_LOC(45, 45) 952#define FRMR_LW FRMR_WQE_FIELD_LOC(46, 46) 953 954struct hns_roce_v2_wqe_data_seg { 955 __le32 len; 956 __le32 lkey; 957 __le64 addr; 958}; 959 960struct hns_roce_query_version { 961 __le16 rocee_vendor_id; 962 __le16 rocee_hw_version; 963 __le32 rsv[5]; 964}; 965 966struct hns_roce_query_fw_info { 967 __le32 fw_ver; 968 __le32 rsv[5]; 969}; 970 971struct hns_roce_func_clear { 972 __le32 rst_funcid_en; 973 __le32 func_done; 974 __le32 rsv[4]; 975}; 976 977#define FUNC_CLEAR_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_func_clear, h, l) 978 979#define FUNC_CLEAR_RST_FUN_DONE FUNC_CLEAR_FIELD_LOC(32, 32) 980 981/* Each physical function manages up to 248 virtual functions, it takes up to 982 * 100ms for each function to execute clear. If an abnormal reset occurs, it is 983 * executed twice at most, so it takes up to 249 * 2 * 100ms. 984 */ 985#define HNS_ROCE_V2_FUNC_CLEAR_TIMEOUT_MSECS (249 * 2 * 100) 986#define HNS_ROCE_V2_READ_FUNC_CLEAR_FLAG_INTERVAL 40 987#define HNS_ROCE_V2_READ_FUNC_CLEAR_FLAG_FAIL_WAIT 20 988 989#define CFG_LLM_A_BA_L CMQ_REQ_FIELD_LOC(31, 0) 990#define CFG_LLM_A_BA_H CMQ_REQ_FIELD_LOC(63, 32) 991#define CFG_LLM_A_DEPTH CMQ_REQ_FIELD_LOC(76, 64) 992#define CFG_LLM_A_PGSZ CMQ_REQ_FIELD_LOC(83, 80) 993#define CFG_LLM_A_INIT_EN CMQ_REQ_FIELD_LOC(84, 84) 994#define CFG_LLM_A_HEAD_BA_L CMQ_REQ_FIELD_LOC(127, 96) 995#define CFG_LLM_A_HEAD_BA_H CMQ_REQ_FIELD_LOC(147, 128) 996#define CFG_LLM_A_HEAD_NXTPTR CMQ_REQ_FIELD_LOC(159, 148) 997#define CFG_LLM_A_HEAD_PTR CMQ_REQ_FIELD_LOC(171, 160) 998#define CFG_LLM_B_TAIL_BA_L CMQ_REQ_FIELD_LOC(31, 0) 999#define CFG_LLM_B_TAIL_BA_H CMQ_REQ_FIELD_LOC(63, 32) 1000#define CFG_LLM_B_TAIL_PTR CMQ_REQ_FIELD_LOC(75, 64) 1001 1002/* Fields of HNS_ROCE_OPC_CFG_GLOBAL_PARAM */ 1003#define CFG_GLOBAL_PARAM_1US_CYCLES CMQ_REQ_FIELD_LOC(9, 0) 1004#define CFG_GLOBAL_PARAM_UDP_PORT CMQ_REQ_FIELD_LOC(31, 16) 1005 1006/* 1007 * Fields of HNS_ROCE_OPC_QUERY_PF_RES, HNS_ROCE_OPC_QUERY_VF_RES 1008 * and HNS_ROCE_OPC_ALLOC_VF_RES 1009 */ 1010#define FUNC_RES_A_VF_ID CMQ_REQ_FIELD_LOC(7, 0) 1011#define FUNC_RES_A_QPC_BT_IDX CMQ_REQ_FIELD_LOC(42, 32) 1012#define FUNC_RES_A_QPC_BT_NUM CMQ_REQ_FIELD_LOC(59, 48) 1013#define FUNC_RES_A_SRQC_BT_IDX CMQ_REQ_FIELD_LOC(72, 64) 1014#define FUNC_RES_A_SRQC_BT_NUM CMQ_REQ_FIELD_LOC(89, 80) 1015#define FUNC_RES_A_CQC_BT_IDX CMQ_REQ_FIELD_LOC(104, 96) 1016#define FUNC_RES_A_CQC_BT_NUM CMQ_REQ_FIELD_LOC(121, 112) 1017#define FUNC_RES_A_MPT_BT_IDX CMQ_REQ_FIELD_LOC(136, 128) 1018#define FUNC_RES_A_MPT_BT_NUM CMQ_REQ_FIELD_LOC(153, 144) 1019#define FUNC_RES_A_EQC_BT_IDX CMQ_REQ_FIELD_LOC(168, 160) 1020#define FUNC_RES_A_EQC_BT_NUM CMQ_REQ_FIELD_LOC(185, 176) 1021#define FUNC_RES_B_SMAC_IDX CMQ_REQ_FIELD_LOC(39, 32) 1022#define FUNC_RES_B_SMAC_NUM CMQ_REQ_FIELD_LOC(48, 40) 1023#define FUNC_RES_B_SGID_IDX CMQ_REQ_FIELD_LOC(71, 64) 1024#define FUNC_RES_B_SGID_NUM CMQ_REQ_FIELD_LOC(80, 72) 1025#define FUNC_RES_B_QID_IDX CMQ_REQ_FIELD_LOC(105, 96) 1026#define FUNC_RES_B_QID_NUM CMQ_REQ_FIELD_LOC(122, 112) 1027#define FUNC_RES_V_QID_NUM CMQ_REQ_FIELD_LOC(115, 112) 1028 1029#define FUNC_RES_B_SCCC_BT_IDX CMQ_REQ_FIELD_LOC(136, 128) 1030#define FUNC_RES_B_SCCC_BT_NUM CMQ_REQ_FIELD_LOC(145, 137) 1031#define FUNC_RES_B_GMV_BT_IDX CMQ_REQ_FIELD_LOC(167, 160) 1032#define FUNC_RES_B_GMV_BT_NUM CMQ_REQ_FIELD_LOC(176, 168) 1033#define FUNC_RES_V_GMV_BT_NUM CMQ_REQ_FIELD_LOC(184, 176) 1034 1035/* Fields of HNS_ROCE_OPC_QUERY_PF_TIMER_RES */ 1036#define PF_TIMER_RES_QPC_ITEM_IDX CMQ_REQ_FIELD_LOC(43, 32) 1037#define PF_TIMER_RES_QPC_ITEM_NUM CMQ_REQ_FIELD_LOC(60, 48) 1038#define PF_TIMER_RES_CQC_ITEM_IDX CMQ_REQ_FIELD_LOC(74, 64) 1039#define PF_TIMER_RES_CQC_ITEM_NUM CMQ_REQ_FIELD_LOC(91, 80) 1040 1041struct hns_roce_vf_switch { 1042 __le32 rocee_sel; 1043 __le32 fun_id; 1044 __le32 cfg; 1045 __le32 resv1; 1046 __le32 resv2; 1047 __le32 resv3; 1048}; 1049 1050#define VF_SWITCH_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_vf_switch, h, l) 1051 1052#define VF_SWITCH_VF_ID VF_SWITCH_FIELD_LOC(42, 35) 1053#define VF_SWITCH_ALW_LPBK VF_SWITCH_FIELD_LOC(65, 65) 1054#define VF_SWITCH_ALW_LCL_LPBK VF_SWITCH_FIELD_LOC(66, 66) 1055#define VF_SWITCH_ALW_DST_OVRD VF_SWITCH_FIELD_LOC(67, 67) 1056 1057struct hns_roce_post_mbox { 1058 __le32 in_param_l; 1059 __le32 in_param_h; 1060 __le32 out_param_l; 1061 __le32 out_param_h; 1062 __le32 cmd_tag; 1063 __le32 token_event_en; 1064}; 1065 1066struct hns_roce_mbox_status { 1067 __le32 mb_status_hw_run; 1068 __le32 rsv[5]; 1069}; 1070 1071#define HNS_ROCE_V2_GO_BIT_TIMEOUT_MSECS 10000 1072 1073#define MB_ST_HW_RUN_M BIT(31) 1074#define MB_ST_COMPLETE_M GENMASK(7, 0) 1075 1076#define MB_ST_COMPLETE_SUCC 1 1077 1078/* Fields of HNS_ROCE_OPC_CFG_BT_ATTR */ 1079#define CFG_BT_ATTR_QPC_BA_PGSZ CMQ_REQ_FIELD_LOC(3, 0) 1080#define CFG_BT_ATTR_QPC_BUF_PGSZ CMQ_REQ_FIELD_LOC(7, 4) 1081#define CFG_BT_ATTR_QPC_HOPNUM CMQ_REQ_FIELD_LOC(9, 8) 1082#define CFG_BT_ATTR_SRQC_BA_PGSZ CMQ_REQ_FIELD_LOC(35, 32) 1083#define CFG_BT_ATTR_SRQC_BUF_PGSZ CMQ_REQ_FIELD_LOC(39, 36) 1084#define CFG_BT_ATTR_SRQC_HOPNUM CMQ_REQ_FIELD_LOC(41, 40) 1085#define CFG_BT_ATTR_CQC_BA_PGSZ CMQ_REQ_FIELD_LOC(67, 64) 1086#define CFG_BT_ATTR_CQC_BUF_PGSZ CMQ_REQ_FIELD_LOC(71, 68) 1087#define CFG_BT_ATTR_CQC_HOPNUM CMQ_REQ_FIELD_LOC(73, 72) 1088#define CFG_BT_ATTR_MPT_BA_PGSZ CMQ_REQ_FIELD_LOC(99, 96) 1089#define CFG_BT_ATTR_MPT_BUF_PGSZ CMQ_REQ_FIELD_LOC(103, 100) 1090#define CFG_BT_ATTR_MPT_HOPNUM CMQ_REQ_FIELD_LOC(105, 104) 1091#define CFG_BT_ATTR_SCCC_BA_PGSZ CMQ_REQ_FIELD_LOC(131, 128) 1092#define CFG_BT_ATTR_SCCC_BUF_PGSZ CMQ_REQ_FIELD_LOC(135, 132) 1093#define CFG_BT_ATTR_SCCC_HOPNUM CMQ_REQ_FIELD_LOC(137, 136) 1094 1095/* Fields of HNS_ROCE_OPC_CFG_ENTRY_SIZE */ 1096#define CFG_HEM_ENTRY_SIZE_TYPE CMQ_REQ_FIELD_LOC(31, 0) 1097enum { 1098 HNS_ROCE_CFG_QPC_SIZE = BIT(0), 1099 HNS_ROCE_CFG_SCCC_SIZE = BIT(1), 1100}; 1101 1102#define CFG_HEM_ENTRY_SIZE_VALUE CMQ_REQ_FIELD_LOC(191, 160) 1103 1104/* Fields of HNS_ROCE_OPC_CFG_GMV_BT */ 1105#define CFG_GMV_BT_BA_L CMQ_REQ_FIELD_LOC(31, 0) 1106#define CFG_GMV_BT_BA_H CMQ_REQ_FIELD_LOC(51, 32) 1107#define CFG_GMV_BT_IDX CMQ_REQ_FIELD_LOC(95, 64) 1108 1109/* Fields of HNS_ROCE_QUERY_RAM_ECC */ 1110#define QUERY_RAM_ECC_1BIT_ERR CMQ_REQ_FIELD_LOC(31, 0) 1111#define QUERY_RAM_ECC_RES_TYPE CMQ_REQ_FIELD_LOC(63, 32) 1112#define QUERY_RAM_ECC_TAG CMQ_REQ_FIELD_LOC(95, 64) 1113 1114struct hns_roce_cfg_sgid_tb { 1115 __le32 table_idx_rsv; 1116 __le32 vf_sgid_l; 1117 __le32 vf_sgid_ml; 1118 __le32 vf_sgid_mh; 1119 __le32 vf_sgid_h; 1120 __le32 vf_sgid_type_rsv; 1121}; 1122 1123#define SGID_TB_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_cfg_sgid_tb, h, l) 1124 1125#define CFG_SGID_TB_TABLE_IDX SGID_TB_FIELD_LOC(7, 0) 1126#define CFG_SGID_TB_VF_SGID_TYPE SGID_TB_FIELD_LOC(161, 160) 1127 1128struct hns_roce_cfg_smac_tb { 1129 __le32 tb_idx_rsv; 1130 __le32 vf_smac_l; 1131 __le32 vf_smac_h_rsv; 1132 __le32 rsv[3]; 1133}; 1134 1135#define SMAC_TB_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_cfg_smac_tb, h, l) 1136 1137#define CFG_SMAC_TB_IDX SMAC_TB_FIELD_LOC(7, 0) 1138#define CFG_SMAC_TB_VF_SMAC_H SMAC_TB_FIELD_LOC(79, 64) 1139 1140struct hns_roce_cfg_gmv_tb_a { 1141 __le32 vf_sgid_l; 1142 __le32 vf_sgid_ml; 1143 __le32 vf_sgid_mh; 1144 __le32 vf_sgid_h; 1145 __le32 vf_sgid_type_vlan; 1146 __le32 resv; 1147}; 1148 1149#define GMV_TB_A_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_cfg_gmv_tb_a, h, l) 1150 1151#define GMV_TB_A_VF_SGID_TYPE GMV_TB_A_FIELD_LOC(129, 128) 1152#define GMV_TB_A_VF_VLAN_EN GMV_TB_A_FIELD_LOC(130, 130) 1153#define GMV_TB_A_VF_VLAN_ID GMV_TB_A_FIELD_LOC(155, 144) 1154 1155struct hns_roce_cfg_gmv_tb_b { 1156 __le32 vf_smac_l; 1157 __le32 vf_smac_h; 1158 __le32 table_idx_rsv; 1159 __le32 resv[3]; 1160}; 1161 1162#define GMV_TB_B_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_cfg_gmv_tb_b, h, l) 1163 1164#define GMV_TB_B_SMAC_H GMV_TB_B_FIELD_LOC(47, 32) 1165#define GMV_TB_B_SGID_IDX GMV_TB_B_FIELD_LOC(71, 64) 1166 1167#define HNS_ROCE_QUERY_PF_CAPS_CMD_NUM_HIP08 5 1168#define HNS_ROCE_QUERY_PF_CAPS_CMD_NUM 6 1169struct hns_roce_query_pf_caps_a { 1170 u8 number_ports; 1171 u8 local_ca_ack_delay; 1172 __le16 max_sq_sg; 1173 __le16 max_sq_inline; 1174 __le16 max_rq_sg; 1175 __le32 rsv0; 1176 __le16 num_qpc_timer; 1177 __le16 num_cqc_timer; 1178 __le16 max_srq_sges; 1179 u8 num_aeq_vectors; 1180 u8 num_other_vectors; 1181 u8 max_sq_desc_sz; 1182 u8 max_rq_desc_sz; 1183 u8 rsv1; 1184 u8 cqe_sz; 1185}; 1186 1187struct hns_roce_query_pf_caps_b { 1188 u8 mtpt_entry_sz; 1189 u8 irrl_entry_sz; 1190 u8 trrl_entry_sz; 1191 u8 cqc_entry_sz; 1192 u8 srqc_entry_sz; 1193 u8 idx_entry_sz; 1194 u8 sccc_sz; 1195 u8 max_mtu; 1196 __le16 qpc_sz; 1197 __le16 qpc_timer_entry_sz; 1198 __le16 cqc_timer_entry_sz; 1199 u8 min_cqes; 1200 u8 min_wqes; 1201 __le32 page_size_cap; 1202 u8 pkey_table_len; 1203 u8 phy_num_uars; 1204 u8 ctx_hop_num; 1205 u8 pbl_hop_num; 1206}; 1207 1208struct hns_roce_query_pf_caps_c { 1209 __le32 cap_flags_num_pds; 1210 __le32 max_gid_num_cqs; 1211 __le32 cq_depth; 1212 __le32 num_mrws; 1213 __le32 ord_num_qps; 1214 __le16 sq_depth; 1215 __le16 rq_depth; 1216}; 1217 1218#define PF_CAPS_C_FIELD_LOC(h, l) \ 1219 FIELD_LOC(struct hns_roce_query_pf_caps_c, h, l) 1220 1221#define PF_CAPS_C_NUM_PDS PF_CAPS_C_FIELD_LOC(19, 0) 1222#define PF_CAPS_C_CAP_FLAGS PF_CAPS_C_FIELD_LOC(31, 20) 1223#define PF_CAPS_C_NUM_CQS PF_CAPS_C_FIELD_LOC(51, 32) 1224#define PF_CAPS_C_MAX_GID PF_CAPS_C_FIELD_LOC(60, 52) 1225#define PF_CAPS_C_CQ_DEPTH PF_CAPS_C_FIELD_LOC(86, 64) 1226#define PF_CAPS_C_NUM_XRCDS PF_CAPS_C_FIELD_LOC(91, 87) 1227#define PF_CAPS_C_NUM_MRWS PF_CAPS_C_FIELD_LOC(115, 96) 1228#define PF_CAPS_C_NUM_QPS PF_CAPS_C_FIELD_LOC(147, 128) 1229#define PF_CAPS_C_MAX_ORD PF_CAPS_C_FIELD_LOC(155, 148) 1230 1231struct hns_roce_query_pf_caps_d { 1232 __le32 wq_hop_num_max_srqs; 1233 __le16 srq_depth; 1234 __le16 cap_flags_ex; 1235 __le32 num_ceqs_ceq_depth; 1236 __le32 arm_st_aeq_depth; 1237 __le32 num_uars_rsv_pds; 1238 __le32 rsv_uars_rsv_qps; 1239}; 1240 1241#define PF_CAPS_D_FIELD_LOC(h, l) \ 1242 FIELD_LOC(struct hns_roce_query_pf_caps_d, h, l) 1243 1244#define PF_CAPS_D_NUM_SRQS PF_CAPS_D_FIELD_LOC(19, 0) 1245#define PF_CAPS_D_RQWQE_HOP_NUM PF_CAPS_D_FIELD_LOC(21, 20) 1246#define PF_CAPS_D_EX_SGE_HOP_NUM PF_CAPS_D_FIELD_LOC(23, 22) 1247#define PF_CAPS_D_SQWQE_HOP_NUM PF_CAPS_D_FIELD_LOC(25, 24) 1248#define PF_CAPS_D_CONG_CAP PF_CAPS_D_FIELD_LOC(29, 26) 1249#define PF_CAPS_D_CEQ_DEPTH PF_CAPS_D_FIELD_LOC(85, 64) 1250#define PF_CAPS_D_NUM_CEQS PF_CAPS_D_FIELD_LOC(95, 86) 1251#define PF_CAPS_D_AEQ_DEPTH PF_CAPS_D_FIELD_LOC(117, 96) 1252#define PF_CAPS_D_AEQ_ARM_ST PF_CAPS_D_FIELD_LOC(119, 118) 1253#define PF_CAPS_D_CEQ_ARM_ST PF_CAPS_D_FIELD_LOC(121, 120) 1254#define PF_CAPS_D_DEFAULT_ALG PF_CAPS_D_FIELD_LOC(127, 122) 1255#define PF_CAPS_D_RSV_PDS PF_CAPS_D_FIELD_LOC(147, 128) 1256#define PF_CAPS_D_NUM_UARS PF_CAPS_D_FIELD_LOC(155, 148) 1257#define PF_CAPS_D_RSV_QPS PF_CAPS_D_FIELD_LOC(179, 160) 1258#define PF_CAPS_D_RSV_UARS PF_CAPS_D_FIELD_LOC(187, 180) 1259 1260#define HNS_ROCE_CAP_FLAGS_EX_SHIFT 12 1261 1262struct hns_roce_congestion_algorithm { 1263 u8 alg_sel; 1264 u8 alg_sub_sel; 1265 u8 dip_vld; 1266 u8 wnd_mode_sel; 1267}; 1268 1269struct hns_roce_query_pf_caps_e { 1270 __le32 chunk_size_shift_rsv_mrws; 1271 __le32 rsv_cqs; 1272 __le32 rsv_srqs; 1273 __le32 rsv_lkey; 1274 __le16 ceq_max_cnt; 1275 __le16 ceq_period; 1276 __le16 aeq_max_cnt; 1277 __le16 aeq_period; 1278}; 1279 1280struct hns_roce_query_pf_caps_f { 1281 __le32 max_ack_req_msg_len; 1282 __le32 rsv[5]; 1283}; 1284 1285#define PF_CAPS_E_FIELD_LOC(h, l) \ 1286 FIELD_LOC(struct hns_roce_query_pf_caps_e, h, l) 1287 1288#define PF_CAPS_E_RSV_MRWS PF_CAPS_E_FIELD_LOC(19, 0) 1289#define PF_CAPS_E_CHUNK_SIZE_SHIFT PF_CAPS_E_FIELD_LOC(31, 20) 1290#define PF_CAPS_E_RSV_CQS PF_CAPS_E_FIELD_LOC(51, 32) 1291#define PF_CAPS_E_RSV_XRCDS PF_CAPS_E_FIELD_LOC(63, 52) 1292#define PF_CAPS_E_RSV_SRQS PF_CAPS_E_FIELD_LOC(83, 64) 1293#define PF_CAPS_E_RSV_LKEYS PF_CAPS_E_FIELD_LOC(115, 96) 1294 1295struct hns_roce_cmq_req { 1296 __le32 data[6]; 1297}; 1298 1299#define CMQ_REQ_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_cmq_req, h, l) 1300 1301struct hns_roce_cmq_desc { 1302 __le16 opcode; 1303 __le16 flag; 1304 __le16 retval; 1305 __le16 rsv; 1306 union { 1307 __le32 data[6]; 1308 struct { 1309 __le32 own_func_num; 1310 __le32 own_mac_id; 1311 __le32 rsv[4]; 1312 } func_info; 1313 }; 1314}; 1315 1316struct hns_roce_v2_cmq_ring { 1317 dma_addr_t desc_dma_addr; 1318 struct hns_roce_cmq_desc *desc; 1319 u32 head; 1320 u16 buf_size; 1321 u16 desc_num; 1322 u8 flag; 1323 spinlock_t lock; /* command queue lock */ 1324}; 1325 1326struct hns_roce_v2_cmq { 1327 struct hns_roce_v2_cmq_ring csq; 1328 u16 tx_timeout; 1329}; 1330 1331struct hns_roce_link_table { 1332 struct hns_roce_buf_list table; 1333 struct hns_roce_buf *buf; 1334}; 1335 1336#define HNS_ROCE_EXT_LLM_ENTRY(addr, id) (((id) << (64 - 12)) | ((addr) >> 12)) 1337#define HNS_ROCE_EXT_LLM_MIN_PAGES(que_num) ((que_num) * 4 + 2) 1338 1339struct hns_roce_v2_free_mr { 1340 struct hns_roce_qp *rsv_qp[HNS_ROCE_FREE_MR_USED_QP_NUM]; 1341 struct hns_roce_cq *rsv_cq; 1342 struct hns_roce_pd *rsv_pd; 1343 struct mutex mutex; 1344}; 1345 1346struct hns_roce_v2_priv { 1347 struct hnae3_handle *handle; 1348 struct hns_roce_v2_cmq cmq; 1349 struct hns_roce_link_table ext_llm; 1350 struct hns_roce_v2_free_mr free_mr; 1351}; 1352 1353struct hns_roce_dip { 1354 u8 dgid[GID_LEN_V2]; 1355 u32 dip_idx; 1356 u32 qp_cnt; 1357}; 1358 1359struct fmea_ram_ecc { 1360 u32 is_ecc_err; 1361 u32 res_type; 1362 u32 index; 1363}; 1364 1365/* only for RNR timeout issue of HIP08 */ 1366#define HNS_ROCE_CLOCK_ADJUST 1000 1367#define HNS_ROCE_MAX_CQ_PERIOD_HIP08 65 1368#define HNS_ROCE_MAX_EQ_PERIOD 65 1369#define HNS_ROCE_RNR_TIMER_10NS 1 1370#define HNS_ROCE_1US_CFG 999 1371#define HNS_ROCE_1NS_CFG 0 1372 1373#define HNS_ROCE_AEQ_DEFAULT_BURST_NUM 0x0 1374#define HNS_ROCE_AEQ_DEFAULT_INTERVAL 0x0 1375#define HNS_ROCE_CEQ_DEFAULT_BURST_NUM 0x0 1376#define HNS_ROCE_CEQ_DEFAULT_INTERVAL 0x0 1377 1378#define HNS_ROCE_V2_EQ_STATE_INVALID 0 1379#define HNS_ROCE_V2_EQ_STATE_VALID 1 1380#define HNS_ROCE_V2_EQ_STATE_OVERFLOW 2 1381#define HNS_ROCE_V2_EQ_STATE_FAILURE 3 1382 1383#define HNS_ROCE_V2_EQ_OVER_IGNORE_0 0 1384#define HNS_ROCE_V2_EQ_OVER_IGNORE_1 1 1385 1386#define HNS_ROCE_V2_EQ_COALESCE_0 0 1387#define HNS_ROCE_V2_EQ_COALESCE_1 1 1388 1389#define HNS_ROCE_V2_EQ_FIRED 0 1390#define HNS_ROCE_V2_EQ_ARMED 1 1391#define HNS_ROCE_V2_EQ_ALWAYS_ARMED 3 1392 1393#define HNS_ROCE_EQ_INIT_EQE_CNT 0 1394#define HNS_ROCE_EQ_INIT_PROD_IDX 0 1395#define HNS_ROCE_EQ_INIT_REPORT_TIMER 0 1396#define HNS_ROCE_EQ_INIT_MSI_IDX 0 1397#define HNS_ROCE_EQ_INIT_CONS_IDX 0 1398#define HNS_ROCE_EQ_INIT_NXT_EQE_BA 0 1399 1400#define HNS_ROCE_V2_COMP_EQE_NUM 0x1000 1401#define HNS_ROCE_V2_ASYNC_EQE_NUM 0x1000 1402 1403#define HNS_ROCE_V2_VF_INT_ST_AEQ_OVERFLOW_S 0 1404 1405#define HNS_ROCE_EQ_DB_CMD_AEQ 0x0 1406#define HNS_ROCE_EQ_DB_CMD_AEQ_ARMED 0x1 1407#define HNS_ROCE_EQ_DB_CMD_CEQ 0x2 1408#define HNS_ROCE_EQ_DB_CMD_CEQ_ARMED 0x3 1409 1410#define EQ_ENABLE 1 1411#define EQ_DISABLE 0 1412 1413#define EQ_REG_OFFSET 0x4 1414 1415#define HNS_ROCE_INT_NAME_LEN 32 1416#define HNS_ROCE_V2_EQN_M GENMASK(23, 0) 1417 1418#define HNS_ROCE_V2_VF_ABN_INT_EN_S 0 1419#define HNS_ROCE_V2_VF_ABN_INT_EN_M GENMASK(0, 0) 1420#define HNS_ROCE_V2_VF_ABN_INT_ST_M GENMASK(2, 0) 1421#define HNS_ROCE_V2_VF_ABN_INT_CFG_M GENMASK(2, 0) 1422#define HNS_ROCE_V2_VF_EVENT_INT_EN_M GENMASK(0, 0) 1423 1424struct hns_roce_eq_context { 1425 __le32 data[16]; 1426}; 1427 1428#define EQC_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_eq_context, h, l) 1429 1430#define EQC_EQ_ST EQC_FIELD_LOC(1, 0) 1431#define EQC_EQE_HOP_NUM EQC_FIELD_LOC(3, 2) 1432#define EQC_OVER_IGNORE EQC_FIELD_LOC(4, 4) 1433#define EQC_COALESCE EQC_FIELD_LOC(5, 5) 1434#define EQC_ARM_ST EQC_FIELD_LOC(7, 6) 1435#define EQC_EQN EQC_FIELD_LOC(15, 8) 1436#define EQC_EQE_CNT EQC_FIELD_LOC(31, 16) 1437#define EQC_EQE_BA_PG_SZ EQC_FIELD_LOC(35, 32) 1438#define EQC_EQE_BUF_PG_SZ EQC_FIELD_LOC(39, 36) 1439#define EQC_EQ_PROD_INDX EQC_FIELD_LOC(63, 40) 1440#define EQC_EQ_MAX_CNT EQC_FIELD_LOC(79, 64) 1441#define EQC_EQ_PERIOD EQC_FIELD_LOC(95, 80) 1442#define EQC_EQE_REPORT_TIMER EQC_FIELD_LOC(127, 96) 1443#define EQC_EQE_BA_L EQC_FIELD_LOC(159, 128) 1444#define EQC_EQE_BA_H EQC_FIELD_LOC(188, 160) 1445#define EQC_SHIFT EQC_FIELD_LOC(199, 192) 1446#define EQC_MSI_INDX EQC_FIELD_LOC(207, 200) 1447#define EQC_CUR_EQE_BA_L EQC_FIELD_LOC(223, 208) 1448#define EQC_CUR_EQE_BA_M EQC_FIELD_LOC(255, 224) 1449#define EQC_CUR_EQE_BA_H EQC_FIELD_LOC(259, 256) 1450#define EQC_EQ_CONS_INDX EQC_FIELD_LOC(287, 264) 1451#define EQC_NEX_EQE_BA_L EQC_FIELD_LOC(319, 288) 1452#define EQC_NEX_EQE_BA_H EQC_FIELD_LOC(339, 320) 1453#define EQC_EQE_SIZE EQC_FIELD_LOC(341, 340) 1454 1455#define MAX_SERVICE_LEVEL 0x7 1456 1457struct hns_roce_wqe_atomic_seg { 1458 __le64 fetchadd_swap_data; 1459 __le64 cmp_data; 1460}; 1461 1462struct hns_roce_sccc_clr { 1463 __le32 qpn; 1464 __le32 rsv[5]; 1465}; 1466 1467struct hns_roce_sccc_clr_done { 1468 __le32 clr_done; 1469 __le32 rsv[5]; 1470}; 1471 1472struct hns_roce_bond_info { 1473 __le32 bond_id; 1474 __le32 bond_mode; 1475 __le32 active_slave_cnt; 1476 __le32 active_slave_mask; 1477 __le32 slave_mask; 1478 __le32 hash_policy; 1479}; 1480 1481struct hns_roce_dev 1482 *hns_roce_bond_init_client(struct hns_roce_bond_group *bond_grp, 1483 int func_idx); 1484void hns_roce_bond_uninit_client(struct hns_roce_bond_group *bond_grp, 1485 int func_idx); 1486int hns_roce_v2_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata); 1487int hns_roce_cmd_bond(struct hns_roce_bond_group *bond_grp, 1488 enum hns_roce_bond_cmd_type bond_type); 1489 1490static inline void hns_roce_write64(struct hns_roce_dev *hr_dev, __le32 val[2], 1491 void __iomem *dest) 1492{ 1493 struct hns_roce_v2_priv *priv = hr_dev->priv; 1494 struct hnae3_handle *handle = priv->handle; 1495 const struct hnae3_ae_ops *ops = handle->ae_algo->ops; 1496 1497 if (!hr_dev->dis_db && !ops->get_hw_reset_stat(handle)) 1498 hns_roce_write64_k(val, dest); 1499} 1500 1501#endif
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