rw.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Copyright (c) 2016 HGST, a Western Digital Company.
  4 */
  5#include <linux/memremap.h>
  6#include <linux/moduleparam.h>
  7#include <linux/slab.h>
  8#include <linux/pci-p2pdma.h>
  9#include <rdma/mr_pool.h>
 10#include <rdma/rw.h>
 11
 12enum {
 13	RDMA_RW_SINGLE_WR,
 14	RDMA_RW_MULTI_WR,
 15	RDMA_RW_MR,
 16	RDMA_RW_SIG_MR,
 17};
 18
 19static bool rdma_rw_force_mr;
 20module_param_named(force_mr, rdma_rw_force_mr, bool, 0);
 21MODULE_PARM_DESC(force_mr, "Force usage of MRs for RDMA READ/WRITE operations");
 22
 23/*
 24 * Report whether memory registration should be used. Memory registration must
 25 * be used for iWarp devices because of iWARP-specific limitations. Memory
 26 * registration is also enabled if registering memory might yield better
 27 * performance than using multiple SGE entries, see rdma_rw_io_needs_mr()
 28 */
 29static inline bool rdma_rw_can_use_mr(struct ib_device *dev, u32 port_num)
 30{
 31	if (rdma_protocol_iwarp(dev, port_num))
 32		return true;
 33	if (dev->attrs.max_sgl_rd)
 34		return true;
 35	if (unlikely(rdma_rw_force_mr))
 36		return true;
 37	return false;
 38}
 39
 40/*
 41 * Check if the device will use memory registration for this RW operation.
 42 * For RDMA READs we must use MRs on iWarp and can optionally use them as an
 43 * optimization otherwise.  Additionally we have a debug option to force usage
 44 * of MRs to help testing this code path.
 45 */
 46static inline bool rdma_rw_io_needs_mr(struct ib_device *dev, u32 port_num,
 47		enum dma_data_direction dir, int dma_nents)
 48{
 49	if (dir == DMA_FROM_DEVICE) {
 50		if (rdma_protocol_iwarp(dev, port_num))
 51			return true;
 52		if (dev->attrs.max_sgl_rd && dma_nents > dev->attrs.max_sgl_rd)
 53			return true;
 54	}
 55	if (unlikely(rdma_rw_force_mr))
 56		return true;
 57	return false;
 58}
 59
 60static inline u32 rdma_rw_fr_page_list_len(struct ib_device *dev,
 61					   bool pi_support)
 62{
 63	u32 max_pages;
 64
 65	if (pi_support)
 66		max_pages = dev->attrs.max_pi_fast_reg_page_list_len;
 67	else
 68		max_pages = dev->attrs.max_fast_reg_page_list_len;
 69
 70	/* arbitrary limit to avoid allocating gigantic resources */
 71	return min_t(u32, max_pages, 256);
 72}
 73
 74static inline int rdma_rw_inv_key(struct rdma_rw_reg_ctx *reg)
 75{
 76	int count = 0;
 77
 78	if (reg->mr->need_inval) {
 79		reg->inv_wr.opcode = IB_WR_LOCAL_INV;
 80		reg->inv_wr.ex.invalidate_rkey = reg->mr->lkey;
 81		reg->inv_wr.next = &reg->reg_wr.wr;
 82		count++;
 83	} else {
 84		reg->inv_wr.next = NULL;
 85	}
 86
 87	return count;
 88}
 89
 90/* Caller must have zero-initialized *reg. */
 91static int rdma_rw_init_one_mr(struct ib_qp *qp, u32 port_num,
 92		struct rdma_rw_reg_ctx *reg, struct scatterlist *sg,
 93		u32 sg_cnt, u32 offset)
 94{
 95	u32 pages_per_mr = rdma_rw_fr_page_list_len(qp->pd->device,
 96						    qp->integrity_en);
 97	u32 nents = min(sg_cnt, pages_per_mr);
 98	int count = 0, ret;
 99
100	reg->mr = ib_mr_pool_get(qp, &qp->rdma_mrs);
101	if (!reg->mr)
102		return -EAGAIN;
103
104	count += rdma_rw_inv_key(reg);
105
106	ret = ib_map_mr_sg(reg->mr, sg, nents, &offset, PAGE_SIZE);
107	if (ret < 0 || ret < nents) {
108		ib_mr_pool_put(qp, &qp->rdma_mrs, reg->mr);
109		return -EINVAL;
110	}
111
112	reg->reg_wr.wr.opcode = IB_WR_REG_MR;
113	reg->reg_wr.mr = reg->mr;
114	reg->reg_wr.access = IB_ACCESS_LOCAL_WRITE;
115	if (rdma_protocol_iwarp(qp->device, port_num))
116		reg->reg_wr.access |= IB_ACCESS_REMOTE_WRITE;
117	count++;
118
119	reg->sge.addr = reg->mr->iova;
120	reg->sge.length = reg->mr->length;
121	return count;
122}
123
124static int rdma_rw_init_mr_wrs(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
125		u32 port_num, struct scatterlist *sg, u32 sg_cnt, u32 offset,
126		u64 remote_addr, u32 rkey, enum dma_data_direction dir)
127{
128	struct rdma_rw_reg_ctx *prev = NULL;
129	u32 pages_per_mr = rdma_rw_fr_page_list_len(qp->pd->device,
130						    qp->integrity_en);
131	int i, j, ret = 0, count = 0;
132
133	ctx->nr_ops = DIV_ROUND_UP(sg_cnt, pages_per_mr);
134	ctx->reg = kcalloc(ctx->nr_ops, sizeof(*ctx->reg), GFP_KERNEL);
135	if (!ctx->reg) {
136		ret = -ENOMEM;
137		goto out;
138	}
139
140	for (i = 0; i < ctx->nr_ops; i++) {
141		struct rdma_rw_reg_ctx *reg = &ctx->reg[i];
142		u32 nents = min(sg_cnt, pages_per_mr);
143
144		ret = rdma_rw_init_one_mr(qp, port_num, reg, sg, sg_cnt,
145				offset);
146		if (ret < 0)
147			goto out_free;
148		count += ret;
149
150		if (prev) {
151			if (reg->mr->need_inval)
152				prev->wr.wr.next = &reg->inv_wr;
153			else
154				prev->wr.wr.next = &reg->reg_wr.wr;
155		}
156
157		reg->reg_wr.wr.next = &reg->wr.wr;
158
159		reg->wr.wr.sg_list = &reg->sge;
160		reg->wr.wr.num_sge = 1;
161		reg->wr.remote_addr = remote_addr;
162		reg->wr.rkey = rkey;
163		if (dir == DMA_TO_DEVICE) {
164			reg->wr.wr.opcode = IB_WR_RDMA_WRITE;
165		} else if (!rdma_cap_read_inv(qp->device, port_num)) {
166			reg->wr.wr.opcode = IB_WR_RDMA_READ;
167		} else {
168			reg->wr.wr.opcode = IB_WR_RDMA_READ_WITH_INV;
169			reg->wr.wr.ex.invalidate_rkey = reg->mr->lkey;
170		}
171		count++;
172
173		remote_addr += reg->sge.length;
174		sg_cnt -= nents;
175		for (j = 0; j < nents; j++)
176			sg = sg_next(sg);
177		prev = reg;
178		offset = 0;
179	}
180
181	if (prev)
182		prev->wr.wr.next = NULL;
183
184	ctx->type = RDMA_RW_MR;
185	return count;
186
187out_free:
188	while (--i >= 0)
189		ib_mr_pool_put(qp, &qp->rdma_mrs, ctx->reg[i].mr);
190	kfree(ctx->reg);
191out:
192	return ret;
193}
194
195static int rdma_rw_init_map_wrs(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
196		struct scatterlist *sg, u32 sg_cnt, u32 offset,
197		u64 remote_addr, u32 rkey, enum dma_data_direction dir)
198{
199	u32 max_sge = dir == DMA_TO_DEVICE ? qp->max_write_sge :
200		      qp->max_read_sge;
201	struct ib_sge *sge;
202	u32 total_len = 0, i, j;
203
204	ctx->nr_ops = DIV_ROUND_UP(sg_cnt, max_sge);
205
206	ctx->map.sges = sge = kcalloc(sg_cnt, sizeof(*sge), GFP_KERNEL);
207	if (!ctx->map.sges)
208		goto out;
209
210	ctx->map.wrs = kcalloc(ctx->nr_ops, sizeof(*ctx->map.wrs), GFP_KERNEL);
211	if (!ctx->map.wrs)
212		goto out_free_sges;
213
214	for (i = 0; i < ctx->nr_ops; i++) {
215		struct ib_rdma_wr *rdma_wr = &ctx->map.wrs[i];
216		u32 nr_sge = min(sg_cnt, max_sge);
217
218		if (dir == DMA_TO_DEVICE)
219			rdma_wr->wr.opcode = IB_WR_RDMA_WRITE;
220		else
221			rdma_wr->wr.opcode = IB_WR_RDMA_READ;
222		rdma_wr->remote_addr = remote_addr + total_len;
223		rdma_wr->rkey = rkey;
224		rdma_wr->wr.num_sge = nr_sge;
225		rdma_wr->wr.sg_list = sge;
226
227		for (j = 0; j < nr_sge; j++, sg = sg_next(sg)) {
228			sge->addr = sg_dma_address(sg) + offset;
229			sge->length = sg_dma_len(sg) - offset;
230			sge->lkey = qp->pd->local_dma_lkey;
231
232			total_len += sge->length;
233			sge++;
234			sg_cnt--;
235			offset = 0;
236		}
237
238		rdma_wr->wr.next = i + 1 < ctx->nr_ops ?
239			&ctx->map.wrs[i + 1].wr : NULL;
240	}
241
242	ctx->type = RDMA_RW_MULTI_WR;
243	return ctx->nr_ops;
244
245out_free_sges:
246	kfree(ctx->map.sges);
247out:
248	return -ENOMEM;
249}
250
251static int rdma_rw_init_single_wr(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
252		struct scatterlist *sg, u32 offset, u64 remote_addr, u32 rkey,
253		enum dma_data_direction dir)
254{
255	struct ib_rdma_wr *rdma_wr = &ctx->single.wr;
256
257	ctx->nr_ops = 1;
258
259	ctx->single.sge.lkey = qp->pd->local_dma_lkey;
260	ctx->single.sge.addr = sg_dma_address(sg) + offset;
261	ctx->single.sge.length = sg_dma_len(sg) - offset;
262
263	memset(rdma_wr, 0, sizeof(*rdma_wr));
264	if (dir == DMA_TO_DEVICE)
265		rdma_wr->wr.opcode = IB_WR_RDMA_WRITE;
266	else
267		rdma_wr->wr.opcode = IB_WR_RDMA_READ;
268	rdma_wr->wr.sg_list = &ctx->single.sge;
269	rdma_wr->wr.num_sge = 1;
270	rdma_wr->remote_addr = remote_addr;
271	rdma_wr->rkey = rkey;
272
273	ctx->type = RDMA_RW_SINGLE_WR;
274	return 1;
275}
276
277/**
278 * rdma_rw_ctx_init - initialize a RDMA READ/WRITE context
279 * @ctx:	context to initialize
280 * @qp:		queue pair to operate on
281 * @port_num:	port num to which the connection is bound
282 * @sg:		scatterlist to READ/WRITE from/to
283 * @sg_cnt:	number of entries in @sg
284 * @sg_offset:	current byte offset into @sg
285 * @remote_addr:remote address to read/write (relative to @rkey)
286 * @rkey:	remote key to operate on
287 * @dir:	%DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ
288 *
289 * Returns the number of WQEs that will be needed on the workqueue if
290 * successful, or a negative error code.
291 */
292int rdma_rw_ctx_init(struct rdma_rw_ctx *ctx, struct ib_qp *qp, u32 port_num,
293		struct scatterlist *sg, u32 sg_cnt, u32 sg_offset,
294		u64 remote_addr, u32 rkey, enum dma_data_direction dir)
295{
296	struct ib_device *dev = qp->pd->device;
297	struct sg_table sgt = {
298		.sgl = sg,
299		.orig_nents = sg_cnt,
300	};
301	int ret;
302
303	ret = ib_dma_map_sgtable_attrs(dev, &sgt, dir, 0);
304	if (ret)
305		return ret;
306	sg_cnt = sgt.nents;
307
308	/*
309	 * Skip to the S/G entry that sg_offset falls into:
310	 */
311	for (;;) {
312		u32 len = sg_dma_len(sg);
313
314		if (sg_offset < len)
315			break;
316
317		sg = sg_next(sg);
318		sg_offset -= len;
319		sg_cnt--;
320	}
321
322	ret = -EIO;
323	if (WARN_ON_ONCE(sg_cnt == 0))
324		goto out_unmap_sg;
325
326	if (rdma_rw_io_needs_mr(qp->device, port_num, dir, sg_cnt)) {
327		ret = rdma_rw_init_mr_wrs(ctx, qp, port_num, sg, sg_cnt,
328				sg_offset, remote_addr, rkey, dir);
329		/*
330		 * If MR init succeeded or failed for a reason other
331		 * than pool exhaustion, that result is final.
332		 *
333		 * Pool exhaustion (-EAGAIN) from the max_sgl_rd
334		 * optimization is recoverable: fall back to
335		 * direct SGE posting. iWARP and force_mr require
336		 * MRs unconditionally, so -EAGAIN is terminal.
337		 */
338		if (ret != -EAGAIN ||
339		    rdma_protocol_iwarp(qp->device, port_num) ||
340		    unlikely(rdma_rw_force_mr))
341			goto out;
342	}
343
344	if (sg_cnt > 1)
345		ret = rdma_rw_init_map_wrs(ctx, qp, sg, sg_cnt, sg_offset,
346				remote_addr, rkey, dir);
347	else
348		ret = rdma_rw_init_single_wr(ctx, qp, sg, sg_offset,
349				remote_addr, rkey, dir);
350
351out:
352	if (ret < 0)
353		goto out_unmap_sg;
354	return ret;
355
356out_unmap_sg:
357	ib_dma_unmap_sgtable_attrs(dev, &sgt, dir, 0);
358	return ret;
359}
360EXPORT_SYMBOL(rdma_rw_ctx_init);
361
362/**
363 * rdma_rw_ctx_signature_init - initialize a RW context with signature offload
364 * @ctx:	context to initialize
365 * @qp:		queue pair to operate on
366 * @port_num:	port num to which the connection is bound
367 * @sg:		scatterlist to READ/WRITE from/to
368 * @sg_cnt:	number of entries in @sg
369 * @prot_sg:	scatterlist to READ/WRITE protection information from/to
370 * @prot_sg_cnt: number of entries in @prot_sg
371 * @sig_attrs:	signature offloading algorithms
372 * @remote_addr:remote address to read/write (relative to @rkey)
373 * @rkey:	remote key to operate on
374 * @dir:	%DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ
375 *
376 * Returns the number of WQEs that will be needed on the workqueue if
377 * successful, or a negative error code.
378 */
379int rdma_rw_ctx_signature_init(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
380		u32 port_num, struct scatterlist *sg, u32 sg_cnt,
381		struct scatterlist *prot_sg, u32 prot_sg_cnt,
382		struct ib_sig_attrs *sig_attrs,
383		u64 remote_addr, u32 rkey, enum dma_data_direction dir)
384{
385	struct ib_device *dev = qp->pd->device;
386	u32 pages_per_mr = rdma_rw_fr_page_list_len(qp->pd->device,
387						    qp->integrity_en);
388	struct sg_table sgt = {
389		.sgl = sg,
390		.orig_nents = sg_cnt,
391	};
392	struct sg_table prot_sgt = {
393		.sgl = prot_sg,
394		.orig_nents = prot_sg_cnt,
395	};
396	struct ib_rdma_wr *rdma_wr;
397	int count = 0, ret;
398
399	if (sg_cnt > pages_per_mr || prot_sg_cnt > pages_per_mr) {
400		pr_err("SG count too large: sg_cnt=%u, prot_sg_cnt=%u, pages_per_mr=%u\n",
401		       sg_cnt, prot_sg_cnt, pages_per_mr);
402		return -EINVAL;
403	}
404
405	ret = ib_dma_map_sgtable_attrs(dev, &sgt, dir, 0);
406	if (ret)
407		return ret;
408
409	if (prot_sg_cnt) {
410		ret = ib_dma_map_sgtable_attrs(dev, &prot_sgt, dir, 0);
411		if (ret)
412			goto out_unmap_sg;
413	}
414
415	ctx->type = RDMA_RW_SIG_MR;
416	ctx->nr_ops = 1;
417	ctx->reg = kzalloc(sizeof(*ctx->reg), GFP_KERNEL);
418	if (!ctx->reg) {
419		ret = -ENOMEM;
420		goto out_unmap_prot_sg;
421	}
422
423	ctx->reg->mr = ib_mr_pool_get(qp, &qp->sig_mrs);
424	if (!ctx->reg->mr) {
425		ret = -EAGAIN;
426		goto out_free_ctx;
427	}
428
429	count += rdma_rw_inv_key(ctx->reg);
430
431	memcpy(ctx->reg->mr->sig_attrs, sig_attrs, sizeof(struct ib_sig_attrs));
432
433	ret = ib_map_mr_sg_pi(ctx->reg->mr, sg, sgt.nents, NULL, prot_sg,
434			      prot_sgt.nents, NULL, SZ_4K);
435	if (unlikely(ret)) {
436		pr_err("failed to map PI sg (%u)\n",
437		       sgt.nents + prot_sgt.nents);
438		goto out_destroy_sig_mr;
439	}
440
441	ctx->reg->reg_wr.wr.opcode = IB_WR_REG_MR_INTEGRITY;
442	ctx->reg->reg_wr.wr.wr_cqe = NULL;
443	ctx->reg->reg_wr.wr.num_sge = 0;
444	ctx->reg->reg_wr.wr.send_flags = 0;
445	ctx->reg->reg_wr.access = IB_ACCESS_LOCAL_WRITE;
446	if (rdma_protocol_iwarp(qp->device, port_num))
447		ctx->reg->reg_wr.access |= IB_ACCESS_REMOTE_WRITE;
448	ctx->reg->reg_wr.mr = ctx->reg->mr;
449	ctx->reg->reg_wr.key = ctx->reg->mr->lkey;
450	count++;
451
452	ctx->reg->sge.addr = ctx->reg->mr->iova;
453	ctx->reg->sge.length = ctx->reg->mr->length;
454	if (sig_attrs->wire.sig_type == IB_SIG_TYPE_NONE)
455		ctx->reg->sge.length -= ctx->reg->mr->sig_attrs->meta_length;
456
457	rdma_wr = &ctx->reg->wr;
458	rdma_wr->wr.sg_list = &ctx->reg->sge;
459	rdma_wr->wr.num_sge = 1;
460	rdma_wr->remote_addr = remote_addr;
461	rdma_wr->rkey = rkey;
462	if (dir == DMA_TO_DEVICE)
463		rdma_wr->wr.opcode = IB_WR_RDMA_WRITE;
464	else
465		rdma_wr->wr.opcode = IB_WR_RDMA_READ;
466	ctx->reg->reg_wr.wr.next = &rdma_wr->wr;
467	count++;
468
469	return count;
470
471out_destroy_sig_mr:
472	ib_mr_pool_put(qp, &qp->sig_mrs, ctx->reg->mr);
473out_free_ctx:
474	kfree(ctx->reg);
475out_unmap_prot_sg:
476	if (prot_sgt.nents)
477		ib_dma_unmap_sgtable_attrs(dev, &prot_sgt, dir, 0);
478out_unmap_sg:
479	ib_dma_unmap_sgtable_attrs(dev, &sgt, dir, 0);
480	return ret;
481}
482EXPORT_SYMBOL(rdma_rw_ctx_signature_init);
483
484/*
485 * Now that we are going to post the WRs we can update the lkey and need_inval
486 * state on the MRs.  If we were doing this at init time, we would get double
487 * or missing invalidations if a context was initialized but not actually
488 * posted.
489 */
490static void rdma_rw_update_lkey(struct rdma_rw_reg_ctx *reg, bool need_inval)
491{
492	reg->mr->need_inval = need_inval;
493	ib_update_fast_reg_key(reg->mr, ib_inc_rkey(reg->mr->lkey));
494	reg->reg_wr.key = reg->mr->lkey;
495	reg->sge.lkey = reg->mr->lkey;
496}
497
498/**
499 * rdma_rw_ctx_wrs - return chain of WRs for a RDMA READ or WRITE operation
500 * @ctx:	context to operate on
501 * @qp:		queue pair to operate on
502 * @port_num:	port num to which the connection is bound
503 * @cqe:	completion queue entry for the last WR
504 * @chain_wr:	WR to append to the posted chain
505 *
506 * Return the WR chain for the set of RDMA READ/WRITE operations described by
507 * @ctx, as well as any memory registration operations needed.  If @chain_wr
508 * is non-NULL the WR it points to will be appended to the chain of WRs posted.
509 * If @chain_wr is not set @cqe must be set so that the caller gets a
510 * completion notification.
511 */
512struct ib_send_wr *rdma_rw_ctx_wrs(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
513		u32 port_num, struct ib_cqe *cqe, struct ib_send_wr *chain_wr)
514{
515	struct ib_send_wr *first_wr, *last_wr;
516	int i;
517
518	switch (ctx->type) {
519	case RDMA_RW_SIG_MR:
520	case RDMA_RW_MR:
521		for (i = 0; i < ctx->nr_ops; i++) {
522			rdma_rw_update_lkey(&ctx->reg[i],
523				ctx->reg[i].wr.wr.opcode !=
524					IB_WR_RDMA_READ_WITH_INV);
525		}
526
527		if (ctx->reg[0].inv_wr.next)
528			first_wr = &ctx->reg[0].inv_wr;
529		else
530			first_wr = &ctx->reg[0].reg_wr.wr;
531		last_wr = &ctx->reg[ctx->nr_ops - 1].wr.wr;
532		break;
533	case RDMA_RW_MULTI_WR:
534		first_wr = &ctx->map.wrs[0].wr;
535		last_wr = &ctx->map.wrs[ctx->nr_ops - 1].wr;
536		break;
537	case RDMA_RW_SINGLE_WR:
538		first_wr = &ctx->single.wr.wr;
539		last_wr = &ctx->single.wr.wr;
540		break;
541	default:
542		BUG();
543	}
544
545	if (chain_wr) {
546		last_wr->next = chain_wr;
547	} else {
548		last_wr->wr_cqe = cqe;
549		last_wr->send_flags |= IB_SEND_SIGNALED;
550	}
551
552	return first_wr;
553}
554EXPORT_SYMBOL(rdma_rw_ctx_wrs);
555
556/**
557 * rdma_rw_ctx_post - post a RDMA READ or RDMA WRITE operation
558 * @ctx:	context to operate on
559 * @qp:		queue pair to operate on
560 * @port_num:	port num to which the connection is bound
561 * @cqe:	completion queue entry for the last WR
562 * @chain_wr:	WR to append to the posted chain
563 *
564 * Post the set of RDMA READ/WRITE operations described by @ctx, as well as
565 * any memory registration operations needed.  If @chain_wr is non-NULL the
566 * WR it points to will be appended to the chain of WRs posted.  If @chain_wr
567 * is not set @cqe must be set so that the caller gets a completion
568 * notification.
569 */
570int rdma_rw_ctx_post(struct rdma_rw_ctx *ctx, struct ib_qp *qp, u32 port_num,
571		struct ib_cqe *cqe, struct ib_send_wr *chain_wr)
572{
573	struct ib_send_wr *first_wr;
574
575	first_wr = rdma_rw_ctx_wrs(ctx, qp, port_num, cqe, chain_wr);
576	return ib_post_send(qp, first_wr, NULL);
577}
578EXPORT_SYMBOL(rdma_rw_ctx_post);
579
580/**
581 * rdma_rw_ctx_destroy - release all resources allocated by rdma_rw_ctx_init
582 * @ctx:	context to release
583 * @qp:		queue pair to operate on
584 * @port_num:	port num to which the connection is bound
585 * @sg:		scatterlist that was used for the READ/WRITE
586 * @sg_cnt:	number of entries in @sg
587 * @dir:	%DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ
588 */
589void rdma_rw_ctx_destroy(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
590			 u32 port_num, struct scatterlist *sg, u32 sg_cnt,
591			 enum dma_data_direction dir)
592{
593	int i;
594
595	switch (ctx->type) {
596	case RDMA_RW_MR:
597		for (i = 0; i < ctx->nr_ops; i++)
598			ib_mr_pool_put(qp, &qp->rdma_mrs, ctx->reg[i].mr);
599		kfree(ctx->reg);
600		break;
601	case RDMA_RW_MULTI_WR:
602		kfree(ctx->map.wrs);
603		kfree(ctx->map.sges);
604		break;
605	case RDMA_RW_SINGLE_WR:
606		break;
607	default:
608		BUG();
609		break;
610	}
611
612	ib_dma_unmap_sg(qp->pd->device, sg, sg_cnt, dir);
613}
614EXPORT_SYMBOL(rdma_rw_ctx_destroy);
615
616/**
617 * rdma_rw_ctx_destroy_signature - release all resources allocated by
618 *	rdma_rw_ctx_signature_init
619 * @ctx:	context to release
620 * @qp:		queue pair to operate on
621 * @port_num:	port num to which the connection is bound
622 * @sg:		scatterlist that was used for the READ/WRITE
623 * @sg_cnt:	number of entries in @sg
624 * @prot_sg:	scatterlist that was used for the READ/WRITE of the PI
625 * @prot_sg_cnt: number of entries in @prot_sg
626 * @dir:	%DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ
627 */
628void rdma_rw_ctx_destroy_signature(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
629		u32 port_num, struct scatterlist *sg, u32 sg_cnt,
630		struct scatterlist *prot_sg, u32 prot_sg_cnt,
631		enum dma_data_direction dir)
632{
633	if (WARN_ON_ONCE(ctx->type != RDMA_RW_SIG_MR))
634		return;
635
636	ib_mr_pool_put(qp, &qp->sig_mrs, ctx->reg->mr);
637	kfree(ctx->reg);
638
639	if (prot_sg_cnt)
640		ib_dma_unmap_sg(qp->pd->device, prot_sg, prot_sg_cnt, dir);
641	ib_dma_unmap_sg(qp->pd->device, sg, sg_cnt, dir);
642}
643EXPORT_SYMBOL(rdma_rw_ctx_destroy_signature);
644
645/**
646 * rdma_rw_mr_factor - return number of MRs required for a payload
647 * @device:	device handling the connection
648 * @port_num:	port num to which the connection is bound
649 * @maxpages:	maximum payload pages per rdma_rw_ctx
650 *
651 * Returns the number of MRs the device requires to move @maxpayload
652 * bytes. The returned value is used during transport creation to
653 * compute max_rdma_ctxts and the size of the transport's Send and
654 * Send Completion Queues.
655 */
656unsigned int rdma_rw_mr_factor(struct ib_device *device, u32 port_num,
657			       unsigned int maxpages)
658{
659	unsigned int mr_pages;
660
661	if (rdma_rw_can_use_mr(device, port_num))
662		mr_pages = rdma_rw_fr_page_list_len(device, false);
663	else
664		mr_pages = device->attrs.max_sge_rd;
665	return DIV_ROUND_UP(maxpages, mr_pages);
666}
667EXPORT_SYMBOL(rdma_rw_mr_factor);
668
669/**
670 * rdma_rw_max_send_wr - compute max Send WRs needed for RDMA R/W contexts
671 * @dev: RDMA device
672 * @port_num: port number
673 * @max_rdma_ctxs: number of rdma_rw_ctx structures
674 * @create_flags: QP create flags (pass IB_QP_CREATE_INTEGRITY_EN if
675 *                data integrity will be enabled on the QP)
676 *
677 * Returns the total number of Send Queue entries needed for
678 * @max_rdma_ctxs. The result accounts for memory registration and
679 * invalidation work requests when the device requires them.
680 *
681 * ULPs use this to size Send Queues and Send CQs before creating a
682 * Queue Pair.
683 */
684unsigned int rdma_rw_max_send_wr(struct ib_device *dev, u32 port_num,
685				 unsigned int max_rdma_ctxs, u32 create_flags)
686{
687	unsigned int factor = 1;
688	unsigned int result;
689
690	if (create_flags & IB_QP_CREATE_INTEGRITY_EN ||
691	    rdma_rw_can_use_mr(dev, port_num))
692		factor += 2;	/* reg + inv */
693
694	if (check_mul_overflow(factor, max_rdma_ctxs, &result))
695		return UINT_MAX;
696	return result;
697}
698EXPORT_SYMBOL(rdma_rw_max_send_wr);
699
700void rdma_rw_init_qp(struct ib_device *dev, struct ib_qp_init_attr *attr)
701{
702	unsigned int factor = 1;
703
704	WARN_ON_ONCE(attr->port_num == 0);
705
706	/*
707	 * If the device uses MRs to perform RDMA READ or WRITE operations,
708	 * or if data integrity is enabled, account for registration and
709	 * invalidation work requests.
710	 */
711	if (attr->create_flags & IB_QP_CREATE_INTEGRITY_EN ||
712	    rdma_rw_can_use_mr(dev, attr->port_num))
713		factor += 2;	/* reg + inv */
714
715	attr->cap.max_send_wr += factor * attr->cap.max_rdma_ctxs;
716
717	/*
718	 * The device might not support all we need, and we'll have to
719	 * live with what we get.
720	 */
721	attr->cap.max_send_wr =
722		min_t(u32, attr->cap.max_send_wr, dev->attrs.max_qp_wr);
723}
724
725int rdma_rw_init_mrs(struct ib_qp *qp, struct ib_qp_init_attr *attr)
726{
727	struct ib_device *dev = qp->pd->device;
728	u32 nr_mrs = 0, nr_sig_mrs = 0, max_num_sg = 0;
729	int ret = 0;
730
731	if (attr->create_flags & IB_QP_CREATE_INTEGRITY_EN) {
732		nr_sig_mrs = attr->cap.max_rdma_ctxs;
733		nr_mrs = attr->cap.max_rdma_ctxs;
734		max_num_sg = rdma_rw_fr_page_list_len(dev, true);
735	} else if (rdma_rw_can_use_mr(dev, attr->port_num)) {
736		nr_mrs = attr->cap.max_rdma_ctxs;
737		max_num_sg = rdma_rw_fr_page_list_len(dev, false);
738	}
739
740	if (nr_mrs) {
741		ret = ib_mr_pool_init(qp, &qp->rdma_mrs, nr_mrs,
742				IB_MR_TYPE_MEM_REG,
743				max_num_sg, 0);
744		if (ret) {
745			pr_err("%s: failed to allocated %u MRs\n",
746				__func__, nr_mrs);
747			return ret;
748		}
749	}
750
751	if (nr_sig_mrs) {
752		ret = ib_mr_pool_init(qp, &qp->sig_mrs, nr_sig_mrs,
753				IB_MR_TYPE_INTEGRITY, max_num_sg, max_num_sg);
754		if (ret) {
755			pr_err("%s: failed to allocated %u SIG MRs\n",
756				__func__, nr_sig_mrs);
757			goto out_free_rdma_mrs;
758		}
759	}
760
761	return 0;
762
763out_free_rdma_mrs:
764	ib_mr_pool_destroy(qp, &qp->rdma_mrs);
765	return ret;
766}
767
768void rdma_rw_cleanup_mrs(struct ib_qp *qp)
769{
770	ib_mr_pool_destroy(qp, &qp->sig_mrs);
771	ib_mr_pool_destroy(qp, &qp->rdma_mrs);
772}