mcp4131.c

  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Industrial I/O driver for Microchip digital potentiometers
  4 *
  5 * Copyright (c) 2016 Slawomir Stepien
  6 * Based on: Peter Rosin's code from mcp4531.c
  7 *
  8 * Datasheet: https://ww1.microchip.com/downloads/en/DeviceDoc/22060b.pdf
  9 *
 10 * DEVID	#Wipers	#Positions	Resistor Opts (kOhm)
 11 * mcp4131	1	129		5, 10, 50, 100
 12 * mcp4132	1	129		5, 10, 50, 100
 13 * mcp4141	1	129		5, 10, 50, 100
 14 * mcp4142	1	129		5, 10, 50, 100
 15 * mcp4151	1	257		5, 10, 50, 100
 16 * mcp4152	1	257		5, 10, 50, 100
 17 * mcp4161	1	257		5, 10, 50, 100
 18 * mcp4162	1	257		5, 10, 50, 100
 19 * mcp4231	2	129		5, 10, 50, 100
 20 * mcp4232	2	129		5, 10, 50, 100
 21 * mcp4241	2	129		5, 10, 50, 100
 22 * mcp4242	2	129		5, 10, 50, 100
 23 * mcp4251	2	257		5, 10, 50, 100
 24 * mcp4252	2	257		5, 10, 50, 100
 25 * mcp4261	2	257		5, 10, 50, 100
 26 * mcp4262	2	257		5, 10, 50, 100
 27 */
 28
 29/*
 30 * TODO:
 31 * 1. Write wiper setting to EEPROM for EEPROM capable models.
 32 */
 33
 34#include <linux/cache.h>
 35#include <linux/err.h>
 36#include <linux/iio/iio.h>
 37#include <linux/iio/types.h>
 38#include <linux/module.h>
 39#include <linux/mod_devicetable.h>
 40#include <linux/mutex.h>
 41#include <linux/property.h>
 42#include <linux/spi/spi.h>
 43
 44#define MCP4131_WRITE		(0x00 << 2)
 45#define MCP4131_READ		(0x03 << 2)
 46
 47#define MCP4131_WIPER_SHIFT	4
 48#define MCP4131_CMDERR(r)	((r[0]) & 0x02)
 49#define MCP4131_RAW(r)		((r[0]) == 0xff ? 0x100 : (r[1]))
 50
 51struct mcp4131_cfg {
 52	int wipers;
 53	int max_pos;
 54	int kohms;
 55};
 56
 57enum mcp4131_type {
 58	MCP413x_502 = 0,
 59	MCP413x_103,
 60	MCP413x_503,
 61	MCP413x_104,
 62	MCP414x_502,
 63	MCP414x_103,
 64	MCP414x_503,
 65	MCP414x_104,
 66	MCP415x_502,
 67	MCP415x_103,
 68	MCP415x_503,
 69	MCP415x_104,
 70	MCP416x_502,
 71	MCP416x_103,
 72	MCP416x_503,
 73	MCP416x_104,
 74	MCP423x_502,
 75	MCP423x_103,
 76	MCP423x_503,
 77	MCP423x_104,
 78	MCP424x_502,
 79	MCP424x_103,
 80	MCP424x_503,
 81	MCP424x_104,
 82	MCP425x_502,
 83	MCP425x_103,
 84	MCP425x_503,
 85	MCP425x_104,
 86	MCP426x_502,
 87	MCP426x_103,
 88	MCP426x_503,
 89	MCP426x_104,
 90};
 91
 92static const struct mcp4131_cfg mcp4131_cfg[] = {
 93	[MCP413x_502] = { .wipers = 1, .max_pos = 128, .kohms =   5, },
 94	[MCP413x_103] = { .wipers = 1, .max_pos = 128, .kohms =  10, },
 95	[MCP413x_503] = { .wipers = 1, .max_pos = 128, .kohms =  50, },
 96	[MCP413x_104] = { .wipers = 1, .max_pos = 128, .kohms = 100, },
 97	[MCP414x_502] = { .wipers = 1, .max_pos = 128, .kohms =   5, },
 98	[MCP414x_103] = { .wipers = 1, .max_pos = 128, .kohms =  10, },
 99	[MCP414x_503] = { .wipers = 1, .max_pos = 128, .kohms =  50, },
100	[MCP414x_104] = { .wipers = 1, .max_pos = 128, .kohms = 100, },
101	[MCP415x_502] = { .wipers = 1, .max_pos = 256, .kohms =   5, },
102	[MCP415x_103] = { .wipers = 1, .max_pos = 256, .kohms =  10, },
103	[MCP415x_503] = { .wipers = 1, .max_pos = 256, .kohms =  50, },
104	[MCP415x_104] = { .wipers = 1, .max_pos = 256, .kohms = 100, },
105	[MCP416x_502] = { .wipers = 1, .max_pos = 256, .kohms =   5, },
106	[MCP416x_103] = { .wipers = 1, .max_pos = 256, .kohms =  10, },
107	[MCP416x_503] = { .wipers = 1, .max_pos = 256, .kohms =  50, },
108	[MCP416x_104] = { .wipers = 1, .max_pos = 256, .kohms = 100, },
109	[MCP423x_502] = { .wipers = 2, .max_pos = 128, .kohms =   5, },
110	[MCP423x_103] = { .wipers = 2, .max_pos = 128, .kohms =  10, },
111	[MCP423x_503] = { .wipers = 2, .max_pos = 128, .kohms =  50, },
112	[MCP423x_104] = { .wipers = 2, .max_pos = 128, .kohms = 100, },
113	[MCP424x_502] = { .wipers = 2, .max_pos = 128, .kohms =   5, },
114	[MCP424x_103] = { .wipers = 2, .max_pos = 128, .kohms =  10, },
115	[MCP424x_503] = { .wipers = 2, .max_pos = 128, .kohms =  50, },
116	[MCP424x_104] = { .wipers = 2, .max_pos = 128, .kohms = 100, },
117	[MCP425x_502] = { .wipers = 2, .max_pos = 256, .kohms =   5, },
118	[MCP425x_103] = { .wipers = 2, .max_pos = 256, .kohms =  10, },
119	[MCP425x_503] = { .wipers = 2, .max_pos = 256, .kohms =  50, },
120	[MCP425x_104] = { .wipers = 2, .max_pos = 256, .kohms = 100, },
121	[MCP426x_502] = { .wipers = 2, .max_pos = 256, .kohms =   5, },
122	[MCP426x_103] = { .wipers = 2, .max_pos = 256, .kohms =  10, },
123	[MCP426x_503] = { .wipers = 2, .max_pos = 256, .kohms =  50, },
124	[MCP426x_104] = { .wipers = 2, .max_pos = 256, .kohms = 100, },
125};
126
127struct mcp4131_data {
128	struct spi_device *spi;
129	const struct mcp4131_cfg *cfg;
130	struct mutex lock;
131	u8 buf[2] __aligned(IIO_DMA_MINALIGN);
132};
133
134#define MCP4131_CHANNEL(ch) {					\
135	.type = IIO_RESISTANCE,					\
136	.indexed = 1,						\
137	.output = 1,						\
138	.channel = (ch),					\
139	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),		\
140	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),	\
141}
142
143static const struct iio_chan_spec mcp4131_channels[] = {
144	MCP4131_CHANNEL(0),
145	MCP4131_CHANNEL(1),
146};
147
148static int mcp4131_read(struct spi_device *spi, void *buf, size_t len)
149{
150	struct spi_transfer t = {
151		.tx_buf = buf, /* We need to send addr, cmd and 12 bits */
152		.rx_buf	= buf,
153		.len = len,
154	};
155	struct spi_message m;
156
157	spi_message_init(&m);
158	spi_message_add_tail(&t, &m);
159
160	return spi_sync(spi, &m);
161}
162
163static int mcp4131_read_raw(struct iio_dev *indio_dev,
164			    struct iio_chan_spec const *chan,
165			    int *val, int *val2, long mask)
166{
167	int err;
168	struct mcp4131_data *data = iio_priv(indio_dev);
169	int address = chan->channel;
170
171	switch (mask) {
172	case IIO_CHAN_INFO_RAW:
173		mutex_lock(&data->lock);
174
175		data->buf[0] = (address << MCP4131_WIPER_SHIFT) | MCP4131_READ;
176		data->buf[1] = 0;
177
178		err = mcp4131_read(data->spi, data->buf, 2);
179		if (err) {
180			mutex_unlock(&data->lock);
181			return err;
182		}
183
184		/* Error, bad address/command combination */
185		if (!MCP4131_CMDERR(data->buf)) {
186			mutex_unlock(&data->lock);
187			return -EIO;
188		}
189
190		*val = MCP4131_RAW(data->buf);
191		mutex_unlock(&data->lock);
192
193		return IIO_VAL_INT;
194
195	case IIO_CHAN_INFO_SCALE:
196		*val = 1000 * data->cfg->kohms;
197		*val2 = data->cfg->max_pos;
198		return IIO_VAL_FRACTIONAL;
199	}
200
201	return -EINVAL;
202}
203
204static int mcp4131_write_raw(struct iio_dev *indio_dev,
205			     struct iio_chan_spec const *chan,
206			     int val, int val2, long mask)
207{
208	int err;
209	struct mcp4131_data *data = iio_priv(indio_dev);
210	int address = chan->channel << MCP4131_WIPER_SHIFT;
211
212	switch (mask) {
213	case IIO_CHAN_INFO_RAW:
214		if (val > data->cfg->max_pos || val < 0)
215			return -EINVAL;
216		break;
217
218	default:
219		return -EINVAL;
220	}
221
222	mutex_lock(&data->lock);
223
224	data->buf[0] = address;
225	data->buf[0] |= MCP4131_WRITE | (val >> 8);
226	data->buf[1] = val & 0xFF; /* 8 bits here */
227
228	err = spi_write(data->spi, data->buf, 2);
229	mutex_unlock(&data->lock);
230
231	return err;
232}
233
234static const struct iio_info mcp4131_info = {
235	.read_raw = mcp4131_read_raw,
236	.write_raw = mcp4131_write_raw,
237};
238
239static int mcp4131_probe(struct spi_device *spi)
240{
241	int err;
242	struct device *dev = &spi->dev;
243	unsigned long devid;
244	struct mcp4131_data *data;
245	struct iio_dev *indio_dev;
246
247	indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
248	if (!indio_dev)
249		return -ENOMEM;
250
251	data = iio_priv(indio_dev);
252	spi_set_drvdata(spi, indio_dev);
253	data->spi = spi;
254	data->cfg = device_get_match_data(&spi->dev);
255	if (!data->cfg) {
256		devid = spi_get_device_id(spi)->driver_data;
257		data->cfg = &mcp4131_cfg[devid];
258	}
259
260	mutex_init(&data->lock);
261
262	indio_dev->info = &mcp4131_info;
263	indio_dev->channels = mcp4131_channels;
264	indio_dev->num_channels = data->cfg->wipers;
265	indio_dev->name = spi_get_device_id(spi)->name;
266
267	err = devm_iio_device_register(dev, indio_dev);
268	if (err) {
269		dev_info(&spi->dev, "Unable to register %s\n", indio_dev->name);
270		return err;
271	}
272
273	return 0;
274}
275
276static const struct of_device_id mcp4131_dt_ids[] = {
277	{ .compatible = "microchip,mcp4131-502",
278		.data = &mcp4131_cfg[MCP413x_502] },
279	{ .compatible = "microchip,mcp4131-103",
280		.data = &mcp4131_cfg[MCP413x_103] },
281	{ .compatible = "microchip,mcp4131-503",
282		.data = &mcp4131_cfg[MCP413x_503] },
283	{ .compatible = "microchip,mcp4131-104",
284		.data = &mcp4131_cfg[MCP413x_104] },
285	{ .compatible = "microchip,mcp4132-502",
286		.data = &mcp4131_cfg[MCP413x_502] },
287	{ .compatible = "microchip,mcp4132-103",
288		.data = &mcp4131_cfg[MCP413x_103] },
289	{ .compatible = "microchip,mcp4132-503",
290		.data = &mcp4131_cfg[MCP413x_503] },
291	{ .compatible = "microchip,mcp4132-104",
292		.data = &mcp4131_cfg[MCP413x_104] },
293	{ .compatible = "microchip,mcp4141-502",
294		.data = &mcp4131_cfg[MCP414x_502] },
295	{ .compatible = "microchip,mcp4141-103",
296		.data = &mcp4131_cfg[MCP414x_103] },
297	{ .compatible = "microchip,mcp4141-503",
298		.data = &mcp4131_cfg[MCP414x_503] },
299	{ .compatible = "microchip,mcp4141-104",
300		.data = &mcp4131_cfg[MCP414x_104] },
301	{ .compatible = "microchip,mcp4142-502",
302		.data = &mcp4131_cfg[MCP414x_502] },
303	{ .compatible = "microchip,mcp4142-103",
304		.data = &mcp4131_cfg[MCP414x_103] },
305	{ .compatible = "microchip,mcp4142-503",
306		.data = &mcp4131_cfg[MCP414x_503] },
307	{ .compatible = "microchip,mcp4142-104",
308		.data = &mcp4131_cfg[MCP414x_104] },
309	{ .compatible = "microchip,mcp4151-502",
310		.data = &mcp4131_cfg[MCP415x_502] },
311	{ .compatible = "microchip,mcp4151-103",
312		.data = &mcp4131_cfg[MCP415x_103] },
313	{ .compatible = "microchip,mcp4151-503",
314		.data = &mcp4131_cfg[MCP415x_503] },
315	{ .compatible = "microchip,mcp4151-104",
316		.data = &mcp4131_cfg[MCP415x_104] },
317	{ .compatible = "microchip,mcp4152-502",
318		.data = &mcp4131_cfg[MCP415x_502] },
319	{ .compatible = "microchip,mcp4152-103",
320		.data = &mcp4131_cfg[MCP415x_103] },
321	{ .compatible = "microchip,mcp4152-503",
322		.data = &mcp4131_cfg[MCP415x_503] },
323	{ .compatible = "microchip,mcp4152-104",
324		.data = &mcp4131_cfg[MCP415x_104] },
325	{ .compatible = "microchip,mcp4161-502",
326		.data = &mcp4131_cfg[MCP416x_502] },
327	{ .compatible = "microchip,mcp4161-103",
328		.data = &mcp4131_cfg[MCP416x_103] },
329	{ .compatible = "microchip,mcp4161-503",
330		.data = &mcp4131_cfg[MCP416x_503] },
331	{ .compatible = "microchip,mcp4161-104",
332		.data = &mcp4131_cfg[MCP416x_104] },
333	{ .compatible = "microchip,mcp4162-502",
334		.data = &mcp4131_cfg[MCP416x_502] },
335	{ .compatible = "microchip,mcp4162-103",
336		.data = &mcp4131_cfg[MCP416x_103] },
337	{ .compatible = "microchip,mcp4162-503",
338		.data = &mcp4131_cfg[MCP416x_503] },
339	{ .compatible = "microchip,mcp4162-104",
340		.data = &mcp4131_cfg[MCP416x_104] },
341	{ .compatible = "microchip,mcp4231-502",
342		.data = &mcp4131_cfg[MCP423x_502] },
343	{ .compatible = "microchip,mcp4231-103",
344		.data = &mcp4131_cfg[MCP423x_103] },
345	{ .compatible = "microchip,mcp4231-503",
346		.data = &mcp4131_cfg[MCP423x_503] },
347	{ .compatible = "microchip,mcp4231-104",
348		.data = &mcp4131_cfg[MCP423x_104] },
349	{ .compatible = "microchip,mcp4232-502",
350		.data = &mcp4131_cfg[MCP423x_502] },
351	{ .compatible = "microchip,mcp4232-103",
352		.data = &mcp4131_cfg[MCP423x_103] },
353	{ .compatible = "microchip,mcp4232-503",
354		.data = &mcp4131_cfg[MCP423x_503] },
355	{ .compatible = "microchip,mcp4232-104",
356		.data = &mcp4131_cfg[MCP423x_104] },
357	{ .compatible = "microchip,mcp4241-502",
358		.data = &mcp4131_cfg[MCP424x_502] },
359	{ .compatible = "microchip,mcp4241-103",
360		.data = &mcp4131_cfg[MCP424x_103] },
361	{ .compatible = "microchip,mcp4241-503",
362		.data = &mcp4131_cfg[MCP424x_503] },
363	{ .compatible = "microchip,mcp4241-104",
364		.data = &mcp4131_cfg[MCP424x_104] },
365	{ .compatible = "microchip,mcp4242-502",
366		.data = &mcp4131_cfg[MCP424x_502] },
367	{ .compatible = "microchip,mcp4242-103",
368		.data = &mcp4131_cfg[MCP424x_103] },
369	{ .compatible = "microchip,mcp4242-503",
370		.data = &mcp4131_cfg[MCP424x_503] },
371	{ .compatible = "microchip,mcp4242-104",
372		.data = &mcp4131_cfg[MCP424x_104] },
373	{ .compatible = "microchip,mcp4251-502",
374		.data = &mcp4131_cfg[MCP425x_502] },
375	{ .compatible = "microchip,mcp4251-103",
376		.data = &mcp4131_cfg[MCP425x_103] },
377	{ .compatible = "microchip,mcp4251-503",
378		.data = &mcp4131_cfg[MCP425x_503] },
379	{ .compatible = "microchip,mcp4251-104",
380		.data = &mcp4131_cfg[MCP425x_104] },
381	{ .compatible = "microchip,mcp4252-502",
382		.data = &mcp4131_cfg[MCP425x_502] },
383	{ .compatible = "microchip,mcp4252-103",
384		.data = &mcp4131_cfg[MCP425x_103] },
385	{ .compatible = "microchip,mcp4252-503",
386		.data = &mcp4131_cfg[MCP425x_503] },
387	{ .compatible = "microchip,mcp4252-104",
388		.data = &mcp4131_cfg[MCP425x_104] },
389	{ .compatible = "microchip,mcp4261-502",
390		.data = &mcp4131_cfg[MCP426x_502] },
391	{ .compatible = "microchip,mcp4261-103",
392		.data = &mcp4131_cfg[MCP426x_103] },
393	{ .compatible = "microchip,mcp4261-503",
394		.data = &mcp4131_cfg[MCP426x_503] },
395	{ .compatible = "microchip,mcp4261-104",
396		.data = &mcp4131_cfg[MCP426x_104] },
397	{ .compatible = "microchip,mcp4262-502",
398		.data = &mcp4131_cfg[MCP426x_502] },
399	{ .compatible = "microchip,mcp4262-103",
400		.data = &mcp4131_cfg[MCP426x_103] },
401	{ .compatible = "microchip,mcp4262-503",
402		.data = &mcp4131_cfg[MCP426x_503] },
403	{ .compatible = "microchip,mcp4262-104",
404		.data = &mcp4131_cfg[MCP426x_104] },
405	{ }
406};
407MODULE_DEVICE_TABLE(of, mcp4131_dt_ids);
408
409static const struct spi_device_id mcp4131_id[] = {
410	{ "mcp4131-502", MCP413x_502 },
411	{ "mcp4131-103", MCP413x_103 },
412	{ "mcp4131-503", MCP413x_503 },
413	{ "mcp4131-104", MCP413x_104 },
414	{ "mcp4132-502", MCP413x_502 },
415	{ "mcp4132-103", MCP413x_103 },
416	{ "mcp4132-503", MCP413x_503 },
417	{ "mcp4132-104", MCP413x_104 },
418	{ "mcp4141-502", MCP414x_502 },
419	{ "mcp4141-103", MCP414x_103 },
420	{ "mcp4141-503", MCP414x_503 },
421	{ "mcp4141-104", MCP414x_104 },
422	{ "mcp4142-502", MCP414x_502 },
423	{ "mcp4142-103", MCP414x_103 },
424	{ "mcp4142-503", MCP414x_503 },
425	{ "mcp4142-104", MCP414x_104 },
426	{ "mcp4151-502", MCP415x_502 },
427	{ "mcp4151-103", MCP415x_103 },
428	{ "mcp4151-503", MCP415x_503 },
429	{ "mcp4151-104", MCP415x_104 },
430	{ "mcp4152-502", MCP415x_502 },
431	{ "mcp4152-103", MCP415x_103 },
432	{ "mcp4152-503", MCP415x_503 },
433	{ "mcp4152-104", MCP415x_104 },
434	{ "mcp4161-502", MCP416x_502 },
435	{ "mcp4161-103", MCP416x_103 },
436	{ "mcp4161-503", MCP416x_503 },
437	{ "mcp4161-104", MCP416x_104 },
438	{ "mcp4162-502", MCP416x_502 },
439	{ "mcp4162-103", MCP416x_103 },
440	{ "mcp4162-503", MCP416x_503 },
441	{ "mcp4162-104", MCP416x_104 },
442	{ "mcp4231-502", MCP423x_502 },
443	{ "mcp4231-103", MCP423x_103 },
444	{ "mcp4231-503", MCP423x_503 },
445	{ "mcp4231-104", MCP423x_104 },
446	{ "mcp4232-502", MCP423x_502 },
447	{ "mcp4232-103", MCP423x_103 },
448	{ "mcp4232-503", MCP423x_503 },
449	{ "mcp4232-104", MCP423x_104 },
450	{ "mcp4241-502", MCP424x_502 },
451	{ "mcp4241-103", MCP424x_103 },
452	{ "mcp4241-503", MCP424x_503 },
453	{ "mcp4241-104", MCP424x_104 },
454	{ "mcp4242-502", MCP424x_502 },
455	{ "mcp4242-103", MCP424x_103 },
456	{ "mcp4242-503", MCP424x_503 },
457	{ "mcp4242-104", MCP424x_104 },
458	{ "mcp4251-502", MCP425x_502 },
459	{ "mcp4251-103", MCP425x_103 },
460	{ "mcp4251-503", MCP425x_503 },
461	{ "mcp4251-104", MCP425x_104 },
462	{ "mcp4252-502", MCP425x_502 },
463	{ "mcp4252-103", MCP425x_103 },
464	{ "mcp4252-503", MCP425x_503 },
465	{ "mcp4252-104", MCP425x_104 },
466	{ "mcp4261-502", MCP426x_502 },
467	{ "mcp4261-103", MCP426x_103 },
468	{ "mcp4261-503", MCP426x_503 },
469	{ "mcp4261-104", MCP426x_104 },
470	{ "mcp4262-502", MCP426x_502 },
471	{ "mcp4262-103", MCP426x_103 },
472	{ "mcp4262-503", MCP426x_503 },
473	{ "mcp4262-104", MCP426x_104 },
474	{ }
475};
476MODULE_DEVICE_TABLE(spi, mcp4131_id);
477
478static struct spi_driver mcp4131_driver = {
479	.driver = {
480		.name	= "mcp4131",
481		.of_match_table = mcp4131_dt_ids,
482	},
483	.probe		= mcp4131_probe,
484	.id_table	= mcp4131_id,
485};
486
487module_spi_driver(mcp4131_driver);
488
489MODULE_AUTHOR("Slawomir Stepien <sst@poczta.fm>");
490MODULE_DESCRIPTION("MCP4131 digital potentiometer");
491MODULE_LICENSE("GPL v2");